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From: Chao Peng <chao.p.peng@linux.intel.com>
To: xen-devel@lists.xen.org
Cc: wei.liu2@citrix.com, Ian.Campbell@citrix.com,
	stefano.stabellini@eu.citrix.com, Ian.Jackson@eu.citrix.com,
	will.auld@intel.com, JBeulich@suse.com, keir@xen.org
Subject: [PATCH v5 2/6] x86: allow reading MSR_IA32_TSC with XENPF_resource_op
Date: Wed, 21 Jan 2015 19:19:20 +0800	[thread overview]
Message-ID: <1421839164-26037-3-git-send-email-chao.p.peng@linux.intel.com> (raw)
In-Reply-To: <1421839164-26037-1-git-send-email-chao.p.peng@linux.intel.com>

Memory bandwidth monitoring requires system time information returned
along with the monitoring counter to verify the correctness of the
counter value and to calculate the time elapsed between two samplings.
Add MSR_IA32_TSC to the read path and increase
RESOURCE_ACCESS_MAX_ENTRIES to 3. MSR_IA32_TSC access returns NOW()
instead of timestamp which can be used as the scaled time(ns) directly.

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
---
 xen/arch/x86/platform_hypercall.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c
index df99bad..6b23701 100644
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -61,7 +61,7 @@ long cpu_down_helper(void *data);
 long core_parking_helper(void *data);
 uint32_t get_cur_idle_nums(void);
 
-#define RESOURCE_ACCESS_MAX_ENTRIES 2
+#define RESOURCE_ACCESS_MAX_ENTRIES 3
 struct xen_resource_access {
     unsigned int nr_done;
     unsigned int nr_entries;
@@ -75,6 +75,7 @@ static bool_t allow_access_msr(unsigned int msr)
     /* MSR for CMT, refer to chapter 17.14 of Intel SDM. */
     case MSR_IA32_CMT_EVTSEL:
     case MSR_IA32_CMT_CTR:
+    case MSR_IA32_TSC:
         return 1;
     }
 
@@ -143,10 +144,18 @@ static void resource_access(void *info)
         switch ( entry->u.cmd )
         {
         case XEN_RESOURCE_OP_MSR_READ:
-            ret = rdmsr_safe(entry->idx, entry->val);
+            if ( entry->idx == MSR_IA32_TSC ) {
+                entry->val = NOW();
+                ret = 0;
+            }
+            else
+                ret = rdmsr_safe(entry->idx, entry->val);
             break;
         case XEN_RESOURCE_OP_MSR_WRITE:
-            ret = wrmsr_safe(entry->idx, entry->val);
+            if ( entry->idx == MSR_IA32_TSC )
+                ret = -EPERM;
+            else
+                ret = wrmsr_safe(entry->idx, entry->val);
             break;
         default:
             BUG();
-- 
1.9.1

  parent reply	other threads:[~2015-01-21 11:19 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-21 11:19 [PATCH v5 0/6] enable Memory Bandwidth Monitoring (MBM) for VMs Chao Peng
2015-01-21 11:19 ` [PATCH v5 1/6] x86: allow IRQ to be disabled for resource access Chao Peng
2015-01-22 11:18   ` Jan Beulich
2015-01-21 11:19 ` Chao Peng [this message]
2015-01-22 11:20   ` [PATCH v5 2/6] x86: allow reading MSR_IA32_TSC with XENPF_resource_op Jan Beulich
2015-01-22 12:53     ` Chao Peng
2015-01-22 13:36       ` Jan Beulich
2015-01-22 14:03         ` Andrew Cooper
2015-01-22 14:09           ` Jan Beulich
2015-01-23  8:42             ` Chao Peng
2015-01-23  8:58               ` Jan Beulich
2015-01-21 11:19 ` [PATCH v5 3/6] tools: add routine to get CMT L3 event mask Chao Peng
2015-01-21 11:19 ` [PATCH v5 4/6] tools: correct coding style for psr Chao Peng
2015-01-21 11:19 ` [PATCH v5 5/6] tools: code refactoring for MBM Chao Peng
2015-01-21 11:19 ` [PATCH v5 6/6] tools, docs: add total/local memory bandwith monitoring Chao Peng
2015-01-21 11:28 ` [PATCH v5 0/6] enable Memory Bandwidth Monitoring (MBM) for VMs Jan Beulich
2015-01-22  1:12   ` Chao Peng
2015-01-22  7:59     ` Jan Beulich
2015-01-22 10:36       ` Chao Peng

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