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From: Chao Peng <chao.p.peng@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: wei.liu2@citrix.com, Ian.Campbell@citrix.com,
	stefano.stabellini@eu.citrix.com,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Ian.Jackson@eu.citrix.com, xen-devel@lists.xen.org,
	will.auld@intel.com, keir@xen.org
Subject: Re: [PATCH v5 2/6] x86: allow reading MSR_IA32_TSC with XENPF_resource_op
Date: Fri, 23 Jan 2015 16:42:06 +0800	[thread overview]
Message-ID: <20150123084206.GE28428@pengc-linux.bj.intel.com> (raw)
In-Reply-To: <54C112B102000078000582FC@mail.emea.novell.com>

On Thu, Jan 22, 2015 at 02:09:37PM +0000, Jan Beulich wrote:
> >>> On 22.01.15 at 15:03, <andrew.cooper3@citrix.com> wrote:
> > On 22/01/15 13:36, Jan Beulich wrote:
> >>>>> On 22.01.15 at 13:53, <chao.p.peng@linux.intel.com> wrote:
> >>> On Thu, Jan 22, 2015 at 11:20:15AM +0000, Jan Beulich wrote:
> >>>>>>> On 21.01.15 at 12:19, <chao.p.peng@linux.intel.com> wrote:
> >>>>> --- a/xen/arch/x86/platform_hypercall.c
> >>>>> +++ b/xen/arch/x86/platform_hypercall.c
> 
> > Having said this, the only useful timestamp will be at the same point as
> > performing the MSR read.  Having a 3rd operation tacked on the end to
> > get a timestamp will be some arbitrary time later, especially if
> > interrupts are enabled.
> 
> Perhaps the latching of NOW() could happen with the MSR read, and
> the latched value then be stored upon encountering the respective
> slot? That would also allow further limiting the interrupts disabled
> period.

Except that MSR_IA32_TSC will looks heterogeneous. But since we already
treat it as a special case, I have no problem here. And if we do so,
even the first patch to add irq_disable ability is not needed. Sounds to
me that the MSR_IA32_TSC read should always imply irq disabled. Codes
would be like this:

        case XEN_RESOURCE_OP_MSR_READ:
            if ( unlikely(entry->idx == MSR_IA32_TSC) )
            { 
                entry->val = get_s_time_fixed(tsc);
                ret = 0;
            }   
            else
            {
                bool_t  read_tsc = 0;
                if ( i < ra->nr_done - 1 ) 
                {   
                    xenpf_resource_entry_t *next = ra->entries + i + 1;
                    if ( unlikely(next->idx == MSR_IA32_TSC) )
                        read_tsc = 1;
                }

                if ( unlikely(read_tsc) )
                    local_irq_save(irqflags);

                ret = rdmsr_safe(entry->idx, entry->val);

                if ( unlikely(read_tsc) )
                {
                    rdtscll(tsc);
                    local_irq_restore(irqflags);
                }
            }
            break;
        case XEN_RESOURCE_OP_MSR_WRITE:

Chao

  reply	other threads:[~2015-01-23  8:42 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-21 11:19 [PATCH v5 0/6] enable Memory Bandwidth Monitoring (MBM) for VMs Chao Peng
2015-01-21 11:19 ` [PATCH v5 1/6] x86: allow IRQ to be disabled for resource access Chao Peng
2015-01-22 11:18   ` Jan Beulich
2015-01-21 11:19 ` [PATCH v5 2/6] x86: allow reading MSR_IA32_TSC with XENPF_resource_op Chao Peng
2015-01-22 11:20   ` Jan Beulich
2015-01-22 12:53     ` Chao Peng
2015-01-22 13:36       ` Jan Beulich
2015-01-22 14:03         ` Andrew Cooper
2015-01-22 14:09           ` Jan Beulich
2015-01-23  8:42             ` Chao Peng [this message]
2015-01-23  8:58               ` Jan Beulich
2015-01-21 11:19 ` [PATCH v5 3/6] tools: add routine to get CMT L3 event mask Chao Peng
2015-01-21 11:19 ` [PATCH v5 4/6] tools: correct coding style for psr Chao Peng
2015-01-21 11:19 ` [PATCH v5 5/6] tools: code refactoring for MBM Chao Peng
2015-01-21 11:19 ` [PATCH v5 6/6] tools, docs: add total/local memory bandwith monitoring Chao Peng
2015-01-21 11:28 ` [PATCH v5 0/6] enable Memory Bandwidth Monitoring (MBM) for VMs Jan Beulich
2015-01-22  1:12   ` Chao Peng
2015-01-22  7:59     ` Jan Beulich
2015-01-22 10:36       ` Chao Peng

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