* [U-Boot] [PATCH] arm: ls102xa: workaround for cache coherency problem
@ 2015-01-23 7:53 Chenhui Zhao
2015-02-25 21:34 ` York Sun
0 siblings, 1 reply; 2+ messages in thread
From: Chenhui Zhao @ 2015-01-23 7:53 UTC (permalink / raw)
To: u-boot
The RCPM FSM may not be reset after power-on, for example,
in the cases of cold boot and wakeup from deep sleep.
It causes cache coherency problem and may block deep sleep.
Therefore, reset them if they are not be reset.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
---
arch/arm/cpu/armv7/ls102xa/cpu.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index ce2d92f..a61f6d1 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -14,6 +14,13 @@
#include "fsl_epu.h"
+#define DCSR_RCPM2_BLOCK_OFFSET 0x223000
+#define DCSR_RCPM2_CPMFSMCR0 0x400
+#define DCSR_RCPM2_CPMFSMSR0 0x404
+#define DCSR_RCPM2_CPMFSMCR1 0x414
+#define DCSR_RCPM2_CPMFSMSR1 0x418
+#define CPMFSMSR_FSM_STATE_MASK 0x7f
+
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_DISPLAY_CPUINFO)
@@ -107,6 +114,27 @@ int cpu_eth_init(bd_t *bis)
int arch_cpu_init(void)
{
void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
+ void *rcpm2_base =
+ (void *)(CONFIG_SYS_DCSRBAR + DCSR_RCPM2_BLOCK_OFFSET);
+ u32 state;
+
+ /*
+ * The RCPM FSM state may not be reset after power-on.
+ * So, reset them.
+ */
+ state = in_be32(rcpm2_base + DCSR_RCPM2_CPMFSMSR0) &
+ CPMFSMSR_FSM_STATE_MASK;
+ if (state != 0) {
+ out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR0, 0x80);
+ out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR0, 0x0);
+ }
+
+ state = in_be32(rcpm2_base + DCSR_RCPM2_CPMFSMSR1) &
+ CPMFSMSR_FSM_STATE_MASK;
+ if (state != 0) {
+ out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR1, 0x80);
+ out_be32(rcpm2_base + DCSR_RCPM2_CPMFSMCR1, 0x0);
+ }
/*
* After wakeup from deep sleep, Clear EPU registers
--
1.9.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] arm: ls102xa: workaround for cache coherency problem
2015-01-23 7:53 [U-Boot] [PATCH] arm: ls102xa: workaround for cache coherency problem Chenhui Zhao
@ 2015-02-25 21:34 ` York Sun
0 siblings, 0 replies; 2+ messages in thread
From: York Sun @ 2015-02-25 21:34 UTC (permalink / raw)
To: u-boot
On 01/22/2015 11:53 PM, Chenhui Zhao wrote:
> The RCPM FSM may not be reset after power-on, for example,
> in the cases of cold boot and wakeup from deep sleep.
> It causes cache coherency problem and may block deep sleep.
> Therefore, reset them if they are not be reset.
>
> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
> ---
Applied to u-boot-fsl-qoriq master branch, awaiting upstream.
York
^ permalink raw reply [flat|nested] 2+ messages in thread
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2015-01-23 7:53 [U-Boot] [PATCH] arm: ls102xa: workaround for cache coherency problem Chenhui Zhao
2015-02-25 21:34 ` York Sun
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