[PATCH 1/2] drm/imx: ldb: fix split mode for i.MX53

[PATCH 1/2] drm/imx: ldb: fix split mode for i.MX53

[Philipp Zabel]

On i.MX53, the DI0 clock can only be sourced from ldb_di0, and
the DI1 clock can only be sourced from ldb_di1. i.MX6q does not
have this limitation.
Luckily, in split mode both ldb_di0 and ldb_di1 have to be
synchronous, so we can choose either one of them as source for
the display interface. imx_ldb_set_clock is called for both
ldb_di0 and ldb_di1.
With this patch we only try to set the parent clock during the
combination of DI<n> and ldb_di<n> which works on i.MX53.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/gpu/drm/imx/imx-ldb.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 2d6dc94..631909e 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -151,6 +151,13 @@ static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 			clk_get_rate(ldb->clk[chno]));
 
+	/*
+	 * In split mode, do not try to set the di0 parent clock to ldb_di1,
+	 * or the di1 parent clock to ldb_di0, which is not possible on i.MX53.
+	 */
+	if ((ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) && (mux != chno))
+		return;
+
 	/* set display clock mux to LDB input clock */
 	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 	if (ret)
-- 
2.1.4

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[PATCH 2/2] drm/imx: ldb: fix lvds<->di channel mapping on mx53

[Philipp Zabel]

From: Lucas Stach <l.stach@pengutronix.de>

On systems without a mux between the IPU display interfaces
and the LVDS channels it isn't possible to infer the DI
number from the LDB port numbers, but have a static 1:1
mapping.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/gpu/drm/imx/imx-ldb.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 631909e..4fca2b9 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -131,6 +131,19 @@ static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
 	return true;
 }
 
+static int imx_ldb_get_mux_id(struct imx_ldb_channel *channel)
+{
+	/*
+	 * If there is no mux in between the mapping from lvds channel number
+	 * to display interface number is 1:1
+	 */
+	if (channel->ldb->lvds_mux)
+		return imx_drm_encoder_get_mux_id(channel->child,
+						  &channel->encoder);
+	else
+		return channel->chno;
+}
+
 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 		unsigned long serial_clk, unsigned long di_clk)
 {
@@ -195,7 +208,7 @@ static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 	struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 	struct imx_ldb *ldb = imx_ldb_ch->ldb;
 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
-	int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
+	int mux = imx_ldb_get_mux_id(imx_ldb_ch);
 
 	if (dual) {
 		clk_prepare_enable(ldb->clk[0]);
@@ -241,7 +254,7 @@ static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 	unsigned long serial_clk;
 	unsigned long di_clk = mode->clock * 1000;
-	int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
+	int mux = imx_ldb_get_mux_id(imx_ldb_ch);
 
 	if (mode->clock > 170000) {
 		dev_warn(ldb->dev,
-- 
2.1.4

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