* [PATCH 1/2] clk: sunxi: rewrite sun9i_a80_get_pll4_factors()
@ 2015-01-24 11:56 ` Hans de Goede
0 siblings, 0 replies; 8+ messages in thread
From: Hans de Goede @ 2015-01-24 11:56 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Hans de Goede
The old implementation of sun9i_a80_get_pll4_factors() has several issues,
it checks against 256 / 512 in various places where it should use 255 / 511,
it does the wrong thing for low frequencies which are an even multiple of
6 MHz, e.g. if you ask it for 72 MHz it will result in 144 Mhz, and it does
not take into account that n must be at least 12. Moreover it is quite hard
to read / follow it.
This commit rewrites it to be correct in all cases, and makes it much easier
to follow the code / to read.
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
drivers/clk/sunxi/clk-sun9i-core.c | 57 +++++++++++++++++++-------------------
1 file changed, 29 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/sunxi/clk-sun9i-core.c b/drivers/clk/sunxi/clk-sun9i-core.c
index 9b5e7a1..d8da77d 100644
--- a/drivers/clk/sunxi/clk-sun9i-core.c
+++ b/drivers/clk/sunxi/clk-sun9i-core.c
@@ -24,50 +24,51 @@
/**
- * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL1
+ * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL4
* PLL4 rate is calculated as follows
* rate = (parent_rate * n >> p) / (m + 1);
- * parent_rate is always 24Mhz
+ * parent_rate is always 24MHz
*
* p and m are named div1 and div2 in Allwinner's SDK
*/
static void sun9i_a80_get_pll4_factors(u32 *freq, u32 parent_rate,
- u8 *n, u8 *k, u8 *m, u8 *p)
+ u8 *n_ret, u8 *k, u8 *m_ret, u8 *p_ret)
{
- int div;
+ int n;
+ int m = 1;
+ int p = 1;
- /* Normalize value to a 6M multiple */
- div = DIV_ROUND_UP(*freq, 6000000);
+ /* Normalize value to a 6 MHz multiple (24 MHz / 4) */
+ n = DIV_ROUND_UP(*freq, 6000000);
- /* divs above 256 cannot be odd */
- if (div > 256)
- div = round_up(div, 2);
+ /* If n is too large switch to steps of 12 MHz */
+ if (n > 255) {
+ m = 0;
+ n = (n + 1) / 2;
+ }
+
+ /* If n is still too large switch to steps of 24 MHz */
+ if (n > 255) {
+ p = 0;
+ n = (n + 1) / 2;
+ }
- /* divs above 512 must be a multiple of 4 */
- if (div > 512)
- div = round_up(div, 4);
+ /* n must be between 12 and 255 */
+ if (n > 255)
+ n = 255;
+ else if (n < 12)
+ n = 12;
- *freq = 6000000 * div;
+ *freq = ((24000000 * n) >> p) / (m + 1);
/* we were called to round the frequency, we can now return */
- if (n == NULL)
+ if (n_ret == NULL)
return;
- /* p will be 1 for divs under 512 */
- if (div < 512)
- *p = 1;
- else
- *p = 0;
-
- /* m will be 1 if div is odd */
- if (div & 1)
- *m = 1;
- else
- *m = 0;
-
- /* calculate a suitable n based on m and p */
- *n = div / (*p + 1) / (*m + 1);
+ *n_ret = n;
+ *m_ret = m;
+ *p_ret = p;
}
static struct clk_factors_config sun9i_a80_pll4_config = {
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] clk: sunxi: rewrite sun9i_a80_get_pll4_factors()
@ 2015-01-24 11:56 ` Hans de Goede
0 siblings, 0 replies; 8+ messages in thread
From: Hans de Goede @ 2015-01-24 11:56 UTC (permalink / raw)
To: linux-arm-kernel
The old implementation of sun9i_a80_get_pll4_factors() has several issues,
it checks against 256 / 512 in various places where it should use 255 / 511,
it does the wrong thing for low frequencies which are an even multiple of
6 MHz, e.g. if you ask it for 72 MHz it will result in 144 Mhz, and it does
not take into account that n must be at least 12. Moreover it is quite hard
to read / follow it.
This commit rewrites it to be correct in all cases, and makes it much easier
to follow the code / to read.
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
drivers/clk/sunxi/clk-sun9i-core.c | 57 +++++++++++++++++++-------------------
1 file changed, 29 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/sunxi/clk-sun9i-core.c b/drivers/clk/sunxi/clk-sun9i-core.c
index 9b5e7a1..d8da77d 100644
--- a/drivers/clk/sunxi/clk-sun9i-core.c
+++ b/drivers/clk/sunxi/clk-sun9i-core.c
@@ -24,50 +24,51 @@
/**
- * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL1
+ * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL4
* PLL4 rate is calculated as follows
* rate = (parent_rate * n >> p) / (m + 1);
- * parent_rate is always 24Mhz
+ * parent_rate is always 24MHz
*
* p and m are named div1 and div2 in Allwinner's SDK
*/
static void sun9i_a80_get_pll4_factors(u32 *freq, u32 parent_rate,
- u8 *n, u8 *k, u8 *m, u8 *p)
+ u8 *n_ret, u8 *k, u8 *m_ret, u8 *p_ret)
{
- int div;
+ int n;
+ int m = 1;
+ int p = 1;
- /* Normalize value to a 6M multiple */
- div = DIV_ROUND_UP(*freq, 6000000);
+ /* Normalize value to a 6 MHz multiple (24 MHz / 4) */
+ n = DIV_ROUND_UP(*freq, 6000000);
- /* divs above 256 cannot be odd */
- if (div > 256)
- div = round_up(div, 2);
+ /* If n is too large switch to steps of 12 MHz */
+ if (n > 255) {
+ m = 0;
+ n = (n + 1) / 2;
+ }
+
+ /* If n is still too large switch to steps of 24 MHz */
+ if (n > 255) {
+ p = 0;
+ n = (n + 1) / 2;
+ }
- /* divs above 512 must be a multiple of 4 */
- if (div > 512)
- div = round_up(div, 4);
+ /* n must be between 12 and 255 */
+ if (n > 255)
+ n = 255;
+ else if (n < 12)
+ n = 12;
- *freq = 6000000 * div;
+ *freq = ((24000000 * n) >> p) / (m + 1);
/* we were called to round the frequency, we can now return */
- if (n == NULL)
+ if (n_ret == NULL)
return;
- /* p will be 1 for divs under 512 */
- if (div < 512)
- *p = 1;
- else
- *p = 0;
-
- /* m will be 1 if div is odd */
- if (div & 1)
- *m = 1;
- else
- *m = 0;
-
- /* calculate a suitable n based on m and p */
- *n = div / (*p + 1) / (*m + 1);
+ *n_ret = n;
+ *m_ret = m;
+ *p_ret = p;
}
static struct clk_factors_config sun9i_a80_pll4_config = {
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1
2015-01-24 11:56 ` Hans de Goede
@ 2015-01-24 11:56 ` Hans de Goede
-1 siblings, 0 replies; 8+ messages in thread
From: Hans de Goede @ 2015-01-24 11:56 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Hans de Goede
For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as
it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set
for sun6i pll6, but was missing for pll1, this commit fixes this.
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
drivers/clk/sunxi/clk-sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 24c7cc1..699458e 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -584,6 +584,7 @@ static struct clk_factors_config sun6i_a31_pll1_config = {
.kwidth = 2,
.mshift = 0,
.mwidth = 2,
+ .n_start = 1,
};
static struct clk_factors_config sun8i_a23_pll1_config = {
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1
@ 2015-01-24 11:56 ` Hans de Goede
0 siblings, 0 replies; 8+ messages in thread
From: Hans de Goede @ 2015-01-24 11:56 UTC (permalink / raw)
To: linux-arm-kernel
For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as
it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set
for sun6i pll6, but was missing for pll1, this commit fixes this.
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
drivers/clk/sunxi/clk-sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 24c7cc1..699458e 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -584,6 +584,7 @@ static struct clk_factors_config sun6i_a31_pll1_config = {
.kwidth = 2,
.mshift = 0,
.mwidth = 2,
+ .n_start = 1,
};
static struct clk_factors_config sun8i_a23_pll1_config = {
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1
2015-01-24 11:56 ` Hans de Goede
@ 2015-01-25 15:55 ` Maxime Ripard
-1 siblings, 0 replies; 8+ messages in thread
From: Maxime Ripard @ 2015-01-25 15:55 UTC (permalink / raw)
To: Hans de Goede
Cc: Chen-Yu Tsai, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
[-- Attachment #1: Type: text/plain, Size: 564 bytes --]
On Sat, Jan 24, 2015 at 12:56:32PM +0100, Hans de Goede wrote:
> For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as
> it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set
> for sun6i pll6, but was missing for pll1, this commit fixes this.
>
> Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Applied the two, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1
@ 2015-01-25 15:55 ` Maxime Ripard
0 siblings, 0 replies; 8+ messages in thread
From: Maxime Ripard @ 2015-01-25 15:55 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Jan 24, 2015 at 12:56:32PM +0100, Hans de Goede wrote:
> For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as
> it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set
> for sun6i pll6, but was missing for pll1, this commit fixes this.
>
> Cc: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Applied the two, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150125/12cdecbe/attachment.sig>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1
2015-01-25 15:55 ` Maxime Ripard
@ 2015-01-26 9:23 ` Chen-Yu Tsai
-1 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2015-01-26 9:23 UTC (permalink / raw)
To: Maxime Ripard
Cc: Hans de Goede, Mike Turquette, linux-arm-kernel, devicetree, linux-sunxi
On Sun, Jan 25, 2015 at 11:55 PM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> On Sat, Jan 24, 2015 at 12:56:32PM +0100, Hans de Goede wrote:
>> For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as
>> it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set
>> for sun6i pll6, but was missing for pll1, this commit fixes this.
>>
>> Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>> Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
>
> Applied the two, thanks!
This is the same as the one I sent, which you asked Mike to queue
for 3.19.
ChenYu
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1
@ 2015-01-26 9:23 ` Chen-Yu Tsai
0 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2015-01-26 9:23 UTC (permalink / raw)
To: linux-arm-kernel
On Sun, Jan 25, 2015 at 11:55 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Sat, Jan 24, 2015 at 12:56:32PM +0100, Hans de Goede wrote:
>> For all pll-s on sun6i n == 0 means use a multiplier of 1, rather then 0 as
>> it means on sun4i / sun5i / sun7i. n_start = 1 is already correctly set
>> for sun6i pll6, but was missing for pll1, this commit fixes this.
>>
>> Cc: Chen-Yu Tsai <wens@csie.org>
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>
> Applied the two, thanks!
This is the same as the one I sent, which you asked Mike to queue
for 3.19.
ChenYu
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-01-26 9:23 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-01-24 11:56 [PATCH 1/2] clk: sunxi: rewrite sun9i_a80_get_pll4_factors() Hans de Goede
2015-01-24 11:56 ` Hans de Goede
[not found] ` <1422100592-19981-1-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2015-01-24 11:56 ` [PATCH 2/2] sunxi: clk: Set sun6i-pll1 n_start = 1 Hans de Goede
2015-01-24 11:56 ` Hans de Goede
[not found] ` <1422100592-19981-2-git-send-email-hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2015-01-25 15:55 ` Maxime Ripard
2015-01-25 15:55 ` Maxime Ripard
2015-01-26 9:23 ` Chen-Yu Tsai
2015-01-26 9:23 ` Chen-Yu Tsai
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.