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* [PATCH 01/11] drm: bridge/dw_hdmi: add audio sample channel status setting
@ 2015-01-30 11:19 Yakir Yang
  2015-01-31 10:59   ` Russell King - ARM Linux
  0 siblings, 1 reply; 4+ messages in thread
From: Yakir Yang @ 2015-01-30 11:19 UTC (permalink / raw)
  To: David Airlie, Russell King, Philipp Zabel
  Cc: Fabio Estevam, Shawn Guo, Rob Clark, Mark Yao, Daniel Vetter,
	Yakir Yang, dri-devel, linux-kernel, djkurtz, dbehr, mmind00,
	dianders, marcheu, rockchip-discuss

When transmitting IEC60985 linear PCM audio, we configure the
Aduio Sample Channel Status information of all the channel
status bits in the IEC60958 frame.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Changes in v2:
- Add audio sample channel status setting

 drivers/gpu/drm/bridge/dw_hdmi.c | 41 ++++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/bridge/dw_hdmi.h | 20 ++++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 423addc..2ded957 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -204,6 +204,47 @@ static void hdmi_regenerate_n_cts(struct dw_hdmi *hdmi, unsigned int n,
 	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
 }
 
+static void hdmi_set_schnl(struct dw_hdmi *hdmi)
+{
+	u8 aud_schnl_samplerate;
+
+	switch (hdmi->sample_rate) {
+	case 32000:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_32K;
+		break;
+	case 44100:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
+		break;
+	case 48000:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_48K;
+		break;
+	case 88200:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_88K2;
+		break;
+	case 96000:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_96K;
+		break;
+	case 176400:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_176K4;
+		break;
+	case 192000:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_192K;
+		break;
+	case 768000:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_768K;
+		break;
+	default:
+		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
+		break;
+	}
+
+	/* set channel status register */
+	hdmi_modb(hdmi, aud_schnl_samplerate,
+		  HDMI_FC_AUDSCHNLS7_SMPRATE_MASK, HDMI_FC_AUDSCHNLS7);
+	hdmi_writeb(hdmi, ((~aud_schnl_samplerate) << 4) | 0x2,
+		    HDMI_FC_AUDSCHNLS8);
+}
+
 static unsigned int hdmi_compute_n(unsigned int freq, unsigned long pixel_clk,
 				   unsigned int ratio)
 {
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h
index bc53452..603e645 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.h
+++ b/drivers/gpu/drm/bridge/dw_hdmi.h
@@ -162,6 +162,17 @@
 #define HDMI_FC_SPDDEVICEINF                    0x1062
 #define HDMI_FC_AUDSCONF                        0x1063
 #define HDMI_FC_AUDSSTAT                        0x1064
+#define HDMI_FC_AUDSV                           0x1065
+#define HDMI_FC_AUDSU                           0x1066
+#define HDMI_FC_AUDSCHNLS0                      0x1067
+#define HDMI_FC_AUDSCHNLS1                      0x1068
+#define HDMI_FC_AUDSCHNLS2                      0x1069
+#define HDMI_FC_AUDSCHNLS3                      0x106a
+#define HDMI_FC_AUDSCHNLS4                      0x106b
+#define HDMI_FC_AUDSCHNLS5                      0x106c
+#define HDMI_FC_AUDSCHNLS6                      0x106d
+#define HDMI_FC_AUDSCHNLS7                      0x106e
+#define HDMI_FC_AUDSCHNLS8                      0x106f
 #define HDMI_FC_DATACH0FILL                     0x1070
 #define HDMI_FC_DATACH1FILL                     0x1071
 #define HDMI_FC_DATACH2FILL                     0x1072
@@ -731,6 +742,15 @@ enum {
 /* HDMI_FC_AUDSCHNLS7 field values */
 	HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
 	HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_192K = 0xe,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_176K4 = 0xc,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_96K = 0xa,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_768K = 0x9,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_88K2 = 0x8,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_32K = 0x3,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_48K = 0x2,
+	HDMI_FC_AUDSCHNLS7_SMPRATE_44K1 = 0x0,
 
 /* HDMI_FC_AUDSCHNLS8 field values */
 	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
-- 
2.1.2



^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH 01/11] drm: bridge/dw_hdmi: add audio sample channel status setting
  2015-01-30 11:19 [PATCH 01/11] drm: bridge/dw_hdmi: add audio sample channel status setting Yakir Yang
@ 2015-01-31 10:59   ` Russell King - ARM Linux
  0 siblings, 0 replies; 4+ messages in thread
From: Russell King - ARM Linux @ 2015-01-31 10:59 UTC (permalink / raw)
  To: Yakir Yang
  Cc: David Airlie, Philipp Zabel, Fabio Estevam, Shawn Guo, Rob Clark,
	Mark Yao, Daniel Vetter, dri-devel, linux-kernel, djkurtz, dbehr,
	mmind00, dianders, marcheu, rockchip-discuss

On Fri, Jan 30, 2015 at 06:19:46AM -0500, Yakir Yang wrote:
> When transmitting IEC60985 linear PCM audio, we configure the
> Aduio Sample Channel Status information of all the channel
> status bits in the IEC60958 frame.

It appears that the iMX6 version of the DW-HDMI IP does not have these
registers.  These registers are quite possibly only available on IPs
which do not have the built-in AHB DMA, since the channel status bits
are encoded into the samples in memory.

Can you report what identifying information your version of this IP
outputs please?  On iMX6, I get:

dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1

for iMX6Quad, and for iMX6Solo:

dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0x1a:0xa0:0xc1

Thanks.

Further comments below.

> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
> index 423addc..2ded957 100644
> --- a/drivers/gpu/drm/bridge/dw_hdmi.c
> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c
> @@ -204,6 +204,47 @@ static void hdmi_regenerate_n_cts(struct dw_hdmi *hdmi, unsigned int n,
>  	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
>  }
>  
> +static void hdmi_set_schnl(struct dw_hdmi *hdmi)
> +{
> +	u8 aud_schnl_samplerate;
> +
> +	switch (hdmi->sample_rate) {
> +	case 32000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_32K;
> +		break;
> +	case 44100:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
> +		break;
> +	case 48000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_48K;
> +		break;
> +	case 88200:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_88K2;
> +		break;
> +	case 96000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_96K;
> +		break;
> +	case 176400:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_176K4;
> +		break;
> +	case 192000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_192K;
> +		break;
> +	case 768000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_768K;
> +		break;
> +	default:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
> +		break;
> +	}
> +
> +	/* set channel status register */
> +	hdmi_modb(hdmi, aud_schnl_samplerate,
> +		  HDMI_FC_AUDSCHNLS7_SMPRATE_MASK, HDMI_FC_AUDSCHNLS7);
> +	hdmi_writeb(hdmi, ((~aud_schnl_samplerate) << 4) | 0x2,
> +		    HDMI_FC_AUDSCHNLS8);
> +}
> +

You should not split patches up like this - this patch introduces a new
static function, which is never used until a subsequent patch.  If this
patch were to be merged, it would introduce a new build warning.

Please ensure that each patch in the series can be applied in sequence
without causing a regression.

Thanks.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 01/11] drm: bridge/dw_hdmi: add audio sample channel status setting
@ 2015-01-31 10:59   ` Russell King - ARM Linux
  0 siblings, 0 replies; 4+ messages in thread
From: Russell King - ARM Linux @ 2015-01-31 10:59 UTC (permalink / raw)
  To: Yakir Yang
  Cc: Fabio Estevam, mmind00, dbehr, linux-kernel, dri-devel, dianders,
	rockchip-discuss, marcheu, Mark Yao

On Fri, Jan 30, 2015 at 06:19:46AM -0500, Yakir Yang wrote:
> When transmitting IEC60985 linear PCM audio, we configure the
> Aduio Sample Channel Status information of all the channel
> status bits in the IEC60958 frame.

It appears that the iMX6 version of the DW-HDMI IP does not have these
registers.  These registers are quite possibly only available on IPs
which do not have the built-in AHB DMA, since the channel status bits
are encoded into the samples in memory.

Can you report what identifying information your version of this IP
outputs please?  On iMX6, I get:

dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1

for iMX6Quad, and for iMX6Solo:

dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0x1a:0xa0:0xc1

Thanks.

Further comments below.

> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
> index 423addc..2ded957 100644
> --- a/drivers/gpu/drm/bridge/dw_hdmi.c
> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c
> @@ -204,6 +204,47 @@ static void hdmi_regenerate_n_cts(struct dw_hdmi *hdmi, unsigned int n,
>  	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
>  }
>  
> +static void hdmi_set_schnl(struct dw_hdmi *hdmi)
> +{
> +	u8 aud_schnl_samplerate;
> +
> +	switch (hdmi->sample_rate) {
> +	case 32000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_32K;
> +		break;
> +	case 44100:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
> +		break;
> +	case 48000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_48K;
> +		break;
> +	case 88200:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_88K2;
> +		break;
> +	case 96000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_96K;
> +		break;
> +	case 176400:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_176K4;
> +		break;
> +	case 192000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_192K;
> +		break;
> +	case 768000:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_768K;
> +		break;
> +	default:
> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
> +		break;
> +	}
> +
> +	/* set channel status register */
> +	hdmi_modb(hdmi, aud_schnl_samplerate,
> +		  HDMI_FC_AUDSCHNLS7_SMPRATE_MASK, HDMI_FC_AUDSCHNLS7);
> +	hdmi_writeb(hdmi, ((~aud_schnl_samplerate) << 4) | 0x2,
> +		    HDMI_FC_AUDSCHNLS8);
> +}
> +

You should not split patches up like this - this patch introduces a new
static function, which is never used until a subsequent patch.  If this
patch were to be merged, it would introduce a new build warning.

Please ensure that each patch in the series can be applied in sequence
without causing a regression.

Thanks.

-- 
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 01/11] drm: bridge/dw_hdmi: add audio sample channel status setting
  2015-01-31 10:59   ` Russell King - ARM Linux
  (?)
@ 2015-01-31 11:14   ` Yang Kuankuan
  -1 siblings, 0 replies; 4+ messages in thread
From: Yang Kuankuan @ 2015-01-31 11:14 UTC (permalink / raw)
  To: Russell King - ARM Linux
  Cc: Fabio Estevam, mmind00, dbehr, linux-kernel, dri-devel, dianders,
	rockchip-discuss, marcheu, Mark Yao


[-- Attachment #1.1: Type: text/plain, Size: 4087 bytes --]


On 01/31/2015 05:59 AM, Russell King - ARM Linux wrote:
> On Fri, Jan 30, 2015 at 06:19:46AM -0500, Yakir Yang wrote:
>> When transmitting IEC60985 linear PCM audio, we configure the
>> Aduio Sample Channel Status information of all the channel
>> status bits in the IEC60958 frame.
> It appears that the iMX6 version of the DW-HDMI IP does not have these
> registers.  These registers are quite possibly only available on IPs
> which do not have the built-in AHB DMA, since the channel status bits
> are encoded into the samples in memory.
>
> Can you report what identifying information your version of this IP
> outputs please?  On iMX6, I get:
>
> dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1
>
> for iMX6Quad, and for iMX6Solo:
>
> dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0x1a:0xa0:0xc1
>
> Thanks.
>
> Further comments below.

Here are the IP version on rk3288:
     dwhdmi-rockchip ff980000.hdmi: Detected HDMI controller 
0x20:0xa:0xa0:0xc1

attache the register description:

*5.2.5.50 fc_audschnls0 to fc_audschnls8*
     When transmitting IEC60958 linear PCM audio, this registers allow 
to configure the channel status
     information of all the channel status bits in the IEC60958 frame. 
For the moment this configuration is only
     used when the I2S audio interface, General Purpose Audio (GPA), or 
AHB audio DMA (AHBAUDDMA)
     interface is active (for S/PDIF interface this information comes 
from the stream). Information configured is
     the following:
         IEC Copyright indication
         CGMS-A
         PCM audio mode
         Category code
         Source number
         Channel number for first right sample
         Channel number for second right sample
         Channel number for third right sample
         Channel number for fourth right sample
         Channel number for first left sample
         Channel number for second left sample
         Channel number for third left sample
         Channel number for fourth left sample
         Clock accuracy
         Sampling frequency
         Original sampling frequency
         Word length configuration

Thks for you reply, : )

Best Regards.
>
>> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
>> index 423addc..2ded957 100644
>> --- a/drivers/gpu/drm/bridge/dw_hdmi.c
>> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c
>> @@ -204,6 +204,47 @@ static void hdmi_regenerate_n_cts(struct dw_hdmi *hdmi, unsigned int n,
>>   	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
>>   }
>>   
>> +static void hdmi_set_schnl(struct dw_hdmi *hdmi)
>> +{
>> +	u8 aud_schnl_samplerate;
>> +
>> +	switch (hdmi->sample_rate) {
>> +	case 32000:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_32K;
>> +		break;
>> +	case 44100:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
>> +		break;
>> +	case 48000:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_48K;
>> +		break;
>> +	case 88200:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_88K2;
>> +		break;
>> +	case 96000:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_96K;
>> +		break;
>> +	case 176400:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_176K4;
>> +		break;
>> +	case 192000:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_192K;
>> +		break;
>> +	case 768000:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_768K;
>> +		break;
>> +	default:
>> +		aud_schnl_samplerate = HDMI_FC_AUDSCHNLS7_SMPRATE_44K1;
>> +		break;
>> +	}
>> +
>> +	/* set channel status register */
>> +	hdmi_modb(hdmi, aud_schnl_samplerate,
>> +		  HDMI_FC_AUDSCHNLS7_SMPRATE_MASK, HDMI_FC_AUDSCHNLS7);
>> +	hdmi_writeb(hdmi, ((~aud_schnl_samplerate) << 4) | 0x2,
>> +		    HDMI_FC_AUDSCHNLS8);
>> +}
>> +
> You should not split patches up like this - this patch introduces a new
> static function, which is never used until a subsequent patch.  If this
> patch were to be merged, it would introduce a new build warning.
>
> Please ensure that each patch in the series can be applied in sequence
> without causing a regression.
>
> Thanks.
>


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_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-01-31 11:14 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-01-30 11:19 [PATCH 01/11] drm: bridge/dw_hdmi: add audio sample channel status setting Yakir Yang
2015-01-31 10:59 ` Russell King - ARM Linux
2015-01-31 10:59   ` Russell King - ARM Linux
2015-01-31 11:14   ` Yang Kuankuan

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