* [U-Boot] [PATCH 00/12] ARC: more improvements
@ 2015-02-03 10:58 Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 01/12] arc: memcmp - fix zero-delay loop utilization Alexey Brodkin
` (11 more replies)
0 siblings, 12 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
This series is focused on following items:
* Move more config options to Kconfig
- Cache settings
- Endianess
- Monitor base
* Clean-up of board configuration headers
* Build libgcc in U-Boot for portability
Alexey Brodkin (11):
arc: remove CPU hard-coded selection from board description in
include/configs
arc: add more flavours of ARC700 series CPU
arc: define and use PTAG AUX regs for MMUv3 only
arc: select cache settings via menuconfig
arc: add selection of endianess in Kconfig
arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h
arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT
arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h
arc: move SYS_MONITOR_BASE setup in Konfig
arc: move CPU flags selection to the main "config.mk"
arc: build libgcc in U-Boot
Igor Guryanov (1):
arc: memcmp - fix zero-delay loop utilization
Kconfig | 2 +-
arch/Kconfig | 1 +
arch/arc/Kconfig | 71 ++++++++++++-
arch/arc/config.mk | 15 ++-
arch/arc/cpu/arcv1/config.mk | 7 --
arch/arc/include/asm/arcregs.h | 6 +-
arch/arc/include/asm/cache.h | 19 ++--
arch/arc/include/asm/config.h | 2 +
arch/arc/lib/Makefile | 2 +
arch/arc/lib/_millicodethunk.S | 226 +++++++++++++++++++++++++++++++++++++++++
arch/arc/lib/cache.c | 7 +-
arch/arc/lib/libgcc2.c | 161 +++++++++++++++++++++++++++++
arch/arc/lib/libgcc2.h | 132 ++++++++++++++++++++++++
arch/arc/lib/memcmp.S | 2 +
board/synopsys/Kconfig | 10 --
board/synopsys/MAINTAINERS | 1 -
configs/arcangel4-be_defconfig | 4 +-
configs/arcangel4_defconfig | 1 +
configs/axs101_defconfig | 5 +-
configs/tb100_defconfig | 4 +-
include/configs/arcangel4-be.h | 91 -----------------
include/configs/arcangel4.h | 12 ---
include/configs/axs101.h | 15 ---
include/configs/tb100.h | 10 --
24 files changed, 639 insertions(+), 167 deletions(-)
delete mode 100644 arch/arc/cpu/arcv1/config.mk
create mode 100644 arch/arc/lib/_millicodethunk.S
create mode 100644 arch/arc/lib/libgcc2.c
create mode 100644 arch/arc/lib/libgcc2.h
delete mode 100644 include/configs/arcangel4-be.h
--
2.1.0
^ permalink raw reply [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 01/12] arc: memcmp - fix zero-delay loop utilization
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 02/12] arc: remove CPU hard-coded selection from board description in include/configs Alexey Brodkin
` (10 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
From: Igor Guryanov <guryanov@synopsys.com>
It's prohibited to put branch instruction in the very end of zero-delay
loop. On execution this causes "Illegal instruction" exception.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
---
arch/arc/lib/memcmp.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arc/lib/memcmp.S b/arch/arc/lib/memcmp.S
index fa5aac5..87bccab 100644
--- a/arch/arc/lib/memcmp.S
+++ b/arch/arc/lib/memcmp.S
@@ -29,6 +29,7 @@ memcmp:
ld.a %r4, [%r0, 8]
ld.a %r5, [%r1, 8]
brne WORD2, %r12, .Lodd
+ nop
.Loop_end:
asl_s SHIFT, SHIFT, 3
bhs_s .Last_cmp
@@ -105,6 +106,7 @@ memcmp:
ldb.a %r4, [%r0, 2]
ldb.a %r5, [%r1, 2]
brne %r3, %r12, .Lbyte_odd
+ nop
.Lbyte_end:
bcc .Lbyte_even
brne %r4, %r5, .Lbyte_even
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 02/12] arc: remove CPU hard-coded selection from board description in include/configs
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 01/12] arc: memcmp - fix zero-delay loop utilization Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 03/12] arc: add more flavours of ARC700 series CPU Alexey Brodkin
` (9 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
With switch to Kconfig we only need very board-specific descriptions in
include/configs.
CPU selection is performed with either defconfig or manually via
menuconfig.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
include/configs/arcangel4-be.h | 1 -
include/configs/arcangel4.h | 1 -
include/configs/axs101.h | 1 -
include/configs/tb100.h | 1 -
4 files changed, 4 deletions(-)
diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h
index 76163ab..2ca209e 100644
--- a/include/configs/arcangel4-be.h
+++ b/include/configs/arcangel4-be.h
@@ -11,7 +11,6 @@
* CPU configuration
*/
#define CONFIG_SYS_BIG_ENDIAN
-#define CONFIG_ARC700
#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 81934a4..2afb63d 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -10,7 +10,6 @@
/*
* CPU configuration
*/
-#define CONFIG_ARC700
#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index c61ddd6..a8a9cb3 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -10,7 +10,6 @@
/*
* CPU configuration
*/
-#define CONFIG_ARC700
#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index e9218f7..a598343 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -12,7 +12,6 @@
/*
* CPU configuration
*/
-#define CONFIG_ARC700
#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 03/12] arc: add more flavours of ARC700 series CPU
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 01/12] arc: memcmp - fix zero-delay loop utilization Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 02/12] arc: remove CPU hard-coded selection from board description in include/configs Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 04/12] arc: define and use PTAG AUX regs for MMUv3 only Alexey Brodkin
` (8 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
Now we may select a particular version of ARC700:
* ARC750D or
* ARC770D
It allows more flexible (or more fine tuned) configuration of U-Boot.
Before that change we relied on minimal configuration but now we may
use specific features of each CPU.
Moreover allows us to escape manual selection of options that
exist in both CPUs but may have say different version like MMUv2 in
ARC750D vs MMUv3 in ARC770D.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/Kconfig | 40 ++++++++++++++++++++++++++++++++++++++++
arch/arc/config.mk | 4 ++++
arch/arc/include/asm/arcregs.h | 2 ++
arch/arc/include/asm/cache.h | 6 ++++++
include/configs/arcangel4-be.h | 1 -
include/configs/arcangel4.h | 1 -
include/configs/axs101.h | 1 -
include/configs/tb100.h | 1 -
8 files changed, 52 insertions(+), 4 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index c6b1efe..f7d2964 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -8,6 +8,46 @@ config SYS_CPU
default "arcv1"
choice
+ prompt "CPU selection"
+ default CPU_ARC770D
+
+config CPU_ARC750D
+ bool "ARC 750D"
+ select ARC_MMU_V2
+ help
+ Choose this option to build an U-Boot for ARC750D CPU.
+
+config CPU_ARC770D
+ bool "ARC 770D"
+ select ARC_MMU_V3
+ help
+ Choose this option to build an U-Boot for ARC770D CPU.
+
+endchoice
+
+choice
+ prompt "MMU Version"
+ default ARC_MMU_V3 if CPU_ARC770D
+ default ARC_MMU_V2 if CPU_ARC750D
+
+config ARC_MMU_V2
+ bool "MMU v2"
+ depends on CPU_ARC750D
+ help
+ Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
+ when 2 D-TLB and 1 I-TLB entries index into same 2way set.
+
+config ARC_MMU_V3
+ bool "MMU v3"
+ depends on CPU_ARC770D
+ help
+ Introduced with ARC700 4.10: New Features
+ Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
+ Shared Address Spaces (SASID)
+
+endchoice
+
+choice
prompt "Target select"
config TARGET_TB100
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index 5321987..dd180ef 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -25,6 +25,10 @@ ifdef CONFIG_ARC_MMU_VER
CONFIG_MMU = 1
endif
+ifdef CONFIG_CPU_ARC770D
+PLATFORM_CPPFLAGS += -mlock -mswape
+endif
+
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
# Needed for relocation
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 8ace87f..31627e6 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -7,6 +7,8 @@
#ifndef _ASM_ARC_ARCREGS_H
#define _ASM_ARC_ARCREGS_H
+#include <asm/cache.h>
+
/*
* ARC architecture has additional address space - auxiliary registers.
* These registers are mostly used for configuration purposes.
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 16e7568..368d1f0 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -20,4 +20,10 @@
#define ARCH_DMA_MINALIGN 128
#endif
+#if defined(CONFIG_ARC_MMU_V2)
+#define CONFIG_ARC_MMU_VER 2
+#elif defined(CONFIG_ARC_MMU_V3)
+#define CONFIG_ARC_MMU_VER 3
+#endif
+
#endif /* __ASM_ARC_CACHE_H */
diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h
index 2ca209e..a43590b 100644
--- a/include/configs/arcangel4-be.h
+++ b/include/configs/arcangel4-be.h
@@ -11,7 +11,6 @@
* CPU configuration
*/
#define CONFIG_SYS_BIG_ENDIAN
-#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 2afb63d..565f70e 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -10,7 +10,6 @@
/*
* CPU configuration
*/
-#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index a8a9cb3..b94687c 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -10,7 +10,6 @@
/*
* CPU configuration
*/
-#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index a598343..f353950 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -12,7 +12,6 @@
/*
* CPU configuration
*/
-#define CONFIG_ARC_MMU_VER 3
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 04/12] arc: define and use PTAG AUX regs for MMUv3 only
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (2 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 03/12] arc: add more flavours of ARC700 series CPU Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 05/12] arc: select cache settings via menuconfig Alexey Brodkin
` (7 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
DC_PTAG and IC_PTAG registers only exist in MMUv3.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/include/asm/arcregs.h | 4 ++--
arch/arc/lib/cache.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 31627e6..6a36a81 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -23,7 +23,7 @@
#define ARC_AUX_IC_IVIC 0x10
#define ARC_AUX_IC_CTRL 0x11
#define ARC_AUX_IC_IVIL 0x19
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
#define ARC_AUX_IC_PTAG 0x1E
#endif
#define ARC_BCR_IC_BUILD 0x77
@@ -42,7 +42,7 @@
#define ARC_AUX_DC_IVDL 0x4A
#define ARC_AUX_DC_FLSH 0x4B
#define ARC_AUX_DC_FLDL 0x4C
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
#define ARC_AUX_DC_PTAG 0x5C
#endif
#define ARC_BCR_DC_BUILD 0x72
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index fa19a13..fa2a1e7 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -101,7 +101,7 @@ void flush_dcache_all(void)
#ifndef CONFIG_SYS_DCACHE_OFF
static void dcache_flush_line(unsigned addr)
{
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(ARC_AUX_DC_PTAG, addr);
#endif
write_aux_reg(ARC_AUX_DC_FLDL, addr);
@@ -115,7 +115,7 @@ static void dcache_flush_line(unsigned addr)
* Invalidate I$ for addresses range just flushed from D$.
* If we try to execute data flushed above it will be valid/correct
*/
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(ARC_AUX_IC_PTAG, addr);
#endif
write_aux_reg(ARC_AUX_IC_IVIL, addr);
@@ -145,7 +145,7 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
end = end & (~(CONFIG_SYS_CACHELINE_SIZE - 1));
for (addr = start; addr <= end; addr += CONFIG_SYS_CACHELINE_SIZE) {
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(ARC_AUX_DC_PTAG, addr);
#endif
write_aux_reg(ARC_AUX_DC_IVDL, addr);
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 05/12] arc: select cache settings via menuconfig
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (3 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 04/12] arc: define and use PTAG AUX regs for MMUv3 only Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 06/12] arc: add selection of endianess in Kconfig Alexey Brodkin
` (6 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.
It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/Kconfig | 19 +++++++++++++++++++
arch/arc/include/asm/cache.h | 13 +++++--------
arch/arc/lib/cache.c | 1 +
configs/axs101_defconfig | 4 +++-
configs/tb100_defconfig | 3 ++-
include/configs/arcangel4-be.h | 1 -
include/configs/arcangel4.h | 1 -
include/configs/axs101.h | 4 ----
include/configs/tb100.h | 1 -
9 files changed, 30 insertions(+), 17 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index f7d2964..397b179 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -47,6 +47,25 @@ config ARC_MMU_V3
endchoice
+config SYS_ICACHE_OFF
+ bool "Do not use Instruction Cache"
+ default n
+
+config SYS_DCACHE_OFF
+ bool "Do not use Data Cache"
+ default n
+
+config ARC_CACHE_LINE_SHIFT
+ int "Cache Line Length (as power of 2)"
+ range 5 7
+ default "6"
+ depends on !SYS_DCACHE_OFF || !SYS_DCACHE_OFF
+ help
+ Starting with ARC700 4.9, Cache line length is configurable,
+ This option specifies "N", with Line-len = 2 power N
+ So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
+ Linux only supports same line lengths for I and D caches.
+
choice
prompt "Target select"
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 368d1f0..2725961 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -9,15 +9,12 @@
#include <config.h>
-/*
- * The current upper bound for ARC L1 data cache line sizes is 128 bytes.
- * We use that value for aligning DMA buffers unless the board config has
- * specified an alternate cache line size.
- */
-#ifdef CONFIG_SYS_CACHELINE_SIZE
-#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
+#ifdef CONFIG_ARC_CACHE_LINE_SHIFT
+#define CONFIG_SYS_CACHELINE_SIZE (1 << CONFIG_ARC_CACHE_LINE_SHIFT)
+#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
#else
-#define ARCH_DMA_MINALIGN 128
+/* Satisfy users of ARCH_DMA_MINALIGN */
+#define ARCH_DMA_MINALIGN 128
#endif
#if defined(CONFIG_ARC_MMU_V2)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index fa2a1e7..a227723 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -6,6 +6,7 @@
#include <config.h>
#include <asm/arcregs.h>
+#include <asm/cache.h>
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE (1 << 0)
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 5c0ca11..d165e41 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -1,3 +1,5 @@
CONFIG_ARC=y
CONFIG_TARGET_AXS101=y
-CONFIG_SYS_CLK_FREQ=750000000
\ No newline at end of file
+CONFIG_SYS_CLK_FREQ=750000000
+CONFIG_ARC_CACHE_LINE_SHIFT=5
+CONFIG_SYS_DCACHE_OFF=y
\ No newline at end of file
diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index d2de03b..e17a495 100644
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARC=y
CONFIG_TARGET_TB100=y
-CONFIG_SYS_CLK_FREQ=500000000
\ No newline@end of file
+CONFIG_SYS_CLK_FREQ=500000000
+CONFIG_ARC_CACHE_LINE_SHIFT=5
diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h
index a43590b..b0bc8bc 100644
--- a/include/configs/arcangel4-be.h
+++ b/include/configs/arcangel4-be.h
@@ -11,7 +11,6 @@
* CPU configuration
*/
#define CONFIG_SYS_BIG_ENDIAN
-#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
/*
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 565f70e..3268c56 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -10,7 +10,6 @@
/*
* CPU configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
/*
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index b94687c..ff3fad3 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -10,12 +10,8 @@
/*
* CPU configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-/* NAND controller DMA doesn't work correctly with D$ enabled */
-#define CONFIG_SYS_DCACHE_OFF
-
/*
* Board configuration
*/
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index f353950..32675c4 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -12,7 +12,6 @@
/*
* CPU configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
/*
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 06/12] arc: add selection of endianess in Kconfig
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (4 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 05/12] arc: select cache settings via menuconfig Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 07/12] arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h Alexey Brodkin
` (5 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.
It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/Kconfig | 9 +++--
arch/arc/config.mk | 4 +-
board/synopsys/Kconfig | 10 -----
board/synopsys/MAINTAINERS | 1 -
configs/arcangel4-be_defconfig | 3 +-
include/configs/arcangel4-be.h | 88 ------------------------------------------
6 files changed, 11 insertions(+), 104 deletions(-)
delete mode 100644 include/configs/arcangel4-be.h
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 397b179..04fc7b6 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -47,6 +47,12 @@ config ARC_MMU_V3
endchoice
+config CPU_BIG_ENDIAN
+ bool "Enable Big Endian Mode"
+ default n
+ help
+ Build kernel for Big Endian Mode of ARC CPU
+
config SYS_ICACHE_OFF
bool "Do not use Instruction Cache"
default n
@@ -75,9 +81,6 @@ config TARGET_TB100
config TARGET_ARCANGEL4
bool "Support arcangel4"
-config TARGET_ARCANGEL4_BE
- bool "Support arcangel4-be"
-
config TARGET_AXS101
bool "Support axs101"
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index dd180ef..4f2d31f 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -4,8 +4,10 @@
# SPDX-License-Identifier: GPL-2.0+
#
-ifndef CONFIG_SYS_BIG_ENDIAN
+ifndef CONFIG_CPU_BIG_ENDIAN
CONFIG_SYS_LITTLE_ENDIAN = 1
+else
+CONFIG_SYS_BIG_ENDIAN = 1
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
diff --git a/board/synopsys/Kconfig b/board/synopsys/Kconfig
index f614f88..8ab48cd 100644
--- a/board/synopsys/Kconfig
+++ b/board/synopsys/Kconfig
@@ -7,13 +7,3 @@ config SYS_CONFIG_NAME
default "arcangel4"
endif
-
-if TARGET_ARCANGEL4_BE
-
-config SYS_VENDOR
- default "synopsys"
-
-config SYS_CONFIG_NAME
- default "arcangel4-be"
-
-endif
diff --git a/board/synopsys/MAINTAINERS b/board/synopsys/MAINTAINERS
index 720edd8..43114ce 100644
--- a/board/synopsys/MAINTAINERS
+++ b/board/synopsys/MAINTAINERS
@@ -3,5 +3,4 @@ M: Alexey Brodkin <abrodkin@synopsys.com>
S: Maintained
F: include/configs/arcangel4.h
F: configs/arcangel4_defconfig
-F: include/configs/arcangel4-be.h
F: configs/arcangel4-be_defconfig
diff --git a/configs/arcangel4-be_defconfig b/configs/arcangel4-be_defconfig
index 0c3ab4e..5d2e126 100644
--- a/configs/arcangel4-be_defconfig
+++ b/configs/arcangel4-be_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARC=y
-CONFIG_TARGET_ARCANGEL4_BE=y
+CONFIG_TARGET_ARCANGEL4=y
CONFIG_SYS_CLK_FREQ=70000000
+CONFIG_CPU_BIG_ENDIAN=y
diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h
deleted file mode 100644
index b0bc8bc..0000000
--- a/include/configs/arcangel4-be.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _CONFIG_ARCANGEL4_H_
-#define _CONFIG_ARCANGEL4_H_
-
-/*
- * CPU configuration
- */
-#define CONFIG_SYS_BIG_ENDIAN
-#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-
-/*
- * Board configuration
- */
-#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
-
-#define CONFIG_ARCH_EARLY_INIT_R
-
-/*
- * Memory configuration
- */
-#define CONFIG_SYS_TEXT_BASE 0x81000000
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */
-
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */
-#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
-#define CONFIG_SYS_LOAD_ADDR 0x82000000
-
-#define CONFIG_SYS_NO_FLASH
-
-/*
- * UART configuration
- *
- */
-#define CONFIG_ARC_SERIAL
-#define CONFIG_ARC_UART_BASE 0xC0FC1000
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Command line configuration
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-
-#define CONFIG_OF_LIBFDT
-
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_MAXARGS 16
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */
-#define CONFIG_ENV_OFFSET 0
-
-/*
- * Environment configuration
- */
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyARC0,115200n8"
-#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
-
-/*
- * Console configuration
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "arcangel4# "
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-#endif /* _CONFIG_ARCANGEL4_H_ */
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 07/12] arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (5 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 06/12] arc: add selection of endianess in Kconfig Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 08/12] arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT Alexey Brodkin
` (4 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
There're no other options for ARC except "generic board" so ther's no
point to define CONFIG_SYS_GENERIC_BOARD per board.
We now have it set fo all ARC boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/include/asm/config.h | 1 +
include/configs/arcangel4.h | 1 -
include/configs/axs101.h | 1 -
include/configs/tb100.h | 1 -
4 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h
index e5be078..c1e9b44 100644
--- a/arch/arc/include/asm/config.h
+++ b/arch/arc/include/asm/config.h
@@ -7,6 +7,7 @@
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
+#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 3268c56..60f3077 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -15,7 +15,6 @@
/*
* Board configuration
*/
-#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
#define CONFIG_ARCH_EARLY_INIT_R
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index ff3fad3..2340d99 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -15,7 +15,6 @@
/*
* Board configuration
*/
-#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
#define CONFIG_ARCH_EARLY_INIT_R
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index 32675c4..c6878fc 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -17,7 +17,6 @@
/*
* Board configuration
*/
-#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ARCH_EARLY_INIT_R
/*
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 08/12] arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (6 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 07/12] arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 09/12] arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h Alexey Brodkin
` (3 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
Currently there's nothing related to really low-level init on ARC so
CONFIG_SKIP_LOWLEVEL_INIT definition makes no sense.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
include/configs/arcangel4.h | 2 --
include/configs/axs101.h | 2 --
2 files changed, 4 deletions(-)
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 60f3077..003a45d 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -15,8 +15,6 @@
/*
* Board configuration
*/
-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
-
#define CONFIG_ARCH_EARLY_INIT_R
/*
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index 2340d99..4064ed2 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -15,8 +15,6 @@
/*
* Board configuration
*/
-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */
-
#define CONFIG_ARCH_EARLY_INIT_R
#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 09/12] arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (7 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 08/12] arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 10/12] arc: move SYS_MONITOR_BASE setup in Konfig Alexey Brodkin
` (2 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards
so there's no sense in separate per-board definitions.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/include/asm/config.h | 1 +
include/configs/arcangel4.h | 5 -----
include/configs/axs101.h | 5 -----
include/configs/tb100.h | 5 -----
4 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h
index c1e9b44..b4e9099 100644
--- a/arch/arc/include/asm/config.h
+++ b/arch/arc/include/asm/config.h
@@ -10,6 +10,7 @@
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_LMB
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 003a45d..80d6438 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -13,11 +13,6 @@
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
/*
- * Board configuration
- */
-#define CONFIG_ARCH_EARLY_INIT_R
-
-/*
* Memory configuration
*/
#define CONFIG_SYS_TEXT_BASE 0x81000000
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index 4064ed2..e9a3231 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -12,11 +12,6 @@
*/
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
-/*
- * Board configuration
- */
-#define CONFIG_ARCH_EARLY_INIT_R
-
#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
#define ARC_APB_PERIPHERAL_BASE 0xF0000000
#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index c6878fc..54eca6f 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -15,11 +15,6 @@
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
/*
- * Board configuration
- */
-#define CONFIG_ARCH_EARLY_INIT_R
-
-/*
* Memory configuration
*/
#define CONFIG_SYS_TEXT_BASE 0x84000000
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 10/12] arc: move SYS_MONITOR_BASE setup in Konfig
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (8 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 09/12] arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 11/12] arc: move CPU flags selection to the main "config.mk" Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 12/12] arc: build libgcc in U-Boot Alexey Brodkin
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
Following SPARK ARC now has SYS_MONITOR_BASE setup via Kconfig.
This makes "include/configs/*.h" cleaner and more flexible.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Kconfig | 2 +-
configs/arcangel4-be_defconfig | 1 +
configs/arcangel4_defconfig | 1 +
configs/axs101_defconfig | 3 ++-
configs/tb100_defconfig | 1 +
include/configs/arcangel4.h | 1 -
include/configs/axs101.h | 1 -
include/configs/tb100.h | 1 -
8 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/Kconfig b/Kconfig
index 4157da3..145421a 100644
--- a/Kconfig
+++ b/Kconfig
@@ -138,7 +138,7 @@ config SYS_EXTRA_OPTIONS
new boards should not use this option.
config SYS_TEXT_BASE
- depends on SPARC
+ depends on SPARC || ARC
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
diff --git a/configs/arcangel4-be_defconfig b/configs/arcangel4-be_defconfig
index 5d2e126..979f26e 100644
--- a/configs/arcangel4-be_defconfig
+++ b/configs/arcangel4-be_defconfig
@@ -2,3 +2,4 @@ CONFIG_ARC=y
CONFIG_TARGET_ARCANGEL4=y
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_SYS_TEXT_BASE=0x81000000
diff --git a/configs/arcangel4_defconfig b/configs/arcangel4_defconfig
index a63ef21..797595f 100644
--- a/configs/arcangel4_defconfig
+++ b/configs/arcangel4_defconfig
@@ -1,3 +1,4 @@
CONFIG_ARC=y
CONFIG_TARGET_ARCANGEL4=y
CONFIG_SYS_CLK_FREQ=70000000
+CONFIG_SYS_TEXT_BASE=0x81000000
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index d165e41..34ed963 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -2,4 +2,5 @@ CONFIG_ARC=y
CONFIG_TARGET_AXS101=y
CONFIG_SYS_CLK_FREQ=750000000
CONFIG_ARC_CACHE_LINE_SHIFT=5
-CONFIG_SYS_DCACHE_OFF=y
\ No newline at end of file
+CONFIG_SYS_DCACHE_OFF=y
+CONFIG_SYS_TEXT_BASE=0x81000000
\ No newline at end of file
diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index e17a495..b0e8c9f 100644
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -2,3 +2,4 @@ CONFIG_ARC=y
CONFIG_TARGET_TB100=y
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_ARC_CACHE_LINE_SHIFT=5
+CONFIG_SYS_TEXT_BASE=0x84000000
diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 80d6438..5e4097f 100644
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -15,7 +15,6 @@
/*
* Memory configuration
*/
-#define CONFIG_SYS_TEXT_BASE 0x81000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index e9a3231..5fb8aca 100644
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -20,7 +20,6 @@
/*
* Memory configuration
*/
-#define CONFIG_SYS_TEXT_BASE 0x81000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index 54eca6f..46df406 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -17,7 +17,6 @@
/*
* Memory configuration
*/
-#define CONFIG_SYS_TEXT_BASE 0x84000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 11/12] arc: move CPU flags selection to the main "config.mk"
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (9 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 10/12] arc: move SYS_MONITOR_BASE setup in Konfig Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 12/12] arc: build libgcc in U-Boot Alexey Brodkin
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
As a preparation to ARCv2 port submission we're moving CPU slection
flags to a common location.
Also it will allow us to have more flexible CPU specification, not only
ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/arc/config.mk | 6 +++++-
arch/arc/cpu/arcv1/config.mk | 7 -------
2 files changed, 5 insertions(+), 8 deletions(-)
delete mode 100644 arch/arc/cpu/arcv1/config.mk
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index 4f2d31f..3e75e60 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -27,8 +27,12 @@ ifdef CONFIG_ARC_MMU_VER
CONFIG_MMU = 1
endif
+ifdef CONFIG_CPU_ARC750D
+PLATFORM_CPPFLAGS += -marc700
+endif
+
ifdef CONFIG_CPU_ARC770D
-PLATFORM_CPPFLAGS += -mlock -mswape
+PLATFORM_CPPFLAGS += -marc700 -mlock -mswape
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
diff --git a/arch/arc/cpu/arcv1/config.mk b/arch/arc/cpu/arcv1/config.mk
deleted file mode 100644
index 3206ff4..0000000
--- a/arch/arc/cpu/arcv1/config.mk
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-PLATFORM_CPPFLAGS += -mA7
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [U-Boot] [PATCH 12/12] arc: build libgcc in U-Boot
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
` (10 preceding siblings ...)
2015-02-03 10:58 ` [U-Boot] [PATCH 11/12] arc: move CPU flags selection to the main "config.mk" Alexey Brodkin
@ 2015-02-03 10:58 ` Alexey Brodkin
11 siblings, 0 replies; 13+ messages in thread
From: Alexey Brodkin @ 2015-02-03 10:58 UTC (permalink / raw)
To: u-boot
This way we may have very limited set of functions implemented so we
save some space.
Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.
For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports
Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt
$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---
Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
---
arch/Kconfig | 1 +
arch/arc/Kconfig | 3 +
arch/arc/config.mk | 3 +
arch/arc/lib/Makefile | 2 +
arch/arc/lib/_millicodethunk.S | 226 +++++++++++++++++++++++++++++++++++++++++
arch/arc/lib/libgcc2.c | 161 +++++++++++++++++++++++++++++
arch/arc/lib/libgcc2.h | 132 ++++++++++++++++++++++++
7 files changed, 528 insertions(+)
create mode 100644 arch/arc/lib/_millicodethunk.S
create mode 100644 arch/arc/lib/libgcc2.c
create mode 100644 arch/arc/lib/libgcc2.h
diff --git a/arch/Kconfig b/arch/Kconfig
index f63cc5a..132123b 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -4,6 +4,7 @@ choice
config ARC
bool "ARC architecture"
+ select HAVE_PRIVATE_LIBGCC
config ARM
bool "ARM architecture"
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 04fc7b6..a8dc4e2 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -4,6 +4,9 @@ menu "ARC architecture"
config SYS_ARCH
default "arc"
+config USE_PRIVATE_LIBGCC
+ default y
+
config SYS_CPU
default "arcv1"
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index 3e75e60..f1e81b6 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -12,11 +12,14 @@ endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
ARC_CROSS_COMPILE := arc-buildroot-linux-uclibc-
+PLATFORM_LDFLAGS += -EL
+PLATFORM_CPPFLAGS += -mlittle-endian
endif
ifdef CONFIG_SYS_BIG_ENDIAN
ARC_CROSS_COMPILE := arceb-buildroot-linux-uclibc-
PLATFORM_LDFLAGS += -EB
+PLATFORM_CPPFLAGS += -mbig-endian
endif
ifeq ($(CROSS_COMPILE),)
diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile
index bae4419..b8028c9 100644
--- a/arch/arc/lib/Makefile
+++ b/arch/arc/lib/Makefile
@@ -20,3 +20,5 @@ obj-y += reset.o
obj-y += timer.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
+
+lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _millicodethunk.o libgcc2.o
diff --git a/arch/arc/lib/_millicodethunk.S b/arch/arc/lib/_millicodethunk.S
new file mode 100644
index 0000000..b332416
--- /dev/null
+++ b/arch/arc/lib/_millicodethunk.S
@@ -0,0 +1,226 @@
+/*
+ * Copyright (C) 1995, 1997, 2007-2013 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+ /* ANSI concatenation macros. */
+
+ #define CONCAT1(a, b) CONCAT2(a, b)
+ #define CONCAT2(a, b) a ## b
+
+ /* Use the right prefix for global labels. */
+
+ #define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+#ifndef WORKING_ASSEMBLER
+#define abs_l abs
+#define asl_l asl
+#define mov_l mov
+#endif
+
+#define FUNC(X) .type SYM(X), at function
+#define HIDDEN_FUNC(X) FUNC(X)` .hidden X
+#define ENDFUNC0(X) .Lfe_##X: .size X,.Lfe_##X-X
+#define ENDFUNC(X) ENDFUNC0(X)
+
+ .section .text
+ .align 4
+ .global SYM(__st_r13_to_r15)
+ .global SYM(__st_r13_to_r16)
+ .global SYM(__st_r13_to_r17)
+ .global SYM(__st_r13_to_r18)
+ .global SYM(__st_r13_to_r19)
+ .global SYM(__st_r13_to_r20)
+ .global SYM(__st_r13_to_r21)
+ .global SYM(__st_r13_to_r22)
+ .global SYM(__st_r13_to_r23)
+ .global SYM(__st_r13_to_r24)
+ .global SYM(__st_r13_to_r25)
+ HIDDEN_FUNC(__st_r13_to_r15)
+ HIDDEN_FUNC(__st_r13_to_r16)
+ HIDDEN_FUNC(__st_r13_to_r17)
+ HIDDEN_FUNC(__st_r13_to_r18)
+ HIDDEN_FUNC(__st_r13_to_r19)
+ HIDDEN_FUNC(__st_r13_to_r20)
+ HIDDEN_FUNC(__st_r13_to_r21)
+ HIDDEN_FUNC(__st_r13_to_r22)
+ HIDDEN_FUNC(__st_r13_to_r23)
+ HIDDEN_FUNC(__st_r13_to_r24)
+ HIDDEN_FUNC(__st_r13_to_r25)
+ .align 4
+SYM(__st_r13_to_r25):
+ st r25, [sp,48]
+SYM(__st_r13_to_r24):
+ st r24, [sp,44]
+SYM(__st_r13_to_r23):
+ st r23, [sp,40]
+SYM(__st_r13_to_r22):
+ st r22, [sp,36]
+SYM(__st_r13_to_r21):
+ st r21, [sp,32]
+SYM(__st_r13_to_r20):
+ st r20, [sp,28]
+SYM(__st_r13_to_r19):
+ st r19, [sp,24]
+SYM(__st_r13_to_r18):
+ st r18, [sp,20]
+SYM(__st_r13_to_r17):
+ st r17, [sp,16]
+SYM(__st_r13_to_r16):
+ st r16, [sp,12]
+SYM(__st_r13_to_r15):
+#ifdef __ARC700__
+ st r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
+#else
+ st_s r15, [sp,8]
+#endif
+ st_s r14, [sp,4]
+ j_s.d [%blink]
+ st_s r13, [sp,0]
+ ENDFUNC(__st_r13_to_r15)
+ ENDFUNC(__st_r13_to_r16)
+ ENDFUNC(__st_r13_to_r17)
+ ENDFUNC(__st_r13_to_r18)
+ ENDFUNC(__st_r13_to_r19)
+ ENDFUNC(__st_r13_to_r20)
+ ENDFUNC(__st_r13_to_r21)
+ ENDFUNC(__st_r13_to_r22)
+ ENDFUNC(__st_r13_to_r23)
+ ENDFUNC(__st_r13_to_r24)
+ ENDFUNC(__st_r13_to_r25)
+
+ .section .text
+ .align 4
+; ==================================
+; the loads
+
+ .global SYM(__ld_r13_to_r15)
+ .global SYM(__ld_r13_to_r16)
+ .global SYM(__ld_r13_to_r17)
+ .global SYM(__ld_r13_to_r18)
+ .global SYM(__ld_r13_to_r19)
+ .global SYM(__ld_r13_to_r20)
+ .global SYM(__ld_r13_to_r21)
+ .global SYM(__ld_r13_to_r22)
+ .global SYM(__ld_r13_to_r23)
+ .global SYM(__ld_r13_to_r24)
+ .global SYM(__ld_r13_to_r25)
+ HIDDEN_FUNC(__ld_r13_to_r15)
+ HIDDEN_FUNC(__ld_r13_to_r16)
+ HIDDEN_FUNC(__ld_r13_to_r17)
+ HIDDEN_FUNC(__ld_r13_to_r18)
+ HIDDEN_FUNC(__ld_r13_to_r19)
+ HIDDEN_FUNC(__ld_r13_to_r20)
+ HIDDEN_FUNC(__ld_r13_to_r21)
+ HIDDEN_FUNC(__ld_r13_to_r22)
+ HIDDEN_FUNC(__ld_r13_to_r23)
+ HIDDEN_FUNC(__ld_r13_to_r24)
+ HIDDEN_FUNC(__ld_r13_to_r25)
+SYM(__ld_r13_to_r25):
+ ld r25, [sp,48]
+SYM(__ld_r13_to_r24):
+ ld r24, [sp,44]
+SYM(__ld_r13_to_r23):
+ ld r23, [sp,40]
+SYM(__ld_r13_to_r22):
+ ld r22, [sp,36]
+SYM(__ld_r13_to_r21):
+ ld r21, [sp,32]
+SYM(__ld_r13_to_r20):
+ ld r20, [sp,28]
+SYM(__ld_r13_to_r19):
+ ld r19, [sp,24]
+SYM(__ld_r13_to_r18):
+ ld r18, [sp,20]
+SYM(__ld_r13_to_r17):
+ ld r17, [sp,16]
+SYM(__ld_r13_to_r16):
+ ld r16, [sp,12]
+SYM(__ld_r13_to_r15):
+#ifdef __ARC700__
+ ld r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
+#else
+ ld_s r15, [sp,8]
+#endif
+ ld_s r14, [sp,4]
+ j_s.d [%blink]
+ ld_s r13, [sp,0]
+ ENDFUNC(__ld_r13_to_r15)
+ ENDFUNC(__ld_r13_to_r16)
+ ENDFUNC(__ld_r13_to_r17)
+ ENDFUNC(__ld_r13_to_r18)
+ ENDFUNC(__ld_r13_to_r19)
+ ENDFUNC(__ld_r13_to_r20)
+ ENDFUNC(__ld_r13_to_r21)
+ ENDFUNC(__ld_r13_to_r22)
+ ENDFUNC(__ld_r13_to_r23)
+ ENDFUNC(__ld_r13_to_r24)
+ ENDFUNC(__ld_r13_to_r25)
+
+ .global SYM(__ld_r13_to_r14_ret)
+ .global SYM(__ld_r13_to_r15_ret)
+ .global SYM(__ld_r13_to_r16_ret)
+ .global SYM(__ld_r13_to_r17_ret)
+ .global SYM(__ld_r13_to_r18_ret)
+ .global SYM(__ld_r13_to_r19_ret)
+ .global SYM(__ld_r13_to_r20_ret)
+ .global SYM(__ld_r13_to_r21_ret)
+ .global SYM(__ld_r13_to_r22_ret)
+ .global SYM(__ld_r13_to_r23_ret)
+ .global SYM(__ld_r13_to_r24_ret)
+ .global SYM(__ld_r13_to_r25_ret)
+ HIDDEN_FUNC(__ld_r13_to_r14_ret)
+ HIDDEN_FUNC(__ld_r13_to_r15_ret)
+ HIDDEN_FUNC(__ld_r13_to_r16_ret)
+ HIDDEN_FUNC(__ld_r13_to_r17_ret)
+ HIDDEN_FUNC(__ld_r13_to_r18_ret)
+ HIDDEN_FUNC(__ld_r13_to_r19_ret)
+ HIDDEN_FUNC(__ld_r13_to_r20_ret)
+ HIDDEN_FUNC(__ld_r13_to_r21_ret)
+ HIDDEN_FUNC(__ld_r13_to_r22_ret)
+ HIDDEN_FUNC(__ld_r13_to_r23_ret)
+ HIDDEN_FUNC(__ld_r13_to_r24_ret)
+ HIDDEN_FUNC(__ld_r13_to_r25_ret)
+ .section .text
+ .align 4
+SYM(__ld_r13_to_r25_ret):
+ ld r25, [sp,48]
+SYM(__ld_r13_to_r24_ret):
+ ld r24, [sp,44]
+SYM(__ld_r13_to_r23_ret):
+ ld r23, [sp,40]
+SYM(__ld_r13_to_r22_ret):
+ ld r22, [sp,36]
+SYM(__ld_r13_to_r21_ret):
+ ld r21, [sp,32]
+SYM(__ld_r13_to_r20_ret):
+ ld r20, [sp,28]
+SYM(__ld_r13_to_r19_ret):
+ ld r19, [sp,24]
+SYM(__ld_r13_to_r18_ret):
+ ld r18, [sp,20]
+SYM(__ld_r13_to_r17_ret):
+ ld r17, [sp,16]
+SYM(__ld_r13_to_r16_ret):
+ ld r16, [sp,12]
+SYM(__ld_r13_to_r15_ret):
+ ld r15, [sp,8]
+SYM(__ld_r13_to_r14_ret):
+ ld blink,[sp,r12]
+ ld_s r14, [sp,4]
+ ld.ab r13, [sp,r12]
+ j_s.d [%blink]
+ add_s sp,sp,4
+ ENDFUNC(__ld_r13_to_r14_ret)
+ ENDFUNC(__ld_r13_to_r15_ret)
+ ENDFUNC(__ld_r13_to_r16_ret)
+ ENDFUNC(__ld_r13_to_r17_ret)
+ ENDFUNC(__ld_r13_to_r18_ret)
+ ENDFUNC(__ld_r13_to_r19_ret)
+ ENDFUNC(__ld_r13_to_r20_ret)
+ ENDFUNC(__ld_r13_to_r21_ret)
+ ENDFUNC(__ld_r13_to_r22_ret)
+ ENDFUNC(__ld_r13_to_r23_ret)
+ ENDFUNC(__ld_r13_to_r24_ret)
+ ENDFUNC(__ld_r13_to_r25_ret)
diff --git a/arch/arc/lib/libgcc2.c b/arch/arc/lib/libgcc2.c
new file mode 100644
index 0000000..d5ad327
--- /dev/null
+++ b/arch/arc/lib/libgcc2.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 1989-2013 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "libgcc2.h"
+
+DWtype
+__ashldi3(DWtype u, shift_count_type b)
+{
+ if (b == 0)
+ return u;
+
+ const DWunion uu = {.ll = u};
+ const shift_count_type bm = W_TYPE_SIZE - b;
+ DWunion w;
+
+ if (bm <= 0) {
+ w.s.low = 0;
+ w.s.high = (UWtype)uu.s.low << -bm;
+ } else {
+ const UWtype carries = (UWtype) uu.s.low >> bm;
+
+ w.s.low = (UWtype)uu.s.low << b;
+ w.s.high = ((UWtype)uu.s.high << b) | carries;
+ }
+
+ return w.ll;
+}
+
+DWtype
+__ashrdi3(DWtype u, shift_count_type b)
+{
+ if (b == 0)
+ return u;
+
+ const DWunion uu = {.ll = u};
+ const shift_count_type bm = W_TYPE_SIZE - b;
+ DWunion w;
+
+ if (bm <= 0) {
+ /* w.s.high = 1..1 or 0..0 */
+ w.s.high = uu.s.high >> (W_TYPE_SIZE - 1);
+ w.s.low = uu.s.high >> -bm;
+ } else {
+ const UWtype carries = (UWtype) uu.s.high << bm;
+
+ w.s.high = uu.s.high >> b;
+ w.s.low = ((UWtype)uu.s.low >> b) | carries;
+ }
+
+ return w.ll;
+}
+
+DWtype
+__lshrdi3(DWtype u, shift_count_type b)
+{
+ if (b == 0)
+ return u;
+
+ const DWunion uu = {.ll = u};
+ const shift_count_type bm = W_TYPE_SIZE - b;
+ DWunion w;
+
+ if (bm <= 0) {
+ w.s.high = 0;
+ w.s.low = (UWtype)uu.s.high >> -bm;
+ } else {
+ const UWtype carries = (UWtype)uu.s.high << bm;
+
+ w.s.high = (UWtype)uu.s.high >> b;
+ w.s.low = ((UWtype)uu.s.low >> b) | carries;
+ }
+
+ return w.ll;
+}
+
+unsigned long
+udivmodsi4(unsigned long num, unsigned long den, int modwanted)
+{
+ unsigned long bit = 1;
+ unsigned long res = 0;
+
+ while (den < num && bit && !(den & (1L<<31))) {
+ den <<= 1;
+ bit <<= 1;
+ }
+
+ while (bit) {
+ if (num >= den) {
+ num -= den;
+ res |= bit;
+ }
+ bit >>= 1;
+ den >>= 1;
+ }
+
+ if (modwanted)
+ return num;
+
+ return res;
+}
+
+long
+__divsi3(long a, long b)
+{
+ int neg = 0;
+ long res;
+
+ if (a < 0) {
+ a = -a;
+ neg = !neg;
+ }
+
+ if (b < 0) {
+ b = -b;
+ neg = !neg;
+ }
+
+ res = udivmodsi4(a, b, 0);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
+
+long
+__modsi3(long a, long b)
+{
+ int neg = 0;
+ long res;
+
+ if (a < 0) {
+ a = -a;
+ neg = 1;
+ }
+
+ if (b < 0)
+ b = -b;
+
+ res = udivmodsi4(a, b, 1);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
+
+long
+__udivsi3(long a, long b)
+{
+ return udivmodsi4(a, b, 0);
+}
+
+long
+__umodsi3(long a, long b)
+{
+ return udivmodsi4(a, b, 1);
+}
diff --git a/arch/arc/lib/libgcc2.h b/arch/arc/lib/libgcc2.h
new file mode 100644
index 0000000..8813c3b
--- /dev/null
+++ b/arch/arc/lib/libgcc2.h
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 1989-2013 Free Software Foundation, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_LIBGCC_H
+#define __ASM_LIBGCC_H
+
+#define UNITS_PER_WORD 4 /* for ARC */
+#define BITS_PER_UNIT 8 /* for ARC */
+
+#define W_TYPE_SIZE (4 * BITS_PER_UNIT)
+
+#define MIN_UNITS_PER_WORD UNITS_PER_WORD
+
+/* Work out the largest "word" size that we can deal with on this target. */
+#if MIN_UNITS_PER_WORD > 4
+# define LIBGCC2_MAX_UNITS_PER_WORD 8
+#elif (MIN_UNITS_PER_WORD > 2 \
+ || (MIN_UNITS_PER_WORD > 1 && __SIZEOF_LONG_LONG__ > 4))
+# define LIBGCC2_MAX_UNITS_PER_WORD 4
+#else
+# define LIBGCC2_MAX_UNITS_PER_WORD MIN_UNITS_PER_WORD
+#endif
+
+/* Work out what word size we are using for this compilation.
+ The value can be set on the command line. */
+#ifndef LIBGCC2_UNITS_PER_WORD
+#define LIBGCC2_UNITS_PER_WORD LIBGCC2_MAX_UNITS_PER_WORD
+#endif
+
+typedef int QItype __attribute__ ((mode (QI)));
+typedef unsigned int UQItype __attribute__ ((mode (QI)));
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+#if MIN_UNITS_PER_WORD > 1
+/* These typedefs are usually forbidden on dsp's with UNITS_PER_WORD 1. */
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+#if __SIZEOF_LONG_LONG__ > 4
+/* These typedefs are usually forbidden on archs with UNITS_PER_WORD 2. */
+typedef int DItype __attribute__ ((mode (DI)));
+typedef unsigned int UDItype __attribute__ ((mode (DI)));
+#if MIN_UNITS_PER_WORD > 4
+/* These typedefs are usually forbidden on archs with UNITS_PER_WORD 4. */
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+#endif
+#endif
+#endif
+
+#if LIBGCC2_UNITS_PER_WORD == 8
+#define W_TYPE_SIZE (8 * BITS_PER_UNIT)
+#define Wtype DItype
+#define UWtype UDItype
+#define HWtype DItype
+#define UHWtype UDItype
+#define DWtype TItype
+#define UDWtype UTItype
+#ifdef LIBGCC2_GNU_PREFIX
+#define __NW(a,b) __gnu_ ## a ## di ## b
+#define __NDW(a,b) __gnu_ ## a ## ti ## b
+#else
+#define __NW(a,b) __ ## a ## di ## b
+#define __NDW(a,b) __ ## a ## ti ## b
+#endif
+#elif LIBGCC2_UNITS_PER_WORD == 4
+#define W_TYPE_SIZE (4 * BITS_PER_UNIT)
+#define Wtype SItype
+#define UWtype USItype
+#define HWtype SItype
+#define UHWtype USItype
+#define DWtype DItype
+#define UDWtype UDItype
+#ifdef LIBGCC2_GNU_PREFIX
+#define __NW(a,b) __gnu_ ## a ## si ## b
+#define __NDW(a,b) __gnu_ ## a ## di ## b
+#else
+#define __NW(a,b) __ ## a ## si ## b
+#define __NDW(a,b) __ ## a ## di ## b
+#endif
+#elif LIBGCC2_UNITS_PER_WORD == 2
+#define W_TYPE_SIZE (2 * BITS_PER_UNIT)
+#define Wtype HItype
+#define UWtype UHItype
+#define HWtype HItype
+#define UHWtype UHItype
+#define DWtype SItype
+#define UDWtype USItype
+#ifdef LIBGCC2_GNU_PREFIX
+#define __NW(a,b) __gnu_ ## a ## hi ## b
+#define __NDW(a,b) __gnu_ ## a ## si ## b
+#else
+#define __NW(a,b) __ ## a ## hi ## b
+#define __NDW(a,b) __ ## a ## si ## b
+#endif
+#else
+#define W_TYPE_SIZE BITS_PER_UNIT
+#define Wtype QItype
+#define UWtype UQItype
+#define HWtype QItype
+#define UHWtype UQItype
+#define DWtype HItype
+#define UDWtype UHItype
+#ifdef LIBGCC2_GNU_PREFIX
+#define __NW(a,b) __gnu_ ## a ## qi ## b
+#define __NDW(a,b) __gnu_ ## a ## hi ## b
+#else
+#define __NW(a,b) __ ## a ## qi ## b
+#define __NDW(a,b) __ ## a ## hi ## b
+#endif
+#endif
+
+typedef int shift_count_type __attribute__((mode (__libgcc_shift_count__)));
+
+#if __BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__
+ struct DWstruct {Wtype high, low;};
+#else
+ struct DWstruct {Wtype low, high;};
+#endif
+
+/* We need this union to unpack/pack DImode values, since we don't have
+ any arithmetic yet. Incoming DImode parameters are stored into the
+ `ll' field, and the unpacked result is read from the struct `s'. */
+
+typedef union {
+ struct DWstruct s;
+ DWtype ll;
+} DWunion;
+
+#endif /* __ASM_LIBGCC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2015-02-03 10:58 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-02-03 10:58 [U-Boot] [PATCH 00/12] ARC: more improvements Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 01/12] arc: memcmp - fix zero-delay loop utilization Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 02/12] arc: remove CPU hard-coded selection from board description in include/configs Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 03/12] arc: add more flavours of ARC700 series CPU Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 04/12] arc: define and use PTAG AUX regs for MMUv3 only Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 05/12] arc: select cache settings via menuconfig Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 06/12] arc: add selection of endianess in Kconfig Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 07/12] arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 08/12] arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 09/12] arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 10/12] arc: move SYS_MONITOR_BASE setup in Konfig Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 11/12] arc: move CPU flags selection to the main "config.mk" Alexey Brodkin
2015-02-03 10:58 ` [U-Boot] [PATCH 12/12] arc: build libgcc in U-Boot Alexey Brodkin
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