[U-Boot] [PATCH 0/3] mmc: dw_mmc: fixed minor problems

[U-Boot] [PATCH 0/3] mmc: dw_mmc: fixed minor problems

[Jaehoon Chung]

This patchset fixed minor problems.
Included the previous patch("mmc: dw_mmc: fixed the wrong bit control")

Jaehoon Chung (3):
  mmc: dw_mmc: fixed the wrong bit control
  mmc: exynos_dw_mmc: set to clksel_val into board-init function
  mmc: exynos_dw_mmc: use the exynos specific data structure

 drivers/mmc/dw_mmc.c        |  2 +-
 drivers/mmc/exynos_dw_mmc.c | 60 ++++++++++++++++++++++++++++++++++++---------
 include/dwmmc.h             |  2 +-
 3 files changed, 51 insertions(+), 13 deletions(-)

-- 
1.9.1

[U-Boot] [PATCH 1/3] mmc: dw_mmc: fixed the wrong bit control

[Jaehoon Chung]

If mode is not DDR-mode, then it needs to clear it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
 drivers/mmc/dw_mmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index b18c75d..76fa0b0 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -321,7 +321,7 @@ static void dwmci_set_ios(struct mmc *mmc)
 	if (mmc->ddr_mode)
 		regs |= DWMCI_DDR_MODE;
 	else
-		regs &= DWMCI_DDR_MODE;
+		regs &= ~DWMCI_DDR_MODE;
 
 	dwmci_writel(host, DWMCI_UHS_REG, regs);
 
-- 
1.9.1

[U-Boot] [PATCH 2/3] mmc: exynos_dw_mmc: set to clksel_val into board-init function

[Jaehoon Chung]

"clksel_val" is assigned to property of mmc or defined value.
But it doesn't write at initial sequence.
There is a reason that get the wrong source-clock value.
This patch fixed it.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
 drivers/mmc/exynos_dw_mmc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index dfa209b..3936660 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -64,6 +64,10 @@ static void exynos_dwmci_board_init(struct dwmci_host *host)
 			     MPSCTRL_NON_SECURE_READ_BIT |
 			     MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
 	}
+
+	/* Set to clksel_val at initial time */
+	if (host->clksel_val)
+		exynos_dwmci_clksel(host);
 }
 
 static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
-- 
1.9.1

[U-Boot] [PATCH 3/3] mmc: exynos_dw_mmc: use the exynos specific data structure

[Jaehoon Chung]

Clksel value is exynos specific value.
It removed "clksel_val" into dwmci_host and created the
"dwmci_exynos_priv_data" structure for exynos specific data.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
 drivers/mmc/exynos_dw_mmc.c | 60 +++++++++++++++++++++++++++++++++++----------
 include/dwmmc.h             |  2 +-
 2 files changed, 48 insertions(+), 14 deletions(-)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 3936660..c66c0b0 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,8 +19,13 @@
 #define	DWMMC_MAX_CH_NUM		4
 #define	DWMMC_MAX_FREQ			52000000
 #define	DWMMC_MIN_FREQ			400000
-#define	DWMMC_MMC0_CLKSEL_VAL		0x03030001
-#define	DWMMC_MMC2_CLKSEL_VAL		0x03020001
+#define	DWMMC_MMC0_SDR_TIMING_VAL	0x03030001
+#define	DWMMC_MMC2_SDR_TIMING_VAL	0x03020001
+
+/* Exynos implmentation specific drver private data */
+struct dwmci_exynos_priv_data {
+	u32 sdr_timing;
+};
 
 /*
  * Function used as callback function to initialise the
@@ -28,7 +33,9 @@
  */
 static void exynos_dwmci_clksel(struct dwmci_host *host)
 {
-	dwmci_writel(host, DWMCI_CLKSEL, host->clksel_val);
+	struct dwmci_exynos_priv_data *priv = host->priv;
+
+	dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing);
 }
 
 unsigned int exynos_dwmci_get_clk(struct dwmci_host *host)
@@ -55,6 +62,8 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host)
 
 static void exynos_dwmci_board_init(struct dwmci_host *host)
 {
+	struct dwmci_exynos_priv_data *priv = host->priv;
+
 	if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
 		dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
 		dwmci_writel(host, EMMCP_SEND0, 0);
@@ -65,8 +74,8 @@ static void exynos_dwmci_board_init(struct dwmci_host *host)
 			     MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
 	}
 
-	/* Set to clksel_val at initial time */
-	if (host->clksel_val)
+	/* Set to timing value at initial time */
+	if (priv->sdr_timing)
 		exynos_dwmci_clksel(host);
 }
 
@@ -74,6 +83,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
 {
 	unsigned int div;
 	unsigned long freq, sclk;
+	struct dwmci_exynos_priv_data *priv = host->priv;
 
 	if (host->bus_hz)
 		freq = host->bus_hz;
@@ -92,11 +102,11 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
 #endif
 	host->board_init = exynos_dwmci_board_init;
 
-	if (!host->clksel_val) {
+	if (!priv->sdr_timing) {
 		if (index == 0)
-			host->clksel_val = DWMMC_MMC0_CLKSEL_VAL;
+			priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL;
 		else if (index == 2)
-			host->clksel_val = DWMMC_MMC2_CLKSEL_VAL;
+			priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL;
 	}
 
 	host->caps = MMC_MODE_DDR_52MHz;
@@ -122,6 +132,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
 int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
 {
 	struct dwmci_host *host = NULL;
+	struct dwmci_exynos_priv_data *priv;
 
 	host = malloc(sizeof(struct dwmci_host));
 	if (!host) {
@@ -129,11 +140,19 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
 		return -ENOMEM;
 	}
 
+	priv = malloc(sizeof(struct dwmci_exynos_priv_data));
+	if (!priv) {
+		error("dwmci_exynos_priv_data malloc fail!\n");
+		return -ENOMEM;
+	}
+
 	host->ioaddr = (void *)regbase;
 	host->buswidth = bus_width;
 
 	if (clksel)
-		host->clksel_val = clksel;
+		priv->sdr_timing = clksel;
+
+	host->priv = priv;
 
 	return exynos_dwmci_core_init(host, index);
 }
@@ -161,7 +180,14 @@ static int exynos_dwmci_get_config(const void *blob, int node,
 					struct dwmci_host *host)
 {
 	int err = 0;
-	u32 base, clksel_val, timing[3];
+	u32 base, timing[3];
+	struct dwmci_exynos_priv_data *priv;
+
+	priv = malloc(sizeof(struct dwmci_exynos_priv_data));
+	if (!priv) {
+		error("dwmci_exynos_priv_data malloc fail!\n");
+		return -ENOMEM;
+	}
 
 	/* Extract device id for each mmc channel */
 	host->dev_id = pinmux_decode_periph_id(blob, node);
@@ -194,16 +220,24 @@ static int exynos_dwmci_get_config(const void *blob, int node,
 		return -EINVAL;
 	}
 
-	clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) |
+	priv->sdr_timing = (DWMCI_SET_SAMPLE_CLK(timing[0]) |
 			DWMCI_SET_DRV_CLK(timing[1]) |
 			DWMCI_SET_DIV_RATIO(timing[2]));
-	if (clksel_val)
-		host->clksel_val = clksel_val;
+
+	/* sdr_timing didn't assigned anything, use the default value */
+	if (!priv->sdr_timing) {
+		if (host->dev_index == 0)
+			priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL;
+		else if (host->dev_index == 2)
+			priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL;
+	}
 
 	host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0);
 	host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0);
 	host->div = fdtdec_get_int(blob, node, "div", 0);
 
+	host->priv = priv;
+
 	return 0;
 }
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 109f7c8..86a5491 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -141,9 +141,9 @@ struct dwmci_host {
 	int dev_index;
 	int dev_id;
 	int buswidth;
-	u32 clksel_val;
 	u32 fifoth_val;
 	struct mmc *mmc;
+	void *priv;
 
 	void (*clksel)(struct dwmci_host *host);
 	void (*board_init)(struct dwmci_host *host);
-- 
1.9.1

[U-Boot] [PATCH 1/3] mmc: dw_mmc: fixed the wrong bit control

[Pantelis Antoniou]

Hi Jaehoon,

> On Feb 4, 2015, at 08:48 , Jaehoon Chung <jh80.chung@samsung.com> wrote:
> 
> If mode is not DDR-mode, then it needs to clear it.
> 
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> drivers/mmc/dw_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index b18c75d..76fa0b0 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -321,7 +321,7 @@ static void dwmci_set_ios(struct mmc *mmc)
> 	if (mmc->ddr_mode)
> 		regs |= DWMCI_DDR_MODE;
> 	else
> -		regs &= DWMCI_DDR_MODE;
> +		regs &= ~DWMCI_DDR_MODE;
> 
> 	dwmci_writel(host, DWMCI_UHS_REG, regs);
> 
> -- 
> 1.9.1
> 

This is the same patch as to the previous version that I applied.
So dropping this.

? Pantelis

[U-Boot] [PATCH 2/3] mmc: exynos_dw_mmc: set to clksel_val into board-init function

[Pantelis Antoniou]

Hi Jaehoon,

> On Feb 4, 2015, at 08:48 , Jaehoon Chung <jh80.chung@samsung.com> wrote:
> 
> "clksel_val" is assigned to property of mmc or defined value.
> But it doesn't write at initial sequence.
> There is a reason that get the wrong source-clock value.
> This patch fixed it.
> 
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> drivers/mmc/exynos_dw_mmc.c | 4 ++++
> 1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
> index dfa209b..3936660 100644
> --- a/drivers/mmc/exynos_dw_mmc.c
> +++ b/drivers/mmc/exynos_dw_mmc.c
> @@ -64,6 +64,10 @@ static void exynos_dwmci_board_init(struct dwmci_host *host)
> 			     MPSCTRL_NON_SECURE_READ_BIT |
> 			     MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
> 	}
> +
> +	/* Set to clksel_val at initial time */
> +	if (host->clksel_val)
> +		exynos_dwmci_clksel(host);
> }
> 
> static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
> -- 
> 1.9.1
> 

Thanks, applied

? Pantelis

[U-Boot] [PATCH 2/3] mmc: exynos_dw_mmc: set to clksel_val into board-init function

[Pantelis Antoniou]

Hi Jaehoon,

> On Feb 4, 2015, at 08:48 , Jaehoon Chung <jh80.chung@samsung.com> wrote:
> 
> "clksel_val" is assigned to property of mmc or defined value.
> But it doesn't write at initial sequence.
> There is a reason that get the wrong source-clock value.
> This patch fixed it.
> 
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> drivers/mmc/exynos_dw_mmc.c | 4 ++++
> 1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
> index dfa209b..3936660 100644
> --- a/drivers/mmc/exynos_dw_mmc.c
> +++ b/drivers/mmc/exynos_dw_mmc.c
> @@ -64,6 +64,10 @@ static void exynos_dwmci_board_init(struct dwmci_host *host)
> 			     MPSCTRL_NON_SECURE_READ_BIT |
> 			     MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
> 	}
> +
> +	/* Set to clksel_val at initial time */
> +	if (host->clksel_val)
> +		exynos_dwmci_clksel(host);
> }
> 
> static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
> -- 
> 1.9.1
> 

Thanks, applied.

? Pantelis