* [U-Boot] [PATCH] arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register
@ 2015-02-10 5:52 Nobuhiro Iwamatsu
0 siblings, 0 replies; 2+ messages in thread
From: Nobuhiro Iwamatsu @ 2015-02-10 5:52 UTC (permalink / raw)
To: u-boot
R8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we
need to enable SMP bit of Auxiliary Control Register.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
---
arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
index d47546a..fc839ea 100644
--- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
+++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
@@ -40,7 +40,7 @@ do_lowlevel_init:
and r1, r1, #0x7F00
lsrs r1, r1, #8
cmp r1, #0x4C /* 0x4C is ID of r8a7794 */
- beq _exit_init_l2_a15
+ beq _enable_actlr_smp
/* surpress wfe if ca15 */
tst r4, #4
@@ -64,6 +64,14 @@ do_lowlevel_init:
orrne r0, r0, #0x20 /* L2CTLR[5] */
#endif
mcrne p15, 1, r0, c9, c0, 2
+
+ b _exit_init_l2_a15
+
+_enable_actlr_smp: /* R8A7794 only (CA7) */
+ mrc p15, 0, r0, c1, c0, 1
+ orr r0, r0, #0x40
+ mcr p15, 0, r0, c1, c0, 1
+
_exit_init_l2_a15:
ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
sub sp, r3, #4
--
2.1.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register
@ 2015-02-10 6:13 Nobuhiro Iwamatsu
0 siblings, 0 replies; 2+ messages in thread
From: Nobuhiro Iwamatsu @ 2015-02-10 6:13 UTC (permalink / raw)
To: u-boot
R8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we
need to enable SMP bit of Auxiliary Control Register.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
---
arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
index d47546a..fc839ea 100644
--- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
+++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
@@ -40,7 +40,7 @@ do_lowlevel_init:
and r1, r1, #0x7F00
lsrs r1, r1, #8
cmp r1, #0x4C /* 0x4C is ID of r8a7794 */
- beq _exit_init_l2_a15
+ beq _enable_actlr_smp
/* surpress wfe if ca15 */
tst r4, #4
@@ -64,6 +64,14 @@ do_lowlevel_init:
orrne r0, r0, #0x20 /* L2CTLR[5] */
#endif
mcrne p15, 1, r0, c9, c0, 2
+
+ b _exit_init_l2_a15
+
+_enable_actlr_smp: /* R8A7794 only (CA7) */
+ mrc p15, 0, r0, c1, c0, 1
+ orr r0, r0, #0x40
+ mcr p15, 0, r0, c1, c0, 1
+
_exit_init_l2_a15:
ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
sub sp, r3, #4
--
2.1.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2015-02-10 5:52 [U-Boot] [PATCH] arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control Register Nobuhiro Iwamatsu
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