* [RFC PATCH 0/3]
@ 2015-02-10 14:16 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:16 UTC (permalink / raw)
To: David Airlie, Russell King, Philipp Zabel
Cc: Fabio Estevam, Shawn Guo, Rob Clark, Mark Yao, Daniel Vetter,
dri-devel, linux-kernel, Arnd Bergmann, Sean Cross, Jyri Sarha,
Ben Zhang, alsa-devel, Heiko Stuebner, linux-arm-kernel,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree, djkurtz, mmind00, dianders, marcheu, linux-rockchip,
Yakir Yang
RK3288 hdmi eye-diagram test would fail when pixel clock is 148.5MHz,
and single-ended test would failed when display mode is 74.25MHz.
- Fix some code style, leave space for next patches.
- For hdmi eye-diagram test, we turn on the Transmitter Trailer-B and
improve slopeboost to 25%-30% decrease.
- For hdmi single-ended test, we set CKLVL & TXLVL to 17 when pixel
clock is 74.25MHz, keep CKLVL & TXLVL to 13 when pixel clock is 148.5MHz.
Yakir Yang (3):
drm: bridge/dw_hdmi: fixed codec style
drm: bridge/dw_hdmi_rockchip: improve hdmi eye-diagram test
drm: bridge/dw_hdmi: improve hdmi single-end test
drivers/gpu/drm/bridge/dw_hdmi.c | 20 ++++++++++----------
drivers/gpu/drm/imx/dw_hdmi-imx.c | 12 ++++++------
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 14 +++++++-------
include/drm/bridge/dw_hdmi.h | 5 +++--
4 files changed, 26 insertions(+), 25 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/3]
@ 2015-02-10 14:16 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:16 UTC (permalink / raw)
To: linux-arm-kernel
RK3288 hdmi eye-diagram test would fail when pixel clock is 148.5MHz,
and single-ended test would failed when display mode is 74.25MHz.
- Fix some code style, leave space for next patches.
- For hdmi eye-diagram test, we turn on the Transmitter Trailer-B and
improve slopeboost to 25%-30% decrease.
- For hdmi single-ended test, we set CKLVL & TXLVL to 17 when pixel
clock is 74.25MHz, keep CKLVL & TXLVL to 13 when pixel clock is 148.5MHz.
Yakir Yang (3):
drm: bridge/dw_hdmi: fixed codec style
drm: bridge/dw_hdmi_rockchip: improve hdmi eye-diagram test
drm: bridge/dw_hdmi: improve hdmi single-end test
drivers/gpu/drm/bridge/dw_hdmi.c | 20 ++++++++++----------
drivers/gpu/drm/imx/dw_hdmi-imx.c | 12 ++++++------
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 14 +++++++-------
include/drm/bridge/dw_hdmi.h | 5 +++--
4 files changed, 26 insertions(+), 25 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 1/3] drm: bridge/dw_hdmi: fixed codec style
2015-02-10 14:16 ` Yakir Yang
@ 2015-02-10 14:17 ` Yakir Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:17 UTC (permalink / raw)
To: David Airlie, Russell King, Philipp Zabel
Cc: Fabio Estevam, Shawn Guo, Rob Clark, Mark Yao, Daniel Vetter,
dri-devel, linux-kernel, Arnd Bergmann, Sean Cross, Jyri Sarha,
Ben Zhang, alsa-devel, Heiko Stuebner, linux-arm-kernel,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree, djkurtz, mmind00, dianders, marcheu, linux-rockchip,
Yakir Yang
- const struct dw_hdmi_mpll_config *mpll_config =
- hdmi->plat_data->mpll_cfg;
- const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
- const struct dw_hdmi_sym_term *sym_term = hdmi->plat_data->sym_term;
+ const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+ const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
+ const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
+ const struct dw_hdmi_sym_term *sym_term = plat_data->sym_term;
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/dw_hdmi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 14c61ee..8b3208c 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -761,10 +761,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
{
unsigned res_idx, i;
u8 val, msec;
- const struct dw_hdmi_mpll_config *mpll_config =
- hdmi->plat_data->mpll_cfg;
- const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
- const struct dw_hdmi_sym_term *sym_term = hdmi->plat_data->sym_term;
+ const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+ const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
+ const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
+ const struct dw_hdmi_sym_term *sym_term = plat_data->sym_term;
if (prep)
return -EINVAL;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 1/3] drm: bridge/dw_hdmi: fixed codec style
@ 2015-02-10 14:17 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:17 UTC (permalink / raw)
To: linux-arm-kernel
- const struct dw_hdmi_mpll_config *mpll_config =
- hdmi->plat_data->mpll_cfg;
- const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
- const struct dw_hdmi_sym_term *sym_term = hdmi->plat_data->sym_term;
+ const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+ const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
+ const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
+ const struct dw_hdmi_sym_term *sym_term = plat_data->sym_term;
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/dw_hdmi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 14c61ee..8b3208c 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -761,10 +761,10 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
{
unsigned res_idx, i;
u8 val, msec;
- const struct dw_hdmi_mpll_config *mpll_config =
- hdmi->plat_data->mpll_cfg;
- const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
- const struct dw_hdmi_sym_term *sym_term = hdmi->plat_data->sym_term;
+ const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+ const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
+ const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
+ const struct dw_hdmi_sym_term *sym_term = plat_data->sym_term;
if (prep)
return -EINVAL;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 2/3] drm: bridge/dw_hdmi_rockchip: improve hdmi eye-diagram test
2015-02-10 14:16 ` Yakir Yang
@ 2015-02-10 14:18 ` Yakir Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:18 UTC (permalink / raw)
To: David Airlie, Russell King, Philipp Zabel
Cc: Fabio Estevam, Shawn Guo, Rob Clark, Mark Yao, Daniel Vetter,
dri-devel, linux-kernel, Arnd Bergmann, Sean Cross, Jyri Sarha,
Ben Zhang, alsa-devel, Heiko Stuebner, linux-arm-kernel,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree, djkurtz, mmind00, dianders, marcheu, linux-rockchip,
Yakir Yang
As for 1920x1080 display resolution, we should turn on the Transmitter
Trailer-B, and adjust slopeboost to 25%-35% decrease.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index e46e1d9..51030ca 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -142,7 +142,7 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
static const struct dw_hdmi_sym_term rockchip_sym_term[] = {
/*pixelclk symbol term*/
{ 74250000, 0x8009, 0x0004 },
- { 148500000, 0x8029, 0x0004 },
+ { 148500000, 0x803b, 0x0004 },
{ 297000000, 0x8039, 0x0005 },
{ ~0UL, 0x0000, 0x0000 }
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 2/3] drm: bridge/dw_hdmi_rockchip: improve hdmi eye-diagram test
@ 2015-02-10 14:18 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:18 UTC (permalink / raw)
To: linux-arm-kernel
As for 1920x1080 display resolution, we should turn on the Transmitter
Trailer-B, and adjust slopeboost to 25%-35% decrease.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index e46e1d9..51030ca 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -142,7 +142,7 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
static const struct dw_hdmi_sym_term rockchip_sym_term[] = {
/*pixelclk symbol term*/
{ 74250000, 0x8009, 0x0004 },
- { 148500000, 0x8029, 0x0004 },
+ { 148500000, 0x803b, 0x0004 },
{ 297000000, 0x8039, 0x0005 },
{ ~0UL, 0x0000, 0x0000 }
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 0/1] Improve eye-diagram & single-ended test for rk3288 hdmi
2015-02-10 14:16 ` Yakir Yang
(?)
@ 2015-02-10 14:20 ` Yakir Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:20 UTC (permalink / raw)
To: David Airlie, Russell King, Philipp Zabel
Cc: Fabio Estevam, Shawn Guo, Rob Clark, Mark Yao, Daniel Vetter,
dri-devel, linux-kernel, Arnd Bergmann, Sean Cross, Jyri Sarha,
Ben Zhang, alsa-devel, Heiko Stuebner, linux-arm-kernel,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree, djkurtz, mmind00, dianders, marcheu, linux-rockchip,
Yakir Yang
RK3288 hdmi eye-diagram test would fail when pixel clock is 148.5MHz,
and single-ended test would failed when display mode is 74.25MHz.
- Fix some code style, leave space for next patches.
- For hdmi eye-diagram test, we turn on the Transmitter Trailer-B and
improve slopeboost to 25%-30% decrease.
- For hdmi single-ended test, we set CKLVL & TXLVL to 17 when pixel
clock is 74.25MHz, keep CKLVL & TXLVL to 13 when pixel clock is 148.5MHz.
Yakir Yang (1):
drm: bridge/dw_hdmi: fixed codec style
drivers/gpu/drm/bridge/dw_hdmi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/1] Improve eye-diagram & single-ended test for rk3288 hdmi
@ 2015-02-10 14:20 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:20 UTC (permalink / raw)
To: David Airlie, Russell King, Philipp Zabel
Cc: Mark Rutland, alsa-devel, Heiko Stuebner, djkurtz, dianders,
Yakir Yang, mmind00, Pawel Moll, linux-rockchip, Sean Cross,
devicetree, Arnd Bergmann, Ian Campbell, Jyri Sarha, Ben Zhang,
Rob Herring, dri-devel, marcheu, linux-arm-kernel, Mark Yao,
Fabio Estevam, linux-kernel, Rob Clark, Daniel Vetter,
Kumar Gala, Shawn Guo
RK3288 hdmi eye-diagram test would fail when pixel clock is 148.5MHz,
and single-ended test would failed when display mode is 74.25MHz.
- Fix some code style, leave space for next patches.
- For hdmi eye-diagram test, we turn on the Transmitter Trailer-B and
improve slopeboost to 25%-30% decrease.
- For hdmi single-ended test, we set CKLVL & TXLVL to 17 when pixel
clock is 74.25MHz, keep CKLVL & TXLVL to 13 when pixel clock is 148.5MHz.
Yakir Yang (1):
drm: bridge/dw_hdmi: fixed codec style
drivers/gpu/drm/bridge/dw_hdmi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 0/1] Improve eye-diagram & single-ended test for rk3288 hdmi
@ 2015-02-10 14:20 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:20 UTC (permalink / raw)
To: linux-arm-kernel
RK3288 hdmi eye-diagram test would fail when pixel clock is 148.5MHz,
and single-ended test would failed when display mode is 74.25MHz.
- Fix some code style, leave space for next patches.
- For hdmi eye-diagram test, we turn on the Transmitter Trailer-B and
improve slopeboost to 25%-30% decrease.
- For hdmi single-ended test, we set CKLVL & TXLVL to 17 when pixel
clock is 74.25MHz, keep CKLVL & TXLVL to 13 when pixel clock is 148.5MHz.
Yakir Yang (1):
drm: bridge/dw_hdmi: fixed codec style
drivers/gpu/drm/bridge/dw_hdmi.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 11+ messages in thread
* [RFC PATCH 3/3] drm: bridge/dw_hdmi: improve hdmi single-end test
2015-02-10 14:16 ` Yakir Yang
@ 2015-02-10 14:23 ` Yakir Yang
-1 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:23 UTC (permalink / raw)
To: David Airlie, Russell King, Philipp Zabel
Cc: Fabio Estevam, Shawn Guo, Rob Clark, Mark Yao, Daniel Vetter,
dri-devel, linux-kernel, Arnd Bergmann, Sean Cross, Jyri Sarha,
Ben Zhang, alsa-devel, Heiko Stuebner, linux-arm-kernel,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree, djkurtz, mmind00, dianders, marcheu, linux-rockchip,
Yakir Yang
Because of iMX6 & Rockchip have differnet mpll config parameter,
than the cklvl & txlvl would be different, we also should seperate
this parmeter.
As for Rockchip HDMI, when pixle clock less than 148MHz, the cklvl &
txlvl should be set to 13. When pixel clock less than 74.25MHz the
cklvl & txlvl should be set to 17.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/dw_hdmi.c | 14 +++++++-------
drivers/gpu/drm/imx/dw_hdmi-imx.c | 12 ++++++------
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 14 +++++++-------
include/drm/bridge/dw_hdmi.h | 5 +++--
4 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 8b3208c..869262d 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -764,7 +764,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
- const struct dw_hdmi_sym_term *sym_term = plat_data->sym_term;
+ const struct dw_hdmi_phy_config *phy_config = plat_data->phy_config;
if (prep)
return -EINVAL;
@@ -835,18 +835,18 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
hdmi_phy_i2c_write(hdmi, 0x0000, 0x13); /* PLLPHBYCTRL */
hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
- for (i = 0; sym_term[i].mpixelclock != (~0UL); i++)
+ for (i = 0; phy_config[i].mpixelclock != (~0UL); i++)
if (hdmi->hdmi_data.video_mode.mpixelclock <=
- sym_term[i].mpixelclock)
+ phy_config[i].mpixelclock)
break;
/* RESISTANCE TERM 133Ohm Cfg */
- hdmi_phy_i2c_write(hdmi, sym_term[i].term, 0x19); /* TXTERM */
+ hdmi_phy_i2c_write(hdmi, phy_config[i].term, 0x19); /* TXTERM */
/* PREEMP Cgf 0.00 */
- hdmi_phy_i2c_write(hdmi, sym_term[i].sym_ctr, 0x09); /* CKSYMTXCTRL */
-
+ hdmi_phy_i2c_write(hdmi, phy_config[i].sym_ctr, 0x09); /* CKSYMTXCTRL */
/* TX/CK LVL 10 */
- hdmi_phy_i2c_write(hdmi, 0x01ad, 0x0E); /* VLEVCTRL */
+ hdmi_phy_i2c_write(hdmi, phy_config[i].vlev_ctr, 0x0E); /* VLEVCTRL */
+
/* REMOVE CLK TERM */
hdmi_phy_i2c_write(hdmi, 0x8000, 0x05); /* CKCALCTRL */
diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c
index 121d30c..d6095d2 100644
--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
@@ -73,10 +73,10 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
}
};
-static const struct dw_hdmi_sym_term imx_sym_term[] = {
- /*pixelclk symbol term*/
- { 148500000, 0x800d, 0x0005 },
- { ~0UL, 0x0000, 0x0000 }
+static const struct dw_hdmi_phy_config imx_phy_config[] = {
+ /*pixelclk symbol term vlev */
+ { 148500000, 0x800d, 0x0005, 0x01ad},
+ { ~0UL, 0x0000, 0x0000, 0x0000}
};
static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
@@ -139,14 +139,14 @@ static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
.mpll_cfg = imx_mpll_cfg,
.cur_ctr = imx_cur_ctr,
- .sym_term = imx_sym_term,
+ .phy_config = imx_phy_config,
.dev_type = IMX6Q_HDMI,
};
static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
.mpll_cfg = imx_mpll_cfg,
.cur_ctr = imx_cur_ctr,
- .sym_term = imx_sym_term,
+ .phy_config = imx_phy_config,
.dev_type = IMX6DL_HDMI,
};
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 51030ca..65152a9 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -139,12 +139,12 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
}
};
-static const struct dw_hdmi_sym_term rockchip_sym_term[] = {
- /*pixelclk symbol term*/
- { 74250000, 0x8009, 0x0004 },
- { 148500000, 0x803b, 0x0004 },
- { 297000000, 0x8039, 0x0005 },
- { ~0UL, 0x0000, 0x0000 }
+static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
+ /*pixelclk symbol term vlev*/
+ { 74250000, 0x8009, 0x0004, 0x0251},
+ { 148500000, 0x803b, 0x0004, 0x01ad},
+ { 297000000, 0x8039, 0x0005, 0x01ad},
+ { ~0UL, 0x0000, 0x0000, 0x0000}
};
static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
@@ -236,7 +236,7 @@ static const struct dw_hdmi_plat_data rockchip_hdmi_drv_data = {
.mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
- .sym_term = rockchip_sym_term,
+ .phy_config = rockchip_phy_config,
.dev_type = RK3288_HDMI,
};
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index b3f3b0d..1f14cc3 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -50,17 +50,18 @@ struct dw_hdmi_curr_ctrl {
u16 curr[DW_HDMI_RES_MAX];
};
-struct dw_hdmi_sym_term {
+struct dw_hdmi_phy_config {
unsigned long mpixelclock;
u16 sym_ctr; /*clock symbol and transmitter control*/
u16 term; /*transmission termination value*/
+ u16 vlev_ctr; /* voltage level control */
};
struct dw_hdmi_plat_data {
enum dw_hdmi_devtype dev_type;
const struct dw_hdmi_mpll_config *mpll_cfg;
const struct dw_hdmi_curr_ctrl *cur_ctr;
- const struct dw_hdmi_sym_term *sym_term;
+ const struct dw_hdmi_phy_config *phy_config;
enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
struct drm_display_mode *mode);
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RFC PATCH 3/3] drm: bridge/dw_hdmi: improve hdmi single-end test
@ 2015-02-10 14:23 ` Yakir Yang
0 siblings, 0 replies; 11+ messages in thread
From: Yakir Yang @ 2015-02-10 14:23 UTC (permalink / raw)
To: linux-arm-kernel
Because of iMX6 & Rockchip have differnet mpll config parameter,
than the cklvl & txlvl would be different, we also should seperate
this parmeter.
As for Rockchip HDMI, when pixle clock less than 148MHz, the cklvl &
txlvl should be set to 13. When pixel clock less than 74.25MHz the
cklvl & txlvl should be set to 17.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
drivers/gpu/drm/bridge/dw_hdmi.c | 14 +++++++-------
drivers/gpu/drm/imx/dw_hdmi-imx.c | 12 ++++++------
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 14 +++++++-------
include/drm/bridge/dw_hdmi.h | 5 +++--
4 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 8b3208c..869262d 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -764,7 +764,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
const struct dw_hdmi_mpll_config *mpll_config = plat_data->mpll_cfg;
const struct dw_hdmi_curr_ctrl *curr_ctrl = plat_data->cur_ctr;
- const struct dw_hdmi_sym_term *sym_term = plat_data->sym_term;
+ const struct dw_hdmi_phy_config *phy_config = plat_data->phy_config;
if (prep)
return -EINVAL;
@@ -835,18 +835,18 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
hdmi_phy_i2c_write(hdmi, 0x0000, 0x13); /* PLLPHBYCTRL */
hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
- for (i = 0; sym_term[i].mpixelclock != (~0UL); i++)
+ for (i = 0; phy_config[i].mpixelclock != (~0UL); i++)
if (hdmi->hdmi_data.video_mode.mpixelclock <=
- sym_term[i].mpixelclock)
+ phy_config[i].mpixelclock)
break;
/* RESISTANCE TERM 133Ohm Cfg */
- hdmi_phy_i2c_write(hdmi, sym_term[i].term, 0x19); /* TXTERM */
+ hdmi_phy_i2c_write(hdmi, phy_config[i].term, 0x19); /* TXTERM */
/* PREEMP Cgf 0.00 */
- hdmi_phy_i2c_write(hdmi, sym_term[i].sym_ctr, 0x09); /* CKSYMTXCTRL */
-
+ hdmi_phy_i2c_write(hdmi, phy_config[i].sym_ctr, 0x09); /* CKSYMTXCTRL */
/* TX/CK LVL 10 */
- hdmi_phy_i2c_write(hdmi, 0x01ad, 0x0E); /* VLEVCTRL */
+ hdmi_phy_i2c_write(hdmi, phy_config[i].vlev_ctr, 0x0E); /* VLEVCTRL */
+
/* REMOVE CLK TERM */
hdmi_phy_i2c_write(hdmi, 0x8000, 0x05); /* CKCALCTRL */
diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c
index 121d30c..d6095d2 100644
--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
@@ -73,10 +73,10 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
}
};
-static const struct dw_hdmi_sym_term imx_sym_term[] = {
- /*pixelclk symbol term*/
- { 148500000, 0x800d, 0x0005 },
- { ~0UL, 0x0000, 0x0000 }
+static const struct dw_hdmi_phy_config imx_phy_config[] = {
+ /*pixelclk symbol term vlev */
+ { 148500000, 0x800d, 0x0005, 0x01ad},
+ { ~0UL, 0x0000, 0x0000, 0x0000}
};
static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
@@ -139,14 +139,14 @@ static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
.mpll_cfg = imx_mpll_cfg,
.cur_ctr = imx_cur_ctr,
- .sym_term = imx_sym_term,
+ .phy_config = imx_phy_config,
.dev_type = IMX6Q_HDMI,
};
static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
.mpll_cfg = imx_mpll_cfg,
.cur_ctr = imx_cur_ctr,
- .sym_term = imx_sym_term,
+ .phy_config = imx_phy_config,
.dev_type = IMX6DL_HDMI,
};
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 51030ca..65152a9 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -139,12 +139,12 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
}
};
-static const struct dw_hdmi_sym_term rockchip_sym_term[] = {
- /*pixelclk symbol term*/
- { 74250000, 0x8009, 0x0004 },
- { 148500000, 0x803b, 0x0004 },
- { 297000000, 0x8039, 0x0005 },
- { ~0UL, 0x0000, 0x0000 }
+static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
+ /*pixelclk symbol term vlev*/
+ { 74250000, 0x8009, 0x0004, 0x0251},
+ { 148500000, 0x803b, 0x0004, 0x01ad},
+ { 297000000, 0x8039, 0x0005, 0x01ad},
+ { ~0UL, 0x0000, 0x0000, 0x0000}
};
static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
@@ -236,7 +236,7 @@ static const struct dw_hdmi_plat_data rockchip_hdmi_drv_data = {
.mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
- .sym_term = rockchip_sym_term,
+ .phy_config = rockchip_phy_config,
.dev_type = RK3288_HDMI,
};
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index b3f3b0d..1f14cc3 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -50,17 +50,18 @@ struct dw_hdmi_curr_ctrl {
u16 curr[DW_HDMI_RES_MAX];
};
-struct dw_hdmi_sym_term {
+struct dw_hdmi_phy_config {
unsigned long mpixelclock;
u16 sym_ctr; /*clock symbol and transmitter control*/
u16 term; /*transmission termination value*/
+ u16 vlev_ctr; /* voltage level control */
};
struct dw_hdmi_plat_data {
enum dw_hdmi_devtype dev_type;
const struct dw_hdmi_mpll_config *mpll_cfg;
const struct dw_hdmi_curr_ctrl *cur_ctr;
- const struct dw_hdmi_sym_term *sym_term;
+ const struct dw_hdmi_phy_config *phy_config;
enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
struct drm_display_mode *mode);
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2015-02-10 14:24 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-02-10 14:16 [RFC PATCH 0/3] Yakir Yang
2015-02-10 14:16 ` Yakir Yang
2015-02-10 14:17 ` [RFC PATCH 1/3] drm: bridge/dw_hdmi: fixed codec style Yakir Yang
2015-02-10 14:17 ` Yakir Yang
2015-02-10 14:18 ` [RFC PATCH 2/3] drm: bridge/dw_hdmi_rockchip: improve hdmi eye-diagram test Yakir Yang
2015-02-10 14:18 ` Yakir Yang
2015-02-10 14:20 ` [RFC PATCH 0/1] Improve eye-diagram & single-ended test for rk3288 hdmi Yakir Yang
2015-02-10 14:20 ` Yakir Yang
2015-02-10 14:20 ` Yakir Yang
2015-02-10 14:23 ` [RFC PATCH 3/3] drm: bridge/dw_hdmi: improve hdmi single-end test Yakir Yang
2015-02-10 14:23 ` Yakir Yang
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