[U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V

[U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V

[Otavio Salvador]

This adds support to switch to 1.8V in case CMD11 succeeds.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---

 drivers/mmc/fsl_esdhc.c | 30 +++++++++++++++++++++++-------
 include/fsl_esdhc.h     |  2 ++
 include/mmc.h           |  1 +
 3 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index c55eb28..eb0fbf9 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -54,19 +54,21 @@ struct fsl_esdhc {
 	uint    fevt;		/* Force event register */
 	uint    admaes;		/* ADMA error status register */
 	uint    adsaddr;	/* ADMA system address register */
-	char    reserved2[160];	/* reserved */
+	char    reserved2[100];	/* reserved */
+	uint    vendorspec;	/* Vendor Specific register */
+	char    reserved3[59];	/* reserved */
 	uint    hostver;	/* Host controller version register */
-	char    reserved3[4];	/* reserved */
-	uint    dmaerraddr;	/* DMA error address register */
 	char    reserved4[4];	/* reserved */
-	uint    dmaerrattr;	/* DMA error attribute register */
+	uint    dmaerraddr;	/* DMA error address register */
 	char    reserved5[4];	/* reserved */
+	uint    dmaerrattr;	/* DMA error attribute register */
+	char    reserved6[4];	/* reserved */
 	uint    hostcapblt2;	/* Host controller capabilities register 2 */
-	char    reserved6[8];	/* reserved */
+	char    reserved7[8];	/* reserved */
 	uint    tcr;		/* Tuning control register */
-	char    reserved7[28];	/* reserved */
+	char    reserved8[28];	/* reserved */
 	uint    sddirctl;	/* SD direction control register */
-	char    reserved8[712];	/* reserved */
+	char    reserved9[712];	/* reserved */
 	uint    scr;		/* eSDHC control register */
 };
 
@@ -341,6 +343,15 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 		goto out;
 	}
 
+	/* Switch voltage to 1.8V if CMD11 succeeded */
+	if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) {
+		esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
+
+		printf("Run CMD11 1.8V switch\n");
+		/* Sleep for 5 ms - max time for card to switch to 1.8V */
+		udelay(5000);
+	}
+
 	/* Workaround for ESDHC errata ENGcm03648 */
 	if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
 		int timeout = 2500;
@@ -413,6 +424,11 @@ out:
 			while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTD))
 				;
 		}
+
+		/* If this was CMD11, then notify that power cycle is needed */
+		if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)
+			printf("CMD11 to switch to 1.8V mode failed."
+				"Card requires power cycle\n");
 	}
 
 	esdhc_write32(&regs->irqstat, -1);
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index c1b6648..e3d6581 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -154,6 +154,8 @@
 #define ESDHC_HOSTCAPBLT_DMAS	0x00400000
 #define ESDHC_HOSTCAPBLT_HSS	0x00200000
 
+#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
+
 struct fsl_esdhc_cfg {
 	u32	esdhc_base;
 	u32	sdhc_clk;
diff --git a/include/mmc.h b/include/mmc.h
index 56d97bb..e4b071e 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -88,6 +88,7 @@
 #define SD_CMD_SEND_RELATIVE_ADDR	3
 #define SD_CMD_SWITCH_FUNC		6
 #define SD_CMD_SEND_IF_COND		8
+#define SD_CMD_SWITCH_UHS18V		11
 
 #define SD_CMD_APP_SET_BUS_WIDTH	6
 #define SD_CMD_ERASE_WR_BLK_START	32
-- 
2.1.4

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Otavio Salvador]

Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.

This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---

 doc/README.fsl-esdhc    | 1 +
 drivers/mmc/fsl_esdhc.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
index b70f271..619c6b2 100644
--- a/doc/README.fsl-esdhc
+++ b/doc/README.fsl-esdhc
@@ -1,5 +1,6 @@
 CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
 CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
+CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.
 
 Accessing ESDHC registers can be determined by ESDHC IP's endian
 mode or processor's endian mode.
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index eb0fbf9..5fde2b6 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -524,6 +524,10 @@ static int esdhc_init(struct mmc *mmc)
 	/* Set timout to the maximum value */
 	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
 
+#ifdef CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
+	esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
+#endif
+
 	return 0;
 }
 
-- 
2.1.4

[U-Boot] [PATCH 3/4] imx: mx6sl: Extend USDHC SD2 pins to support 8-wire use

[Otavio Salvador]

This adds the DATA[4-7] and RST pin definitions.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---

 arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 9ded3d8..10a4a1e 100644
--- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
@@ -31,7 +31,12 @@ enum {
 	MX6_PAD_SD2_DAT1__USDHC2_DAT1				= IOMUX_PAD(0x0568, 0x0260, 0, 0x0000, 0, 0),
 	MX6_PAD_SD2_DAT2__USDHC2_DAT2				= IOMUX_PAD(0x056C, 0x0264, 0, 0x0000, 0, 0),
 	MX6_PAD_SD2_DAT3__USDHC2_DAT3				= IOMUX_PAD(0x0570, 0x0268, 0, 0x0000, 0, 0),
+	MX6_PAD_SD2_DAT4__USDHC2_DAT4				= IOMUX_PAD(0X0574, 0X026C, 0, 0X0000, 0, 0),
+	MX6_PAD_SD2_DAT5__USDHC2_DAT5				= IOMUX_PAD(0X0578, 0X0270, 0, 0X0000, 0, 0),
+	MX6_PAD_SD2_DAT6__USDHC2_DAT6				= IOMUX_PAD(0X057C, 0X0274, 0, 0X0000, 0, 0),
+	MX6_PAD_SD2_DAT7__USDHC2_DAT7				= IOMUX_PAD(0X0580, 0X0278, 0, 0X0000, 0, 0),
 	MX6_PAD_SD2_DAT7__GPIO_5_0					= IOMUX_PAD(0x0580, 0x0278, 5, 0x0000, 0, 0),
+	MX6_PAD_SD2_RST__USDHC2_RST				= IOMUX_PAD(0x0584, 0x027C, 0, 0x0000, 0, 0),
 	MX6_PAD_SD3_CLK__USDHC3_CLK					= IOMUX_PAD(0x0588, 0x0280, 0, 0x0000, 0, 0),
 	MX6_PAD_SD3_CMD__USDHC3_CMD					= IOMUX_PAD(0x058C, 0x0284, 0, 0x0000, 0, 0),
 	MX6_PAD_SD3_DAT0__USDHC3_DAT0				= IOMUX_PAD(0x0590, 0x0288, 0, 0x0000, 0, 0),
-- 
2.1.4

[U-Boot] [PATCH 4/4] warp: Add initial WaRP Board support

[Otavio Salvador]

The WaRP Board is a Wearable Reference Plaform. The board features:

 - Freescale i.MX6 SoloLite processor with 512MB of RAM
 - Freescale FXOS8700CQ 6-axis Xtrinsic sensor
 - Freescale Kinetis KL16 MCU
 - Freescale Xtrinsic MMA955xL intelligent motion sensing platform

The board implements a hybrid architecture to address the evolving
needs of the wearables market. The platform consists of a main board
and an example daughtercard with the ability to add additional
daughtercards for different usage models.

For more information about the project, visit:

 http://www.warpboard.org/

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---

 arch/arm/Kconfig       |   5 ++
 board/warp/Kconfig     |  12 +++
 board/warp/MAINTAINERS |   6 ++
 board/warp/Makefile    |   8 ++
 board/warp/warp.c      | 113 ++++++++++++++++++++++++++++
 configs/warp_defconfig |   3 +
 include/configs/warp.h | 198 +++++++++++++++++++++++++++++++++++++++++++++++++
 7 files changed, 345 insertions(+)
 create mode 100644 board/warp/Kconfig
 create mode 100644 board/warp/MAINTAINERS
 create mode 100644 board/warp/Makefile
 create mode 100644 board/warp/warp.c
 create mode 100644 configs/warp_defconfig
 create mode 100644 include/configs/warp.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1f1ccad..a3eb876 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -608,6 +608,10 @@ config TARGET_WANDBOARD
 	bool "Support wandboard"
 	select CPU_V7
 
+config TARGET_WARP
+	bool "Support WaRP"
+	select CPU_V7
+
 config TARGET_TITANIUM
 	bool "Support titanium"
 	select CPU_V7
@@ -1013,6 +1017,7 @@ source "board/ttcontrol/vision2/Kconfig"
 source "board/udoo/Kconfig"
 source "board/vpac270/Kconfig"
 source "board/wandboard/Kconfig"
+source "board/warp/Kconfig"
 source "board/woodburn/Kconfig"
 source "board/xaeniax/Kconfig"
 source "board/zipitz2/Kconfig"
diff --git a/board/warp/Kconfig b/board/warp/Kconfig
new file mode 100644
index 0000000..7b569cc
--- /dev/null
+++ b/board/warp/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_WARP
+
+config SYS_BOARD
+	default "warp"
+
+config SYS_SOC
+	default "mx6"
+
+config SYS_CONFIG_NAME
+	default "warp"
+
+endif
diff --git a/board/warp/MAINTAINERS b/board/warp/MAINTAINERS
new file mode 100644
index 0000000..ee2114d
--- /dev/null
+++ b/board/warp/MAINTAINERS
@@ -0,0 +1,6 @@
+WaRP BOARD
+M:	Otavio Salvador <otavio@ossystems.com.br>
+S:	Maintained
+F:	board/warp/
+F:	include/configs/warp.h
+F:	configs/warp_defconfig
diff --git a/board/warp/Makefile b/board/warp/Makefile
new file mode 100644
index 0000000..c555f87
--- /dev/null
+++ b/board/warp/Makefile
@@ -0,0 +1,8 @@
+# Copyright (C) 2014 O.S. Systems Software LTDA.
+# Copyright (C) 2014 Kynetics LLC.
+# Copyright (C) 2014 Revolution Robotics, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y  := warp.o
diff --git a/board/warp/warp.c b/board/warp/warp.c
new file mode 100644
index 0000000..3b275c2
--- /dev/null
+++ b/board/warp/warp.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
+ * Copyright (C) 2014 Kynetics LLC.
+ * Copyright (C) 2014 Revolution Robotics, Inc.
+ *
+ * Author: Otavio Salvador <otavio@ossystems.com.br>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arch/clock.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <asm/io.h>
+#include <linux/sizes.h>
+#include <common.h>
+#include <watchdog.h>
+#include <fsl_esdhc.h>
+#include <mmc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
+	PAD_CTL_LVE)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
+	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
+	PAD_CTL_LVE)
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+
+	return 0;
+}
+
+static void setup_iomux_uart(void)
+{
+	static iomux_v3_cfg_t const uart1_pads[] = {
+		MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+		MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+	};
+
+	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+
+static struct fsl_esdhc_cfg usdhc_cfg[1] = {
+	{USDHC2_BASE_ADDR},
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	return 1;	/* Assume boot SD always present */
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	static iomux_v3_cfg_t const usdhc2_pads[] = {
+		MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+		MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	};
+
+	imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+}
+
+int board_early_init_f(void)
+{
+	setup_iomux_uart();
+	return 0;
+}
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_HW_WATCHDOG
+	hw_watchdog_init();
+#endif
+
+	return 0;
+}
+
+int checkboard(void)
+{
+	puts("Board: WaRP Board\n");
+
+	return 0;
+}
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
new file mode 100644
index 0000000..624a8af
--- /dev/null
+++ b/configs/warp_defconfig
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
+CONFIG_ARM=y
+CONFIG_TARGET_WARP=y
diff --git a/include/configs/warp.h b/include/configs/warp.h
new file mode 100644
index 0000000..82036e4
--- /dev/null
+++ b/include/configs/warp.h
@@ -0,0 +1,198 @@
+/*
+ * Copyright (C) 2014 O.S. Systems Software LTDA.
+ * Copyright (C) 2014 Kynetics LLC.
+ * Copyright (C) 2014 Revolution Robotics, Inc.
+ *
+ * Author: Otavio Salvador <otavio@ossystems.com.br>
+ *
+ * Configuration settings for the WaRP Board
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+#include <linux/sizes.h>
+#include "mx6_common.h"
+
+#define CONFIG_MX6
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_GENERIC_BOARD
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+/* Command definition */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+#define CONFIG_BOOTDELAY		3
+
+#define CONFIG_LOADADDR			0x82000000
+#define CONFIG_SYS_TEXT_BASE		0x87800000
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE		256
+
+/* Watchdog */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_IMX_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	0x80000000
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_256M)
+
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
+
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_STACKSIZE		SZ_128K
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE			SZ_512M
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_ENV_OFFSET		(6 * SZ_64K)
+#define CONFIG_ENV_SIZE			SZ_8K
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		0
+
+/* VDD voltage 1.65 - 1.95 */
+#define CONFIG_SYS_SD_VOLTAGE		0x00000080
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"script=boot.scr\0" \
+	"image=zImage\0" \
+	"console=ttymxc0\0" \
+	"fdt_high=0xffffffff\0" \
+	"initrd_high=0xffffffff\0" \
+	"fdt_file=imx6sl-warp.dtb\0" \
+	"fdt_addr=0x88000000\0" \
+	"initrd_addr=0x83800000\0" \
+	"boot_fdt=try\0" \
+	"ip_dyn=yes\0" \
+	"mmcdev=0\0" \
+	"mmcpart=1\0" \
+	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+	"mmcargs=setenv bootargs console=${console},${baudrate} " \
+		"root=${mmcroot}\0" \
+	"loadbootscript=" \
+		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+	"bootscript=echo Running bootscript from mmc ...; " \
+		"source\0" \
+	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+	"mmcboot=echo Booting from mmc ...; " \
+		"run mmcargs; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if run loadfdt; then " \
+				"bootz ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"if test ${boot_fdt} = try; then " \
+					"bootz; " \
+				"else " \
+					"echo WARN: Cannot load the DT; " \
+				"fi; " \
+			"fi; " \
+		"else " \
+			"bootz; " \
+		"fi;\0" \
+	"netargs=setenv bootargs console=${console},${baudrate} " \
+		"root=/dev/nfs " \
+	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+		"netboot=echo Booting from net ...; " \
+		"run netargs; " \
+		"if test ${ip_dyn} = yes; then " \
+			"setenv get_cmd dhcp; " \
+		"else " \
+			"setenv get_cmd tftp; " \
+		"fi; " \
+		"${get_cmd} ${image}; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+				"bootz ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"if test ${boot_fdt} = try; then " \
+					"bootz; " \
+				"else " \
+					"echo WARN: Cannot load the DT; " \
+				"fi; " \
+			"fi; " \
+		"else " \
+			"bootz; " \
+		"fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+	   "mmc dev ${mmcdev};" \
+	   "mmc dev ${mmcdev}; if mmc rescan; then " \
+		   "if run loadbootscript; then " \
+			   "run bootscript; " \
+		   "else " \
+			   "if run loadimage; then " \
+				   "run mmcboot; " \
+			   "else run netboot; " \
+			   "fi; " \
+		   "fi; " \
+	   "else run netboot; fi"
+
+#endif				/* __CONFIG_H */
-- 
2.1.4

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Troy Kisky]

On 2/16/2015 2:38 PM, Otavio Salvador wrote:
> Some boards cannot do voltage negotiation but need to set the VSELECT
> bit forcely to ensure it to work at 1.8V.
> 
> This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
> 
> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ---
> 
>  doc/README.fsl-esdhc    | 1 +
>  drivers/mmc/fsl_esdhc.c | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
> index b70f271..619c6b2 100644
> --- a/doc/README.fsl-esdhc
> +++ b/doc/README.fsl-esdhc
> @@ -1,5 +1,6 @@
>  CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
>  CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
> +CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.
>  
>  Accessing ESDHC registers can be determined by ESDHC IP's endian
>  mode or processor's endian mode.
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index eb0fbf9..5fde2b6 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -524,6 +524,10 @@ static int esdhc_init(struct mmc *mmc)
>  	/* Set timout to the maximum value */
>  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
>  
> +#ifdef CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
> +	esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
> +#endif
> +
>  	return 0;
>  }
>  
> 

What if 1 controller needs it set and another needs it clear?

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Marek Vasut]

On Tuesday, February 17, 2015 at 02:38:31 AM, Troy Kisky wrote:
> On 2/16/2015 2:38 PM, Otavio Salvador wrote:
> > Some boards cannot do voltage negotiation but need to set the VSELECT
> > bit forcely to ensure it to work at 1.8V.
> > 
> > This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
> > 
> > Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> > ---
> > 
> >  doc/README.fsl-esdhc    | 1 +
> >  drivers/mmc/fsl_esdhc.c | 4 ++++
> >  2 files changed, 5 insertions(+)
> > 
> > diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
> > index b70f271..619c6b2 100644
> > --- a/doc/README.fsl-esdhc
> > +++ b/doc/README.fsl-esdhc
> > @@ -1,5 +1,6 @@
> > 
> >  CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
> >  CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
> > 
> > +CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.
> > 
> >  Accessing ESDHC registers can be determined by ESDHC IP's endian
> >  mode or processor's endian mode.
> > 
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> > index eb0fbf9..5fde2b6 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -524,6 +524,10 @@ static int esdhc_init(struct mmc *mmc)
> > 
> >  	/* Set timout to the maximum value */
> >  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
> > 
> > +#ifdef CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
> > +	esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
> > +#endif
> > +
> > 
> >  	return 0;
> >  
> >  }
> 
> What if 1 controller needs it set and another needs it clear?

Then this code won't work, duh ;-)

Best regards,
Marek Vasut

[U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V

[Marek Vasut]

On Monday, February 16, 2015 at 10:38:00 PM, Otavio Salvador wrote:
> This adds support to switch to 1.8V in case CMD11 succeeds.
> 
> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ---

[...]

> @@ -413,6 +424,11 @@ out:
>  			while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTD))
>  				;
>  		}
> +
> +		/* If this was CMD11, then notify that power cycle is needed */
> +		if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)
> +			printf("CMD11 to switch to 1.8V mode failed."
> +				"Card requires power cycle\n");

Please avoid breaking strings, you cannot 'git grep' for them if they're broken.

>  	}
> 
>  	esdhc_write32(&regs->irqstat, -1);
[...]
Best regards,
Marek Vasut

[U-Boot] [PATCH 4/4] warp: Add initial WaRP Board support

[Marek Vasut]

On Monday, February 16, 2015 at 10:38:03 PM, Otavio Salvador wrote:
> The WaRP Board is a Wearable Reference Plaform. The board features:
> 
>  - Freescale i.MX6 SoloLite processor with 512MB of RAM
>  - Freescale FXOS8700CQ 6-axis Xtrinsic sensor
>  - Freescale Kinetis KL16 MCU
>  - Freescale Xtrinsic MMA955xL intelligent motion sensing platform
> 
> The board implements a hybrid architecture to address the evolving
> needs of the wearables market.

Did you copy-paste this sentence from some marketing material ;-)

> The platform consists of a main board
> and an example daughtercard with the ability to add additional
> daughtercards for different usage models.

Reviewed-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut

[U-Boot] [PATCH 4/4] warp: Add initial WaRP Board support

[Stefano Babic]

Hi Otavio,

On 16/02/2015 22:38, Otavio Salvador wrote:
> The WaRP Board is a Wearable Reference Plaform. The board features:
> 
>  - Freescale i.MX6 SoloLite processor with 512MB of RAM
>  - Freescale FXOS8700CQ 6-axis Xtrinsic sensor
>  - Freescale Kinetis KL16 MCU
>  - Freescale Xtrinsic MMA955xL intelligent motion sensing platform
> 
> The board implements a hybrid architecture to address the evolving
> needs of the wearables market. The platform consists of a main board
> and an example daughtercard with the ability to add additional
> daughtercards for different usage models.
> 
> For more information about the project, visit:
> 
>  http://www.warpboard.org/
> 
> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ---
> 
>  arch/arm/Kconfig       |   5 ++
>  board/warp/Kconfig     |  12 +++
>  board/warp/MAINTAINERS |   6 ++
>  board/warp/Makefile    |   8 ++
>  board/warp/warp.c      | 113 ++++++++++++++++++++++++++++
>  configs/warp_defconfig |   3 +
>  include/configs/warp.h | 198 +++++++++++++++++++++++++++++++++++++++++++++++++
>  7 files changed, 345 insertions(+)
>  create mode 100644 board/warp/Kconfig
>  create mode 100644 board/warp/MAINTAINERS
>  create mode 100644 board/warp/Makefile
>  create mode 100644 board/warp/warp.c
>  create mode 100644 configs/warp_defconfig
>  create mode 100644 include/configs/warp.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 1f1ccad..a3eb876 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -608,6 +608,10 @@ config TARGET_WANDBOARD
>  	bool "Support wandboard"
>  	select CPU_V7
>  
> +config TARGET_WARP
> +	bool "Support WaRP"
> +	select CPU_V7
> +
>  config TARGET_TITANIUM
>  	bool "Support titanium"
>  	select CPU_V7
> @@ -1013,6 +1017,7 @@ source "board/ttcontrol/vision2/Kconfig"
>  source "board/udoo/Kconfig"
>  source "board/vpac270/Kconfig"
>  source "board/wandboard/Kconfig"
> +source "board/warp/Kconfig"
>  source "board/woodburn/Kconfig"
>  source "board/xaeniax/Kconfig"
>  source "board/zipitz2/Kconfig"
> diff --git a/board/warp/Kconfig b/board/warp/Kconfig
> new file mode 100644
> index 0000000..7b569cc
> --- /dev/null
> +++ b/board/warp/Kconfig
> @@ -0,0 +1,12 @@
> +if TARGET_WARP
> +
> +config SYS_BOARD
> +	default "warp"
> +
> +config SYS_SOC
> +	default "mx6"
> +
> +config SYS_CONFIG_NAME
> +	default "warp"
> +
> +endif
> diff --git a/board/warp/MAINTAINERS b/board/warp/MAINTAINERS
> new file mode 100644
> index 0000000..ee2114d
> --- /dev/null
> +++ b/board/warp/MAINTAINERS
> @@ -0,0 +1,6 @@
> +WaRP BOARD
> +M:	Otavio Salvador <otavio@ossystems.com.br>
> +S:	Maintained
> +F:	board/warp/
> +F:	include/configs/warp.h
> +F:	configs/warp_defconfig
> diff --git a/board/warp/Makefile b/board/warp/Makefile
> new file mode 100644
> index 0000000..c555f87
> --- /dev/null
> +++ b/board/warp/Makefile
> @@ -0,0 +1,8 @@
> +# Copyright (C) 2014 O.S. Systems Software LTDA.
> +# Copyright (C) 2014 Kynetics LLC.
> +# Copyright (C) 2014 Revolution Robotics, Inc.
> +#
> +# SPDX-License-Identifier:	GPL-2.0+
> +#
> +
> +obj-y  := warp.o
> diff --git a/board/warp/warp.c b/board/warp/warp.c
> new file mode 100644
> index 0000000..3b275c2
> --- /dev/null
> +++ b/board/warp/warp.c
> @@ -0,0 +1,113 @@
> +/*
> + * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
> + * Copyright (C) 2014 Kynetics LLC.
> + * Copyright (C) 2014 Revolution Robotics, Inc.
> + *
> + * Author: Otavio Salvador <otavio@ossystems.com.br>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <asm/arch/clock.h>
> +#include <asm/arch/iomux.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/mx6-pins.h>
> +#include <asm/arch/sys_proto.h>
> +#include <asm/gpio.h>
> +#include <asm/imx-common/iomux-v3.h>
> +#include <asm/io.h>
> +#include <linux/sizes.h>
> +#include <common.h>
> +#include <watchdog.h>
> +#include <fsl_esdhc.h>
> +#include <mmc.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
> +	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
> +	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
> +	PAD_CTL_LVE)
> +
> +#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
> +	PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
> +	PAD_CTL_SRE_FAST  | PAD_CTL_HYS | \
> +	PAD_CTL_LVE)
> +
> +int dram_init(void)
> +{
> +	gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
> +
> +	return 0;
> +}
> +
> +static void setup_iomux_uart(void)
> +{
> +	static iomux_v3_cfg_t const uart1_pads[] = {
> +		MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
> +		MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
> +	};
> +
> +	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
> +}
> +
> +static struct fsl_esdhc_cfg usdhc_cfg[1] = {
> +	{USDHC2_BASE_ADDR},
> +};
> +
> +int board_mmc_getcd(struct mmc *mmc)
> +{
> +	return 1;	/* Assume boot SD always present */
> +}
> +
> +int board_mmc_init(bd_t *bis)
> +{
> +	static iomux_v3_cfg_t const usdhc2_pads[] = {
> +		MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +		MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +	};
> +
> +	imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
> +
> +	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
> +	return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
> +}
> +
> +int board_early_init_f(void)
> +{
> +	setup_iomux_uart();
> +	return 0;
> +}
> +
> +int board_init(void)
> +{
> +	/* address of boot parameters */
> +	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> +
> +	return 0;
> +}
> +
> +int board_late_init(void)
> +{
> +#ifdef CONFIG_HW_WATCHDOG
> +	hw_watchdog_init();
> +#endif
> +
> +	return 0;
> +}
> +
> +int checkboard(void)
> +{
> +	puts("Board: WaRP Board\n");
> +
> +	return 0;
> +}
> diff --git a/configs/warp_defconfig b/configs/warp_defconfig
> new file mode 100644
> index 0000000..624a8af
> --- /dev/null
> +++ b/configs/warp_defconfig
> @@ -0,0 +1,3 @@
> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
> +CONFIG_ARM=y
> +CONFIG_TARGET_WARP=y
> diff --git a/include/configs/warp.h b/include/configs/warp.h
> new file mode 100644
> index 0000000..82036e4
> --- /dev/null
> +++ b/include/configs/warp.h
> @@ -0,0 +1,198 @@
> +/*
> + * Copyright (C) 2014 O.S. Systems Software LTDA.
> + * Copyright (C) 2014 Kynetics LLC.
> + * Copyright (C) 2014 Revolution Robotics, Inc.
> + *
> + * Author: Otavio Salvador <otavio@ossystems.com.br>
> + *
> + * Configuration settings for the WaRP Board
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/arch/imx-regs.h>
> +#include <linux/sizes.h>
> +#include "mx6_common.h"
> +
> +#define CONFIG_MX6
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +#define CONFIG_SYS_GENERIC_BOARD
> +
> +#define CONFIG_CMDLINE_TAG
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +#define CONFIG_REVISION_TAG
> +
> +/* Size of malloc() pool */
> +#define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
> +
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_BOARD_LATE_INIT
> +#define CONFIG_MXC_GPIO
> +
> +#define CONFIG_MXC_UART
> +#define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
> +
> +/* MMC Configs */
> +#define CONFIG_FSL_ESDHC
> +#define CONFIG_FSL_USDHC
> +#define CONFIG_SYS_FSL_ESDHC_ADDR	0
> +#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
> +
> +#define CONFIG_MMC
> +#define CONFIG_CMD_MMC
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_CMD_FAT
> +#define CONFIG_DOS_PARTITION
> +
> +/* allow to overwrite serial and ethaddr */
> +#define CONFIG_ENV_OVERWRITE
> +#define CONFIG_CONS_INDEX		1
> +#define CONFIG_BAUDRATE			115200
> +
> +/* FLASH and environment organization */
> +#define CONFIG_SYS_NO_FLASH
> +
> +/* Command definition */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_NET
> +#undef CONFIG_CMD_NFS
> +
> +#define CONFIG_BOOTDELAY		3
> +
> +#define CONFIG_LOADADDR			0x82000000
> +#define CONFIG_SYS_TEXT_BASE		0x87800000
> +
> +/* Miscellaneous configurable options */
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_SYS_HUSH_PARSER
> +#define CONFIG_AUTO_COMPLETE
> +#define CONFIG_SYS_CBSIZE		256
> +
> +/* Watchdog */
> +#define CONFIG_HW_WATCHDOG
> +#define CONFIG_IMX_WATCHDOG
> +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */
> +
> +/* Print Buffer Size */
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_MAXARGS		16
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> +
> +#define CONFIG_SYS_MEMTEST_START	0x80000000
> +#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_256M)
> +
> +#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
> +
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_STACKSIZE		SZ_128K
> +
> +/* Physical Memory Map */
> +#define CONFIG_NR_DRAM_BANKS		1
> +#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
> +#define PHYS_SDRAM_SIZE			SZ_512M
> +
> +#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
> +#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
> +#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET \
> +	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> +	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> +
> +#define CONFIG_ENV_OFFSET		(6 * SZ_64K)
> +#define CONFIG_ENV_SIZE			SZ_8K
> +#define CONFIG_ENV_IS_IN_MMC
> +#define CONFIG_SYS_MMC_ENV_DEV		0
> +
> +/* VDD voltage 1.65 - 1.95 */
> +#define CONFIG_SYS_SD_VOLTAGE		0x00000080
> +
> +#define CONFIG_OF_LIBFDT
> +#define CONFIG_CMD_BOOTZ
> +
> +#ifndef CONFIG_SYS_DCACHE_OFF
> +#define CONFIG_CMD_CACHE
> +#endif
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> +	"script=boot.scr\0" \
> +	"image=zImage\0" \
> +	"console=ttymxc0\0" \
> +	"fdt_high=0xffffffff\0" \
> +	"initrd_high=0xffffffff\0" \
> +	"fdt_file=imx6sl-warp.dtb\0" \
> +	"fdt_addr=0x88000000\0" \
> +	"initrd_addr=0x83800000\0" \
> +	"boot_fdt=try\0" \
> +	"ip_dyn=yes\0" \
> +	"mmcdev=0\0" \
> +	"mmcpart=1\0" \
> +	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
> +	"mmcargs=setenv bootargs console=${console},${baudrate} " \
> +		"root=${mmcroot}\0" \
> +	"loadbootscript=" \
> +		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
> +	"bootscript=echo Running bootscript from mmc ...; " \
> +		"source\0" \
> +	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
> +	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
> +	"mmcboot=echo Booting from mmc ...; " \
> +		"run mmcargs; " \
> +		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> +			"if run loadfdt; then " \
> +				"bootz ${loadaddr} - ${fdt_addr}; " \
> +			"else " \
> +				"if test ${boot_fdt} = try; then " \
> +					"bootz; " \
> +				"else " \
> +					"echo WARN: Cannot load the DT; " \
> +				"fi; " \
> +			"fi; " \
> +		"else " \
> +			"bootz; " \
> +		"fi;\0" \
> +	"netargs=setenv bootargs console=${console},${baudrate} " \
> +		"root=/dev/nfs " \
> +	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> +		"netboot=echo Booting from net ...; " \
> +		"run netargs; " \
> +		"if test ${ip_dyn} = yes; then " \
> +			"setenv get_cmd dhcp; " \
> +		"else " \
> +			"setenv get_cmd tftp; " \
> +		"fi; " \
> +		"${get_cmd} ${image}; " \
> +		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> +			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
> +				"bootz ${loadaddr} - ${fdt_addr}; " \
> +			"else " \
> +				"if test ${boot_fdt} = try; then " \
> +					"bootz; " \
> +				"else " \
> +					"echo WARN: Cannot load the DT; " \
> +				"fi; " \
> +			"fi; " \
> +		"else " \
> +			"bootz; " \
> +		"fi;\0"
> +
> +#define CONFIG_BOOTCOMMAND \
> +	   "mmc dev ${mmcdev};" \
> +	   "mmc dev ${mmcdev}; if mmc rescan; then " \
> +		   "if run loadbootscript; then " \
> +			   "run bootscript; " \
> +		   "else " \
> +			   "if run loadimage; then " \
> +				   "run mmcboot; " \
> +			   "else run netboot; " \
> +			   "fi; " \
> +		   "fi; " \
> +	   "else run netboot; fi"
> +
> +#endif				/* __CONFIG_H */
> 

Acked-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Otavio Salvador]

On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
<troy.kisky@boundarydevices.com> wrote:
> On 2/16/2015 2:38 PM, Otavio Salvador wrote:
>> Some boards cannot do voltage negotiation but need to set the VSELECT
>> bit forcely to ensure it to work at 1.8V.
>>
>> This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
>>
>> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
...
>
> What if 1 controller needs it set and another needs it clear?

I am not sure it makes much sense to have one in 3V3 and another 1V8. Does it?

-- 
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

[U-Boot] [PATCH 1/4] mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V

[Otavio Salvador]

On Tue, Feb 17, 2015 at 5:11 AM, Marek Vasut <marex@denx.de> wrote:
> On Monday, February 16, 2015 at 10:38:00 PM, Otavio Salvador wrote:
>> This adds support to switch to 1.8V in case CMD11 succeeds.
>>
>> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
>> ---
>
> [...]
>
>> @@ -413,6 +424,11 @@ out:
>>                       while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTD))
>>                               ;
>>               }
>> +
>> +             /* If this was CMD11, then notify that power cycle is needed */
>> +             if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)
>> +                     printf("CMD11 to switch to 1.8V mode failed."
>> +                             "Card requires power cycle\n");
>
> Please avoid breaking strings, you cannot 'git grep' for them if they're broken.

Agreed. I will prepare a v2 with this fixed.

-- 
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Troy Kisky]

On 2/17/2015 5:36 AM, Otavio Salvador wrote:
> On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
> <troy.kisky@boundarydevices.com> wrote:
>> On 2/16/2015 2:38 PM, Otavio Salvador wrote:
>>> Some boards cannot do voltage negotiation but need to set the VSELECT
>>> bit forcely to ensure it to work at 1.8V.
>>>
>>> This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
>>>
>>> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ...
>>
>> What if 1 controller needs it set and another needs it clear?
> 
> I am not sure it makes much sense to have one in 3V3 and another 1V8. Does it?
> 

I guess if the need ever arises it can be changed then. It just seems better to pass
this as a flag for the controller now.

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Marek Vasut]

On Tuesday, February 17, 2015 at 06:18:31 PM, Troy Kisky wrote:
> On 2/17/2015 5:36 AM, Otavio Salvador wrote:
> > On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
> > 
> > <troy.kisky@boundarydevices.com> wrote:
> >> On 2/16/2015 2:38 PM, Otavio Salvador wrote:
> >>> Some boards cannot do voltage negotiation but need to set the VSELECT
> >>> bit forcely to ensure it to work at 1.8V.
> >>> 
> >>> This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
> >>> 
> >>> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> > 
> > ...
> > 
> >> What if 1 controller needs it set and another needs it clear?
> > 
> > I am not sure it makes much sense to have one in 3V3 and another 1V8.
> > Does it?
> 
> I guess if the need ever arises it can be changed then. It just seems
> better to pass this as a flag for the controller now.

Or even make it configurable via DT .

Best regards,
Marek Vasut

[U-Boot] [PATCH 2/4] mmc: fsl_esdhc: Add support to force VSELECT set

[Otavio Salvador]

On Tue, Feb 17, 2015 at 5:43 PM, Marek Vasut <marex@denx.de> wrote:
> On Tuesday, February 17, 2015 at 06:18:31 PM, Troy Kisky wrote:
>> On 2/17/2015 5:36 AM, Otavio Salvador wrote:
>> > On Mon, Feb 16, 2015 at 11:38 PM, Troy Kisky
>> >
>> > <troy.kisky@boundarydevices.com> wrote:
>> >> On 2/16/2015 2:38 PM, Otavio Salvador wrote:
>> >>> Some boards cannot do voltage negotiation but need to set the VSELECT
>> >>> bit forcely to ensure it to work at 1.8V.
>> >>>
>> >>> This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
>> >>>
>> >>> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
>> >
>> > ...
>> >
>> >> What if 1 controller needs it set and another needs it clear?
>> >
>> > I am not sure it makes much sense to have one in 3V3 and another 1V8.
>> > Does it?
>>
>> I guess if the need ever arises it can be changed then. It just seems
>> better to pass this as a flag for the controller now.
>
> Or even make it configurable via DT .

Could this be changed later?

-- 
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750