From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Gregory Clement <gregory.clement@free-electrons.com>,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Mike Turquette <mturquette@linaro.org>,
Stephen Boyd <sboyd@codeaurora.org>,
Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
Tawfik Bayouk <tawfik@marvell.com>,
Nadav Haklai <nadavh@marvell.com>,
Lior Amsalem <alior@marvell.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Subject: [PATCHv2 12/15] pinctrl: mvebu: add pinctrl driver for Marvell Armada 39x
Date: Fri, 20 Feb 2015 18:04:31 +0100 [thread overview]
Message-ID: <1424451874-25375-13-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1424451874-25375-1-git-send-email-thomas.petazzoni@free-electrons.com>
This commit adds a new pinctrl driver for the Marvell Armada 39x
family of processors, which hooks into the existing infrastructure to
support pin-muxing on Marvell EBU processors. Two variants of the
Armada 39x are supported: 88F6920 (Armada 390) and 88F6928 (Armada
398), which have a few differences in the available functions for
certain pins.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/pinctrl/mvebu/Kconfig | 4 +
drivers/pinctrl/mvebu/Makefile | 1 +
drivers/pinctrl/mvebu/pinctrl-armada-39x.c | 432 +++++++++++++++++++++++++++++
3 files changed, 437 insertions(+)
create mode 100644 drivers/pinctrl/mvebu/pinctrl-armada-39x.c
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index d6dd835..1706024 100644
--- a/drivers/pinctrl/mvebu/Kconfig
+++ b/drivers/pinctrl/mvebu/Kconfig
@@ -26,6 +26,10 @@ config PINCTRL_ARMADA_38X
bool
select PINCTRL_MVEBU
+config PINCTRL_ARMADA_39X
+ bool
+ select PINCTRL_MVEBU
+
config PINCTRL_ARMADA_XP
bool
select PINCTRL_MVEBU
diff --git a/drivers/pinctrl/mvebu/Makefile b/drivers/pinctrl/mvebu/Makefile
index a0818e9..554d8af 100644
--- a/drivers/pinctrl/mvebu/Makefile
+++ b/drivers/pinctrl/mvebu/Makefile
@@ -4,5 +4,6 @@ obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
obj-$(CONFIG_PINCTRL_ARMADA_38X) += pinctrl-armada-38x.o
+obj-$(CONFIG_PINCTRL_ARMADA_39X) += pinctrl-armada-39x.o
obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
obj-$(CONFIG_PINCTRL_ORION) += pinctrl-orion.o
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c
new file mode 100644
index 0000000..5963411
--- /dev/null
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c
@@ -0,0 +1,432 @@
+/*
+ * Marvell Armada 39x pinctrl driver based on mvebu pinctrl core
+ *
+ * Copyright (C) 2015 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-mvebu.h"
+
+static void __iomem *mpp_base;
+
+static int armada_39x_mpp_ctrl_get(unsigned pid, unsigned long *config)
+{
+ return default_mpp_ctrl_get(mpp_base, pid, config);
+}
+
+static int armada_39x_mpp_ctrl_set(unsigned pid, unsigned long config)
+{
+ return default_mpp_ctrl_set(mpp_base, pid, config);
+}
+
+enum {
+ V_88F6920 = BIT(0),
+ V_88F6928 = BIT(1),
+ V_88F6920_PLUS = (V_88F6920 | V_88F6928),
+};
+
+static struct mvebu_mpp_mode armada_39x_mpp_modes[] = {
+ MPP_MODE(0,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua0", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(1,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua0", "txd", V_88F6920_PLUS)),
+ MPP_MODE(2,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6920_PLUS)),
+ MPP_MODE(3,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6920_PLUS)),
+ MPP_MODE(4,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(5,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(6,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "xsmi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(7,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad9", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "xsmi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(8,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad10", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "trig", V_88F6920_PLUS)),
+ MPP_MODE(9,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad11", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "clk", V_88F6920_PLUS)),
+ MPP_MODE(10,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "event", V_88F6920_PLUS)),
+ MPP_MODE(11,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)),
+ MPP_MODE(12,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad14", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),
+ MPP_MODE(13,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad15", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "data", V_88F6920_PLUS)),
+ MPP_MODE(14,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "wen1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(15,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c1", "sck", V_88F6920_PLUS)),
+ MPP_MODE(16,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c1", "sda", V_88F6920_PLUS)),
+ MPP_MODE(17,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(18,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c2", "sck", V_88F6920_PLUS)),
+ MPP_MODE(19,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c2", "sda", V_88F6920_PLUS)),
+ MPP_MODE(20,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(21,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(4, "sd", "cmd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "bootcs", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd0", V_88F6920_PLUS)),
+ MPP_MODE(22,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad0", V_88F6920_PLUS)),
+ MPP_MODE(23,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad2", V_88F6920_PLUS)),
+ MPP_MODE(24,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "readyn", V_88F6920_PLUS)),
+ MPP_MODE(25,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs0", V_88F6920_PLUS)),
+ MPP_MODE(26,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs1", V_88F6920_PLUS)),
+ MPP_MODE(27,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d7", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txclkout", V_88F6920_PLUS)),
+ MPP_MODE(28,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd0", V_88F6920_PLUS)),
+ MPP_MODE(29,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ale0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd1", V_88F6920_PLUS)),
+ MPP_MODE(30,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "oen", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd2", V_88F6920_PLUS)),
+ MPP_MODE(31,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ale1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd3", V_88F6920_PLUS)),
+ MPP_MODE(32,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "wen0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txctl", V_88F6920_PLUS)),
+ MPP_MODE(33,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad3", V_88F6920_PLUS)),
+ MPP_MODE(34,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6920_PLUS)),
+ MPP_MODE(35,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6920_PLUS)),
+ MPP_MODE(36,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6920_PLUS)),
+ MPP_MODE(37,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxclk", V_88F6920_PLUS)),
+ MPP_MODE(38,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd1", V_88F6920_PLUS)),
+ MPP_MODE(39,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd2", V_88F6920_PLUS)),
+ MPP_MODE(40,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd3", V_88F6920_PLUS)),
+ MPP_MODE(41,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "burstn", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "nd", "rbn0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxctl", V_88F6920_PLUS)),
+ MPP_MODE(42,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad7", V_88F6920_PLUS)),
+ MPP_MODE(43,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "clkout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "nd", "rbn1", V_88F6920_PLUS)),
+ MPP_MODE(44,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)),
+ MPP_MODE(45,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(46,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),
+ MPP_MODE(47,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(7, "led", "data", V_88F6920_PLUS)),
+ MPP_MODE(48,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "pclk", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "mclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(49,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "fsync", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "lrclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(50,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "drx", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "extclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "cmd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(51,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "dtx", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "sdo", V_88F6928),
+ MPP_VAR_FUNCTION(5, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "txd", V_88F6920_PLUS)),
+ MPP_MODE(52,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "intn", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "sdi", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c3", "sck", V_88F6920_PLUS)),
+ MPP_MODE(53,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(3, "tdm", "rstn", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "bclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d7", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c3", "sda", V_88F6920_PLUS)),
+ MPP_MODE(54,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua3", "txd", V_88F6920_PLUS)),
+ MPP_MODE(55,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua3", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(56,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(57,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(58,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(59,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d2", V_88F6920_PLUS)),
+};
+
+static struct mvebu_pinctrl_soc_info armada_39x_pinctrl_info;
+
+static struct of_device_id armada_39x_pinctrl_of_match[] = {
+ {
+ .compatible = "marvell,mv88f6920-pinctrl",
+ .data = (void *) V_88F6920,
+ },
+ {
+ .compatible = "marvell,mv88f6928-pinctrl",
+ .data = (void *) V_88F6928,
+ },
+ { },
+};
+
+static struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
+ MPP_FUNC_CTRL(0, 59, NULL, armada_39x_mpp_ctrl),
+};
+
+static struct pinctrl_gpio_range armada_39x_mpp_gpio_ranges[] = {
+ MPP_GPIO_RANGE(0, 0, 0, 32),
+ MPP_GPIO_RANGE(1, 32, 32, 27),
+};
+
+static int armada_39x_pinctrl_probe(struct platform_device *pdev)
+{
+ struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info;
+ const struct of_device_id *match =
+ of_match_device(armada_39x_pinctrl_of_match, &pdev->dev);
+ struct resource *res;
+
+ if (!match)
+ return -ENODEV;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mpp_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mpp_base))
+ return PTR_ERR(mpp_base);
+
+ soc->variant = (unsigned) match->data & 0xff;
+ soc->controls = armada_39x_mpp_controls;
+ soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls);
+ soc->gpioranges = armada_39x_mpp_gpio_ranges;
+ soc->ngpioranges = ARRAY_SIZE(armada_39x_mpp_gpio_ranges);
+ soc->modes = armada_39x_mpp_modes;
+ soc->nmodes = armada_39x_mpp_controls[0].npins;
+
+ pdev->dev.platform_data = soc;
+
+ return mvebu_pinctrl_probe(pdev);
+}
+
+static int armada_39x_pinctrl_remove(struct platform_device *pdev)
+{
+ return mvebu_pinctrl_remove(pdev);
+}
+
+static struct platform_driver armada_39x_pinctrl_driver = {
+ .driver = {
+ .name = "armada-39x-pinctrl",
+ .of_match_table = of_match_ptr(armada_39x_pinctrl_of_match),
+ },
+ .probe = armada_39x_pinctrl_probe,
+ .remove = armada_39x_pinctrl_remove,
+};
+
+module_platform_driver(armada_39x_pinctrl_driver);
+
+MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
+MODULE_DESCRIPTION("Marvell Armada 39x pinctrl driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0
WARNING: multiple messages have this Message-ID (diff)
From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 12/15] pinctrl: mvebu: add pinctrl driver for Marvell Armada 39x
Date: Fri, 20 Feb 2015 18:04:31 +0100 [thread overview]
Message-ID: <1424451874-25375-13-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1424451874-25375-1-git-send-email-thomas.petazzoni@free-electrons.com>
This commit adds a new pinctrl driver for the Marvell Armada 39x
family of processors, which hooks into the existing infrastructure to
support pin-muxing on Marvell EBU processors. Two variants of the
Armada 39x are supported: 88F6920 (Armada 390) and 88F6928 (Armada
398), which have a few differences in the available functions for
certain pins.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
drivers/pinctrl/mvebu/Kconfig | 4 +
drivers/pinctrl/mvebu/Makefile | 1 +
drivers/pinctrl/mvebu/pinctrl-armada-39x.c | 432 +++++++++++++++++++++++++++++
3 files changed, 437 insertions(+)
create mode 100644 drivers/pinctrl/mvebu/pinctrl-armada-39x.c
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index d6dd835..1706024 100644
--- a/drivers/pinctrl/mvebu/Kconfig
+++ b/drivers/pinctrl/mvebu/Kconfig
@@ -26,6 +26,10 @@ config PINCTRL_ARMADA_38X
bool
select PINCTRL_MVEBU
+config PINCTRL_ARMADA_39X
+ bool
+ select PINCTRL_MVEBU
+
config PINCTRL_ARMADA_XP
bool
select PINCTRL_MVEBU
diff --git a/drivers/pinctrl/mvebu/Makefile b/drivers/pinctrl/mvebu/Makefile
index a0818e9..554d8af 100644
--- a/drivers/pinctrl/mvebu/Makefile
+++ b/drivers/pinctrl/mvebu/Makefile
@@ -4,5 +4,6 @@ obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
obj-$(CONFIG_PINCTRL_ARMADA_38X) += pinctrl-armada-38x.o
+obj-$(CONFIG_PINCTRL_ARMADA_39X) += pinctrl-armada-39x.o
obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
obj-$(CONFIG_PINCTRL_ORION) += pinctrl-orion.o
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c
new file mode 100644
index 0000000..5963411
--- /dev/null
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c
@@ -0,0 +1,432 @@
+/*
+ * Marvell Armada 39x pinctrl driver based on mvebu pinctrl core
+ *
+ * Copyright (C) 2015 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/pinctrl.h>
+
+#include "pinctrl-mvebu.h"
+
+static void __iomem *mpp_base;
+
+static int armada_39x_mpp_ctrl_get(unsigned pid, unsigned long *config)
+{
+ return default_mpp_ctrl_get(mpp_base, pid, config);
+}
+
+static int armada_39x_mpp_ctrl_set(unsigned pid, unsigned long config)
+{
+ return default_mpp_ctrl_set(mpp_base, pid, config);
+}
+
+enum {
+ V_88F6920 = BIT(0),
+ V_88F6928 = BIT(1),
+ V_88F6920_PLUS = (V_88F6920 | V_88F6928),
+};
+
+static struct mvebu_mpp_mode armada_39x_mpp_modes[] = {
+ MPP_MODE(0,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua0", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(1,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua0", "txd", V_88F6920_PLUS)),
+ MPP_MODE(2,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6920_PLUS)),
+ MPP_MODE(3,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6920_PLUS)),
+ MPP_MODE(4,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(5,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(6,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "xsmi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(7,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad9", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "xsmi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(8,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad10", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "trig", V_88F6920_PLUS)),
+ MPP_MODE(9,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad11", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "clk", V_88F6920_PLUS)),
+ MPP_MODE(10,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ptp", "event", V_88F6920_PLUS)),
+ MPP_MODE(11,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)),
+ MPP_MODE(12,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad14", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),
+ MPP_MODE(13,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad15", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "data", V_88F6920_PLUS)),
+ MPP_MODE(14,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "wen1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(15,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c1", "sck", V_88F6920_PLUS)),
+ MPP_MODE(16,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c1", "sda", V_88F6920_PLUS)),
+ MPP_MODE(17,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdio", V_88F6920_PLUS)),
+ MPP_MODE(18,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c2", "sck", V_88F6920_PLUS)),
+ MPP_MODE(19,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c2", "sda", V_88F6920_PLUS)),
+ MPP_MODE(20,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "smi", "mdc", V_88F6920_PLUS)),
+ MPP_MODE(21,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(4, "sd", "cmd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "bootcs", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd0", V_88F6920_PLUS)),
+ MPP_MODE(22,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad0", V_88F6920_PLUS)),
+ MPP_MODE(23,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad2", V_88F6920_PLUS)),
+ MPP_MODE(24,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "readyn", V_88F6920_PLUS)),
+ MPP_MODE(25,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs0", V_88F6920_PLUS)),
+ MPP_MODE(26,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs1", V_88F6920_PLUS)),
+ MPP_MODE(27,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d7", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txclkout", V_88F6920_PLUS)),
+ MPP_MODE(28,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd0", V_88F6920_PLUS)),
+ MPP_MODE(29,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ale0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd1", V_88F6920_PLUS)),
+ MPP_MODE(30,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "oen", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd2", V_88F6920_PLUS)),
+ MPP_MODE(31,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ale1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txd3", V_88F6920_PLUS)),
+ MPP_MODE(32,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "wen0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "txctl", V_88F6920_PLUS)),
+ MPP_MODE(33,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad3", V_88F6920_PLUS)),
+ MPP_MODE(34,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6920_PLUS)),
+ MPP_MODE(35,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6920_PLUS)),
+ MPP_MODE(36,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6920_PLUS)),
+ MPP_MODE(37,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxclk", V_88F6920_PLUS)),
+ MPP_MODE(38,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd1", V_88F6920_PLUS)),
+ MPP_MODE(39,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "a2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd2", V_88F6920_PLUS)),
+ MPP_MODE(40,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "sd", "d2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxd3", V_88F6920_PLUS)),
+ MPP_MODE(41,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "burstn", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "nd", "rbn0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(8, "ge", "rxctl", V_88F6920_PLUS)),
+ MPP_MODE(42,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "ad7", V_88F6920_PLUS)),
+ MPP_MODE(43,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs2", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "dev", "clkout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "nd", "rbn1", V_88F6920_PLUS)),
+ MPP_MODE(44,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)),
+ MPP_MODE(45,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(46,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),
+ MPP_MODE(47,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(7, "led", "data", V_88F6920_PLUS)),
+ MPP_MODE(48,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "m", "vtt", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "pclk", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "mclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d4", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(49,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "fsync", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "lrclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d5", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(50,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "drx", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "extclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "cmd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(51,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "dtx", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "sdo", V_88F6928),
+ MPP_VAR_FUNCTION(5, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua2", "txd", V_88F6920_PLUS)),
+ MPP_MODE(52,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "tdm", "intn", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "sdi", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d6", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c3", "sck", V_88F6920_PLUS)),
+ MPP_MODE(53,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(3, "tdm", "rstn", V_88F6928),
+ MPP_VAR_FUNCTION(4, "audio", "bclk", V_88F6928),
+ MPP_VAR_FUNCTION(5, "sd", "d7", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "i2c3", "sda", V_88F6920_PLUS)),
+ MPP_MODE(54,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "sata0", "present", V_88F6928),
+ MPP_VAR_FUNCTION(2, "sata1", "present", V_88F6928),
+ MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d3", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua3", "txd", V_88F6920_PLUS)),
+ MPP_MODE(55,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "cts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(7, "ua3", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(56,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "m", "decc", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(57,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "clk", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS)),
+ MPP_MODE(58,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d1", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)),
+ MPP_MODE(59,
+ MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(2, "i2c1", "sda", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(4, "spi1", "cs0", V_88F6920_PLUS),
+ MPP_VAR_FUNCTION(5, "sd", "d2", V_88F6920_PLUS)),
+};
+
+static struct mvebu_pinctrl_soc_info armada_39x_pinctrl_info;
+
+static struct of_device_id armada_39x_pinctrl_of_match[] = {
+ {
+ .compatible = "marvell,mv88f6920-pinctrl",
+ .data = (void *) V_88F6920,
+ },
+ {
+ .compatible = "marvell,mv88f6928-pinctrl",
+ .data = (void *) V_88F6928,
+ },
+ { },
+};
+
+static struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
+ MPP_FUNC_CTRL(0, 59, NULL, armada_39x_mpp_ctrl),
+};
+
+static struct pinctrl_gpio_range armada_39x_mpp_gpio_ranges[] = {
+ MPP_GPIO_RANGE(0, 0, 0, 32),
+ MPP_GPIO_RANGE(1, 32, 32, 27),
+};
+
+static int armada_39x_pinctrl_probe(struct platform_device *pdev)
+{
+ struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info;
+ const struct of_device_id *match =
+ of_match_device(armada_39x_pinctrl_of_match, &pdev->dev);
+ struct resource *res;
+
+ if (!match)
+ return -ENODEV;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mpp_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mpp_base))
+ return PTR_ERR(mpp_base);
+
+ soc->variant = (unsigned) match->data & 0xff;
+ soc->controls = armada_39x_mpp_controls;
+ soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls);
+ soc->gpioranges = armada_39x_mpp_gpio_ranges;
+ soc->ngpioranges = ARRAY_SIZE(armada_39x_mpp_gpio_ranges);
+ soc->modes = armada_39x_mpp_modes;
+ soc->nmodes = armada_39x_mpp_controls[0].npins;
+
+ pdev->dev.platform_data = soc;
+
+ return mvebu_pinctrl_probe(pdev);
+}
+
+static int armada_39x_pinctrl_remove(struct platform_device *pdev)
+{
+ return mvebu_pinctrl_remove(pdev);
+}
+
+static struct platform_driver armada_39x_pinctrl_driver = {
+ .driver = {
+ .name = "armada-39x-pinctrl",
+ .of_match_table = of_match_ptr(armada_39x_pinctrl_of_match),
+ },
+ .probe = armada_39x_pinctrl_probe,
+ .remove = armada_39x_pinctrl_remove,
+};
+
+module_platform_driver(armada_39x_pinctrl_driver);
+
+MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
+MODULE_DESCRIPTION("Marvell Armada 39x pinctrl driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0
next prev parent reply other threads:[~2015-02-20 17:05 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-20 17:04 [PATCHv2 00/15] ARM: mvebu: Armada 39x basic support, and preparatory cleanups Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 02/15] ARM: mvebu: fix usb@ unit address on Armada 38x to match register address Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 15:14 ` Gregory CLEMENT
2015-02-23 15:14 ` Gregory CLEMENT
2015-02-20 17:04 ` [PATCHv2 03/15] ARM: mvebu: add missing UART alias on Armada 38x Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 15:16 ` Gregory CLEMENT
2015-02-23 15:16 ` Gregory CLEMENT
2015-02-20 17:04 ` [PATCHv2 04/15] ARM: mvebu: use IRQ macros to define the SDHCI interrupt " Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 15:27 ` Gregory CLEMENT
2015-02-23 15:27 ` Gregory CLEMENT
2015-02-27 14:48 ` Thomas Petazzoni
2015-02-27 14:48 ` Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 05/15] ARM: mvebu: add stdout-path to all armada-*.dts Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 16:00 ` Gregory CLEMENT
2015-02-23 16:00 ` Gregory CLEMENT
[not found] ` <54EB4E9B.6010001-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2015-02-23 16:50 ` Rob Herring
2015-02-23 16:50 ` Rob Herring
2015-02-23 16:56 ` Thomas Petazzoni
2015-02-23 16:56 ` Thomas Petazzoni
2015-02-27 16:48 ` Thomas Petazzoni
2015-02-27 16:48 ` Thomas Petazzoni
[not found] ` <20150227174851.390d9f58-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2015-02-27 17:42 ` Rob Herring
2015-02-27 17:42 ` Rob Herring
2015-02-28 9:55 ` Thomas Petazzoni
2015-02-28 9:55 ` Thomas Petazzoni
2015-03-03 9:45 ` Thomas Petazzoni
2015-03-03 9:45 ` Thomas Petazzoni
2015-02-23 17:13 ` Mark Rutland
2015-02-23 17:13 ` Mark Rutland
[not found] ` <1424451874-25375-1-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2015-02-20 17:04 ` [PATCHv2 01/15] ARM: mvebu: add __initconst specifiers on DT_MACHINE_START dt_compat tables Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 15:12 ` Gregory CLEMENT
2015-02-23 15:12 ` Gregory CLEMENT
2015-02-20 17:04 ` [PATCHv2 06/15] devicetree: bindings: add DT binding for the Marvell Armada 39x SoC family Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 16:07 ` Gregory CLEMENT
2015-02-23 16:07 ` Gregory CLEMENT
2015-02-20 17:04 ` [PATCHv2 11/15] clk: mvebu: add Marvell Armada 39x driver Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 07/15] devicetree: bindings: update DT bindings for Marvell EBU clock support Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 08/15] devicetree: bindings: add Device Tree bindings for Armada 39x pin-muxing controller Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 09/15] devicetree: bindings: add new SMP enable method for Marvell Armada 39x Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 10/15] clk: mvebu: extend common code to allow an optional refclk Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-20 18:21 ` Mike Turquette
2015-02-20 18:21 ` Mike Turquette
2015-02-23 18:06 ` Gregory CLEMENT
2015-02-23 18:06 ` Gregory CLEMENT
2015-02-27 0:05 ` Mike Turquette
2015-02-27 0:05 ` Mike Turquette
2015-02-20 17:04 ` Thomas Petazzoni [this message]
2015-02-20 17:04 ` [PATCHv2 12/15] pinctrl: mvebu: add pinctrl driver for Marvell Armada 39x Thomas Petazzoni
2015-02-20 17:04 ` [PATCHv2 13/15] ARM: mvebu: add core support for " Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-23 18:16 ` Gregory CLEMENT
2015-02-23 18:16 ` Gregory CLEMENT
2015-02-20 17:04 ` [PATCHv2 14/15] ARM: mvebu: add Device Tree files for Armada 39x SoC and board Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
2015-02-26 16:19 ` Gregory CLEMENT
2015-02-26 16:19 ` Gregory CLEMENT
2015-02-20 17:04 ` [PATCHv2 15/15] Documentation: arm: update supported Marvell EBU processors Thomas Petazzoni
2015-02-20 17:04 ` Thomas Petazzoni
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