From: James Hogan <james.hogan@imgtec.com> To: Paolo Bonzini <pbonzini@redhat.com>, <kvm@vger.kernel.org>, <linux-mips@linux-mips.org> Cc: James Hogan <james.hogan@imgtec.com>, Ralf Baechle <ralf@linux-mips.org>, Gleb Natapov <gleb@kernel.org> Subject: [PATCH 04/20] MIPS: KVM: Implement PRid CP0 register access Date: Wed, 11 Mar 2015 14:44:40 +0000 [thread overview] Message-ID: <1426085096-12932-5-git-send-email-james.hogan@imgtec.com> (raw) In-Reply-To: <1426085096-12932-1-git-send-email-james.hogan@imgtec.com> Implement access to the guest Processor Identification CP0 register using the KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls. This allows the owning process to modify and read back the value that is exposed to the guest in this register. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Gleb Natapov <gleb@kernel.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org --- Documentation/virtual/kvm/api.txt | 1 + arch/mips/include/asm/kvm_host.h | 1 + arch/mips/kvm/mips.c | 7 +++++++ 3 files changed, 9 insertions(+) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index b112efc816f1..22dfaa31ed86 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1967,6 +1967,7 @@ registers, find a list below: MIPS | KVM_REG_MIPS_CP0_STATUS | 32 MIPS | KVM_REG_MIPS_CP0_CAUSE | 32 MIPS | KVM_REG_MIPS_CP0_EPC | 64 + MIPS | KVM_REG_MIPS_CP0_PRID | 32 MIPS | KVM_REG_MIPS_CP0_CONFIG | 32 MIPS | KVM_REG_MIPS_CP0_CONFIG1 | 32 MIPS | KVM_REG_MIPS_CP0_CONFIG2 | 32 diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index 8fc3ba2872f0..26d91b0f3c3c 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -42,6 +42,7 @@ #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0) #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0) #define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0) +#define KVM_REG_MIPS_CP0_PRID MIPS_CP0_32(15, 0) #define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1) #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0) #define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1) diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c index 399b5517ecb8..fd620cc8a44c 100644 --- a/arch/mips/kvm/mips.c +++ b/arch/mips/kvm/mips.c @@ -505,6 +505,7 @@ static u64 kvm_mips_get_one_regs[] = { KVM_REG_MIPS_CP0_STATUS, KVM_REG_MIPS_CP0_CAUSE, KVM_REG_MIPS_CP0_EPC, + KVM_REG_MIPS_CP0_PRID, KVM_REG_MIPS_CP0_CONFIG, KVM_REG_MIPS_CP0_CONFIG1, KVM_REG_MIPS_CP0_CONFIG2, @@ -574,6 +575,9 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_EPC: v = (long)kvm_read_c0_guest_epc(cop0); break; + case KVM_REG_MIPS_CP0_PRID: + v = (long)kvm_read_c0_guest_prid(cop0); + break; case KVM_REG_MIPS_CP0_ERROREPC: v = (long)kvm_read_c0_guest_errorepc(cop0); break; @@ -687,6 +691,9 @@ static int kvm_mips_set_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_EPC: kvm_write_c0_guest_epc(cop0, v); break; + case KVM_REG_MIPS_CP0_PRID: + kvm_write_c0_guest_prid(cop0, v); + break; case KVM_REG_MIPS_CP0_ERROREPC: kvm_write_c0_guest_errorepc(cop0, v); break; -- 2.0.5
WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com> To: Paolo Bonzini <pbonzini@redhat.com>, kvm@vger.kernel.org, linux-mips@linux-mips.org Cc: James Hogan <james.hogan@imgtec.com>, Ralf Baechle <ralf@linux-mips.org>, Gleb Natapov <gleb@kernel.org> Subject: [PATCH 04/20] MIPS: KVM: Implement PRid CP0 register access Date: Wed, 11 Mar 2015 14:44:40 +0000 [thread overview] Message-ID: <1426085096-12932-5-git-send-email-james.hogan@imgtec.com> (raw) Message-ID: <20150311144440.B5TsoKq7N6TCTm3LevB7ZpWfkFbnFaRxc6s-755B5sA@z> (raw) In-Reply-To: <1426085096-12932-1-git-send-email-james.hogan@imgtec.com> Implement access to the guest Processor Identification CP0 register using the KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls. This allows the owning process to modify and read back the value that is exposed to the guest in this register. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Gleb Natapov <gleb@kernel.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org --- Documentation/virtual/kvm/api.txt | 1 + arch/mips/include/asm/kvm_host.h | 1 + arch/mips/kvm/mips.c | 7 +++++++ 3 files changed, 9 insertions(+) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index b112efc816f1..22dfaa31ed86 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1967,6 +1967,7 @@ registers, find a list below: MIPS | KVM_REG_MIPS_CP0_STATUS | 32 MIPS | KVM_REG_MIPS_CP0_CAUSE | 32 MIPS | KVM_REG_MIPS_CP0_EPC | 64 + MIPS | KVM_REG_MIPS_CP0_PRID | 32 MIPS | KVM_REG_MIPS_CP0_CONFIG | 32 MIPS | KVM_REG_MIPS_CP0_CONFIG1 | 32 MIPS | KVM_REG_MIPS_CP0_CONFIG2 | 32 diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index 8fc3ba2872f0..26d91b0f3c3c 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -42,6 +42,7 @@ #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0) #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0) #define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0) +#define KVM_REG_MIPS_CP0_PRID MIPS_CP0_32(15, 0) #define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1) #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0) #define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1) diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c index 399b5517ecb8..fd620cc8a44c 100644 --- a/arch/mips/kvm/mips.c +++ b/arch/mips/kvm/mips.c @@ -505,6 +505,7 @@ static u64 kvm_mips_get_one_regs[] = { KVM_REG_MIPS_CP0_STATUS, KVM_REG_MIPS_CP0_CAUSE, KVM_REG_MIPS_CP0_EPC, + KVM_REG_MIPS_CP0_PRID, KVM_REG_MIPS_CP0_CONFIG, KVM_REG_MIPS_CP0_CONFIG1, KVM_REG_MIPS_CP0_CONFIG2, @@ -574,6 +575,9 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_EPC: v = (long)kvm_read_c0_guest_epc(cop0); break; + case KVM_REG_MIPS_CP0_PRID: + v = (long)kvm_read_c0_guest_prid(cop0); + break; case KVM_REG_MIPS_CP0_ERROREPC: v = (long)kvm_read_c0_guest_errorepc(cop0); break; @@ -687,6 +691,9 @@ static int kvm_mips_set_reg(struct kvm_vcpu *vcpu, case KVM_REG_MIPS_CP0_EPC: kvm_write_c0_guest_epc(cop0, v); break; + case KVM_REG_MIPS_CP0_PRID: + kvm_write_c0_guest_prid(cop0, v); + break; case KVM_REG_MIPS_CP0_ERROREPC: kvm_write_c0_guest_errorepc(cop0, v); break; -- 2.0.5
next prev parent reply other threads:[~2015-03-11 14:49 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-03-11 14:44 [PATCH 00/20] MIPS: KVM: Guest FPU & SIMD (MSA) support James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 01/20] MIPS: KVM: Handle MSA Disabled exceptions from guest James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 02/20] MIPS: Clear [MSA]FPE CSR.Cause after notify_die() James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-23 13:56 ` Ralf Baechle 2015-04-08 0:43 ` Maciej W. Rozycki 2015-03-11 14:44 ` [PATCH 03/20] MIPS: KVM: Handle TRAP exceptions from guest kernel James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan [this message] 2015-03-11 14:44 ` [PATCH 04/20] MIPS: KVM: Implement PRid CP0 register access James Hogan 2015-03-11 14:44 ` [PATCH 05/20] MIPS: KVM: Sort kvm_mips_get_reg() registers James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 06/20] MIPS: KVM: Drop pr_info messages on init/exit James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 07/20] MIPS: KVM: Clean up register definitions a little James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 08/20] MIPS: KVM: Simplify default guest Config registers James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 09/20] MIPS: KVM: Add Config4/5 and writing of " James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 10/20] MIPS: KVM: Add vcpu_get_regs/vcpu_set_regs callback James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 11/20] MIPS: KVM: Add base guest FPU support James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 12/20] MIPS: KVM: Emulate FPU bits in COP0 interface James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 13/20] MIPS: KVM: Add FP exception handling James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 14/20] MIPS: KVM: Expose FPU registers James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-26 13:55 ` Paolo Bonzini 2015-03-11 14:44 ` [PATCH 16/20] MIPS: KVM: Add base guest MSA support James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 17/20] MIPS: KVM: Emulate MSA bits in COP0 interface James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 18/20] MIPS: KVM: Add MSA exception handling James Hogan 2015-03-11 14:44 ` James Hogan [not found] ` <1426085096-12932-1-git-send-email-james.hogan-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org> 2015-03-11 14:44 ` [PATCH 15/20] MIPS: KVM: Wire up FPU capability James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 19/20] MIPS: KVM: Expose MSA registers James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-11 14:44 ` [PATCH 20/20] MIPS: KVM: Wire up MSA capability James Hogan 2015-03-11 14:44 ` James Hogan 2015-03-26 13:58 ` Paolo Bonzini 2015-03-26 14:52 ` James Hogan 2015-03-26 14:52 ` James Hogan
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