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From: Chao Peng <chao.p.peng@linux.intel.com>
To: xen-devel@lists.xen.org
Cc: keir@xen.org, Ian.Campbell@citrix.com,
	stefano.stabellini@eu.citrix.com, andrew.cooper3@citrix.com,
	Ian.Jackson@eu.citrix.com, will.auld@intel.com,
	JBeulich@suse.com, wei.liu2@citrix.com, dgdegra@tycho.nsa.gov
Subject: [PATCH 3/6] X86: improve psr scheduling code
Date: Fri, 13 Mar 2015 18:13:22 +0800	[thread overview]
Message-ID: <1426241605-4114-4-git-send-email-chao.p.peng@linux.intel.com> (raw)
In-Reply-To: <1426241605-4114-1-git-send-email-chao.p.peng@linux.intel.com>

Switching RMID from previous vcpu to next vcpu only needs to write
MSR_IA32_PSR_ASSOC once. Write it with the value of next vcpu is enough,
no need to write '0' first. Idle domain has RMID set to 0 so just switch
it as it does.

Introduce a generic routine for this so that other psr features can fit.

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
---
 xen/arch/x86/domain.c     | 7 ++-----
 xen/arch/x86/psr.c        | 6 ++++++
 xen/include/asm-x86/psr.h | 3 ++-
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index e3b0724..c9be83b 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -1447,8 +1447,6 @@ static void __context_switch(void)
     {
         memcpy(&p->arch.user_regs, stack_regs, CTXT_SWITCH_STACK_BYTES);
         vcpu_save_fpu(p);
-        if ( psr_cmt_enabled() )
-            psr_assoc_rmid(0);
         p->arch.ctxt_switch_from(p);
     }
 
@@ -1473,11 +1471,10 @@ static void __context_switch(void)
         }
         vcpu_restore_fpu_eager(n);
         n->arch.ctxt_switch_to(n);
-
-        if ( psr_cmt_enabled() && n->domain->arch.psr_rmid > 0 )
-            psr_assoc_rmid(n->domain->arch.psr_rmid);
     }
 
+    psr_ctxt_switch_to(n->domain);
+
     gdt = !is_pv_32on64_vcpu(n) ? per_cpu(gdt_table, cpu) :
                                   per_cpu(compat_gdt_table, cpu);
     if ( need_full_gdt(n) )
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 4325eaf..8c96c1b 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -407,6 +407,12 @@ void psr_domain_free(struct domain *d)
     psr_free_cos(d);
 }
 
+void psr_ctxt_switch_to(struct domain *d)
+{
+    if ( psr_cmt_enabled() )
+        psr_assoc_rmid(d->arch.psr_rmid);
+}
+
 static void do_cat_cpu_init(void* data)
 {
     unsigned int eax, ebx, ecx, edx;
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index 999a4c6..212ba30 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -46,7 +46,6 @@ static inline bool_t psr_cmt_enabled(void)
 
 int psr_alloc_rmid(struct domain *d);
 void psr_free_rmid(struct domain *d);
-void psr_assoc_rmid(unsigned int rmid);
 
 int psr_get_cat_l3_info(unsigned int socket, uint32_t *cbm_len,
                         uint32_t *cos_max);
@@ -56,6 +55,8 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, uint64_t cbm);
 int psr_domain_init(struct domain *d);
 void psr_domain_free(struct domain *d);
 
+void psr_ctxt_switch_to(struct domain *d);
+
 #endif /* __ASM_PSR_H__ */
 
 /*
-- 
1.9.1

  parent reply	other threads:[~2015-03-13 10:13 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-13 10:13 [PATCH 0/6] enable Cache Allocation Technology (CAT) for VMs Chao Peng
2015-03-13 10:13 ` [PATCH 1/6] x86: detect and initialize Intel CAT feature Chao Peng
2015-03-13 13:40   ` Konrad Rzeszutek Wilk
2015-03-13 13:43     ` Konrad Rzeszutek Wilk
2015-03-17  8:11     ` Chao Peng
2015-03-17 13:00       ` Konrad Rzeszutek Wilk
2015-03-18  8:31         ` Chao Peng
2015-03-16 13:47   ` Jan Beulich
2015-03-17  8:48     ` Chao Peng
2015-03-17  9:01       ` Jan Beulich
2015-03-13 10:13 ` [PATCH 2/6] x86: add support for COS/CBM manangement Chao Peng
2015-03-13 13:53   ` Konrad Rzeszutek Wilk
2015-03-17  8:57     ` Chao Peng
2015-03-16 17:10   ` Jan Beulich
2015-03-17  9:11     ` Chao Peng
2015-03-17  9:25       ` Jan Beulich
2015-03-17 10:06         ` Chao Peng
2015-03-13 10:13 ` Chao Peng [this message]
2015-03-16 16:53   ` [PATCH 3/6] X86: improve psr scheduling code Jan Beulich
2015-03-17  9:12     ` Chao Peng
2015-03-13 10:13 ` [PATCH 4/6] x86: add scheduling support for Intel CAT Chao Peng
2015-03-17  9:19   ` Jan Beulich
2015-03-17  9:33     ` Chao Peng
2015-03-13 10:13 ` [PATCH 5/6] xsm: add CAT related xsm policies Chao Peng
2015-03-13 16:45   ` Daniel De Graaf
2015-03-13 10:13 ` [PATCH 6/6] tools: add tools support for Intel CAT Chao Peng

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