From: Thierry Reding <thierry.reding@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/6] armv8/mmu: Clean up TCR programming
Date: Fri, 20 Mar 2015 12:47:50 +0100 [thread overview]
Message-ID: <1426852073-10299-3-git-send-email-thierry.reding@gmail.com> (raw)
In-Reply-To: <1426852073-10299-1-git-send-email-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Use the inner shareable attribute for memory, which makes more sense
considering that this code is called when caches are being enabled.
While at it, fix the values for the shareability attribute field to
match the documentation.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm/include/asm/armv8/mmu.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 4b9cb5296572..6d42f5533a74 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -93,8 +93,8 @@
#define TCR_ORGN_WBNWA (3 << 10)
#define TCR_ORGN_MASK (3 << 10)
#define TCR_SHARED_NON (0 << 12)
-#define TCR_SHARED_OUTER (1 << 12)
-#define TCR_SHARED_INNER (2 << 12)
+#define TCR_SHARED_OUTER (2 << 12)
+#define TCR_SHARED_INNER (3 << 12)
#define TCR_TG0_4K (0 << 14)
#define TCR_TG0_64K (1 << 14)
#define TCR_TG0_16K (2 << 14)
@@ -102,9 +102,9 @@
#define TCR_EL2_IPS_BITS (3 << 16) /* 42 bits physical address */
#define TCR_EL3_IPS_BITS (3 << 16) /* 42 bits physical address */
-/* PTWs cacheable, inner/outer WBWA and non-shareable */
+/* PTWs cacheable, inner/outer WBWA and inner shareable */
#define TCR_FLAGS (TCR_TG0_64K | \
- TCR_SHARED_NON | \
+ TCR_SHARED_INNER | \
TCR_ORGN_WBWA | \
TCR_IRGN_WBWA | \
TCR_T0SZ(VA_BITS))
--
2.3.2
next prev parent reply other threads:[~2015-03-20 11:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-20 11:47 [U-Boot] [PATCH 1/6] armv8/cache: Fix page table creation Thierry Reding
2015-03-20 11:47 ` [U-Boot] [PATCH 2/6] armv8: Implement CONFIG_SYS_MALLOC_F_LEN support Thierry Reding
2015-03-24 14:47 ` FengHua
2015-03-20 11:47 ` Thierry Reding [this message]
2015-03-20 18:13 ` [U-Boot] [PATCH 3/6] armv8/mmu: Clean up TCR programming Marc Zyngier
2015-07-02 21:06 ` Albert ARIBAUD
2015-07-03 7:28 ` Marc Zyngier
2015-03-24 14:55 ` FengHua
2015-03-20 11:47 ` [U-Boot] [PATCH 4/6] armv8/mmu: Set bits marked RES1 in TCR Thierry Reding
2015-03-20 18:16 ` Marc Zyngier
2015-03-24 15:10 ` FengHua
2015-03-20 11:47 ` [U-Boot] [PATCH 5/6] armv8/gic: Fix GIC v2 initialization Thierry Reding
2015-03-20 18:03 ` Marc Zyngier
2015-03-20 11:47 ` [U-Boot] [PATCH 6/6] armv8: Allow SoCs to override the generic timer Thierry Reding
2015-03-20 18:18 ` Marc Zyngier
2015-03-24 14:59 ` FengHua
2015-03-20 18:06 ` [U-Boot] [PATCH 1/6] armv8/cache: Fix page table creation Marc Zyngier
2015-03-24 14:52 ` FengHua
2015-04-16 11:24 ` Albert ARIBAUD
2015-06-03 15:09 ` Albert ARIBAUD
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