[PATCH v2] coresight: adding basic support for Spreadtrum SC9836

* [PATCH v2] coresight: adding basic support for Spreadtrum SC9836
@ 2015-03-25 12:52 ` Chunyan Zhang
  0 siblings, 0 replies; 7+ messages in thread
From: Chunyan Zhang @ 2015-03-25 12:52 UTC (permalink / raw)
  To: arm, arnd
  Cc: mathieu.poirier, will.deacon, mark.rutland, robh+dt, pawel.moll,
	ijc+devicetree, galak, catalin.marinas, kaixu.xia, zhizhou.zhang,
	orsonzhai, zhang.lyra, devicetree, linux-arm-kernel,
	linux-kernel

Support only for ETF, FUNNEL, STM are included currently.
Support for ETM, TPIU and the replicator linked to it are not included in
this version patch.

Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
---
Change for v2:
 - Corrected the TMC whose space is wrongly used as ETB in v1.
 - Removed "coresight-default-sink" from the DT.
---
 arch/arm64/boot/dts/sprd/sc9836.dtsi | 55 ++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index f92f1b4..ee34e1a 100644
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -45,6 +45,61 @@
 		};
 	};
 
+	etf@10003000 {
+		compatible = "arm,coresight-tmc", "arm,primecell";
+		reg = <0 0x10003000 0 0x1000>;
+		clocks = <&clk26mhz>;
+		clock-names = "apb_pclk";
+		port {
+			etf_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&funnel_out_port0>;
+			};
+		};
+	};
+
+	funnel@10001000 {
+		compatible = "arm,coresight-funnel", "arm,primecell";
+		reg = <0 0x10001000 0 0x1000>;
+		clocks = <&clk26mhz>;
+		clock-names = "apb_pclk";
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			/* funnel output port */
+			port@0 {
+				reg = <0>;
+				funnel_out_port0: endpoint {
+					remote-endpoint = <&etf_in>;
+				};
+			};
+
+			/* funnel input port 0~3 is reserved for ETMs */
+			port@1 {
+				reg = <4>;
+				funnel_in_port4: endpoint {
+					slave-mode;
+					remote-endpoint = <&stm_out>;
+				};
+			};
+		};
+	};
+
+	stm@10006000 {
+		compatible = "arm,coresight-stm", "arm,primecell";
+		reg = <0 0x10006000 0 0x1000>,
+		      <0 0x01000000 0 0x180000>;
+		reg-names = "stm-base", "stm-stimulus-base";
+		clocks = <&clk26mhz>;
+		clock-names = "apb_pclk";
+		port {
+			stm_out: endpoint {
+				remote-endpoint = <&funnel_in_port4>;
+			};
+		};
+	};
+
 	gic: interrupt-controller@12001000 {
 		compatible = "arm,gic-400";
 		reg = <0 0x12001000 0 0x1000>,
-- 
1.9.1


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