All of lore.kernel.org
 help / color / mirror / Atom feed
From: Valentin Longchamp <valentin.longchamp@keymile.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC] powerpc: add 2 common dcache assembly functions
Date: Fri, 27 Mar 2015 16:07:32 +0100	[thread overview]
Message-ID: <1427468852-12656-1-git-send-email-valentin.longchamp@keymile.com> (raw)
In-Reply-To: <55155E2C.1090304@freescale.com>

This patch defines the 2 flush_dcache_range and invalidate_dcache_range
functions for all the powerpc architecture. Their implementation is
borrowed from the kernel's misc_32.S file and replace the ones from
mpc86xx and ppc4xx since they were equivalent.

This is a fix for the problem introduced by this patch:
http://patchwork.ozlabs.org/patch/448849/

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
---
 arch/powerpc/cpu/mpc512x/Makefile |  3 ---
 arch/powerpc/cpu/mpc512x/cache.c  | 17 --------------
 arch/powerpc/cpu/mpc5xxx/Makefile |  1 -
 arch/powerpc/cpu/mpc5xxx/cache.c  | 15 ------------
 arch/powerpc/cpu/mpc83xx/Makefile |  3 ---
 arch/powerpc/cpu/mpc83xx/cache.c  | 17 --------------
 arch/powerpc/cpu/mpc85xx/Makefile |  3 ---
 arch/powerpc/cpu/mpc85xx/cache.c  | 17 --------------
 arch/powerpc/cpu/mpc86xx/cache.S  | 45 ------------------------------------
 arch/powerpc/cpu/ppc4xx/cache.S   | 43 -----------------------------------
 arch/powerpc/lib/ppccache.S       | 48 +++++++++++++++++++++++++++++++++++++++
 11 files changed, 48 insertions(+), 164 deletions(-)
 delete mode 100644 arch/powerpc/cpu/mpc512x/cache.c
 delete mode 100644 arch/powerpc/cpu/mpc5xxx/cache.c
 delete mode 100644 arch/powerpc/cpu/mpc83xx/cache.c
 delete mode 100644 arch/powerpc/cpu/mpc85xx/cache.c

diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile
index a4934ef..98991c6 100644
--- a/arch/powerpc/cpu/mpc512x/Makefile
+++ b/arch/powerpc/cpu/mpc512x/Makefile
@@ -17,6 +17,3 @@ obj-y += speed.o
 obj-$(CONFIG_FSL_DIU_FB) += diu.o
 obj-$(CONFIG_CMD_IDE) += ide.o
 obj-$(CONFIG_PCI) += pci.o
-
-# Stub implementations of cache management functions for USB
-obj-$(CONFIG_USB_EHCI) += cache.o
diff --git a/arch/powerpc/cpu/mpc512x/cache.c b/arch/powerpc/cpu/mpc512x/cache.c
deleted file mode 100644
index 66384f9..0000000
--- a/arch/powerpc/cpu/mpc512x/cache.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (C) 2012 Marek Vasut <marex@denx.de>
- *
- * This file contains stub implementation of
- *   invalidate_dcache_range()
- *   flush_dcache_range()
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
diff --git a/arch/powerpc/cpu/mpc5xxx/Makefile b/arch/powerpc/cpu/mpc5xxx/Makefile
index d122b29..5c67e1d 100644
--- a/arch/powerpc/cpu/mpc5xxx/Makefile
+++ b/arch/powerpc/cpu/mpc5xxx/Makefile
@@ -7,7 +7,6 @@
 
 extra-y	= start.o
 extra-y += traps.o
-obj-y  += cache.o
 obj-y  += io.o
 obj-y  += firmware_sc_task_bestcomm.impl.o
 obj-y += i2c.o
diff --git a/arch/powerpc/cpu/mpc5xxx/cache.c b/arch/powerpc/cpu/mpc5xxx/cache.c
deleted file mode 100644
index 5d674bc..0000000
--- a/arch/powerpc/cpu/mpc5xxx/cache.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * This file contains stub implementation of
- *   invalidate_dcache_range()
- *   flush_dcache_range()
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index cf91162..a93cf13 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -35,9 +35,6 @@ obj-$(CONFIG_PCI) += pci.o
 obj-$(CONFIG_PCIE) += pcie.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 
-# Stub implementations of cache management functions for USB
-obj-y += cache.o
-
 ifndef CONFIG_SYS_FSL_DDRC_GEN2
 obj-y += spd_sdram.o
 endif
diff --git a/arch/powerpc/cpu/mpc83xx/cache.c b/arch/powerpc/cpu/mpc83xx/cache.c
deleted file mode 100644
index 66384f9..0000000
--- a/arch/powerpc/cpu/mpc83xx/cache.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (C) 2012 Marek Vasut <marex@denx.de>
- *
- * This file contains stub implementation of
- *   invalidate_dcache_range()
- *   flush_dcache_range()
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index b93158b..65c26c0 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -114,7 +114,4 @@ endif
 obj-y	+= tlb.o
 obj-y	+= traps.o
 
-# Stub implementations of cache management functions for USB
-obj-y += cache.o
-
 endif # not minimal
diff --git a/arch/powerpc/cpu/mpc85xx/cache.c b/arch/powerpc/cpu/mpc85xx/cache.c
deleted file mode 100644
index 66384f9..0000000
--- a/arch/powerpc/cpu/mpc85xx/cache.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (C) 2012 Marek Vasut <marex@denx.de>
- *
- * This file contains stub implementation of
- *   invalidate_dcache_range()
- *   flush_dcache_range()
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
diff --git a/arch/powerpc/cpu/mpc86xx/cache.S b/arch/powerpc/cpu/mpc86xx/cache.S
index 536d9b9..34968c6 100644
--- a/arch/powerpc/cpu/mpc86xx/cache.S
+++ b/arch/powerpc/cpu/mpc86xx/cache.S
@@ -115,51 +115,6 @@ _GLOBAL(clean_dcache_range)
 	blr
 
 /*
- * Write any modified data cache blocks out to memory
- * and invalidate the corresponding instruction cache blocks.
- *
- * flush_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(flush_dcache_range)
-	li	r5,CACHE_LINE_SIZE-1
-	andc	r3,r3,r5
-	subf	r4,r3,r4
-	add	r4,r4,r5
-	srwi.	r4,r4,LG_CACHE_LINE_SIZE
-	beqlr
-	mtctr	r4
-
-	sync
-1:	dcbf	0,r3
-	addi	r3,r3,CACHE_LINE_SIZE
-	bdnz	1b
-	sync				/* wait for dcbf's to get to ram */
-	blr
-
-/*
- * Like above, but invalidate the D-cache.  This is used by the 8xx
- * to invalidate the cache so the PPC core doesn't get stale data
- * from the CPM (no cache snooping here :-).
- *
- * invalidate_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(invalidate_dcache_range)
-	li	r5,CACHE_LINE_SIZE-1
-	andc	r3,r3,r5
-	subf	r4,r3,r4
-	add	r4,r4,r5
-	srwi.	r4,r4,LG_CACHE_LINE_SIZE
-	beqlr
-	mtctr	r4
-
-	sync
-1:	dcbi	0,r3
-	addi	r3,r3,CACHE_LINE_SIZE
-	bdnz	1b
-	sync				/* wait for dcbi's to get to ram */
-	blr
-
-/*
  * Flush a particular page from the data cache to RAM.
  * Note: this is necessary because the instruction cache does *not*
  * snoop from the data cache.
diff --git a/arch/powerpc/cpu/ppc4xx/cache.S b/arch/powerpc/cpu/ppc4xx/cache.S
index 2714c2f..93e8366 100644
--- a/arch/powerpc/cpu/ppc4xx/cache.S
+++ b/arch/powerpc/cpu/ppc4xx/cache.S
@@ -74,49 +74,6 @@ _GLOBAL(clean_dcache_range)
 	blr
 
 /*
- * Write any modified data cache blocks out to memory and invalidate them.
- * Does not invalidate the corresponding instruction cache blocks.
- *
- * flush_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(flush_dcache_range)
-	li	r5,L1_CACHE_BYTES-1
-	andc	r3,r3,r5
-	subf	r4,r3,r4
-	add	r4,r4,r5
-	srwi.	r4,r4,L1_CACHE_SHIFT
-	beqlr
-	mtctr	r4
-
-1:	dcbf	0,r3
-	addi	r3,r3,L1_CACHE_BYTES
-	bdnz	1b
-	sync				/* wait for dcbst's to get to ram */
-	blr
-
-/*
- * Like above, but invalidate the D-cache.  This is used by the 8xx
- * to invalidate the cache so the PPC core doesn't get stale data
- * from the CPM (no cache snooping here :-).
- *
- * invalidate_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(invalidate_dcache_range)
-	li	r5,L1_CACHE_BYTES-1
-	andc	r3,r3,r5
-	subf	r4,r3,r4
-	add	r4,r4,r5
-	srwi.	r4,r4,L1_CACHE_SHIFT
-	beqlr
-	mtctr	r4
-
-1:	dcbi	0,r3
-	addi	r3,r3,L1_CACHE_BYTES
-	bdnz	1b
-	sync				/* wait for dcbi's to get to ram */
-	blr
-
-/*
  * 40x cores have 8K or 16K dcache and 32 byte line size.
  * 44x has a 32K dcache and 32 byte line size.
  * 8xx has 1, 2, 4, 8K variants.
diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
index 349a1c1..b96dbc6 100644
--- a/arch/powerpc/lib/ppccache.S
+++ b/arch/powerpc/lib/ppccache.S
@@ -9,6 +9,9 @@
 
 #include <config.h>
 #include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+#include <asm/cache.h>
 
 /*------------------------------------------------------------------------------- */
 /* Function:	 ppcDcbf */
@@ -54,3 +57,48 @@ ppcDcbz:
 ppcSync:
 	sync
 	blr
+
+/*
+ * Write any modified data cache blocks out to memory and invalidate them.
+ * Does not invalidate the corresponding instruction cache blocks.
+ *
+ * flush_dcache_range(unsigned long start, unsigned long stop)
+ */
+_GLOBAL(flush_dcache_range)
+	li	r5,L1_CACHE_BYTES-1
+	andc	r3,r3,r5
+	subf	r4,r3,r4
+	add	r4,r4,r5
+	srwi.	r4,r4,L1_CACHE_SHIFT
+	beqlr
+	mtctr	r4
+
+1:	dcbf	0,r3
+	addi	r3,r3,L1_CACHE_BYTES
+	bdnz	1b
+	sync				/* wait for dcbst's to get to ram */
+	blr
+
+/*
+ * Like above, but invalidate the D-cache.  This is used by the 8xx
+ * to invalidate the cache so the PPC core doesn't get stale data
+ * from the CPM (no cache snooping here :-).
+ *
+ * invalidate_dcache_range(unsigned long start, unsigned long stop)
+ */
+_GLOBAL(invalidate_dcache_range)
+	li	r5,L1_CACHE_BYTES-1
+	andc	r3,r3,r5
+	subf	r4,r3,r4
+	add	r4,r4,r5
+	srwi.	r4,r4,L1_CACHE_SHIFT
+	beqlr
+	mtctr	r4
+
+	sync
+1:	dcbi	0,r3
+	addi	r3,r3,L1_CACHE_BYTES
+	bdnz	1b
+	sync				/* wait for dcbi's to get to ram */
+	blr
+
-- 
1.8.0.1

  reply	other threads:[~2015-03-27 15:07 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-11  8:51 [U-Boot] [PATCH] autoboot.c: Add feature to stop autobooting via SHA256 encrypted password Stefan Roese
2015-03-11  8:51 ` [U-Boot] [PATCH] bootcount: Add dcache flush to bootcount_store() Stefan Roese
2015-03-11 14:39   ` Tom Rini
2015-03-13 13:48   ` [U-Boot] " Tom Rini
2015-03-13 14:34     ` Tom Rini
2015-03-15 18:30       ` Tom Rini
2015-03-16 15:57         ` York Sun
2015-03-16 17:05           ` Tom Rini
2015-03-16 17:11             ` York Sun
2015-03-16 17:22               ` Tom Rini
2015-03-17  9:00       ` Holger Brunck
2015-03-27 13:18         ` Stefan Roese
2015-03-27 13:42           ` Nitin Garg
2015-03-27 15:07             ` Valentin Longchamp [this message]
2015-03-28 18:07               ` [U-Boot] [RFC] powerpc: add 2 common dcache assembly functions Tom Rini
2015-05-05 16:35               ` [U-Boot] [U-Boot, RFC] " York Sun
2015-03-11  8:51 ` [U-Boot] [PATCH] cmd_led: Extend led command to support blinking and more leds Stefan Roese
2015-03-11 14:38   ` Tom Rini
2015-04-23 22:02   ` [U-Boot] " Tom Rini
2015-03-11  8:51 ` [U-Boot] [PATCH] misc: led: Add PCA9551 LED driver Stefan Roese
2015-03-11 14:40   ` Tom Rini
2015-03-11 14:46   ` Fabio Estevam
2015-03-11 14:36 ` [U-Boot] [PATCH] autoboot.c: Add feature to stop autobooting via SHA256 encrypted password Tom Rini
2015-03-12  8:39   ` Stefan Roese
2015-03-13  2:48   ` Simon Glass
2015-03-13  7:15     ` Stefan Roese
2015-03-23 20:28       ` Simon Glass
2015-05-05 15:06         ` Stefan Roese
2015-05-05 15:12           ` Simon Glass

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1427468852-12656-1-git-send-email-valentin.longchamp@keymile.com \
    --to=valentin.longchamp@keymile.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.