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From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: julien.grall@linaro.org, tim@xen.org,
	Ian Campbell <ian.campbell@citrix.com>,
	stefano.stabellini@eu.citrix.com
Subject: [PATCH 01/19] xen: arm: constify union hsr and struct hsr_* where possible.
Date: Tue, 31 Mar 2015 11:07:24 +0100	[thread overview]
Message-ID: <1427796462-24376-1-git-send-email-ian.campbell@citrix.com> (raw)
In-Reply-To: <1427796446.2115.34.camel@citrix.com>

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
 xen/arch/arm/traps.c |   41 +++++++++++++++++++++--------------------
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index aaa9d93..69b9513 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -447,7 +447,7 @@ static vaddr_t exception_handler64(struct cpu_user_regs *regs, vaddr_t offset)
 static void inject_undef64_exception(struct cpu_user_regs *regs, int instr_len)
 {
     vaddr_t handler;
-    union hsr esr = {
+    const union hsr esr = {
         .iss = 0,
         .len = instr_len,
         .ec = HSR_EC_UNKNOWN,
@@ -1141,7 +1141,7 @@ int do_bug_frame(struct cpu_user_regs *regs, vaddr_t pc)
 }
 
 #ifdef CONFIG_ARM_64
-static void do_trap_brk(struct cpu_user_regs *regs, union hsr hsr)
+static void do_trap_brk(struct cpu_user_regs *regs, const union hsr hsr)
 {
     /* HCR_EL2.TGE and MDCR_EL2.TDE are not set so we never receive
      * software breakpoint exception for EL1 and EL0 here.
@@ -1488,7 +1488,8 @@ static const unsigned short cc_map[16] = {
         0                       /* NV                     */
 };
 
-static int check_conditional_instr(struct cpu_user_regs *regs, union hsr hsr)
+static int check_conditional_instr(struct cpu_user_regs *regs,
+                                   const union hsr hsr)
 {
     unsigned long cpsr, cpsr_cond;
     int cond;
@@ -1533,7 +1534,7 @@ static int check_conditional_instr(struct cpu_user_regs *regs, union hsr hsr)
     return 1;
 }
 
-static void advance_pc(struct cpu_user_regs *regs, union hsr hsr)
+static void advance_pc(struct cpu_user_regs *regs, const union hsr hsr)
 {
     unsigned long itbits, cond, cpsr = regs->cpsr;
 
@@ -1574,9 +1575,9 @@ static void advance_pc(struct cpu_user_regs *regs, union hsr hsr)
 }
 
 static void do_cp15_32(struct cpu_user_regs *regs,
-                       union hsr hsr)
+                       const union hsr hsr)
 {
-    struct hsr_cp32 cp32 = hsr.cp32;
+    const struct hsr_cp32 cp32 = hsr.cp32;
     uint32_t *r = (uint32_t*)select_user_reg(regs, cp32.reg);
     struct vcpu *v = current;
 
@@ -1659,7 +1660,7 @@ static void do_cp15_32(struct cpu_user_regs *regs,
 }
 
 static void do_cp15_64(struct cpu_user_regs *regs,
-                       union hsr hsr)
+                       const union hsr hsr)
 {
     if ( !check_conditional_instr(regs, hsr) )
     {
@@ -1676,7 +1677,7 @@ static void do_cp15_64(struct cpu_user_regs *regs,
         break;
     default:
         {
-            struct hsr_cp64 cp64 = hsr.cp64;
+            const struct hsr_cp64 cp64 = hsr.cp64;
 
             gdprintk(XENLOG_ERR,
                      "%s p15, %d, r%d, r%d, cr%d @ 0x%"PRIregister"\n",
@@ -1692,9 +1693,9 @@ static void do_cp15_64(struct cpu_user_regs *regs,
     advance_pc(regs, hsr);
 }
 
-static void do_cp14_32(struct cpu_user_regs *regs, union hsr hsr)
+static void do_cp14_32(struct cpu_user_regs *regs, const union hsr hsr)
 {
-    struct hsr_cp32 cp32 = hsr.cp32;
+    const struct hsr_cp32 cp32 = hsr.cp32;
     uint32_t *r = (uint32_t *)select_user_reg(regs, cp32.reg);
     struct domain *d = current->domain;
 
@@ -1784,9 +1785,9 @@ static void do_cp14_32(struct cpu_user_regs *regs, union hsr hsr)
     advance_pc(regs, hsr);
 }
 
-static void do_cp14_dbg(struct cpu_user_regs *regs, union hsr hsr)
+static void do_cp14_dbg(struct cpu_user_regs *regs, const union hsr hsr)
 {
-    struct hsr_cp64 cp64 = hsr.cp64;
+    const struct hsr_cp64 cp64 = hsr.cp64;
 
     if ( !check_conditional_instr(regs, hsr) )
     {
@@ -1804,9 +1805,9 @@ static void do_cp14_dbg(struct cpu_user_regs *regs, union hsr hsr)
     inject_undef_exception(regs, hsr.len);
 }
 
-static void do_cp(struct cpu_user_regs *regs, union hsr hsr)
+static void do_cp(struct cpu_user_regs *regs, const union hsr hsr)
 {
-    struct hsr_cp cp = hsr.cp;
+    const struct hsr_cp cp = hsr.cp;
 
     if ( !check_conditional_instr(regs, hsr) )
     {
@@ -1821,7 +1822,7 @@ static void do_cp(struct cpu_user_regs *regs, union hsr hsr)
 
 #ifdef CONFIG_ARM_64
 static void do_sysreg(struct cpu_user_regs *regs,
-                      union hsr hsr)
+                      const union hsr hsr)
 {
     register_t *x = select_user_reg(regs, hsr.sysreg.reg);
 
@@ -1918,7 +1919,7 @@ static void do_sysreg(struct cpu_user_regs *regs,
         inject_undef64_exception(regs, hsr.len);
     default:
         {
-            struct hsr_sysreg sysreg = hsr.sysreg;
+            const struct hsr_sysreg sysreg = hsr.sysreg;
 
             gdprintk(XENLOG_ERR,
                      "%s %d, %d, c%d, c%d, %d %s x%d @ 0x%"PRIregister"\n",
@@ -1997,16 +1998,16 @@ done:
 }
 
 static void do_trap_instr_abort_guest(struct cpu_user_regs *regs,
-                                      union hsr hsr)
+                                      const union hsr hsr)
 {
     register_t addr = READ_SYSREG(FAR_EL2);
     inject_iabt_exception(regs, addr, hsr.len);
 }
 
 static void do_trap_data_abort_guest(struct cpu_user_regs *regs,
-                                     union hsr hsr)
+                                     const union hsr hsr)
 {
-    struct hsr_dabt dabt = hsr.dabt;
+    const struct hsr_dabt dabt = hsr.dabt;
     int rc;
     mmio_info_t info;
 
@@ -2066,7 +2067,7 @@ static void enter_hypervisor_head(struct cpu_user_regs *regs)
 
 asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
 {
-    union hsr hsr = { .bits = READ_SYSREG32(ESR_EL2) };
+    const union hsr hsr = { .bits = READ_SYSREG32(ESR_EL2) };
 
     enter_hypervisor_head(regs);
 
-- 
1.7.10.4

  reply	other threads:[~2015-03-31 10:07 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-31 10:07 [PATCH 00/19] xen: arm: cleanup traps.c Ian Campbell
2015-03-31 10:07 ` Ian Campbell [this message]
2015-04-02 10:44   ` [PATCH 01/19] xen: arm: constify union hsr and struct hsr_* where possible Julien Grall
2015-04-02 15:10     ` Julien Grall
2015-03-31 10:07 ` [PATCH 02/19] xen: arm: add missing break Ian Campbell
2015-04-02 15:09   ` Julien Grall
2015-04-16 16:08     ` Ian Campbell
2015-04-17  6:06       ` Julien Grall
2015-03-31 10:07 ` [PATCH 03/19] xen: arm: call inject_undef_exception directly Ian Campbell
2015-04-02 15:08   ` Julien Grall
2015-03-31 10:07 ` [PATCH 04/19] xen: arm: provide and use a handle_raz_wi helper Ian Campbell
2015-04-02 15:14   ` Julien Grall
2015-04-02 15:31     ` Ian Campbell
2015-04-02 15:45       ` Julien Grall
2015-04-02 15:50         ` Ian Campbell
2015-04-02 16:01           ` Ian Campbell
2015-04-02 16:19             ` Ian Campbell
2015-04-03 12:39               ` Julien Grall
2015-04-16 16:35                 ` Ian Campbell
2015-03-31 10:07 ` [PATCH 05/19] xen: arm: Add and use r/o+raz and w/o+wi helpers Ian Campbell
2015-04-03 12:51   ` Julien Grall
2015-04-16 16:22     ` Ian Campbell
2015-04-17  6:18       ` Julien Grall
2015-04-17 10:34         ` Ian Campbell
2015-03-31 10:07 ` [PATCH 06/19] xen: arm: add minimum exception level argument to trap handler helpers Ian Campbell
2015-04-03 12:58   ` Julien Grall
2015-04-16 16:24     ` Ian Campbell
2015-03-31 10:07 ` [PATCH 07/19] xen: arm: Annotate trap handler for HCR_EL2.{TWI, TWE, TSC} Ian Campbell
2015-04-03 13:05   ` Julien Grall
2015-04-16 16:34     ` Ian Campbell
2015-04-17  6:26       ` Julien Grall
2015-03-31 10:07 ` [PATCH 08/19] xen: arm: implement handling of ACTLR_EL1 trap Ian Campbell
2015-04-03 13:42   ` Julien Grall
2015-04-16 16:40     ` Ian Campbell
2015-03-31 10:07 ` [PATCH 09/19] xen: arm: Annotate registers trapped by HSR_EL1.TIDCP Ian Campbell
2015-04-03 13:47   ` Julien Grall
2015-03-31 10:07 ` [PATCH 10/19] xen: arm: Annotate registers trapped by CPTR_EL2.TTA Ian Campbell
2015-04-06 11:10   ` Julien Grall
2015-04-16 16:45     ` Ian Campbell
2015-03-31 10:07 ` [PATCH 11/19] xen: arm: Annotate handlers for PCTR_EL2.Tx Ian Campbell
2015-04-06 11:18   ` Julien Grall
2015-04-16 16:53     ` Ian Campbell
2015-04-17  6:31       ` Julien Grall
2015-03-31 10:07 ` [PATCH 12/19] xen: arm: Annotate the handlers for HSTR_EL2.Tx Ian Campbell
2015-04-06 11:25   ` Julien Grall
2015-03-31 10:07 ` [PATCH 13/19] xen: arm: Annotate registers trapped by MDCR_EL2.TDRA Ian Campbell
2015-04-06 13:24   ` Julien Grall
2015-04-17 11:51     ` Ian Campbell
2015-04-21  8:26       ` Julien Grall
2015-04-21  8:42         ` Ian Campbell
2015-03-31 10:07 ` [PATCH 14/19] xen: arm: Annotate registers trapped by MDCR_EL2.TDOSA Ian Campbell
2015-03-31 10:07 ` [PATCH 15/19] xen: arm: Annotate registers trapped by MDCR_EL2.TDA Ian Campbell
2015-04-06 13:41   ` Julien Grall
2015-04-17 12:08     ` Ian Campbell
2015-03-31 10:07 ` [PATCH 16/19] xen: arm: Annotate registers trapped by MDCR_EL2.TPM and TPMCR Ian Campbell
2015-03-31 10:07 ` [PATCH 17/19] xen: arm: Remove CNTPCT_EL0 trap handling Ian Campbell
2015-04-06 13:52   ` Julien Grall
2015-03-31 10:07 ` [PATCH 18/19] xen: arm: Annotate registers trapped when CNTHCTL_EL2.EL1PCEN == 0 Ian Campbell
2015-04-06 13:58   ` Julien Grall
2015-04-17 12:12     ` Ian Campbell
2015-03-31 10:07 ` [PATCH 19/19] xen: arm: Annotate source of ICC SGI register trapping Ian Campbell
2015-04-06 14:08   ` Julien Grall

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