Re: [PATCH 09/19] xen: arm: Annotate registers trapped by HSR_EL1.TIDCP

[Julien Grall <julien.grall@citrix.com>]

Hi Ian,

Subject: s/HSR/HCR/

On 31/03/2015 12:07, Ian Campbell wrote:
> This traps variety of implementation defined registers, so add a note
> to the default case of the respective handler.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>

Other than the typo in the subject:

Reviewed-by: Julien Grall <julien.grall@citrix.com>

Regards,

> ---
>   xen/arch/arm/traps.c |   16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
>
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index ca43f79..e26e673 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -1698,6 +1698,14 @@ static void do_cp15_32(struct cpu_user_regs *regs,
>            */
>           return handle_raz_wi(regs, r, cp32.read, hsr, 1);
>
> +    /*
> +     * HCR_EL2.TIDCP
> +     *
> +     * ARMv7 (DDI 0406C.b): B1.14.3
> +     * ARMv8 (DDI 0487A.d): D1-1501 Table D1-43
> +     *
> +     * And all other unknown registers.
> +     */
>       default:
>           gdprintk(XENLOG_ERR,
>                    "%s p15, %d, r%d, cr%d, cr%d, %d @ 0x%"PRIregister"\n",
> @@ -1948,6 +1956,14 @@ static void do_sysreg(struct cpu_user_regs *regs,
>           dprintk(XENLOG_WARNING,
>                   "Emulation of sysreg ICC_SGI0R_EL1/ASGI1R_EL1 not supported\n");
>           return inject_undef64_exception(regs, hsr.len);
> +
> +    /*
> +     * HCR_EL2.TIDCP
> +     *
> +     * ARMv8 (DDI 0487A.d): D1-1501 Table D1-43
> +     *
> +     * And all other unknown registers.
> +     */
>       default:
>           {
>               const struct hsr_sysreg sysreg = hsr.sysreg;
>

-- 
Julien Grall