* [U-Boot] [PATCH 1/2] ARM: Add workaround for Cortex-A9 errata 845369
@ 2015-04-01 2:17 nitin.garg at freescale.com
2015-04-01 2:17 ` [U-Boot] [PATCH 2/2] MX6: Enable ARM errata workaround for 845369 nitin.garg at freescale.com
0 siblings, 1 reply; 2+ messages in thread
From: nitin.garg at freescale.com @ 2015-04-01 2:17 UTC (permalink / raw)
To: u-boot
From: Nitin Garg <nitin.garg@freescale.com>
Under very rare timing circumstances, transition into
streaming mode might create a data corruption. Exists on
all Cortex-A9 revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
---
README | 1 +
arch/arm/cpu/armv7/start.S | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/README b/README
index 5d57eb9..13ef31a 100644
--- a/README
+++ b/README
@@ -683,6 +683,7 @@ The following options need to be configured:
CONFIG_ARM_ERRATA_751472
CONFIG_ARM_ERRATA_794072
CONFIG_ARM_ERRATA_761320
+ CONFIG_ARM_ERRATA_845369
If set, the workarounds for these ARM errata are applied early
during U-Boot startup. Note that these options force the
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5ed0f45..db77adb 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -164,6 +164,11 @@ ENTRY(cpu_init_cp15)
orr r0, r0, #1 << 21 @ set bit #21
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
+#ifdef CONFIG_ARM_ERRATA_845369
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 22 @ set bit #22
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
mov r5, lr @ Store my Caller
mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR)
--
1.7.9.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH 2/2] MX6: Enable ARM errata workaround for 845369
2015-04-01 2:17 [U-Boot] [PATCH 1/2] ARM: Add workaround for Cortex-A9 errata 845369 nitin.garg at freescale.com
@ 2015-04-01 2:17 ` nitin.garg at freescale.com
0 siblings, 0 replies; 2+ messages in thread
From: nitin.garg at freescale.com @ 2015-04-01 2:17 UTC (permalink / raw)
To: u-boot
From: Nitin Garg <nitin.garg@freescale.com>
Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 845369.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
---
include/configs/mx6_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index e0528ce..8c0957a 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -21,6 +21,7 @@
#define CONFIG_ARM_ERRATA_751472
#define CONFIG_ARM_ERRATA_794072
#define CONFIG_ARM_ERRATA_761320
+#define CONFIG_ARM_ERRATA_845369
#define CONFIG_BOARD_POSTCLK_INIT
#ifndef CONFIG_SYS_L2CACHE_OFF
--
1.7.9.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2015-04-01 2:17 [U-Boot] [PATCH 1/2] ARM: Add workaround for Cortex-A9 errata 845369 nitin.garg at freescale.com
2015-04-01 2:17 ` [U-Boot] [PATCH 2/2] MX6: Enable ARM errata workaround for 845369 nitin.garg at freescale.com
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