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From: Nadav Amit <namit@cs.technion.ac.il>
To: pbonzini@redhat.com
Cc: kvm@vger.kernel.org, Nadav Amit <namit@cs.technion.ac.il>
Subject: [PATCH v2 4/4] KVM: x86: Clear CR2 on VCPU reset
Date: Thu,  2 Apr 2015 03:10:38 +0300	[thread overview]
Message-ID: <1427933438-12782-5-git-send-email-namit@cs.technion.ac.il> (raw)
In-Reply-To: <1427933438-12782-1-git-send-email-namit@cs.technion.ac.il>

CR2 is not cleared as it should after reset.  See Intel SDM table named "IA-32
Processor States Following Power-up, Reset, or INIT".

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
---
 arch/x86/kvm/x86.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index e4ac17e..8fdad04 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7117,6 +7117,8 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
 	vcpu->arch.dr7 = DR7_FIXED_1;
 	kvm_update_dr7(vcpu);
 
+	vcpu->arch.cr2 = 0;
+
 	kvm_make_request(KVM_REQ_EVENT, vcpu);
 	vcpu->arch.apf.msr_val = 0;
 	vcpu->arch.st.msr_val = 0;
-- 
1.9.1


  parent reply	other threads:[~2015-04-02  0:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-02  0:10 [PATCH v2 0/4] KVM: x86: Reset fixes Nadav Amit
2015-04-02  0:10 ` [PATCH v2 1/4] KVM: x86: INIT and reset sequences are different Nadav Amit
2015-04-02  2:17   ` Bandan Das
2015-04-07 13:23     ` Paolo Bonzini
2015-04-07 16:17       ` Bandan Das
2015-04-07 16:22         ` Paolo Bonzini
2015-04-07 16:35           ` Bandan Das
2015-04-07 13:23   ` Paolo Bonzini
2015-04-07 13:57   ` Paolo Bonzini
2015-04-02  0:10 ` [PATCH v2 2/4] KVM: x86: BSP in MSR_IA32_APICBASE is writable Nadav Amit
2015-04-02  0:10 ` [PATCH v2 3/4] KVM: x86: DR0-DR3 are not clear on reset Nadav Amit
2015-04-02  0:10 ` Nadav Amit [this message]
2015-04-14 10:03   ` [PATCH v2 4/4] KVM: x86: Clear CR2 on VCPU reset Wanpeng Li
2015-04-14 10:31     ` Nadav Amit
2015-04-07 14:01 ` [PATCH v2 0/4] KVM: x86: Reset fixes Paolo Bonzini

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