* [PATCH] pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable
@ 2015-04-14 18:05 Anand Moon
2015-04-15 8:34 ` Sjoerd Simons
0 siblings, 1 reply; 4+ messages in thread
From: Anand Moon @ 2015-04-14 18:05 UTC (permalink / raw)
To: Thierry Reding, Sjoerd Simons
Cc: linux-pwm, linux-kernel, linux-samsung-soc, Anand Moon
It's safe to disable the clk when we following.
pwm_config(pwm, 0, period);
pwm_disable(pwm);
And enable clk when we do following.
pwm_config(pwm, duty, period);
pwm_enable(pwm);
Tested on OdroidXU3 Board.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
drivers/pwm/pwm-samsung.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
index 3e9b583..b579753 100644
--- a/drivers/pwm/pwm-samsung.c
+++ b/drivers/pwm/pwm-samsung.c
@@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
tcon &= ~TCON_MANUALUPDATE(tcon_chan);
tcon |= TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan);
writel(tcon, our_chip->base + REG_TCON);
+ clk_prepare_enable(our_chip->base_clk);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
@@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
tcon = readl(our_chip->base + REG_TCON);
tcon &= ~TCON_AUTORELOAD(tcon_chan);
writel(tcon, our_chip->base + REG_TCON);
+ clk_disable_unprepare(our_chip->base_clk);
spin_unlock_irqrestore(&samsung_pwm_lock, flags);
}
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable
2015-04-14 18:05 [PATCH] pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable Anand Moon
@ 2015-04-15 8:34 ` Sjoerd Simons
2015-04-15 10:17 ` Anand Moon
0 siblings, 1 reply; 4+ messages in thread
From: Sjoerd Simons @ 2015-04-15 8:34 UTC (permalink / raw)
To: Anand Moon; +Cc: Thierry Reding, linux-pwm, linux-kernel, linux-samsung-soc
On Wed, 2015-04-15 at 03:35 +0930, Anand Moon wrote:
> diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
> index 3e9b583..b579753 100644
> --- a/drivers/pwm/pwm-samsung.c
> +++ b/drivers/pwm/pwm-samsung.c
> @@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
> tcon &= ~TCON_MANUALUPDATE(tcon_chan);
> tcon |= TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan);
> writel(tcon, our_chip->base + REG_TCON);
> + clk_prepare_enable(our_chip->base_clk);
>
> spin_unlock_irqrestore(&samsung_pwm_lock, flags);
>
> @@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
> tcon = readl(our_chip->base + REG_TCON);
> tcon &= ~TCON_AUTORELOAD(tcon_chan);
> writel(tcon, our_chip->base + REG_TCON);
> + clk_disable_unprepare(our_chip->base_clk);
>
> spin_unlock_irqrestore(&samsung_pwm_lock, flags);
> }
As far as i can tell this code doesn't have any effect.
clk_enable is refcounted, so the clock will stay enabled for as long as
the driver is loaded (as it's enabled in _probe). Your code above just
raises and lowers the clocks enabled refcount, but won't actually ever
cause it to be disabled.
With respect to trying to disabling the clocks on pwm_disable, that will
need some more work to ensure the output signal has the expected level
when you turn of the clock. Specifically, when disabling from a non-100%
duty state the driver relies on the PWM turning the output signal low at
the end of a duty cycle. However if you turn off the clock at the start
of a duty cycle while the output signal is still high it will
unexpectedly remain high.
--
Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Collabora Ltd.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable
2015-04-15 8:34 ` Sjoerd Simons
@ 2015-04-15 10:17 ` Anand Moon
0 siblings, 0 replies; 4+ messages in thread
From: Anand Moon @ 2015-04-15 10:17 UTC (permalink / raw)
To: Sjoerd Simons; +Cc: Thierry Reding, linux-pwm, linux-kernel, linux-samsung-soc
hi Sjoerd,
Are you referring to handle of polarity
(PWM_POLARITY_NORMAL/PWM_POLARITY_INVERSED) during enable and disable.
How can I analyses if the clock is high and low.
-Anand Moon
On 15 April 2015 at 14:04, Sjoerd Simons <sjoerd.simons@collabora.co.uk> wrote:
> On Wed, 2015-04-15 at 03:35 +0930, Anand Moon wrote:
>> diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
>> index 3e9b583..b579753 100644
>> --- a/drivers/pwm/pwm-samsung.c
>> +++ b/drivers/pwm/pwm-samsung.c
>> @@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
>> tcon &= ~TCON_MANUALUPDATE(tcon_chan);
>> tcon |= TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan);
>> writel(tcon, our_chip->base + REG_TCON);
>> + clk_prepare_enable(our_chip->base_clk);
>>
>> spin_unlock_irqrestore(&samsung_pwm_lock, flags);
>>
>> @@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
>> tcon = readl(our_chip->base + REG_TCON);
>> tcon &= ~TCON_AUTORELOAD(tcon_chan);
>> writel(tcon, our_chip->base + REG_TCON);
>> + clk_disable_unprepare(our_chip->base_clk);
>>
>> spin_unlock_irqrestore(&samsung_pwm_lock, flags);
>> }
>
> As far as i can tell this code doesn't have any effect.
>
> clk_enable is refcounted, so the clock will stay enabled for as long as
> the driver is loaded (as it's enabled in _probe). Your code above just
> raises and lowers the clocks enabled refcount, but won't actually ever
> cause it to be disabled.
>
> With respect to trying to disabling the clocks on pwm_disable, that will
> need some more work to ensure the output signal has the expected level
> when you turn of the clock. Specifically, when disabling from a non-100%
> duty state the driver relies on the PWM turning the output signal low at
> the end of a duty cycle. However if you turn off the clock at the start
> of a duty cycle while the output signal is still high it will
> unexpectedly remain high.
>
>
> --
> Sjoerd Simons <sjoerd.simons@collabora.co.uk>
> Collabora Ltd.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable
@ 2015-04-15 10:17 ` Anand Moon
0 siblings, 0 replies; 4+ messages in thread
From: Anand Moon @ 2015-04-15 10:17 UTC (permalink / raw)
To: Sjoerd Simons; +Cc: Thierry Reding, linux-pwm, linux-kernel, linux-samsung-soc
hi Sjoerd,
Are you referring to handle of polarity
(PWM_POLARITY_NORMAL/PWM_POLARITY_INVERSED) during enable and disable.
How can I analyses if the clock is high and low.
-Anand Moon
On 15 April 2015 at 14:04, Sjoerd Simons <sjoerd.simons@collabora.co.uk> wrote:
> On Wed, 2015-04-15 at 03:35 +0930, Anand Moon wrote:
>> diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
>> index 3e9b583..b579753 100644
>> --- a/drivers/pwm/pwm-samsung.c
>> +++ b/drivers/pwm/pwm-samsung.c
>> @@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
>> tcon &= ~TCON_MANUALUPDATE(tcon_chan);
>> tcon |= TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan);
>> writel(tcon, our_chip->base + REG_TCON);
>> + clk_prepare_enable(our_chip->base_clk);
>>
>> spin_unlock_irqrestore(&samsung_pwm_lock, flags);
>>
>> @@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
>> tcon = readl(our_chip->base + REG_TCON);
>> tcon &= ~TCON_AUTORELOAD(tcon_chan);
>> writel(tcon, our_chip->base + REG_TCON);
>> + clk_disable_unprepare(our_chip->base_clk);
>>
>> spin_unlock_irqrestore(&samsung_pwm_lock, flags);
>> }
>
> As far as i can tell this code doesn't have any effect.
>
> clk_enable is refcounted, so the clock will stay enabled for as long as
> the driver is loaded (as it's enabled in _probe). Your code above just
> raises and lowers the clocks enabled refcount, but won't actually ever
> cause it to be disabled.
>
> With respect to trying to disabling the clocks on pwm_disable, that will
> need some more work to ensure the output signal has the expected level
> when you turn of the clock. Specifically, when disabling from a non-100%
> duty state the driver relies on the PWM turning the output signal low at
> the end of a duty cycle. However if you turn off the clock at the start
> of a duty cycle while the output signal is still high it will
> unexpectedly remain high.
>
>
> --
> Sjoerd Simons <sjoerd.simons@collabora.co.uk>
> Collabora Ltd.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2015-04-14 18:05 [PATCH] pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable Anand Moon
2015-04-15 8:34 ` Sjoerd Simons
2015-04-15 10:17 ` Anand Moon
2015-04-15 10:17 ` Anand Moon
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