[PATCH 0/2] Add initial CoreSight support for the Qualcomm 8x16 chipsets

[PATCH 0/2] Add initial CoreSight support for the Qualcomm 8x16 chipsets

[Ivan T. Ivanov]

Add initial CoreSight support for the Qualcomm 8x16 chipsets

This patch series add initial set of CoreSight components for the
8x16 chipsets.

Components will not be functional, because of missing clock controller
driver, which is under internal testing.

Patches are based on "Enable CoreSight for the Ux500 "[1] and
"Support for coresight ETMv4 tracer" [2]

[1] http://www.spinics.net/lists/arm-kernel/msg412873.html
[2] https://lwn.net/Articles/641585/

Ivan T. Ivanov (1):
  arm64: dts: qcom: Add msm8916 CoreSight components

Pratik Patel (1):
  coresight: replicator: Add Qualcomm CoreSight Replicator driver

 .../devicetree/bindings/arm/coresight.txt          |   1 +
 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi    | 244 +++++++++++++++++++++
 drivers/hwtracing/coresight/Kconfig                |   9 +
 drivers/hwtracing/coresight/Makefile               |   1 +
 .../coresight/coresight-replicator-qcom.c          | 211 ++++++++++++++++++
 5 files changed, 466 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
 create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c

--
1.9.1

[PATCH 0/2] Add initial CoreSight support for the Qualcomm 8x16 chipsets

[Ivan T. Ivanov]

Add initial CoreSight support for the Qualcomm 8x16 chipsets

This patch series add initial set of CoreSight components for the
8x16 chipsets.

Components will not be functional, because of missing clock controller
driver, which is under internal testing.

Patches are based on "Enable CoreSight for the Ux500 "[1] and
"Support for coresight ETMv4 tracer" [2]

[1] http://www.spinics.net/lists/arm-kernel/msg412873.html
[2] https://lwn.net/Articles/641585/

Ivan T. Ivanov (1):
  arm64: dts: qcom: Add msm8916 CoreSight components

Pratik Patel (1):
  coresight: replicator: Add Qualcomm CoreSight Replicator driver

 .../devicetree/bindings/arm/coresight.txt          |   1 +
 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi    | 244 +++++++++++++++++++++
 drivers/hwtracing/coresight/Kconfig                |   9 +
 drivers/hwtracing/coresight/Makefile               |   1 +
 .../coresight/coresight-replicator-qcom.c          | 211 ++++++++++++++++++
 5 files changed, 466 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
 create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c

--
1.9.1

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

From: Pratik Patel <pratikp-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

This driver manages Qualcomm CoreSight Replicator device, which
resides on the AMBA bus. Replicator has been made programmable to
allow software to turn of the replicator branch to sink that is not
being used. This avoids trace traffic to the unused/non-current sink
from causing back pressure that results in overflows at the source.

Signed-off-by: Pratik Patel <pratikp-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
 .../devicetree/bindings/arm/coresight.txt          |   1 +
 drivers/hwtracing/coresight/Kconfig                |   9 +
 drivers/hwtracing/coresight/Makefile               |   1 +
 .../coresight/coresight-replicator-qcom.c          | 211 +++++++++++++++++++++
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index f4d6a86..2314f2b 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -18,6 +18,7 @@ its hardware characteristcs.
 		- "arm,coresight-funnel", "arm,primecell";
 		- "arm,coresight-etm3x", "arm,primecell";
 		- "arm,coresight-etm4x", "arm,primecell";
+		- "qcom,coresight-replicator", "arm,primecell";

 	* reg: physical base address and length of the register
 	  set(s) of the component.
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 6b331d4..165b681 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
 	  instructions that a processor is executing. This is primarily useful
 	  for instruction level tracing. Depending on the implemented version
 	  data tracing may also be available.
+
+config CORESIGHT_QCOM_REPLICATOR
+	bool "Qualcomm CoreSight Replicator driver"
+	help
+	  This enables support for CoreSight link and sink driver that are
+	  responsible for transporting and collecting the trace data
+	  respectively. Link and sinks are dynamically aggregated with a trace
+	  entity at run time to form a complete trace path.
+
 endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 0af28d4..99f8e5f 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
 					   coresight-replicator.o
 obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
 obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o
+obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
new file mode 100644
index 0000000..961f389
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/clk.h>
+#include <linux/coresight.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+
+#include "coresight-priv.h"
+
+#define REPLICATOR_IDFILTER0		0x000
+#define REPLICATOR_IDFILTER1		0x004
+
+/**
+ * struct replicator_state - specifics associated to a replicator component
+ * @base:	memory mapped base address for this component.
+ * @dev:	the device entity associated with this component
+ * @atclk:	optional clock for the core parts of the replicator.
+ * @csdev:	component vitals needed by the framework
+ */
+struct replicator_state {
+	void __iomem		*base;
+	struct device		*dev;
+	struct clk		*atclk;
+	struct coresight_device	*csdev;
+};
+
+static int replicator_enable(struct coresight_device *csdev, int inport,
+			     int outport)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	pm_runtime_get_sync(drvdata->dev);
+
+	CS_UNLOCK(drvdata->base);
+
+	if (outport == 0) {
+		writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0);
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
+	} else {
+		writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1);
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
+	}
+
+	CS_LOCK(drvdata->base);
+
+	dev_info(drvdata->dev, "REPLICATOR enabled\n");
+	return 0;
+}
+
+static void replicator_disable(struct coresight_device *csdev, int inport,
+			       int outport)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	CS_UNLOCK(drvdata->base);
+
+	if (outport == 0)
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
+	else
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
+
+	CS_LOCK(drvdata->base);
+
+	pm_runtime_put(drvdata->dev);
+
+	dev_info(drvdata->dev, "REPLICATOR disabled\n");
+}
+
+static const struct coresight_ops_link replicator_link_ops = {
+	.enable		= replicator_enable,
+	.disable	= replicator_disable,
+};
+
+static const struct coresight_ops replicator_cs_ops = {
+	.link_ops	= &replicator_link_ops,
+};
+
+static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
+{
+	int ret;
+	struct device *dev = &adev->dev;
+	struct resource *res = &adev->res;
+	struct coresight_platform_data *pdata = NULL;
+	struct replicator_state *drvdata;
+	struct coresight_desc *desc;
+	struct device_node *np = adev->dev.of_node;
+	void __iomem *base;
+
+	if (np) {
+		pdata = of_get_coresight_platform_data(dev, np);
+		if (IS_ERR(pdata))
+			return PTR_ERR(pdata);
+		adev->dev.platform_data = pdata;
+	}
+
+	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+	if (!drvdata)
+		return -ENOMEM;
+
+	drvdata->dev = &adev->dev;
+	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
+	if (!IS_ERR(drvdata->atclk)) {
+		ret = clk_prepare_enable(drvdata->atclk);
+		if (ret)
+			return ret;
+	}
+
+	/* Validity for the resource is already checked by the AMBA core */
+	base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	drvdata->base = base;
+	dev_set_drvdata(dev, drvdata);
+	pm_runtime_put(&adev->dev);
+
+	desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+	if (!desc)
+		return -ENOMEM;
+
+	desc->type = CORESIGHT_DEV_TYPE_LINK;
+	desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
+	desc->ops = &replicator_cs_ops;
+	desc->pdata = adev->dev.platform_data;
+	desc->dev = &adev->dev;
+	drvdata->csdev = coresight_register(desc);
+	if (IS_ERR(drvdata->csdev))
+		return PTR_ERR(drvdata->csdev);
+
+	dev_info(dev, "REPLICATOR initialized\n");
+	return 0;
+}
+
+static int replicator_remove(struct amba_device *adev)
+{
+	struct replicator_state *drvdata = amba_get_drvdata(adev);
+
+	pm_runtime_disable(&adev->dev);
+	coresight_unregister(drvdata->csdev);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int replicator_runtime_suspend(struct device *dev)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(dev);
+
+	if (drvdata && !IS_ERR(drvdata->atclk))
+		clk_disable_unprepare(drvdata->atclk);
+
+	return 0;
+}
+
+static int replicator_runtime_resume(struct device *dev)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(dev);
+
+	if (drvdata && !IS_ERR(drvdata->atclk))
+		clk_prepare_enable(drvdata->atclk);
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops replicator_dev_pm_ops = {
+	SET_RUNTIME_PM_OPS(replicator_runtime_suspend,
+			   replicator_runtime_resume, NULL)
+};
+
+static struct amba_id replicator_ids[] = {
+	{
+		.id     = 0x0003b909,
+		.mask   = 0x0003ffff,
+	},
+	{ 0, 0},
+};
+
+static struct amba_driver replicator_driver = {
+	.drv = {
+		.name	= "coresight-replicator-qcom",
+		.owner	= THIS_MODULE,
+		.pm	= &replicator_dev_pm_ops,
+	},
+	.probe		= replicator_probe,
+	.remove		= replicator_remove,
+	.id_table	= replicator_ids,
+};
+
+module_amba_driver(replicator_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");
--
1.9.1

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[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

From: Pratik Patel <pratikp@codeaurora.org>

This driver manages Qualcomm CoreSight Replicator device, which
resides on the AMBA bus. Replicator has been made programmable to
allow software to turn of the replicator branch to sink that is not
being used. This avoids trace traffic to the unused/non-current sink
from causing back pressure that results in overflows at the source.

Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
---
 .../devicetree/bindings/arm/coresight.txt          |   1 +
 drivers/hwtracing/coresight/Kconfig                |   9 +
 drivers/hwtracing/coresight/Makefile               |   1 +
 .../coresight/coresight-replicator-qcom.c          | 211 +++++++++++++++++++++
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index f4d6a86..2314f2b 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -18,6 +18,7 @@ its hardware characteristcs.
 		- "arm,coresight-funnel", "arm,primecell";
 		- "arm,coresight-etm3x", "arm,primecell";
 		- "arm,coresight-etm4x", "arm,primecell";
+		- "qcom,coresight-replicator", "arm,primecell";

 	* reg: physical base address and length of the register
 	  set(s) of the component.
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 6b331d4..165b681 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
 	  instructions that a processor is executing. This is primarily useful
 	  for instruction level tracing. Depending on the implemented version
 	  data tracing may also be available.
+
+config CORESIGHT_QCOM_REPLICATOR
+	bool "Qualcomm CoreSight Replicator driver"
+	help
+	  This enables support for CoreSight link and sink driver that are
+	  responsible for transporting and collecting the trace data
+	  respectively. Link and sinks are dynamically aggregated with a trace
+	  entity at run time to form a complete trace path.
+
 endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 0af28d4..99f8e5f 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
 					   coresight-replicator.o
 obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
 obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o
+obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
new file mode 100644
index 0000000..961f389
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/clk.h>
+#include <linux/coresight.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+
+#include "coresight-priv.h"
+
+#define REPLICATOR_IDFILTER0		0x000
+#define REPLICATOR_IDFILTER1		0x004
+
+/**
+ * struct replicator_state - specifics associated to a replicator component
+ * @base:	memory mapped base address for this component.
+ * @dev:	the device entity associated with this component
+ * @atclk:	optional clock for the core parts of the replicator.
+ * @csdev:	component vitals needed by the framework
+ */
+struct replicator_state {
+	void __iomem		*base;
+	struct device		*dev;
+	struct clk		*atclk;
+	struct coresight_device	*csdev;
+};
+
+static int replicator_enable(struct coresight_device *csdev, int inport,
+			     int outport)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	pm_runtime_get_sync(drvdata->dev);
+
+	CS_UNLOCK(drvdata->base);
+
+	if (outport == 0) {
+		writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0);
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
+	} else {
+		writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1);
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
+	}
+
+	CS_LOCK(drvdata->base);
+
+	dev_info(drvdata->dev, "REPLICATOR enabled\n");
+	return 0;
+}
+
+static void replicator_disable(struct coresight_device *csdev, int inport,
+			       int outport)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	CS_UNLOCK(drvdata->base);
+
+	if (outport == 0)
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
+	else
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
+
+	CS_LOCK(drvdata->base);
+
+	pm_runtime_put(drvdata->dev);
+
+	dev_info(drvdata->dev, "REPLICATOR disabled\n");
+}
+
+static const struct coresight_ops_link replicator_link_ops = {
+	.enable		= replicator_enable,
+	.disable	= replicator_disable,
+};
+
+static const struct coresight_ops replicator_cs_ops = {
+	.link_ops	= &replicator_link_ops,
+};
+
+static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
+{
+	int ret;
+	struct device *dev = &adev->dev;
+	struct resource *res = &adev->res;
+	struct coresight_platform_data *pdata = NULL;
+	struct replicator_state *drvdata;
+	struct coresight_desc *desc;
+	struct device_node *np = adev->dev.of_node;
+	void __iomem *base;
+
+	if (np) {
+		pdata = of_get_coresight_platform_data(dev, np);
+		if (IS_ERR(pdata))
+			return PTR_ERR(pdata);
+		adev->dev.platform_data = pdata;
+	}
+
+	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+	if (!drvdata)
+		return -ENOMEM;
+
+	drvdata->dev = &adev->dev;
+	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
+	if (!IS_ERR(drvdata->atclk)) {
+		ret = clk_prepare_enable(drvdata->atclk);
+		if (ret)
+			return ret;
+	}
+
+	/* Validity for the resource is already checked by the AMBA core */
+	base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	drvdata->base = base;
+	dev_set_drvdata(dev, drvdata);
+	pm_runtime_put(&adev->dev);
+
+	desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+	if (!desc)
+		return -ENOMEM;
+
+	desc->type = CORESIGHT_DEV_TYPE_LINK;
+	desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
+	desc->ops = &replicator_cs_ops;
+	desc->pdata = adev->dev.platform_data;
+	desc->dev = &adev->dev;
+	drvdata->csdev = coresight_register(desc);
+	if (IS_ERR(drvdata->csdev))
+		return PTR_ERR(drvdata->csdev);
+
+	dev_info(dev, "REPLICATOR initialized\n");
+	return 0;
+}
+
+static int replicator_remove(struct amba_device *adev)
+{
+	struct replicator_state *drvdata = amba_get_drvdata(adev);
+
+	pm_runtime_disable(&adev->dev);
+	coresight_unregister(drvdata->csdev);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int replicator_runtime_suspend(struct device *dev)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(dev);
+
+	if (drvdata && !IS_ERR(drvdata->atclk))
+		clk_disable_unprepare(drvdata->atclk);
+
+	return 0;
+}
+
+static int replicator_runtime_resume(struct device *dev)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(dev);
+
+	if (drvdata && !IS_ERR(drvdata->atclk))
+		clk_prepare_enable(drvdata->atclk);
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops replicator_dev_pm_ops = {
+	SET_RUNTIME_PM_OPS(replicator_runtime_suspend,
+			   replicator_runtime_resume, NULL)
+};
+
+static struct amba_id replicator_ids[] = {
+	{
+		.id     = 0x0003b909,
+		.mask   = 0x0003ffff,
+	},
+	{ 0, 0},
+};
+
+static struct amba_driver replicator_driver = {
+	.drv = {
+		.name	= "coresight-replicator-qcom",
+		.owner	= THIS_MODULE,
+		.pm	= &replicator_dev_pm_ops,
+	},
+	.probe		= replicator_probe,
+	.remove		= replicator_remove,
+	.id_table	= replicator_ids,
+};
+
+module_amba_driver(replicator_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");
--
1.9.1

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

From: Pratik Patel <pratikp@codeaurora.org>

This driver manages Qualcomm CoreSight Replicator device, which
resides on the AMBA bus. Replicator has been made programmable to
allow software to turn of the replicator branch to sink that is not
being used. This avoids trace traffic to the unused/non-current sink
from causing back pressure that results in overflows at the source.

Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
---
 .../devicetree/bindings/arm/coresight.txt          |   1 +
 drivers/hwtracing/coresight/Kconfig                |   9 +
 drivers/hwtracing/coresight/Makefile               |   1 +
 .../coresight/coresight-replicator-qcom.c          | 211 +++++++++++++++++++++
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index f4d6a86..2314f2b 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -18,6 +18,7 @@ its hardware characteristcs.
 		- "arm,coresight-funnel", "arm,primecell";
 		- "arm,coresight-etm3x", "arm,primecell";
 		- "arm,coresight-etm4x", "arm,primecell";
+		- "qcom,coresight-replicator", "arm,primecell";

 	* reg: physical base address and length of the register
 	  set(s) of the component.
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 6b331d4..165b681 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
 	  instructions that a processor is executing. This is primarily useful
 	  for instruction level tracing. Depending on the implemented version
 	  data tracing may also be available.
+
+config CORESIGHT_QCOM_REPLICATOR
+	bool "Qualcomm CoreSight Replicator driver"
+	help
+	  This enables support for CoreSight link and sink driver that are
+	  responsible for transporting and collecting the trace data
+	  respectively. Link and sinks are dynamically aggregated with a trace
+	  entity at run time to form a complete trace path.
+
 endif
diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
index 0af28d4..99f8e5f 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
 					   coresight-replicator.o
 obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
 obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o
+obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
new file mode 100644
index 0000000..961f389
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/amba/bus.h>
+#include <linux/clk.h>
+#include <linux/coresight.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+
+#include "coresight-priv.h"
+
+#define REPLICATOR_IDFILTER0		0x000
+#define REPLICATOR_IDFILTER1		0x004
+
+/**
+ * struct replicator_state - specifics associated to a replicator component
+ * @base:	memory mapped base address for this component.
+ * @dev:	the device entity associated with this component
+ * @atclk:	optional clock for the core parts of the replicator.
+ * @csdev:	component vitals needed by the framework
+ */
+struct replicator_state {
+	void __iomem		*base;
+	struct device		*dev;
+	struct clk		*atclk;
+	struct coresight_device	*csdev;
+};
+
+static int replicator_enable(struct coresight_device *csdev, int inport,
+			     int outport)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	pm_runtime_get_sync(drvdata->dev);
+
+	CS_UNLOCK(drvdata->base);
+
+	if (outport == 0) {
+		writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0);
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
+	} else {
+		writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1);
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
+	}
+
+	CS_LOCK(drvdata->base);
+
+	dev_info(drvdata->dev, "REPLICATOR enabled\n");
+	return 0;
+}
+
+static void replicator_disable(struct coresight_device *csdev, int inport,
+			       int outport)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	CS_UNLOCK(drvdata->base);
+
+	if (outport == 0)
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
+	else
+		writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
+
+	CS_LOCK(drvdata->base);
+
+	pm_runtime_put(drvdata->dev);
+
+	dev_info(drvdata->dev, "REPLICATOR disabled\n");
+}
+
+static const struct coresight_ops_link replicator_link_ops = {
+	.enable		= replicator_enable,
+	.disable	= replicator_disable,
+};
+
+static const struct coresight_ops replicator_cs_ops = {
+	.link_ops	= &replicator_link_ops,
+};
+
+static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
+{
+	int ret;
+	struct device *dev = &adev->dev;
+	struct resource *res = &adev->res;
+	struct coresight_platform_data *pdata = NULL;
+	struct replicator_state *drvdata;
+	struct coresight_desc *desc;
+	struct device_node *np = adev->dev.of_node;
+	void __iomem *base;
+
+	if (np) {
+		pdata = of_get_coresight_platform_data(dev, np);
+		if (IS_ERR(pdata))
+			return PTR_ERR(pdata);
+		adev->dev.platform_data = pdata;
+	}
+
+	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
+	if (!drvdata)
+		return -ENOMEM;
+
+	drvdata->dev = &adev->dev;
+	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
+	if (!IS_ERR(drvdata->atclk)) {
+		ret = clk_prepare_enable(drvdata->atclk);
+		if (ret)
+			return ret;
+	}
+
+	/* Validity for the resource is already checked by the AMBA core */
+	base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	drvdata->base = base;
+	dev_set_drvdata(dev, drvdata);
+	pm_runtime_put(&adev->dev);
+
+	desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
+	if (!desc)
+		return -ENOMEM;
+
+	desc->type = CORESIGHT_DEV_TYPE_LINK;
+	desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
+	desc->ops = &replicator_cs_ops;
+	desc->pdata = adev->dev.platform_data;
+	desc->dev = &adev->dev;
+	drvdata->csdev = coresight_register(desc);
+	if (IS_ERR(drvdata->csdev))
+		return PTR_ERR(drvdata->csdev);
+
+	dev_info(dev, "REPLICATOR initialized\n");
+	return 0;
+}
+
+static int replicator_remove(struct amba_device *adev)
+{
+	struct replicator_state *drvdata = amba_get_drvdata(adev);
+
+	pm_runtime_disable(&adev->dev);
+	coresight_unregister(drvdata->csdev);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int replicator_runtime_suspend(struct device *dev)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(dev);
+
+	if (drvdata && !IS_ERR(drvdata->atclk))
+		clk_disable_unprepare(drvdata->atclk);
+
+	return 0;
+}
+
+static int replicator_runtime_resume(struct device *dev)
+{
+	struct replicator_state *drvdata = dev_get_drvdata(dev);
+
+	if (drvdata && !IS_ERR(drvdata->atclk))
+		clk_prepare_enable(drvdata->atclk);
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops replicator_dev_pm_ops = {
+	SET_RUNTIME_PM_OPS(replicator_runtime_suspend,
+			   replicator_runtime_resume, NULL)
+};
+
+static struct amba_id replicator_ids[] = {
+	{
+		.id     = 0x0003b909,
+		.mask   = 0x0003ffff,
+	},
+	{ 0, 0},
+};
+
+static struct amba_driver replicator_driver = {
+	.drv = {
+		.name	= "coresight-replicator-qcom",
+		.owner	= THIS_MODULE,
+		.pm	= &replicator_dev_pm_ops,
+	},
+	.probe		= replicator_probe,
+	.remove		= replicator_remove,
+	.id_table	= replicator_ids,
+};
+
+module_amba_driver(replicator_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");
--
1.9.1

[PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++
 1 file changed, 244 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
new file mode 100644
index 0000000..08d8582
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
@@ -0,0 +1,244 @@
+/*
+ * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+
+	tpiu@820000 {
+		compatible = "arm,coresight-tpiu", "arm,primecell";
+		reg = <0x820000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		port {
+			tpiu_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&replicator_out1>;
+			};
+		};
+	};
+
+	funnel@821000 {
+		compatible = "arm,coresight-funnel", "arm,primecell";
+		reg = <0x821000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@4 {
+				reg = <4>;
+				funnel0_in4: endpoint {
+					slave-mode;
+					remote-endpoint = <&funnel1_out>;
+				};
+			};
+			port@8 {
+				reg = <0>;
+				funnel0_out: endpoint {
+					remote-endpoint = <&etf_in>;
+				};
+			};
+		};
+	};
+
+	replicator@824000 {
+		compatible = "qcom,coresight-replicator", "arm,primecell";
+		reg = <0x824000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				replicator_out0: endpoint {
+					remote-endpoint = <&etr_in>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				replicator_out1: endpoint {
+					remote-endpoint = <&tpiu_in>;
+				};
+			};
+			port@2 {
+				reg = <0>;
+				replicator_in: endpoint {
+					slave-mode;
+					remote-endpoint = <&etf_out>;
+				};
+			};
+		};
+	};
+
+	etf@825000 {
+		compatible = "arm,coresight-tmc", "arm,primecell";
+		reg = <0x825000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				etf_out: endpoint {
+					slave-mode;
+					remote-endpoint = <&funnel0_out>;
+				};
+			};
+			port@1 {
+				reg = <0>;
+				etf_in: endpoint {
+					remote-endpoint = <&replicator_in>;
+				};
+			};
+		};
+	};
+
+	etr@826000 {
+		compatible = "arm,coresight-tmc", "arm,primecell";
+		reg = <0x826000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		port {
+			etr_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&replicator_out0>;
+			};
+		};
+	};
+
+	funnel@841000 {	/* APSS */
+		compatible = "arm,coresight-funnel", "arm,primecell";
+		reg = <0x841000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				funnel1_in0: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm0_out>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				funnel1_in1: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm1_out>;
+				};
+			};
+			port@2 {
+				reg = <2>;
+				funnel1_in2: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm2_out>;
+				};
+			};
+			port@3 {
+				reg = <3>;
+				funnel1_in3: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm3_out>;
+				};
+			};
+			port@4 {
+				reg = <0>;
+				funnel1_out: endpoint {
+					remote-endpoint = <&funnel0_in4>;
+				};
+			};
+		};
+	};
+
+	etm@85c000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85c000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU0>;
+
+		port {
+			etm0_out: endpoint {
+				remote-endpoint = <&funnel1_in0>;
+			};
+		};
+	};
+
+	etm@85d000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85d000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU1>;
+
+		port {
+			etm1_out: endpoint {
+				remote-endpoint = <&funnel1_in1>;
+			};
+		};
+	};
+
+	etm@85e000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85e000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU2>;
+
+		port {
+			etm2_out: endpoint {
+				remote-endpoint = <&funnel1_in2>;
+			};
+		};
+	};
+
+	etm@85f000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85f000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU3>;
+
+		port {
+			etm3_out: endpoint {
+				remote-endpoint = <&funnel1_in3>;
+			};
+		};
+	};
+};
--
1.9.1

[PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++
 1 file changed, 244 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
new file mode 100644
index 0000000..08d8582
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
@@ -0,0 +1,244 @@
+/*
+ * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+
+	tpiu at 820000 {
+		compatible = "arm,coresight-tpiu", "arm,primecell";
+		reg = <0x820000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		port {
+			tpiu_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&replicator_out1>;
+			};
+		};
+	};
+
+	funnel at 821000 {
+		compatible = "arm,coresight-funnel", "arm,primecell";
+		reg = <0x821000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 4 {
+				reg = <4>;
+				funnel0_in4: endpoint {
+					slave-mode;
+					remote-endpoint = <&funnel1_out>;
+				};
+			};
+			port at 8 {
+				reg = <0>;
+				funnel0_out: endpoint {
+					remote-endpoint = <&etf_in>;
+				};
+			};
+		};
+	};
+
+	replicator at 824000 {
+		compatible = "qcom,coresight-replicator", "arm,primecell";
+		reg = <0x824000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				replicator_out0: endpoint {
+					remote-endpoint = <&etr_in>;
+				};
+			};
+			port at 1 {
+				reg = <1>;
+				replicator_out1: endpoint {
+					remote-endpoint = <&tpiu_in>;
+				};
+			};
+			port at 2 {
+				reg = <0>;
+				replicator_in: endpoint {
+					slave-mode;
+					remote-endpoint = <&etf_out>;
+				};
+			};
+		};
+	};
+
+	etf at 825000 {
+		compatible = "arm,coresight-tmc", "arm,primecell";
+		reg = <0x825000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				etf_out: endpoint {
+					slave-mode;
+					remote-endpoint = <&funnel0_out>;
+				};
+			};
+			port at 1 {
+				reg = <0>;
+				etf_in: endpoint {
+					remote-endpoint = <&replicator_in>;
+				};
+			};
+		};
+	};
+
+	etr at 826000 {
+		compatible = "arm,coresight-tmc", "arm,primecell";
+		reg = <0x826000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		port {
+			etr_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&replicator_out0>;
+			};
+		};
+	};
+
+	funnel at 841000 {	/* APSS */
+		compatible = "arm,coresight-funnel", "arm,primecell";
+		reg = <0x841000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				funnel1_in0: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm0_out>;
+				};
+			};
+			port at 1 {
+				reg = <1>;
+				funnel1_in1: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm1_out>;
+				};
+			};
+			port at 2 {
+				reg = <2>;
+				funnel1_in2: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm2_out>;
+				};
+			};
+			port at 3 {
+				reg = <3>;
+				funnel1_in3: endpoint {
+					slave-mode;
+					remote-endpoint = <&etm3_out>;
+				};
+			};
+			port at 4 {
+				reg = <0>;
+				funnel1_out: endpoint {
+					remote-endpoint = <&funnel0_in4>;
+				};
+			};
+		};
+	};
+
+	etm at 85c000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85c000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU0>;
+
+		port {
+			etm0_out: endpoint {
+				remote-endpoint = <&funnel1_in0>;
+			};
+		};
+	};
+
+	etm at 85d000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85d000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU1>;
+
+		port {
+			etm1_out: endpoint {
+				remote-endpoint = <&funnel1_in1>;
+			};
+		};
+	};
+
+	etm at 85e000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85e000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU2>;
+
+		port {
+			etm2_out: endpoint {
+				remote-endpoint = <&funnel1_in2>;
+			};
+		};
+	};
+
+	etm at 85f000 {
+		compatible = "arm,coresight-etm4x", "arm,primecell";
+		reg = <0x85f000 0x1000>;
+
+		clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+		clock-names = "apb_pclk", "atclk";
+
+		cpu = <&CPU3>;
+
+		port {
+			etm3_out: endpoint {
+				remote-endpoint = <&funnel1_in3>;
+			};
+		};
+	};
+};
--
1.9.1

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Mathieu Poirier]

On 29 April 2015 at 06:19, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
> From: Pratik Patel <pratikp@codeaurora.org>

Thanks for crediting the original author.

>
> This driver manages Qualcomm CoreSight Replicator device, which
> resides on the AMBA bus. Replicator has been made programmable to
> allow software to turn of the replicator branch to sink that is not
> being used. This avoids trace traffic to the unused/non-current sink
> from causing back pressure that results in overflows at the source.
>
> Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> ---
>  .../devicetree/bindings/arm/coresight.txt          |   1 +
>  drivers/hwtracing/coresight/Kconfig                |   9 +
>  drivers/hwtracing/coresight/Makefile               |   1 +
>  .../coresight/coresight-replicator-qcom.c          | 211 +++++++++++++++++++++
>  4 files changed, 222 insertions(+)
>  create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c
>
> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> index f4d6a86..2314f2b 100644
> --- a/Documentation/devicetree/bindings/arm/coresight.txt
> +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> @@ -18,6 +18,7 @@ its hardware characteristcs.
>                 - "arm,coresight-funnel", "arm,primecell";
>                 - "arm,coresight-etm3x", "arm,primecell";
>                 - "arm,coresight-etm4x", "arm,primecell";
> +               - "qcom,coresight-replicator", "arm,primecell";

Is there some sort of versioning information we can add like it was
done for the "coresight-etmXY" bindings?  It makes things a lot
cleaner when a new (and possibly not backward compatible) version gets
released.

>
>         * reg: physical base address and length of the register
>           set(s) of the component.
> diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> index 6b331d4..165b681 100644
> --- a/drivers/hwtracing/coresight/Kconfig
> +++ b/drivers/hwtracing/coresight/Kconfig
> @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
>           instructions that a processor is executing. This is primarily useful
>           for instruction level tracing. Depending on the implemented version
>           data tracing may also be available.
> +
> +config CORESIGHT_QCOM_REPLICATOR
> +       bool "Qualcomm CoreSight Replicator driver"
> +       help
> +         This enables support for CoreSight link and sink driver that are
> +         responsible for transporting and collecting the trace data
> +         respectively. Link and sinks are dynamically aggregated with a trace
> +         entity at run time to form a complete trace path.

The replicator is only a link entity.  It is only transporting trace
data information rather than collecting it.  Please review the
comment.  Also, can this specific version run on both V7 and V8
architecture.  If not the proper "depends" should be added.

> +
>  endif
> diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
> index 0af28d4..99f8e5f 100644
> --- a/drivers/hwtracing/coresight/Makefile
> +++ b/drivers/hwtracing/coresight/Makefile
> @@ -10,3 +10,4 @@ obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
>                                            coresight-replicator.o
>  obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
>  obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o
> +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
> diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> new file mode 100644
> index 0000000..961f389
> --- /dev/null
> +++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/amba/bus.h>
> +#include <linux/clk.h>
> +#include <linux/coresight.h>
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/slab.h>
> +
> +#include "coresight-priv.h"
> +
> +#define REPLICATOR_IDFILTER0           0x000
> +#define REPLICATOR_IDFILTER1           0x004
> +
> +/**
> + * struct replicator_state - specifics associated to a replicator component
> + * @base:      memory mapped base address for this component.
> + * @dev:       the device entity associated with this component
> + * @atclk:     optional clock for the core parts of the replicator.
> + * @csdev:     component vitals needed by the framework
> + */
> +struct replicator_state {
> +       void __iomem            *base;
> +       struct device           *dev;
> +       struct clk              *atclk;
> +       struct coresight_device *csdev;
> +};
> +
> +static int replicator_enable(struct coresight_device *csdev, int inport,
> +                            int outport)

Please use proper alignment.  "int outport" should be aligned with
"struct coresight_device *csdev".  Same comment for all the function
declarations.

> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +       pm_runtime_get_sync(drvdata->dev);
> +
> +       CS_UNLOCK(drvdata->base);
> +
> +       if (outport == 0) {
> +               writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0);
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
> +       } else {
> +               writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1);
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
> +       }

Please add comments to explain what those are doing.

> +
> +       CS_LOCK(drvdata->base);
> +
> +       dev_info(drvdata->dev, "REPLICATOR enabled\n");
> +       return 0;
> +}
> +
> +static void replicator_disable(struct coresight_device *csdev, int inport,
> +                              int outport)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +       CS_UNLOCK(drvdata->base);
> +
> +       if (outport == 0)
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
> +       else
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);

Comments please.

> +
> +       CS_LOCK(drvdata->base);
> +
> +       pm_runtime_put(drvdata->dev);
> +
> +       dev_info(drvdata->dev, "REPLICATOR disabled\n");
> +}
> +
> +static const struct coresight_ops_link replicator_link_ops = {
> +       .enable         = replicator_enable,
> +       .disable        = replicator_disable,
> +};
> +
> +static const struct coresight_ops replicator_cs_ops = {
> +       .link_ops       = &replicator_link_ops,
> +};
> +
> +static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
> +{
> +       int ret;
> +       struct device *dev = &adev->dev;
> +       struct resource *res = &adev->res;
> +       struct coresight_platform_data *pdata = NULL;
> +       struct replicator_state *drvdata;
> +       struct coresight_desc *desc;
> +       struct device_node *np = adev->dev.of_node;
> +       void __iomem *base;
> +
> +       if (np) {
> +               pdata = of_get_coresight_platform_data(dev, np);
> +               if (IS_ERR(pdata))
> +                       return PTR_ERR(pdata);
> +               adev->dev.platform_data = pdata;
> +       }
> +
> +       drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
> +       if (!drvdata)
> +               return -ENOMEM;
> +
> +       drvdata->dev = &adev->dev;
> +       drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
> +       if (!IS_ERR(drvdata->atclk)) {
> +               ret = clk_prepare_enable(drvdata->atclk);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       /* Validity for the resource is already checked by the AMBA core */
> +       base = devm_ioremap_resource(dev, res);
> +       if (IS_ERR(base))
> +               return PTR_ERR(base);
> +
> +       drvdata->base = base;
> +       dev_set_drvdata(dev, drvdata);
> +       pm_runtime_put(&adev->dev);
> +
> +       desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
> +       if (!desc)
> +               return -ENOMEM;
> +
> +       desc->type = CORESIGHT_DEV_TYPE_LINK;
> +       desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
> +       desc->ops = &replicator_cs_ops;
> +       desc->pdata = adev->dev.platform_data;
> +       desc->dev = &adev->dev;
> +       drvdata->csdev = coresight_register(desc);
> +       if (IS_ERR(drvdata->csdev))
> +               return PTR_ERR(drvdata->csdev);
> +
> +       dev_info(dev, "REPLICATOR initialized\n");

Please replace with "dev_info(dev, "%s initialized\n", (char
*)id->data);" and add the required .data information to the amba_id
cells as found in the official coresight "next" branch.

[1]. https://git.linaro.org/kernel/coresight.git/ next

> +       return 0;
> +}
> +
> +static int replicator_remove(struct amba_device *adev)
> +{
> +       struct replicator_state *drvdata = amba_get_drvdata(adev);
> +
> +       pm_runtime_disable(&adev->dev);
> +       coresight_unregister(drvdata->csdev);
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int replicator_runtime_suspend(struct device *dev)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(dev);
> +
> +       if (drvdata && !IS_ERR(drvdata->atclk))
> +               clk_disable_unprepare(drvdata->atclk);
> +
> +       return 0;
> +}
> +
> +static int replicator_runtime_resume(struct device *dev)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(dev);
> +
> +       if (drvdata && !IS_ERR(drvdata->atclk))
> +               clk_prepare_enable(drvdata->atclk);
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct dev_pm_ops replicator_dev_pm_ops = {
> +       SET_RUNTIME_PM_OPS(replicator_runtime_suspend,
> +                          replicator_runtime_resume, NULL)

Proper alignment please.

> +};
> +
> +static struct amba_id replicator_ids[] = {
> +       {
> +               .id     = 0x0003b909,
> +               .mask   = 0x0003ffff,
> +       },

Please add the ".data" field.  See comment above.

> +       { 0, 0},
> +};
> +
> +static struct amba_driver replicator_driver = {
> +       .drv = {
> +               .name   = "coresight-replicator-qcom",
> +               .owner  = THIS_MODULE,
> +               .pm     = &replicator_dev_pm_ops,
> +       },
> +       .probe          = replicator_probe,
> +       .remove         = replicator_remove,
> +       .id_table       = replicator_ids,
> +};
> +
> +module_amba_driver(replicator_driver);
> +
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");
> --
> 1.9.1
>

Thanks for the submission.
Mathieu

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Mathieu Poirier]

On 29 April 2015 at 06:19, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
> From: Pratik Patel <pratikp@codeaurora.org>

Thanks for crediting the original author.

>
> This driver manages Qualcomm CoreSight Replicator device, which
> resides on the AMBA bus. Replicator has been made programmable to
> allow software to turn of the replicator branch to sink that is not
> being used. This avoids trace traffic to the unused/non-current sink
> from causing back pressure that results in overflows at the source.
>
> Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> ---
>  .../devicetree/bindings/arm/coresight.txt          |   1 +
>  drivers/hwtracing/coresight/Kconfig                |   9 +
>  drivers/hwtracing/coresight/Makefile               |   1 +
>  .../coresight/coresight-replicator-qcom.c          | 211 +++++++++++++++++++++
>  4 files changed, 222 insertions(+)
>  create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c
>
> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> index f4d6a86..2314f2b 100644
> --- a/Documentation/devicetree/bindings/arm/coresight.txt
> +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> @@ -18,6 +18,7 @@ its hardware characteristcs.
>                 - "arm,coresight-funnel", "arm,primecell";
>                 - "arm,coresight-etm3x", "arm,primecell";
>                 - "arm,coresight-etm4x", "arm,primecell";
> +               - "qcom,coresight-replicator", "arm,primecell";

Is there some sort of versioning information we can add like it was
done for the "coresight-etmXY" bindings?  It makes things a lot
cleaner when a new (and possibly not backward compatible) version gets
released.

>
>         * reg: physical base address and length of the register
>           set(s) of the component.
> diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> index 6b331d4..165b681 100644
> --- a/drivers/hwtracing/coresight/Kconfig
> +++ b/drivers/hwtracing/coresight/Kconfig
> @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
>           instructions that a processor is executing. This is primarily useful
>           for instruction level tracing. Depending on the implemented version
>           data tracing may also be available.
> +
> +config CORESIGHT_QCOM_REPLICATOR
> +       bool "Qualcomm CoreSight Replicator driver"
> +       help
> +         This enables support for CoreSight link and sink driver that are
> +         responsible for transporting and collecting the trace data
> +         respectively. Link and sinks are dynamically aggregated with a trace
> +         entity at run time to form a complete trace path.

The replicator is only a link entity.  It is only transporting trace
data information rather than collecting it.  Please review the
comment.  Also, can this specific version run on both V7 and V8
architecture.  If not the proper "depends" should be added.

> +
>  endif
> diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
> index 0af28d4..99f8e5f 100644
> --- a/drivers/hwtracing/coresight/Makefile
> +++ b/drivers/hwtracing/coresight/Makefile
> @@ -10,3 +10,4 @@ obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
>                                            coresight-replicator.o
>  obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
>  obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o
> +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
> diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> new file mode 100644
> index 0000000..961f389
> --- /dev/null
> +++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/amba/bus.h>
> +#include <linux/clk.h>
> +#include <linux/coresight.h>
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/slab.h>
> +
> +#include "coresight-priv.h"
> +
> +#define REPLICATOR_IDFILTER0           0x000
> +#define REPLICATOR_IDFILTER1           0x004
> +
> +/**
> + * struct replicator_state - specifics associated to a replicator component
> + * @base:      memory mapped base address for this component.
> + * @dev:       the device entity associated with this component
> + * @atclk:     optional clock for the core parts of the replicator.
> + * @csdev:     component vitals needed by the framework
> + */
> +struct replicator_state {
> +       void __iomem            *base;
> +       struct device           *dev;
> +       struct clk              *atclk;
> +       struct coresight_device *csdev;
> +};
> +
> +static int replicator_enable(struct coresight_device *csdev, int inport,
> +                            int outport)

Please use proper alignment.  "int outport" should be aligned with
"struct coresight_device *csdev".  Same comment for all the function
declarations.

> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +       pm_runtime_get_sync(drvdata->dev);
> +
> +       CS_UNLOCK(drvdata->base);
> +
> +       if (outport == 0) {
> +               writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0);
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
> +       } else {
> +               writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1);
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
> +       }

Please add comments to explain what those are doing.

> +
> +       CS_LOCK(drvdata->base);
> +
> +       dev_info(drvdata->dev, "REPLICATOR enabled\n");
> +       return 0;
> +}
> +
> +static void replicator_disable(struct coresight_device *csdev, int inport,
> +                              int outport)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +       CS_UNLOCK(drvdata->base);
> +
> +       if (outport == 0)
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
> +       else
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);

Comments please.

> +
> +       CS_LOCK(drvdata->base);
> +
> +       pm_runtime_put(drvdata->dev);
> +
> +       dev_info(drvdata->dev, "REPLICATOR disabled\n");
> +}
> +
> +static const struct coresight_ops_link replicator_link_ops = {
> +       .enable         = replicator_enable,
> +       .disable        = replicator_disable,
> +};
> +
> +static const struct coresight_ops replicator_cs_ops = {
> +       .link_ops       = &replicator_link_ops,
> +};
> +
> +static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
> +{
> +       int ret;
> +       struct device *dev = &adev->dev;
> +       struct resource *res = &adev->res;
> +       struct coresight_platform_data *pdata = NULL;
> +       struct replicator_state *drvdata;
> +       struct coresight_desc *desc;
> +       struct device_node *np = adev->dev.of_node;
> +       void __iomem *base;
> +
> +       if (np) {
> +               pdata = of_get_coresight_platform_data(dev, np);
> +               if (IS_ERR(pdata))
> +                       return PTR_ERR(pdata);
> +               adev->dev.platform_data = pdata;
> +       }
> +
> +       drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
> +       if (!drvdata)
> +               return -ENOMEM;
> +
> +       drvdata->dev = &adev->dev;
> +       drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
> +       if (!IS_ERR(drvdata->atclk)) {
> +               ret = clk_prepare_enable(drvdata->atclk);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       /* Validity for the resource is already checked by the AMBA core */
> +       base = devm_ioremap_resource(dev, res);
> +       if (IS_ERR(base))
> +               return PTR_ERR(base);
> +
> +       drvdata->base = base;
> +       dev_set_drvdata(dev, drvdata);
> +       pm_runtime_put(&adev->dev);
> +
> +       desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
> +       if (!desc)
> +               return -ENOMEM;
> +
> +       desc->type = CORESIGHT_DEV_TYPE_LINK;
> +       desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
> +       desc->ops = &replicator_cs_ops;
> +       desc->pdata = adev->dev.platform_data;
> +       desc->dev = &adev->dev;
> +       drvdata->csdev = coresight_register(desc);
> +       if (IS_ERR(drvdata->csdev))
> +               return PTR_ERR(drvdata->csdev);
> +
> +       dev_info(dev, "REPLICATOR initialized\n");

Please replace with "dev_info(dev, "%s initialized\n", (char
*)id->data);" and add the required .data information to the amba_id
cells as found in the official coresight "next" branch.

[1]. https://git.linaro.org/kernel/coresight.git/ next

> +       return 0;
> +}
> +
> +static int replicator_remove(struct amba_device *adev)
> +{
> +       struct replicator_state *drvdata = amba_get_drvdata(adev);
> +
> +       pm_runtime_disable(&adev->dev);
> +       coresight_unregister(drvdata->csdev);
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int replicator_runtime_suspend(struct device *dev)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(dev);
> +
> +       if (drvdata && !IS_ERR(drvdata->atclk))
> +               clk_disable_unprepare(drvdata->atclk);
> +
> +       return 0;
> +}
> +
> +static int replicator_runtime_resume(struct device *dev)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(dev);
> +
> +       if (drvdata && !IS_ERR(drvdata->atclk))
> +               clk_prepare_enable(drvdata->atclk);
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct dev_pm_ops replicator_dev_pm_ops = {
> +       SET_RUNTIME_PM_OPS(replicator_runtime_suspend,
> +                          replicator_runtime_resume, NULL)

Proper alignment please.

> +};
> +
> +static struct amba_id replicator_ids[] = {
> +       {
> +               .id     = 0x0003b909,
> +               .mask   = 0x0003ffff,
> +       },

Please add the ".data" field.  See comment above.

> +       { 0, 0},
> +};
> +
> +static struct amba_driver replicator_driver = {
> +       .drv = {
> +               .name   = "coresight-replicator-qcom",
> +               .owner  = THIS_MODULE,
> +               .pm     = &replicator_dev_pm_ops,
> +       },
> +       .probe          = replicator_probe,
> +       .remove         = replicator_remove,
> +       .id_table       = replicator_ids,
> +};
> +
> +module_amba_driver(replicator_driver);
> +
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");
> --
> 1.9.1
>

Thanks for the submission.
Mathieu

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Mathieu Poirier]

On 29 April 2015 at 06:19, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
> From: Pratik Patel <pratikp@codeaurora.org>

Thanks for crediting the original author.

>
> This driver manages Qualcomm CoreSight Replicator device, which
> resides on the AMBA bus. Replicator has been made programmable to
> allow software to turn of the replicator branch to sink that is not
> being used. This avoids trace traffic to the unused/non-current sink
> from causing back pressure that results in overflows at the source.
>
> Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> ---
>  .../devicetree/bindings/arm/coresight.txt          |   1 +
>  drivers/hwtracing/coresight/Kconfig                |   9 +
>  drivers/hwtracing/coresight/Makefile               |   1 +
>  .../coresight/coresight-replicator-qcom.c          | 211 +++++++++++++++++++++
>  4 files changed, 222 insertions(+)
>  create mode 100644 drivers/hwtracing/coresight/coresight-replicator-qcom.c
>
> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> index f4d6a86..2314f2b 100644
> --- a/Documentation/devicetree/bindings/arm/coresight.txt
> +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> @@ -18,6 +18,7 @@ its hardware characteristcs.
>                 - "arm,coresight-funnel", "arm,primecell";
>                 - "arm,coresight-etm3x", "arm,primecell";
>                 - "arm,coresight-etm4x", "arm,primecell";
> +               - "qcom,coresight-replicator", "arm,primecell";

Is there some sort of versioning information we can add like it was
done for the "coresight-etmXY" bindings?  It makes things a lot
cleaner when a new (and possibly not backward compatible) version gets
released.

>
>         * reg: physical base address and length of the register
>           set(s) of the component.
> diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> index 6b331d4..165b681 100644
> --- a/drivers/hwtracing/coresight/Kconfig
> +++ b/drivers/hwtracing/coresight/Kconfig
> @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
>           instructions that a processor is executing. This is primarily useful
>           for instruction level tracing. Depending on the implemented version
>           data tracing may also be available.
> +
> +config CORESIGHT_QCOM_REPLICATOR
> +       bool "Qualcomm CoreSight Replicator driver"
> +       help
> +         This enables support for CoreSight link and sink driver that are
> +         responsible for transporting and collecting the trace data
> +         respectively. Link and sinks are dynamically aggregated with a trace
> +         entity at run time to form a complete trace path.

The replicator is only a link entity.  It is only transporting trace
data information rather than collecting it.  Please review the
comment.  Also, can this specific version run on both V7 and V8
architecture.  If not the proper "depends" should be added.

> +
>  endif
> diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
> index 0af28d4..99f8e5f 100644
> --- a/drivers/hwtracing/coresight/Makefile
> +++ b/drivers/hwtracing/coresight/Makefile
> @@ -10,3 +10,4 @@ obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
>                                            coresight-replicator.o
>  obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
>  obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o
> +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
> diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> new file mode 100644
> index 0000000..961f389
> --- /dev/null
> +++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/amba/bus.h>
> +#include <linux/clk.h>
> +#include <linux/coresight.h>
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/slab.h>
> +
> +#include "coresight-priv.h"
> +
> +#define REPLICATOR_IDFILTER0           0x000
> +#define REPLICATOR_IDFILTER1           0x004
> +
> +/**
> + * struct replicator_state - specifics associated to a replicator component
> + * @base:      memory mapped base address for this component.
> + * @dev:       the device entity associated with this component
> + * @atclk:     optional clock for the core parts of the replicator.
> + * @csdev:     component vitals needed by the framework
> + */
> +struct replicator_state {
> +       void __iomem            *base;
> +       struct device           *dev;
> +       struct clk              *atclk;
> +       struct coresight_device *csdev;
> +};
> +
> +static int replicator_enable(struct coresight_device *csdev, int inport,
> +                            int outport)

Please use proper alignment.  "int outport" should be aligned with
"struct coresight_device *csdev".  Same comment for all the function
declarations.

> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +       pm_runtime_get_sync(drvdata->dev);
> +
> +       CS_UNLOCK(drvdata->base);
> +
> +       if (outport == 0) {
> +               writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER0);
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);
> +       } else {
> +               writel_relaxed(0x00, drvdata->base + REPLICATOR_IDFILTER1);
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
> +       }

Please add comments to explain what those are doing.

> +
> +       CS_LOCK(drvdata->base);
> +
> +       dev_info(drvdata->dev, "REPLICATOR enabled\n");
> +       return 0;
> +}
> +
> +static void replicator_disable(struct coresight_device *csdev, int inport,
> +                              int outport)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent);
> +
> +       CS_UNLOCK(drvdata->base);
> +
> +       if (outport == 0)
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER0);
> +       else
> +               writel_relaxed(0xff, drvdata->base + REPLICATOR_IDFILTER1);

Comments please.

> +
> +       CS_LOCK(drvdata->base);
> +
> +       pm_runtime_put(drvdata->dev);
> +
> +       dev_info(drvdata->dev, "REPLICATOR disabled\n");
> +}
> +
> +static const struct coresight_ops_link replicator_link_ops = {
> +       .enable         = replicator_enable,
> +       .disable        = replicator_disable,
> +};
> +
> +static const struct coresight_ops replicator_cs_ops = {
> +       .link_ops       = &replicator_link_ops,
> +};
> +
> +static int replicator_probe(struct amba_device *adev, const struct amba_id *id)
> +{
> +       int ret;
> +       struct device *dev = &adev->dev;
> +       struct resource *res = &adev->res;
> +       struct coresight_platform_data *pdata = NULL;
> +       struct replicator_state *drvdata;
> +       struct coresight_desc *desc;
> +       struct device_node *np = adev->dev.of_node;
> +       void __iomem *base;
> +
> +       if (np) {
> +               pdata = of_get_coresight_platform_data(dev, np);
> +               if (IS_ERR(pdata))
> +                       return PTR_ERR(pdata);
> +               adev->dev.platform_data = pdata;
> +       }
> +
> +       drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
> +       if (!drvdata)
> +               return -ENOMEM;
> +
> +       drvdata->dev = &adev->dev;
> +       drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
> +       if (!IS_ERR(drvdata->atclk)) {
> +               ret = clk_prepare_enable(drvdata->atclk);
> +               if (ret)
> +                       return ret;
> +       }
> +
> +       /* Validity for the resource is already checked by the AMBA core */
> +       base = devm_ioremap_resource(dev, res);
> +       if (IS_ERR(base))
> +               return PTR_ERR(base);
> +
> +       drvdata->base = base;
> +       dev_set_drvdata(dev, drvdata);
> +       pm_runtime_put(&adev->dev);
> +
> +       desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
> +       if (!desc)
> +               return -ENOMEM;
> +
> +       desc->type = CORESIGHT_DEV_TYPE_LINK;
> +       desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT;
> +       desc->ops = &replicator_cs_ops;
> +       desc->pdata = adev->dev.platform_data;
> +       desc->dev = &adev->dev;
> +       drvdata->csdev = coresight_register(desc);
> +       if (IS_ERR(drvdata->csdev))
> +               return PTR_ERR(drvdata->csdev);
> +
> +       dev_info(dev, "REPLICATOR initialized\n");

Please replace with "dev_info(dev, "%s initialized\n", (char
*)id->data);" and add the required .data information to the amba_id
cells as found in the official coresight "next" branch.

[1]. https://git.linaro.org/kernel/coresight.git/ next

> +       return 0;
> +}
> +
> +static int replicator_remove(struct amba_device *adev)
> +{
> +       struct replicator_state *drvdata = amba_get_drvdata(adev);
> +
> +       pm_runtime_disable(&adev->dev);
> +       coresight_unregister(drvdata->csdev);
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int replicator_runtime_suspend(struct device *dev)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(dev);
> +
> +       if (drvdata && !IS_ERR(drvdata->atclk))
> +               clk_disable_unprepare(drvdata->atclk);
> +
> +       return 0;
> +}
> +
> +static int replicator_runtime_resume(struct device *dev)
> +{
> +       struct replicator_state *drvdata = dev_get_drvdata(dev);
> +
> +       if (drvdata && !IS_ERR(drvdata->atclk))
> +               clk_prepare_enable(drvdata->atclk);
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct dev_pm_ops replicator_dev_pm_ops = {
> +       SET_RUNTIME_PM_OPS(replicator_runtime_suspend,
> +                          replicator_runtime_resume, NULL)

Proper alignment please.

> +};
> +
> +static struct amba_id replicator_ids[] = {
> +       {
> +               .id     = 0x0003b909,
> +               .mask   = 0x0003ffff,
> +       },

Please add the ".data" field.  See comment above.

> +       { 0, 0},
> +};
> +
> +static struct amba_driver replicator_driver = {
> +       .drv = {
> +               .name   = "coresight-replicator-qcom",
> +               .owner  = THIS_MODULE,
> +               .pm     = &replicator_dev_pm_ops,
> +       },
> +       .probe          = replicator_probe,
> +       .remove         = replicator_remove,
> +       .id_table       = replicator_ids,
> +};
> +
> +module_amba_driver(replicator_driver);
> +
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");
> --
> 1.9.1
>

Thanks for the submission.
Mathieu

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Mathieu Poirier]

On 29 April 2015 at 06:20, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
>
> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++
>  1 file changed, 244 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
> new file mode 100644
> index 0000000..08d8582
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
> @@ -0,0 +1,244 @@
> +/*
> + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +&soc {
> +
> +       tpiu@820000 {
> +               compatible = "arm,coresight-tpiu", "arm,primecell";
> +               reg = <0x820000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               port {
> +                       tpiu_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&replicator_out1>;
> +                       };
> +               };
> +       };
> +
> +       funnel@821000 {
> +               compatible = "arm,coresight-funnel", "arm,primecell";
> +               reg = <0x821000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@4 {
> +                               reg = <4>;
> +                               funnel0_in4: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&funnel1_out>;
> +                               };
> +                       };
> +                       port@8 {
> +                               reg = <0>;
> +                               funnel0_out: endpoint {
> +                                       remote-endpoint = <&etf_in>;
> +                               };
> +                       };

Please add a comment indicating what the other ports are connected to.

> +               };
> +       };
> +
> +       replicator@824000 {
> +               compatible = "qcom,coresight-replicator", "arm,primecell";
> +               reg = <0x824000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 {
> +                               reg = <0>;
> +                               replicator_out0: endpoint {
> +                                       remote-endpoint = <&etr_in>;
> +                               };
> +                       };
> +                       port@1 {
> +                               reg = <1>;
> +                               replicator_out1: endpoint {
> +                                       remote-endpoint = <&tpiu_in>;
> +                               };
> +                       };
> +                       port@2 {
> +                               reg = <0>;
> +                               replicator_in: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etf_out>;
> +                               };
> +                       };

Same comment as with the funnel component.

> +               };
> +       };
> +
> +       etf@825000 {
> +               compatible = "arm,coresight-tmc", "arm,primecell";
> +               reg = <0x825000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 {
> +                               reg = <0>;
> +                               etf_out: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&funnel0_out>;
> +                               };
> +                       };
> +                       port@1 {
> +                               reg = <0>;
> +                               etf_in: endpoint {
> +                                       remote-endpoint = <&replicator_in>;
> +                               };
> +                       };
> +               };
> +       };
> +
> +       etr@826000 {
> +               compatible = "arm,coresight-tmc", "arm,primecell";
> +               reg = <0x826000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               port {
> +                       etr_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&replicator_out0>;
> +                       };
> +               };
> +       };
> +
> +       funnel@841000 { /* APSS */
> +               compatible = "arm,coresight-funnel", "arm,primecell";
> +               reg = <0x841000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 {
> +                               reg = <0>;
> +                               funnel1_in0: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm0_out>;
> +                               };
> +                       };
> +                       port@1 {
> +                               reg = <1>;
> +                               funnel1_in1: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm1_out>;
> +                               };
> +                       };
> +                       port@2 {
> +                               reg = <2>;
> +                               funnel1_in2: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm2_out>;
> +                               };
> +                       };
> +                       port@3 {
> +                               reg = <3>;
> +                               funnel1_in3: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm3_out>;
> +                               };
> +                       };
> +                       port@4 {
> +                               reg = <0>;
> +                               funnel1_out: endpoint {
> +                                       remote-endpoint = <&funnel0_in4>;
> +                               };
> +                       };

Same comment as with the funnel component.

> +               };
> +       };
> +
> +       etm@85c000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85c000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU0>;
> +
> +               port {
> +                       etm0_out: endpoint {
> +                               remote-endpoint = <&funnel1_in0>;
> +                       };
> +               };
> +       };
> +
> +       etm@85d000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85d000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU1>;
> +
> +               port {
> +                       etm1_out: endpoint {
> +                               remote-endpoint = <&funnel1_in1>;
> +                       };
> +               };
> +       };
> +
> +       etm@85e000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85e000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU2>;
> +
> +               port {
> +                       etm2_out: endpoint {
> +                               remote-endpoint = <&funnel1_in2>;
> +                       };
> +               };
> +       };
> +
> +       etm@85f000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85f000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU3>;
> +
> +               port {
> +                       etm3_out: endpoint {
> +                               remote-endpoint = <&funnel1_in3>;
> +                       };
> +               };
> +       };
> +};
> --
> 1.9.1
>

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Mathieu Poirier]

On 29 April 2015 at 06:20, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
>
> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++
>  1 file changed, 244 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
> new file mode 100644
> index 0000000..08d8582
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
> @@ -0,0 +1,244 @@
> +/*
> + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +&soc {
> +
> +       tpiu@820000 {
> +               compatible = "arm,coresight-tpiu", "arm,primecell";
> +               reg = <0x820000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               port {
> +                       tpiu_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&replicator_out1>;
> +                       };
> +               };
> +       };
> +
> +       funnel@821000 {
> +               compatible = "arm,coresight-funnel", "arm,primecell";
> +               reg = <0x821000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@4 {
> +                               reg = <4>;
> +                               funnel0_in4: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&funnel1_out>;
> +                               };
> +                       };
> +                       port@8 {
> +                               reg = <0>;
> +                               funnel0_out: endpoint {
> +                                       remote-endpoint = <&etf_in>;
> +                               };
> +                       };

Please add a comment indicating what the other ports are connected to.

> +               };
> +       };
> +
> +       replicator@824000 {
> +               compatible = "qcom,coresight-replicator", "arm,primecell";
> +               reg = <0x824000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 {
> +                               reg = <0>;
> +                               replicator_out0: endpoint {
> +                                       remote-endpoint = <&etr_in>;
> +                               };
> +                       };
> +                       port@1 {
> +                               reg = <1>;
> +                               replicator_out1: endpoint {
> +                                       remote-endpoint = <&tpiu_in>;
> +                               };
> +                       };
> +                       port@2 {
> +                               reg = <0>;
> +                               replicator_in: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etf_out>;
> +                               };
> +                       };

Same comment as with the funnel component.

> +               };
> +       };
> +
> +       etf@825000 {
> +               compatible = "arm,coresight-tmc", "arm,primecell";
> +               reg = <0x825000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 {
> +                               reg = <0>;
> +                               etf_out: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&funnel0_out>;
> +                               };
> +                       };
> +                       port@1 {
> +                               reg = <0>;
> +                               etf_in: endpoint {
> +                                       remote-endpoint = <&replicator_in>;
> +                               };
> +                       };
> +               };
> +       };
> +
> +       etr@826000 {
> +               compatible = "arm,coresight-tmc", "arm,primecell";
> +               reg = <0x826000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               port {
> +                       etr_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&replicator_out0>;
> +                       };
> +               };
> +       };
> +
> +       funnel@841000 { /* APSS */
> +               compatible = "arm,coresight-funnel", "arm,primecell";
> +               reg = <0x841000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port@0 {
> +                               reg = <0>;
> +                               funnel1_in0: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm0_out>;
> +                               };
> +                       };
> +                       port@1 {
> +                               reg = <1>;
> +                               funnel1_in1: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm1_out>;
> +                               };
> +                       };
> +                       port@2 {
> +                               reg = <2>;
> +                               funnel1_in2: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm2_out>;
> +                               };
> +                       };
> +                       port@3 {
> +                               reg = <3>;
> +                               funnel1_in3: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm3_out>;
> +                               };
> +                       };
> +                       port@4 {
> +                               reg = <0>;
> +                               funnel1_out: endpoint {
> +                                       remote-endpoint = <&funnel0_in4>;
> +                               };
> +                       };

Same comment as with the funnel component.

> +               };
> +       };
> +
> +       etm@85c000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85c000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU0>;
> +
> +               port {
> +                       etm0_out: endpoint {
> +                               remote-endpoint = <&funnel1_in0>;
> +                       };
> +               };
> +       };
> +
> +       etm@85d000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85d000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU1>;
> +
> +               port {
> +                       etm1_out: endpoint {
> +                               remote-endpoint = <&funnel1_in1>;
> +                       };
> +               };
> +       };
> +
> +       etm@85e000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85e000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU2>;
> +
> +               port {
> +                       etm2_out: endpoint {
> +                               remote-endpoint = <&funnel1_in2>;
> +                       };
> +               };
> +       };
> +
> +       etm@85f000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85f000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU3>;
> +
> +               port {
> +                       etm3_out: endpoint {
> +                               remote-endpoint = <&funnel1_in3>;
> +                       };
> +               };
> +       };
> +};
> --
> 1.9.1
>

[PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Mathieu Poirier]

On 29 April 2015 at 06:20, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
> Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
>
> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi | 244 ++++++++++++++++++++++++
>  1 file changed, 244 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
> new file mode 100644
> index 0000000..08d8582
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
> @@ -0,0 +1,244 @@
> +/*
> + * Copyright (c) 2013 - 2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +&soc {
> +
> +       tpiu at 820000 {
> +               compatible = "arm,coresight-tpiu", "arm,primecell";
> +               reg = <0x820000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               port {
> +                       tpiu_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&replicator_out1>;
> +                       };
> +               };
> +       };
> +
> +       funnel at 821000 {
> +               compatible = "arm,coresight-funnel", "arm,primecell";
> +               reg = <0x821000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port at 4 {
> +                               reg = <4>;
> +                               funnel0_in4: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&funnel1_out>;
> +                               };
> +                       };
> +                       port at 8 {
> +                               reg = <0>;
> +                               funnel0_out: endpoint {
> +                                       remote-endpoint = <&etf_in>;
> +                               };
> +                       };

Please add a comment indicating what the other ports are connected to.

> +               };
> +       };
> +
> +       replicator at 824000 {
> +               compatible = "qcom,coresight-replicator", "arm,primecell";
> +               reg = <0x824000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port at 0 {
> +                               reg = <0>;
> +                               replicator_out0: endpoint {
> +                                       remote-endpoint = <&etr_in>;
> +                               };
> +                       };
> +                       port at 1 {
> +                               reg = <1>;
> +                               replicator_out1: endpoint {
> +                                       remote-endpoint = <&tpiu_in>;
> +                               };
> +                       };
> +                       port at 2 {
> +                               reg = <0>;
> +                               replicator_in: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etf_out>;
> +                               };
> +                       };

Same comment as with the funnel component.

> +               };
> +       };
> +
> +       etf at 825000 {
> +               compatible = "arm,coresight-tmc", "arm,primecell";
> +               reg = <0x825000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port at 0 {
> +                               reg = <0>;
> +                               etf_out: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&funnel0_out>;
> +                               };
> +                       };
> +                       port at 1 {
> +                               reg = <0>;
> +                               etf_in: endpoint {
> +                                       remote-endpoint = <&replicator_in>;
> +                               };
> +                       };
> +               };
> +       };
> +
> +       etr at 826000 {
> +               compatible = "arm,coresight-tmc", "arm,primecell";
> +               reg = <0x826000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               port {
> +                       etr_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&replicator_out0>;
> +                       };
> +               };
> +       };
> +
> +       funnel at 841000 { /* APSS */
> +               compatible = "arm,coresight-funnel", "arm,primecell";
> +               reg = <0x841000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               ports {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +
> +                       port at 0 {
> +                               reg = <0>;
> +                               funnel1_in0: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm0_out>;
> +                               };
> +                       };
> +                       port at 1 {
> +                               reg = <1>;
> +                               funnel1_in1: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm1_out>;
> +                               };
> +                       };
> +                       port at 2 {
> +                               reg = <2>;
> +                               funnel1_in2: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm2_out>;
> +                               };
> +                       };
> +                       port at 3 {
> +                               reg = <3>;
> +                               funnel1_in3: endpoint {
> +                                       slave-mode;
> +                                       remote-endpoint = <&etm3_out>;
> +                               };
> +                       };
> +                       port at 4 {
> +                               reg = <0>;
> +                               funnel1_out: endpoint {
> +                                       remote-endpoint = <&funnel0_in4>;
> +                               };
> +                       };

Same comment as with the funnel component.

> +               };
> +       };
> +
> +       etm at 85c000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85c000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU0>;
> +
> +               port {
> +                       etm0_out: endpoint {
> +                               remote-endpoint = <&funnel1_in0>;
> +                       };
> +               };
> +       };
> +
> +       etm at 85d000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85d000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU1>;
> +
> +               port {
> +                       etm1_out: endpoint {
> +                               remote-endpoint = <&funnel1_in1>;
> +                       };
> +               };
> +       };
> +
> +       etm at 85e000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85e000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU2>;
> +
> +               port {
> +                       etm2_out: endpoint {
> +                               remote-endpoint = <&funnel1_in2>;
> +                       };
> +               };
> +       };
> +
> +       etm at 85f000 {
> +               compatible = "arm,coresight-etm4x", "arm,primecell";
> +               reg = <0x85f000 0x1000>;
> +
> +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> +               clock-names = "apb_pclk", "atclk";
> +
> +               cpu = <&CPU3>;
> +
> +               port {
> +                       etm3_out: endpoint {
> +                               remote-endpoint = <&funnel1_in3>;
> +                       };
> +               };
> +       };
> +};
> --
> 1.9.1
>

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:28 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:19, Ivan T. Ivanov ivanov@linaro.org> wrote:

<snip>

> >                 - "arm,coresight-etm4x", "arm,primecell";
> > +               - "qcom,coresight-replicator", "arm,primecell";
> 
> Is there some sort of versioning information we can add like it was
> done for the "coresight-etmXY" bindings?  It makes things a lot
> cleaner when a new (and possibly not backward compatible) version gets
> released.
> 

>From what I can see, it is version 1. I could add it to compatible
string, but suldn't we use amba_id for this reason.

> >         * reg: physical base address and length of the register
> >           set(s) of the component.
> > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> > index 6b331d4..165b681 100644
> > --- a/drivers/hwtracing/coresight/Kconfig
> > +++ b/drivers/hwtracing/coresight/Kconfig
> > @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
> >           instructions that a processor is executing. This is primarily useful
> >           for instruction level tracing. Depending on the implemented version
> >           data tracing may also be available.
> > +
> > +config CORESIGHT_QCOM_REPLICATOR
> > +       bool "Qualcomm CoreSight Replicator driver"
> > +       help
> > +         This enables support for CoreSight link and sink driver that are
> > +         responsible for transporting and collecting the trace data
> > +         respectively. Link and sinks are dynamically aggregated with a trace
> > +         entity at run time to form a complete trace path.
> 
> The replicator is only a link entity.  It is only transporting trace
> data information rather than collecting it.  Please review the
> comment.  

True, sorry. copy and paste from CORESIGHT_LINKS_AND_SINKS.

> Also, can this specific version run on both V7 and V8
> architecture.  If not the proper "depends" should be added.
> 

Same driver/device on both architectures.

Will fix rest of the comments and will resend.

Thank you,
Ivan

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:28 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:19, Ivan T. Ivanov ivanov@linaro.org> wrote:

<snip>

> >                 - "arm,coresight-etm4x", "arm,primecell";
> > +               - "qcom,coresight-replicator", "arm,primecell";
> 
> Is there some sort of versioning information we can add like it was
> done for the "coresight-etmXY" bindings?  It makes things a lot
> cleaner when a new (and possibly not backward compatible) version gets
> released.
> 

>From what I can see, it is version 1. I could add it to compatible
string, but suldn't we use amba_id for this reason.

> >         * reg: physical base address and length of the register
> >           set(s) of the component.
> > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> > index 6b331d4..165b681 100644
> > --- a/drivers/hwtracing/coresight/Kconfig
> > +++ b/drivers/hwtracing/coresight/Kconfig
> > @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
> >           instructions that a processor is executing. This is primarily useful
> >           for instruction level tracing. Depending on the implemented version
> >           data tracing may also be available.
> > +
> > +config CORESIGHT_QCOM_REPLICATOR
> > +       bool "Qualcomm CoreSight Replicator driver"
> > +       help
> > +         This enables support for CoreSight link and sink driver that are
> > +         responsible for transporting and collecting the trace data
> > +         respectively. Link and sinks are dynamically aggregated with a trace
> > +         entity at run time to form a complete trace path.
> 
> The replicator is only a link entity.  It is only transporting trace
> data information rather than collecting it.  Please review the
> comment.  

True, sorry. copy and paste from CORESIGHT_LINKS_AND_SINKS.

> Also, can this specific version run on both V7 and V8
> architecture.  If not the proper "depends" should be added.
> 

Same driver/device on both architectures.

Will fix rest of the comments and will resend.

Thank you,
Ivan

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:28 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:19, Ivan T. Ivanov ivanov at linaro.org> wrote:

<snip>

> >                 - "arm,coresight-etm4x", "arm,primecell";
> > +               - "qcom,coresight-replicator", "arm,primecell";
> 
> Is there some sort of versioning information we can add like it was
> done for the "coresight-etmXY" bindings?  It makes things a lot
> cleaner when a new (and possibly not backward compatible) version gets
> released.
> 

>From what I can see, it is version 1. I could add it to compatible
string, but suldn't we use amba_id for this reason.

> >         * reg: physical base address and length of the register
> >           set(s) of the component.
> > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
> > index 6b331d4..165b681 100644
> > --- a/drivers/hwtracing/coresight/Kconfig
> > +++ b/drivers/hwtracing/coresight/Kconfig
> > @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
> >           instructions that a processor is executing. This is primarily useful
> >           for instruction level tracing. Depending on the implemented version
> >           data tracing may also be available.
> > +
> > +config CORESIGHT_QCOM_REPLICATOR
> > +       bool "Qualcomm CoreSight Replicator driver"
> > +       help
> > +         This enables support for CoreSight link and sink driver that are
> > +         responsible for transporting and collecting the trace data
> > +         respectively. Link and sinks are dynamically aggregated with a trace
> > +         entity at run time to form a complete trace path.
> 
> The replicator is only a link entity.  It is only transporting trace
> data information rather than collecting it.  Please review the
> comment.  

True, sorry. copy and paste from CORESIGHT_LINKS_AND_SINKS.

> Also, can this specific version run on both V7 and V8
> architecture.  If not the proper "depends" should be added.
> 

Same driver/device on both architectures.

Will fix rest of the comments and will resend.

Thank you,
Ivan

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote:
> > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
> > 

> Please add a comment indicating what the other ports are connected to.
> 

Thank you. Will fix and resend.

Ivan

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote:
> > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
> > 

> Please add a comment indicating what the other ports are connected to.
> 

Thank you. Will fix and resend.

Ivan

[PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov at linaro.org> wrote:
> > Add initial set of CoreSight components found on Qualcomm's 8x16 chipset.
> > 

> Please add a comment indicating what the other ports are connected to.
> 

Thank you. Will fix and resend.

Ivan

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote:


> > +
> > +       funnel@821000 {
> > +               compatible = "arm,coresight-funnel", "arm,primecell";
> > +               reg = <0x821000 0x1000>;
> > +
> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> > +               clock-names = "apb_pclk", "atclk";
> > +
> > +               ports {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +
> > +                       port@4 {
> > +                               reg = <4>;
> > +                               funnel0_in4: endpoint {
> > +                                       slave-mode;
> > +                                       remote-endpoint = <&funnel1_out>;
> > +                               };
> > +                       };
> > +                       port@8 {
> > +                               reg = <0>;
> > +                               funnel0_out: endpoint {
> > +                                       remote-endpoint = <&etf_in>;
> > +                               };
> > +                       };
> 
> Please add a comment indicating what the other ports are connected to.
> 
> > +               };
> > +       };
> > +
> > +       replicator@824000 {
> > +               compatible = "qcom,coresight-replicator", "arm,primecell";
> > +               reg = <0x824000 0x1000>;
> > +
> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> > +               clock-names = "apb_pclk", "atclk";
> > +
> > +               ports {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +
> > +                       port@0 {
> > +                               reg = <0>;
> > +                               replicator_out0: endpoint {
> > +                                       remote-endpoint = <&etr_in>;
> > +                               };
> > +                       };
> > +                       port@1 {
> > +                               reg = <1>;
> > +                               replicator_out1: endpoint {
> > +                                       remote-endpoint = <&tpiu_in>;
> > +                               };
> > +                       };
> > +                       port@2 {
> > +                               reg = <0>;
> > +                               replicator_in: endpoint {
> > +                                       slave-mode;
> > +                                       remote-endpoint = <&etf_out>;
> > +                               };
> > +                       };
> 
> Same comment as with the funnel component.

Sorry, but what do you mean here?

Regards,
Ivan

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote:


> > +
> > +       funnel@821000 {
> > +               compatible = "arm,coresight-funnel", "arm,primecell";
> > +               reg = <0x821000 0x1000>;
> > +
> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> > +               clock-names = "apb_pclk", "atclk";
> > +
> > +               ports {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +
> > +                       port@4 {
> > +                               reg = <4>;
> > +                               funnel0_in4: endpoint {
> > +                                       slave-mode;
> > +                                       remote-endpoint = <&funnel1_out>;
> > +                               };
> > +                       };
> > +                       port@8 {
> > +                               reg = <0>;
> > +                               funnel0_out: endpoint {
> > +                                       remote-endpoint = <&etf_in>;
> > +                               };
> > +                       };
> 
> Please add a comment indicating what the other ports are connected to.
> 
> > +               };
> > +       };
> > +
> > +       replicator@824000 {
> > +               compatible = "qcom,coresight-replicator", "arm,primecell";
> > +               reg = <0x824000 0x1000>;
> > +
> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> > +               clock-names = "apb_pclk", "atclk";
> > +
> > +               ports {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +
> > +                       port@0 {
> > +                               reg = <0>;
> > +                               replicator_out0: endpoint {
> > +                                       remote-endpoint = <&etr_in>;
> > +                               };
> > +                       };
> > +                       port@1 {
> > +                               reg = <1>;
> > +                               replicator_out1: endpoint {
> > +                                       remote-endpoint = <&tpiu_in>;
> > +                               };
> > +                       };
> > +                       port@2 {
> > +                               reg = <0>;
> > +                               replicator_in: endpoint {
> > +                                       slave-mode;
> > +                                       remote-endpoint = <&etf_out>;
> > +                               };
> > +                       };
> 
> Same comment as with the funnel component.

Sorry, but what do you mean here?

Regards,
Ivan

[PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Ivan T. Ivanov]

On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov at linaro.org> wrote:


> > +
> > +???????funnel at 821000 {
> > +               compatible = "arm,coresight-funnel", "arm,primecell";
> > +               reg = <0x821000 0x1000>;
> > +
> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> > +               clock-names = "apb_pclk", "atclk";
> > +
> > +               ports {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +
> > +???????????????????????port at 4 {
> > +                               reg = <4>;
> > +                               funnel0_in4: endpoint {
> > +                                       slave-mode;
> > +                                       remote-endpoint = <&funnel1_out>;
> > +                               };
> > +                       };
> > +???????????????????????port at 8 {
> > +                               reg = <0>;
> > +                               funnel0_out: endpoint {
> > +                                       remote-endpoint = <&etf_in>;
> > +                               };
> > +                       };
> 
> Please add a comment indicating what the other ports are connected to.
> 
> > +               };
> > +       };
> > +
> > +???????replicator at 824000 {
> > +               compatible = "qcom,coresight-replicator", "arm,primecell";
> > +               reg = <0x824000 0x1000>;
> > +
> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> > +               clock-names = "apb_pclk", "atclk";
> > +
> > +               ports {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> > +
> > +???????????????????????port at 0 {
> > +                               reg = <0>;
> > +                               replicator_out0: endpoint {
> > +                                       remote-endpoint = <&etr_in>;
> > +                               };
> > +                       };
> > +???????????????????????port at 1 {
> > +                               reg = <1>;
> > +                               replicator_out1: endpoint {
> > +                                       remote-endpoint = <&tpiu_in>;
> > +                               };
> > +                       };
> > +???????????????????????port at 2 {
> > +                               reg = <0>;
> > +                               replicator_in: endpoint {
> > +                                       slave-mode;
> > +                                       remote-endpoint = <&etf_out>;
> > +                               };
> > +                       };
> 
> Same comment as with the funnel component.

Sorry, but what do you mean here?

Regards,
Ivan

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Mathieu Poirier]

On 30 April 2015 at 03:24, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
>
> On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
>> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote:
>
>
>> > +
>> > +       funnel@821000 {
>> > +               compatible = "arm,coresight-funnel", "arm,primecell";
>> > +               reg = <0x821000 0x1000>;
>> > +
>> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> > +               clock-names = "apb_pclk", "atclk";
>> > +
>> > +               ports {
>> > +                       #address-cells = <1>;
>> > +                       #size-cells = <0>;
>> > +
>> > +                       port@4 {
>> > +                               reg = <4>;
>> > +                               funnel0_in4: endpoint {
>> > +                                       slave-mode;
>> > +                                       remote-endpoint = <&funnel1_out>;
>> > +                               };
>> > +                       };
>> > +                       port@8 {
>> > +                               reg = <0>;
>> > +                               funnel0_out: endpoint {
>> > +                                       remote-endpoint = <&etf_in>;
>> > +                               };
>> > +                       };
>>
>> Please add a comment indicating what the other ports are connected to.
>>
>> > +               };
>> > +       };
>> > +
>> > +       replicator@824000 {
>> > +               compatible = "qcom,coresight-replicator", "arm,primecell";
>> > +               reg = <0x824000 0x1000>;
>> > +
>> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> > +               clock-names = "apb_pclk", "atclk";
>> > +
>> > +               ports {
>> > +                       #address-cells = <1>;
>> > +                       #size-cells = <0>;
>> > +
>> > +                       port@0 {
>> > +                               reg = <0>;
>> > +                               replicator_out0: endpoint {
>> > +                                       remote-endpoint = <&etr_in>;
>> > +                               };
>> > +                       };
>> > +                       port@1 {
>> > +                               reg = <1>;
>> > +                               replicator_out1: endpoint {
>> > +                                       remote-endpoint = <&tpiu_in>;
>> > +                               };
>> > +                       };
>> > +                       port@2 {
>> > +                               reg = <0>;
>> > +                               replicator_in: endpoint {
>> > +                                       slave-mode;
>> > +                                       remote-endpoint = <&etf_out>;
>> > +                               };
>> > +                       };
>>
>> Same comment as with the funnel component.
>
> Sorry, but what do you mean here?

My bad - replicators have only one input port and two output ones.
Forget about this comments.

>
> Regards,
> Ivan

Re: [PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Mathieu Poirier]

On 30 April 2015 at 03:24, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
>
> On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
>> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov@linaro.org> wrote:
>
>
>> > +
>> > +       funnel@821000 {
>> > +               compatible = "arm,coresight-funnel", "arm,primecell";
>> > +               reg = <0x821000 0x1000>;
>> > +
>> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> > +               clock-names = "apb_pclk", "atclk";
>> > +
>> > +               ports {
>> > +                       #address-cells = <1>;
>> > +                       #size-cells = <0>;
>> > +
>> > +                       port@4 {
>> > +                               reg = <4>;
>> > +                               funnel0_in4: endpoint {
>> > +                                       slave-mode;
>> > +                                       remote-endpoint = <&funnel1_out>;
>> > +                               };
>> > +                       };
>> > +                       port@8 {
>> > +                               reg = <0>;
>> > +                               funnel0_out: endpoint {
>> > +                                       remote-endpoint = <&etf_in>;
>> > +                               };
>> > +                       };
>>
>> Please add a comment indicating what the other ports are connected to.
>>
>> > +               };
>> > +       };
>> > +
>> > +       replicator@824000 {
>> > +               compatible = "qcom,coresight-replicator", "arm,primecell";
>> > +               reg = <0x824000 0x1000>;
>> > +
>> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> > +               clock-names = "apb_pclk", "atclk";
>> > +
>> > +               ports {
>> > +                       #address-cells = <1>;
>> > +                       #size-cells = <0>;
>> > +
>> > +                       port@0 {
>> > +                               reg = <0>;
>> > +                               replicator_out0: endpoint {
>> > +                                       remote-endpoint = <&etr_in>;
>> > +                               };
>> > +                       };
>> > +                       port@1 {
>> > +                               reg = <1>;
>> > +                               replicator_out1: endpoint {
>> > +                                       remote-endpoint = <&tpiu_in>;
>> > +                               };
>> > +                       };
>> > +                       port@2 {
>> > +                               reg = <0>;
>> > +                               replicator_in: endpoint {
>> > +                                       slave-mode;
>> > +                                       remote-endpoint = <&etf_out>;
>> > +                               };
>> > +                       };
>>
>> Same comment as with the funnel component.
>
> Sorry, but what do you mean here?

My bad - replicators have only one input port and two output ones.
Forget about this comments.

>
> Regards,
> Ivan

[PATCH 2/2] arm64: dts: qcom: Add msm8916 CoreSight components

[Mathieu Poirier]

On 30 April 2015 at 03:24, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
>
> On Wed, 2015-04-29 at 10:49 -0600, Mathieu Poirier wrote:
>> On 29 April 2015 at 06:20, Ivan T. Ivanov ivanov at linaro.org> wrote:
>
>
>> > +
>> > +       funnel at 821000 {
>> > +               compatible = "arm,coresight-funnel", "arm,primecell";
>> > +               reg = <0x821000 0x1000>;
>> > +
>> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> > +               clock-names = "apb_pclk", "atclk";
>> > +
>> > +               ports {
>> > +                       #address-cells = <1>;
>> > +                       #size-cells = <0>;
>> > +
>> > +                       port at 4 {
>> > +                               reg = <4>;
>> > +                               funnel0_in4: endpoint {
>> > +                                       slave-mode;
>> > +                                       remote-endpoint = <&funnel1_out>;
>> > +                               };
>> > +                       };
>> > +                       port at 8 {
>> > +                               reg = <0>;
>> > +                               funnel0_out: endpoint {
>> > +                                       remote-endpoint = <&etf_in>;
>> > +                               };
>> > +                       };
>>
>> Please add a comment indicating what the other ports are connected to.
>>
>> > +               };
>> > +       };
>> > +
>> > +       replicator at 824000 {
>> > +               compatible = "qcom,coresight-replicator", "arm,primecell";
>> > +               reg = <0x824000 0x1000>;
>> > +
>> > +               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
>> > +               clock-names = "apb_pclk", "atclk";
>> > +
>> > +               ports {
>> > +                       #address-cells = <1>;
>> > +                       #size-cells = <0>;
>> > +
>> > +                       port at 0 {
>> > +                               reg = <0>;
>> > +                               replicator_out0: endpoint {
>> > +                                       remote-endpoint = <&etr_in>;
>> > +                               };
>> > +                       };
>> > +                       port at 1 {
>> > +                               reg = <1>;
>> > +                               replicator_out1: endpoint {
>> > +                                       remote-endpoint = <&tpiu_in>;
>> > +                               };
>> > +                       };
>> > +                       port at 2 {
>> > +                               reg = <0>;
>> > +                               replicator_in: endpoint {
>> > +                                       slave-mode;
>> > +                                       remote-endpoint = <&etf_out>;
>> > +                               };
>> > +                       };
>>
>> Same comment as with the funnel component.
>
> Sorry, but what do you mean here?

My bad - replicators have only one input port and two output ones.
Forget about this comments.

>
> Regards,
> Ivan

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Mathieu Poirier]

On 30 April 2015 at 01:21, Ivan T. Ivanov <ivan.ivanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>
> On Wed, 2015-04-29 at 10:28 -0600, Mathieu Poirier wrote:
>> On 29 April 2015 at 06:19, Ivan T. Ivanov ivanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>
> <snip>
>
>> >                 - "arm,coresight-etm4x", "arm,primecell";
>> > +               - "qcom,coresight-replicator", "arm,primecell";
>>
>> Is there some sort of versioning information we can add like it was
>> done for the "coresight-etmXY" bindings?  It makes things a lot
>> cleaner when a new (and possibly not backward compatible) version gets
>> released.
>>
>
> From what I can see, it is version 1. I could add it to compatible
> string, but suldn't we use amba_id for this reason.

amba_id work well for devices within the same family and compatible up
to a certain point.  When revisions change backward compatibility is
usually not kept and it becomes a nightmare to maintain.

>
>> >         * reg: physical base address and length of the register
>> >           set(s) of the component.
>> > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
>> > index 6b331d4..165b681 100644
>> > --- a/drivers/hwtracing/coresight/Kconfig
>> > +++ b/drivers/hwtracing/coresight/Kconfig
>> > @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
>> >           instructions that a processor is executing. This is primarily useful
>> >           for instruction level tracing. Depending on the implemented version
>> >           data tracing may also be available.
>> > +
>> > +config CORESIGHT_QCOM_REPLICATOR
>> > +       bool "Qualcomm CoreSight Replicator driver"
>> > +       help
>> > +         This enables support for CoreSight link and sink driver that are
>> > +         responsible for transporting and collecting the trace data
>> > +         respectively. Link and sinks are dynamically aggregated with a trace
>> > +         entity at run time to form a complete trace path.
>>
>> The replicator is only a link entity.  It is only transporting trace
>> data information rather than collecting it.  Please review the
>> comment.
>
> True, sorry. copy and paste from CORESIGHT_LINKS_AND_SINKS.
>
>> Also, can this specific version run on both V7 and V8
>> architecture.  If not the proper "depends" should be added.
>>
>
> Same driver/device on both architectures.
>
> Will fix rest of the comments and will resend.
>
> Thank you,
> Ivan
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Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Mathieu Poirier]

On 30 April 2015 at 01:21, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
>
> On Wed, 2015-04-29 at 10:28 -0600, Mathieu Poirier wrote:
>> On 29 April 2015 at 06:19, Ivan T. Ivanov ivanov@linaro.org> wrote:
>
> <snip>
>
>> >                 - "arm,coresight-etm4x", "arm,primecell";
>> > +               - "qcom,coresight-replicator", "arm,primecell";
>>
>> Is there some sort of versioning information we can add like it was
>> done for the "coresight-etmXY" bindings?  It makes things a lot
>> cleaner when a new (and possibly not backward compatible) version gets
>> released.
>>
>
> From what I can see, it is version 1. I could add it to compatible
> string, but suldn't we use amba_id for this reason.

amba_id work well for devices within the same family and compatible up
to a certain point.  When revisions change backward compatibility is
usually not kept and it becomes a nightmare to maintain.

>
>> >         * reg: physical base address and length of the register
>> >           set(s) of the component.
>> > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
>> > index 6b331d4..165b681 100644
>> > --- a/drivers/hwtracing/coresight/Kconfig
>> > +++ b/drivers/hwtracing/coresight/Kconfig
>> > @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
>> >           instructions that a processor is executing. This is primarily useful
>> >           for instruction level tracing. Depending on the implemented version
>> >           data tracing may also be available.
>> > +
>> > +config CORESIGHT_QCOM_REPLICATOR
>> > +       bool "Qualcomm CoreSight Replicator driver"
>> > +       help
>> > +         This enables support for CoreSight link and sink driver that are
>> > +         responsible for transporting and collecting the trace data
>> > +         respectively. Link and sinks are dynamically aggregated with a trace
>> > +         entity at run time to form a complete trace path.
>>
>> The replicator is only a link entity.  It is only transporting trace
>> data information rather than collecting it.  Please review the
>> comment.
>
> True, sorry. copy and paste from CORESIGHT_LINKS_AND_SINKS.
>
>> Also, can this specific version run on both V7 and V8
>> architecture.  If not the proper "depends" should be added.
>>
>
> Same driver/device on both architectures.
>
> Will fix rest of the comments and will resend.
>
> Thank you,
> Ivan

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Mathieu Poirier]

On 30 April 2015 at 01:21, Ivan T. Ivanov <ivan.ivanov@linaro.org> wrote:
>
> On Wed, 2015-04-29 at 10:28 -0600, Mathieu Poirier wrote:
>> On 29 April 2015 at 06:19, Ivan T. Ivanov ivanov at linaro.org> wrote:
>
> <snip>
>
>> >                 - "arm,coresight-etm4x", "arm,primecell";
>> > +               - "qcom,coresight-replicator", "arm,primecell";
>>
>> Is there some sort of versioning information we can add like it was
>> done for the "coresight-etmXY" bindings?  It makes things a lot
>> cleaner when a new (and possibly not backward compatible) version gets
>> released.
>>
>
> From what I can see, it is version 1. I could add it to compatible
> string, but suldn't we use amba_id for this reason.

amba_id work well for devices within the same family and compatible up
to a certain point.  When revisions change backward compatibility is
usually not kept and it becomes a nightmare to maintain.

>
>> >         * reg: physical base address and length of the register
>> >           set(s) of the component.
>> > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
>> > index 6b331d4..165b681 100644
>> > --- a/drivers/hwtracing/coresight/Kconfig
>> > +++ b/drivers/hwtracing/coresight/Kconfig
>> > @@ -68,4 +68,13 @@ config CORESIGHT_SOURCE_ETM4X
>> >           instructions that a processor is executing. This is primarily useful
>> >           for instruction level tracing. Depending on the implemented version
>> >           data tracing may also be available.
>> > +
>> > +config CORESIGHT_QCOM_REPLICATOR
>> > +       bool "Qualcomm CoreSight Replicator driver"
>> > +       help
>> > +         This enables support for CoreSight link and sink driver that are
>> > +         responsible for transporting and collecting the trace data
>> > +         respectively. Link and sinks are dynamically aggregated with a trace
>> > +         entity at run time to form a complete trace path.
>>
>> The replicator is only a link entity.  It is only transporting trace
>> data information rather than collecting it.  Please review the
>> comment.
>
> True, sorry. copy and paste from CORESIGHT_LINKS_AND_SINKS.
>
>> Also, can this specific version run on both V7 and V8
>> architecture.  If not the proper "depends" should be added.
>>
>
> Same driver/device on both architectures.
>
> Will fix rest of the comments and will resend.
>
> Thank you,
> Ivan

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Paul Bolle]

On Wed, 2015-04-29 at 15:19 +0300, Ivan T. Ivanov wrote:

> +config CORESIGHT_QCOM_REPLICATOR
> +	bool "Qualcomm CoreSight Replicator driver"
> +	help
> +	  This enables support for CoreSight link and sink driver that are
> +	  responsible for transporting and collecting the trace data
> +	  respectively. Link and sinks are dynamically aggregated with a trace
> +	  entity at run time to form a complete trace path.

> --- a/drivers/hwtracing/coresight/Makefile
> +++ b/drivers/hwtracing/coresight/Makefile

> +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o

CORESIGHT_QCOM_REPLICATOR is a bool symbol. So
coresight-replicator-qcom.o will never be part of a module.

(If that's incorrect, you can stop reading here.)

> --- /dev/null
> +++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c

> +#include <linux/module.h>

Is this include needed?

> +static struct amba_driver replicator_driver = {
> +	.drv = {
> +		.name	= "coresight-replicator-qcom",
> +		.owner	= THIS_MODULE,

For built-in only code THIS_MODULE will be, basically, equivalent to
NULL (see include/linux/export.h). So I suppose this line can be
dropped.

> +		.pm	= &replicator_dev_pm_ops,
> +	},
> +	.probe		= replicator_probe,
> +	.remove		= replicator_remove,
> +	.id_table	= replicator_ids,
> +};
> +
> +module_amba_driver(replicator_driver);

For built-in only code this is, assuming I grepped this correctly,
equivalent to calling
    amba_driver_register(&replicator_driver);

from within a function marked with some sort of *initcall().

> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");

For built-in only code these macros will be effectively preprocessed
away.

Thanks,


Paul Bolle

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Paul Bolle]

On Wed, 2015-04-29 at 15:19 +0300, Ivan T. Ivanov wrote:

> +config CORESIGHT_QCOM_REPLICATOR
> +	bool "Qualcomm CoreSight Replicator driver"
> +	help
> +	  This enables support for CoreSight link and sink driver that are
> +	  responsible for transporting and collecting the trace data
> +	  respectively. Link and sinks are dynamically aggregated with a trace
> +	  entity at run time to form a complete trace path.

> --- a/drivers/hwtracing/coresight/Makefile
> +++ b/drivers/hwtracing/coresight/Makefile

> +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o

CORESIGHT_QCOM_REPLICATOR is a bool symbol. So
coresight-replicator-qcom.o will never be part of a module.

(If that's incorrect, you can stop reading here.)

> --- /dev/null
> +++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c

> +#include <linux/module.h>

Is this include needed?

> +static struct amba_driver replicator_driver = {
> +	.drv = {
> +		.name	= "coresight-replicator-qcom",
> +		.owner	= THIS_MODULE,

For built-in only code THIS_MODULE will be, basically, equivalent to
NULL (see include/linux/export.h). So I suppose this line can be
dropped.

> +		.pm	= &replicator_dev_pm_ops,
> +	},
> +	.probe		= replicator_probe,
> +	.remove		= replicator_remove,
> +	.id_table	= replicator_ids,
> +};
> +
> +module_amba_driver(replicator_driver);

For built-in only code this is, assuming I grepped this correctly,
equivalent to calling
    amba_driver_register(&replicator_driver);

from within a function marked with some sort of *initcall().

> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Qualcomm CoreSight Replicator driver");

For built-in only code these macros will be effectively preprocessed
away.

Thanks,


Paul Bolle

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

On Thu, 2015-04-30 at 22:53 +0200, Paul Bolle wrote:
> On Wed, 2015-04-29 at 15:19 +0300, Ivan T. Ivanov wrote:
> 
> > +config CORESIGHT_QCOM_REPLICATOR
> > +       bool "Qualcomm CoreSight Replicator driver"
> > +       help
> > +                       This enables support for CoreSight link and sink driver that are
> > +                       responsible for transporting and collecting the trace data
> > +                       respectively. Link and sinks are dynamically aggregated with a trace
> > +                       entity at run time to form a complete trace path.
> 
> > --- a/drivers/hwtracing/coresight/Makefile
> > +++ b/drivers/hwtracing/coresight/Makefile
> 
> > +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
> 
> CORESIGHT_QCOM_REPLICATOR is a bool symbol. So
> coresight-replicator-qcom.o will never be part of a module.
> 

Thank you. I am going to fallow approach taken by Mathieu in [1].
Is this OK with you?

Regards,
Ivan 

[1] https://lkml.org/lkml/2015/5/6/524

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Ivan T. Ivanov]

On Thu, 2015-04-30 at 22:53 +0200, Paul Bolle wrote:
> On Wed, 2015-04-29 at 15:19 +0300, Ivan T. Ivanov wrote:
> 
> > +config CORESIGHT_QCOM_REPLICATOR
> > +       bool "Qualcomm CoreSight Replicator driver"
> > +       help
> > +                       This enables support for CoreSight link and sink driver that are
> > +                       responsible for transporting and collecting the trace data
> > +                       respectively. Link and sinks are dynamically aggregated with a trace
> > +                       entity at run time to form a complete trace path.
> 
> > --- a/drivers/hwtracing/coresight/Makefile
> > +++ b/drivers/hwtracing/coresight/Makefile
> 
> > +obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
> 
> CORESIGHT_QCOM_REPLICATOR is a bool symbol. So
> coresight-replicator-qcom.o will never be part of a module.
> 

Thank you. I am going to fallow approach taken by Mathieu in [1].
Is this OK with you?

Regards,
Ivan 

[1] https://lkml.org/lkml/2015/5/6/524

Re: [PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Paul Bolle]

On Thu, 2015-05-07 at 17:46 +0300, Ivan T. Ivanov wrote:
> Thank you. I am going to fallow approach taken by Mathieu in [1].
> Is this OK with you?

I'm OK with anything that is coherent (ie, anything better than built-in
only code cross-dressing as modular code). I think Mathieu's approach
clears that bar. (Please note that macros like module_amba_driver() are
basically just a pet peeve.)

And, at the end of the day, what matters is what the maintainer of this
code accepts. I'm not the maintainer here.

Thanks,


Paul Bolle

[PATCH 1/2] coresight: replicator: Add Qualcomm CoreSight Replicator driver

[Paul Bolle]

On Thu, 2015-05-07 at 17:46 +0300, Ivan T. Ivanov wrote:
> Thank you. I am going to fallow approach taken by Mathieu in [1].
> Is this OK with you?

I'm OK with anything that is coherent (ie, anything better than built-in
only code cross-dressing as modular code). I think Mathieu's approach
clears that bar. (Please note that macros like module_amba_driver() are
basically just a pet peeve.)

And, at the end of the day, what matters is what the maintainer of this
code accepts. I'm not the maintainer here.

Thanks,


Paul Bolle