[PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

v2: Split strings to 80 char, add ddi_pll_sel and fixed typo. (Damien Lespiau)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 52f9cbc..3ed8e2f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11418,6 +11418,39 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
 	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
 	DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
 
+	if (IS_BROXTON(dev)) {
+		DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: ebb0: 0x%x, "
+			      "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
+			      "pll6: 0x%x, pll8: 0x%x, pcsdw12: 0x%x\n",
+			      pipe_config->ddi_pll_sel,
+			      pipe_config->dpll_hw_state.ebb0,
+			      pipe_config->dpll_hw_state.pll0,
+			      pipe_config->dpll_hw_state.pll1,
+			      pipe_config->dpll_hw_state.pll2,
+			      pipe_config->dpll_hw_state.pll3,
+			      pipe_config->dpll_hw_state.pll6,
+			      pipe_config->dpll_hw_state.pll8,
+			      pipe_config->dpll_hw_state.pcsdw12);
+	} else if (IS_SKYLAKE(dev)) {
+		DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: "
+			      "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
+			      pipe_config->ddi_pll_sel,
+			      pipe_config->dpll_hw_state.ctrl1,
+			      pipe_config->dpll_hw_state.cfgcr1,
+			      pipe_config->dpll_hw_state.cfgcr2);
+	} else if (HAS_DDI(dev)) {
+		DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: wrpll: 0x%x\n",
+			      pipe_config->ddi_pll_sel,
+			      pipe_config->dpll_hw_state.wrpll);
+	} else {
+		DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "
+			      "fp0: 0x%x, fp1: 0x%x\n",
+			      pipe_config->dpll_hw_state.dpll,
+			      pipe_config->dpll_hw_state.dpll_md,
+			      pipe_config->dpll_hw_state.fp0,
+			      pipe_config->dpll_hw_state.fp1);
+	}
+
 	DRM_DEBUG_KMS("planes on this crtc\n");
 	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
 		intel_plane = to_intel_plane(plane);
-- 
2.4.0

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[PATCH 2/2] drm/i915: Output scaler related pipe config debug in a single line

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Just so it is grouped logically in line with other data and makes a
rather verbose output a bit shorter.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3ed8e2f..790f390 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11404,9 +11404,10 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
 	DRM_DEBUG_KMS("port clock: %d\n", pipe_config->port_clock);
 	DRM_DEBUG_KMS("pipe src size: %dx%d\n",
 		      pipe_config->pipe_src_w, pipe_config->pipe_src_h);
-	DRM_DEBUG_KMS("num_scalers: %d\n", crtc->num_scalers);
-	DRM_DEBUG_KMS("scaler_users: 0x%x\n", pipe_config->scaler_state.scaler_users);
-	DRM_DEBUG_KMS("scaler id: %d\n", pipe_config->scaler_state.scaler_id);
+	DRM_DEBUG_KMS("num_scalers: %d, scaler_users: 0x%x, scaler_id: %d\n",
+		      crtc->num_scalers,
+		      pipe_config->scaler_state.scaler_users,
+		      pipe_config->scaler_state.scaler_id);
 	DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
 		      pipe_config->gmch_pfit.control,
 		      pipe_config->gmch_pfit.pgm_ratios,
-- 
2.4.0

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Re: [PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[Damien Lespiau]

On Thu, May 14, 2015 at 01:38:31PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> v2: Split strings to 80 char, add ddi_pll_sel and fixed typo. (Damien Lespiau)
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Damien Lespiau <damien.lespiau@intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 33 +++++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 52f9cbc..3ed8e2f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11418,6 +11418,39 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
>  	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
>  	DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
>  
> +	if (IS_BROXTON(dev)) {
> +		DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: ebb0: 0x%x, "
> +			      "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
> +			      "pll6: 0x%x, pll8: 0x%x, pcsdw12: 0x%x\n",
> +			      pipe_config->ddi_pll_sel,
> +			      pipe_config->dpll_hw_state.ebb0,
> +			      pipe_config->dpll_hw_state.pll0,
> +			      pipe_config->dpll_hw_state.pll1,
> +			      pipe_config->dpll_hw_state.pll2,
> +			      pipe_config->dpll_hw_state.pll3,
> +			      pipe_config->dpll_hw_state.pll6,
> +			      pipe_config->dpll_hw_state.pll8,
> +			      pipe_config->dpll_hw_state.pcsdw12);
> +	} else if (IS_SKYLAKE(dev)) {
> +		DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: "
> +			      "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
> +			      pipe_config->ddi_pll_sel,
> +			      pipe_config->dpll_hw_state.ctrl1,
> +			      pipe_config->dpll_hw_state.cfgcr1,
> +			      pipe_config->dpll_hw_state.cfgcr2);
> +	} else if (HAS_DDI(dev)) {
> +		DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: wrpll: 0x%x\n",
> +			      pipe_config->ddi_pll_sel,
> +			      pipe_config->dpll_hw_state.wrpll);
> +	} else {
> +		DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "
> +			      "fp0: 0x%x, fp1: 0x%x\n",
> +			      pipe_config->dpll_hw_state.dpll,
> +			      pipe_config->dpll_hw_state.dpll_md,
> +			      pipe_config->dpll_hw_state.fp0,
> +			      pipe_config->dpll_hw_state.fp1);
> +	}
> +
>  	DRM_DEBUG_KMS("planes on this crtc\n");
>  	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
>  		intel_plane = to_intel_plane(plane);
> -- 
> 2.4.0
> 
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Re: [PATCH 2/2] drm/i915: Output scaler related pipe config debug in a single line

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6411
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                 -1              314/314              313/314
IVB                                  338/338              338/338
BYT                                  286/286              286/286
BDW                                  320/320              320/320
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 SNB  igt@pm_rpm@dpms-mode-unset-non-lpsp      DMESG_WARN(13)PASS(1)      DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
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Re: [PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[Daniel Vetter]

On Thu, May 14, 2015 at 01:58:40PM +0100, Damien Lespiau wrote:
> On Thu, May 14, 2015 at 01:38:31PM +0100, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > 
> > v2: Split strings to 80 char, add ddi_pll_sel and fixed typo. (Damien Lespiau)
> > 
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > Cc: Damien Lespiau <damien.lespiau@intel.com>
> 
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[Daniel Vetter]

On Wed, May 13, 2015 at 05:41:40PM +0100, Damien Lespiau wrote:
> On Wed, May 13, 2015 at 04:51:07PM +0100, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > 
> > Tried to get the platform split right, please shout if I failed.
> > 
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> So, previously, we used to dump the whole list of states, even when the
> platform didn't care about all of them. I do like a platform-aware dump
> of the state better and this looks right to me (surely we can break the
> strings at a ','!).
> 
> You probably also want to add pipe_config->ddi_pll_sel on DDI platforms
> as it encodes the actual PLL selection (at least) and maybe look at the
> other DPLL-related states in there (I can give a r-b tag without those
> :p)
> 
> A small typo below.

Not convinced, for the same reason that we don't have platform checks
(except where absolutely necessary) in the pipe_config_compare code: No
one will notice bug here until it's too late. Otoh the pipe dump code
always seems to be lacking.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[Damien Lespiau]

On Wed, May 13, 2015 at 04:51:07PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Tried to get the platform split right, please shout if I failed.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

So, previously, we used to dump the whole list of states, even when the
platform didn't care about all of them. I do like a platform-aware dump
of the state better and this looks right to me (surely we can break the
strings at a ','!).

You probably also want to add pipe_config->ddi_pll_sel on DDI platforms
as it encodes the actual PLL selection (at least) and maybe look at the
other DPLL-related states in there (I can give a r-b tag without those
:p)

A small typo below.

-- 
Damien

> ---
>  drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 52f9cbc..b3ed8a0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11418,6 +11418,32 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
>  	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
>  	DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
>  
> +	if (IS_BROXTON(dev)) {
> +		DRM_DEBUG_KMS("dpll_hw_state: ebb0: 0x%x, pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, pll6: 0x%x, pll8: 0x%x, pcsdw12: 0x%x\n",
> +		      pipe_config->dpll_hw_state.ebb0,
> +		      pipe_config->dpll_hw_state.pll0,
> +		      pipe_config->dpll_hw_state.pll1,
> +		      pipe_config->dpll_hw_state.pll2,
> +		      pipe_config->dpll_hw_state.pll3,
> +		      pipe_config->dpll_hw_state.pll6,
> +		      pipe_config->dpll_hw_state.pll8,
> +		      pipe_config->dpll_hw_state.pcsdw12);
> +	} else if (IS_SKYLAKE(dev)) {
> +		DRM_DEBUG_KMS("dpll_hw_state: ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
> +		      pipe_config->dpll_hw_state.ctrl1,
> +		      pipe_config->dpll_hw_state.cfgcr1,
> +		      pipe_config->dpll_hw_state.cfgcr2);
> +	} else if (HAS_DDI(dev)) {
> +		DRM_DEBUG_KMS("dpll_hw_state: wrpll: 0x%x\n",
> +		      pipe_config->dpll_hw_state.wrpll);
> +	} else {
> +		DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, fp0: 0x%x, dp1: 0x%x\n",

fp1

> +		      pipe_config->dpll_hw_state.dpll,
> +		      pipe_config->dpll_hw_state.dpll_md,
> +		      pipe_config->dpll_hw_state.fp0,
> +		      pipe_config->dpll_hw_state.fp1);
> +	}
> +
>  	DRM_DEBUG_KMS("planes on this crtc\n");
>  	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
>  		intel_plane = to_intel_plane(plane);
> -- 
> 2.4.0
> 
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[PATCH 1/2] drm/i915: Dump some DPLL fields in pipe config debug

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Tried to get the platform split right, please shout if I failed.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 52f9cbc..b3ed8a0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11418,6 +11418,32 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
 	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
 	DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
 
+	if (IS_BROXTON(dev)) {
+		DRM_DEBUG_KMS("dpll_hw_state: ebb0: 0x%x, pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, pll6: 0x%x, pll8: 0x%x, pcsdw12: 0x%x\n",
+		      pipe_config->dpll_hw_state.ebb0,
+		      pipe_config->dpll_hw_state.pll0,
+		      pipe_config->dpll_hw_state.pll1,
+		      pipe_config->dpll_hw_state.pll2,
+		      pipe_config->dpll_hw_state.pll3,
+		      pipe_config->dpll_hw_state.pll6,
+		      pipe_config->dpll_hw_state.pll8,
+		      pipe_config->dpll_hw_state.pcsdw12);
+	} else if (IS_SKYLAKE(dev)) {
+		DRM_DEBUG_KMS("dpll_hw_state: ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
+		      pipe_config->dpll_hw_state.ctrl1,
+		      pipe_config->dpll_hw_state.cfgcr1,
+		      pipe_config->dpll_hw_state.cfgcr2);
+	} else if (HAS_DDI(dev)) {
+		DRM_DEBUG_KMS("dpll_hw_state: wrpll: 0x%x\n",
+		      pipe_config->dpll_hw_state.wrpll);
+	} else {
+		DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, fp0: 0x%x, dp1: 0x%x\n",
+		      pipe_config->dpll_hw_state.dpll,
+		      pipe_config->dpll_hw_state.dpll_md,
+		      pipe_config->dpll_hw_state.fp0,
+		      pipe_config->dpll_hw_state.fp1);
+	}
+
 	DRM_DEBUG_KMS("planes on this crtc\n");
 	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
 		intel_plane = to_intel_plane(plane);
-- 
2.4.0

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