[PATCH 0/4] Don't say we support framebuffers with alpha when we don't

[PATCH 0/4] Don't say we support framebuffers with alpha when we don't

[Damien Lespiau]

We can only do something with ARGB buffers on VLV/CHV and gen9+. Let's not
expose those format before then.

Technically this is an ABI break but we did check the DDX wasn't using those,
so give it a shot.

-- 
Damien

Damien Lespiau (4):
  drm/i915: Remove the COMMON_PRIMARY_FORMATS defines
  drm/i915: Remove ARBG/ABGR 2101010 on platform not supporting those
    formats
  drm/i915: Don't expose RGB/BGR 8888 formats on primary planes before
    SKL
  drm/i915: Don't expose ARGB1555 on gen2/3

 drivers/gpu/drm/i915/intel_display.c | 70 +++++++++++++++++++-----------------
 1 file changed, 38 insertions(+), 32 deletions(-)

-- 
2.1.0

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[PATCH 1/4] drm/i915: Remove the COMMON_PRIMARY_FORMATS defines

[Damien Lespiau]

That define makes it hard to figure out what is the actual list of
formats at a glance. Expand it then.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 23765d2..b7e9ae3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -45,24 +45,23 @@
 #include <drm/drm_rect.h>
 #include <linux/dma_remapping.h>
 
-/* Primary plane formats supported by all gen */
-#define COMMON_PRIMARY_FORMATS \
-	DRM_FORMAT_C8, \
-	DRM_FORMAT_RGB565, \
-	DRM_FORMAT_XRGB8888, \
-	DRM_FORMAT_ARGB8888
-
 /* Primary plane formats for gen <= 3 */
 static const uint32_t i8xx_primary_formats[] = {
-	COMMON_PRIMARY_FORMATS,
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB1555,
 	DRM_FORMAT_ARGB1555,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_ARGB8888,
 };
 
 /* Primary plane formats for gen >= 4 */
 static const uint32_t i965_primary_formats[] = {
-	COMMON_PRIMARY_FORMATS, \
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
 	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
 	DRM_FORMAT_ARGB2101010,
-- 
2.1.0

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[PATCH 2/4] drm/i915: Remove ARBG/ABGR 2101010 on platform not supporting those formats

[Damien Lespiau]

We just have have VLV and CHV sprites programming the hardware
differently for the ABGR2101010 so keep them working.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b7e9ae3..5ebac76 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -64,9 +64,7 @@ static const uint32_t i965_primary_formats[] = {
 	DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
-	DRM_FORMAT_ARGB2101010,
 	DRM_FORMAT_XBGR2101010,
-	DRM_FORMAT_ABGR2101010,
 };
 
 /* Cursor formats */
@@ -2716,11 +2714,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
-	case DRM_FORMAT_ARGB2101010:
 		dspcntr |= DISPPLANE_BGRX101010;
 		break;
 	case DRM_FORMAT_XBGR2101010:
-	case DRM_FORMAT_ABGR2101010:
 		dspcntr |= DISPPLANE_RGBX101010;
 		break;
 	default:
@@ -2824,11 +2820,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
-	case DRM_FORMAT_ARGB2101010:
 		dspcntr |= DISPPLANE_BGRX101010;
 		break;
 	case DRM_FORMAT_XBGR2101010:
-	case DRM_FORMAT_ABGR2101010:
 		dspcntr |= DISPPLANE_RGBX101010;
 		break;
 	default:
@@ -4542,9 +4536,7 @@ skl_update_scaler_users(
 		case DRM_FORMAT_ABGR8888:
 		case DRM_FORMAT_ARGB8888:
 		case DRM_FORMAT_XRGB2101010:
-		case DRM_FORMAT_ARGB2101010:
 		case DRM_FORMAT_XBGR2101010:
-		case DRM_FORMAT_ABGR2101010:
 		case DRM_FORMAT_YUYV:
 		case DRM_FORMAT_YVYU:
 		case DRM_FORMAT_UYVY:
@@ -13982,15 +13974,20 @@ static int intel_framebuffer_init(struct drm_device *dev,
 	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_ABGR8888:
 	case DRM_FORMAT_XRGB2101010:
-	case DRM_FORMAT_ARGB2101010:
 	case DRM_FORMAT_XBGR2101010:
-	case DRM_FORMAT_ABGR2101010:
 		if (INTEL_INFO(dev)->gen < 4) {
 			DRM_DEBUG("unsupported pixel format: %s\n",
 				  drm_get_format_name(mode_cmd->pixel_format));
 			return -EINVAL;
 		}
 		break;
+	case DRM_FORMAT_ABGR2101010:
+		if (!IS_VALLEYVIEW(dev)) {
+			DRM_DEBUG("unsupported pixel format: %s\n",
+				  drm_get_format_name(mode_cmd->pixel_format));
+			return -EINVAL;
+		}
+		break;
 	case DRM_FORMAT_YUYV:
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_YVYU:
-- 
2.1.0

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[PATCH 3/4] drm/i915: Don't expose RGB/BGR 8888 formats on primary planes before SKL

[Damien Lespiau]

We don't actually do anything different for the A version of the 8888
RGB formats before SKL. Don't let user space think we can support alpha
blending.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ebac76..c784f9a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -52,7 +52,6 @@ static const uint32_t i8xx_primary_formats[] = {
 	DRM_FORMAT_XRGB1555,
 	DRM_FORMAT_ARGB1555,
 	DRM_FORMAT_XRGB8888,
-	DRM_FORMAT_ARGB8888,
 };
 
 /* Primary plane formats for gen >= 4 */
@@ -61,6 +60,15 @@ static const uint32_t i965_primary_formats[] = {
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
 	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+};
+
+static const uint32_t skl_primary_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
 	DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
@@ -2706,11 +2714,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_BGRX565;
 		break;
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		dspcntr |= DISPPLANE_BGRX888;
 		break;
 	case DRM_FORMAT_XBGR8888:
-	case DRM_FORMAT_ABGR8888:
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
@@ -2812,11 +2818,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_BGRX565;
 		break;
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		dspcntr |= DISPPLANE_BGRX888;
 		break;
 	case DRM_FORMAT_XBGR8888:
-	case DRM_FORMAT_ABGR8888:
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
@@ -13278,12 +13282,15 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
 		primary->plane = !pipe;
 
-	if (INTEL_INFO(dev)->gen <= 3) {
-		intel_primary_formats = i8xx_primary_formats;
-		num_formats = ARRAY_SIZE(i8xx_primary_formats);
-	} else {
+	if (INTEL_INFO(dev)->gen >= 9) {
+		intel_primary_formats = skl_primary_formats;
+		num_formats = ARRAY_SIZE(skl_primary_formats);
+	} else if (INTEL_INFO(dev)->gen >= 4) {
 		intel_primary_formats = i965_primary_formats;
 		num_formats = ARRAY_SIZE(i965_primary_formats);
+	} else {
+		intel_primary_formats = i8xx_primary_formats;
+		num_formats = ARRAY_SIZE(i8xx_primary_formats);
 	}
 
 	drm_universal_plane_init(dev, &primary->base, 0,
@@ -13961,7 +13968,6 @@ static int intel_framebuffer_init(struct drm_device *dev,
 	case DRM_FORMAT_C8:
 	case DRM_FORMAT_RGB565:
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		break;
 	case DRM_FORMAT_XRGB1555:
 	case DRM_FORMAT_ARGB1555:
@@ -13971,8 +13977,15 @@ static int intel_framebuffer_init(struct drm_device *dev,
 			return -EINVAL;
 		}
 		break;
-	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ARGB8888:
 	case DRM_FORMAT_ABGR8888:
+		if (!IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen < 9) {
+			DRM_DEBUG("unsupported pixel format: %s\n",
+				  drm_get_format_name(mode_cmd->pixel_format));
+			return -EINVAL;
+		}
+		break;
+	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
 		if (INTEL_INFO(dev)->gen < 4) {
-- 
2.1.0

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[PATCH 4/4] drm/i915: Don't expose ARGB1555 on gen2/3

[Damien Lespiau]

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c784f9a..c957a45 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -50,7 +50,6 @@ static const uint32_t i8xx_primary_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB1555,
-	DRM_FORMAT_ARGB1555,
 	DRM_FORMAT_XRGB8888,
 };
 
@@ -2707,7 +2706,6 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_8BPP;
 		break;
 	case DRM_FORMAT_XRGB1555:
-	case DRM_FORMAT_ARGB1555:
 		dspcntr |= DISPPLANE_BGRX555;
 		break;
 	case DRM_FORMAT_RGB565:
@@ -13970,7 +13968,6 @@ static int intel_framebuffer_init(struct drm_device *dev,
 	case DRM_FORMAT_XRGB8888:
 		break;
 	case DRM_FORMAT_XRGB1555:
-	case DRM_FORMAT_ARGB1555:
 		if (INTEL_INFO(dev)->gen > 3) {
 			DRM_DEBUG("unsupported pixel format: %s\n",
 				  drm_get_format_name(mode_cmd->pixel_format));
-- 
2.1.0

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Re: [PATCH 1/4] drm/i915: Remove the COMMON_PRIMARY_FORMATS defines

[Ville Syrjälä]

On Fri, May 15, 2015 at 07:06:00PM +0100, Damien Lespiau wrote:
> That define makes it hard to figure out what is the actual list of
> formats at a glance. Expand it then.
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 17 ++++++++---------
>  1 file changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 23765d2..b7e9ae3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -45,24 +45,23 @@
>  #include <drm/drm_rect.h>
>  #include <linux/dma_remapping.h>
>  
> -/* Primary plane formats supported by all gen */
> -#define COMMON_PRIMARY_FORMATS \
> -	DRM_FORMAT_C8, \
> -	DRM_FORMAT_RGB565, \
> -	DRM_FORMAT_XRGB8888, \
> -	DRM_FORMAT_ARGB8888
> -
>  /* Primary plane formats for gen <= 3 */
>  static const uint32_t i8xx_primary_formats[] = {
> -	COMMON_PRIMARY_FORMATS,
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB1555,
>  	DRM_FORMAT_ARGB1555,
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_ARGB8888,
>  };
>  
>  /* Primary plane formats for gen >= 4 */
>  static const uint32_t i965_primary_formats[] = {
> -	COMMON_PRIMARY_FORMATS, \
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB8888,
>  	DRM_FORMAT_XBGR8888,
> +	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_ABGR8888,
>  	DRM_FORMAT_XRGB2101010,
>  	DRM_FORMAT_ARGB2101010,
> -- 
> 2.1.0
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel OTC
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Re: [PATCH 2/4] drm/i915: Remove ARBG/ABGR 2101010 on platform not supporting those formats

[Ville Syrjälä]

On Fri, May 15, 2015 at 07:06:01PM +0100, Damien Lespiau wrote:
> We just have have VLV and CHV sprites programming the hardware
> differently for the ABGR2101010 so keep them working.

Right. We'd need to update the primary plane programming for VLV/CHV
(and potentially gen4 sprite C) to support it properly. In the meantime
dropping it seems like a good idea. The rest of the platforms definitely
don't list it as a supported format.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 17 +++++++----------
>  1 file changed, 7 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b7e9ae3..5ebac76 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -64,9 +64,7 @@ static const uint32_t i965_primary_formats[] = {
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_ABGR8888,
>  	DRM_FORMAT_XRGB2101010,
> -	DRM_FORMAT_ARGB2101010,
>  	DRM_FORMAT_XBGR2101010,
> -	DRM_FORMAT_ABGR2101010,
>  };
>  
>  /* Cursor formats */
> @@ -2716,11 +2714,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> -	case DRM_FORMAT_ARGB2101010:
>  		dspcntr |= DISPPLANE_BGRX101010;
>  		break;
>  	case DRM_FORMAT_XBGR2101010:
> -	case DRM_FORMAT_ABGR2101010:
>  		dspcntr |= DISPPLANE_RGBX101010;
>  		break;
>  	default:
> @@ -2824,11 +2820,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> -	case DRM_FORMAT_ARGB2101010:
>  		dspcntr |= DISPPLANE_BGRX101010;
>  		break;
>  	case DRM_FORMAT_XBGR2101010:
> -	case DRM_FORMAT_ABGR2101010:
>  		dspcntr |= DISPPLANE_RGBX101010;
>  		break;
>  	default:
> @@ -4542,9 +4536,7 @@ skl_update_scaler_users(
>  		case DRM_FORMAT_ABGR8888:
>  		case DRM_FORMAT_ARGB8888:
>  		case DRM_FORMAT_XRGB2101010:
> -		case DRM_FORMAT_ARGB2101010:
>  		case DRM_FORMAT_XBGR2101010:
> -		case DRM_FORMAT_ABGR2101010:
>  		case DRM_FORMAT_YUYV:
>  		case DRM_FORMAT_YVYU:
>  		case DRM_FORMAT_UYVY:
> @@ -13982,15 +13974,20 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_ABGR8888:
>  	case DRM_FORMAT_XRGB2101010:
> -	case DRM_FORMAT_ARGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
> -	case DRM_FORMAT_ABGR2101010:
>  		if (INTEL_INFO(dev)->gen < 4) {
>  			DRM_DEBUG("unsupported pixel format: %s\n",
>  				  drm_get_format_name(mode_cmd->pixel_format));
>  			return -EINVAL;
>  		}
>  		break;
> +	case DRM_FORMAT_ABGR2101010:
> +		if (!IS_VALLEYVIEW(dev)) {
> +			DRM_DEBUG("unsupported pixel format: %s\n",
> +				  drm_get_format_name(mode_cmd->pixel_format));
> +			return -EINVAL;
> +		}
> +		break;
>  	case DRM_FORMAT_YUYV:
>  	case DRM_FORMAT_UYVY:
>  	case DRM_FORMAT_YVYU:
> -- 
> 2.1.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel OTC
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Re: [PATCH 3/4] drm/i915: Don't expose RGB/BGR 8888 formats on primary planes before SKL

[Ville Syrjälä]

On Fri, May 15, 2015 at 07:06:02PM +0100, Damien Lespiau wrote:
> We don't actually do anything different for the A version of the 8888
> RGB formats before SKL. Don't let user space think we can support alpha
> blending.

gen2/3 planes B/C, gen4 plane C, and all VLV/CHV primary planes might
support alpha, but yeah we don't program them that way currently. So
dropping it all first and then adding back as needed for each relevant
platform seems like the best approach.

> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++++++-----------
>  1 file changed, 24 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5ebac76..c784f9a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -52,7 +52,6 @@ static const uint32_t i8xx_primary_formats[] = {
>  	DRM_FORMAT_XRGB1555,
>  	DRM_FORMAT_ARGB1555,
>  	DRM_FORMAT_XRGB8888,
> -	DRM_FORMAT_ARGB8888,
>  };
>  
>  /* Primary plane formats for gen >= 4 */
> @@ -61,6 +60,15 @@ static const uint32_t i965_primary_formats[] = {
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
>  	DRM_FORMAT_XBGR8888,
> +	DRM_FORMAT_XRGB2101010,
> +	DRM_FORMAT_XBGR2101010,
> +};
> +
> +static const uint32_t skl_primary_formats[] = {
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_XBGR8888,
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_ABGR8888,
>  	DRM_FORMAT_XRGB2101010,
> @@ -2706,11 +2714,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_BGRX565;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		dspcntr |= DISPPLANE_BGRX888;
>  		break;
>  	case DRM_FORMAT_XBGR8888:
> -	case DRM_FORMAT_ABGR8888:
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> @@ -2812,11 +2818,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_BGRX565;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		dspcntr |= DISPPLANE_BGRX888;
>  		break;
>  	case DRM_FORMAT_XBGR8888:
> -	case DRM_FORMAT_ABGR8888:
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> @@ -13278,12 +13282,15 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
>  	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
>  		primary->plane = !pipe;
>  
> -	if (INTEL_INFO(dev)->gen <= 3) {
> -		intel_primary_formats = i8xx_primary_formats;
> -		num_formats = ARRAY_SIZE(i8xx_primary_formats);
> -	} else {
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		intel_primary_formats = skl_primary_formats;
> +		num_formats = ARRAY_SIZE(skl_primary_formats);
> +	} else if (INTEL_INFO(dev)->gen >= 4) {
>  		intel_primary_formats = i965_primary_formats;
>  		num_formats = ARRAY_SIZE(i965_primary_formats);
> +	} else {
> +		intel_primary_formats = i8xx_primary_formats;
> +		num_formats = ARRAY_SIZE(i8xx_primary_formats);
>  	}
>  
>  	drm_universal_plane_init(dev, &primary->base, 0,
> @@ -13961,7 +13968,6 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  	case DRM_FORMAT_C8:
>  	case DRM_FORMAT_RGB565:
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		break;
>  	case DRM_FORMAT_XRGB1555:
>  	case DRM_FORMAT_ARGB1555:
> @@ -13971,8 +13977,15 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  			return -EINVAL;
>  		}
>  		break;
> -	case DRM_FORMAT_XBGR8888:
> +	case DRM_FORMAT_ARGB8888:
>  	case DRM_FORMAT_ABGR8888:
> +		if (!IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen < 9) {

&&

With that fixed this is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>


> +			DRM_DEBUG("unsupported pixel format: %s\n",
> +				  drm_get_format_name(mode_cmd->pixel_format));
> +			return -EINVAL;
> +		}
> +		break;
> +	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
>  		if (INTEL_INFO(dev)->gen < 4) {
> -- 
> 2.1.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel OTC
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Re: [PATCH 4/4] drm/i915: Don't expose ARGB1555 on gen2/3

[Ville Syrjälä]

On Fri, May 15, 2015 at 07:06:03PM +0100, Damien Lespiau wrote:
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Based on the docs these probably only support alpha with the 8888
format.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c784f9a..c957a45 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -50,7 +50,6 @@ static const uint32_t i8xx_primary_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB1555,
> -	DRM_FORMAT_ARGB1555,
>  	DRM_FORMAT_XRGB8888,
>  };
>  
> @@ -2707,7 +2706,6 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_8BPP;
>  		break;
>  	case DRM_FORMAT_XRGB1555:
> -	case DRM_FORMAT_ARGB1555:
>  		dspcntr |= DISPPLANE_BGRX555;
>  		break;
>  	case DRM_FORMAT_RGB565:
> @@ -13970,7 +13968,6 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  	case DRM_FORMAT_XRGB8888:
>  		break;
>  	case DRM_FORMAT_XRGB1555:
> -	case DRM_FORMAT_ARGB1555:
>  		if (INTEL_INFO(dev)->gen > 3) {
>  			DRM_DEBUG("unsupported pixel format: %s\n",
>  				  drm_get_format_name(mode_cmd->pixel_format));
> -- 
> 2.1.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Intel OTC
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[PATCH v2] drm/i915: Don't expose RGB/BGR 8888 formats on primary planes before SKL

[Damien Lespiau]

We don't actually do anything different for the A version of the 8888
RGB formats before SKL. Don't let user space think we can support alpha
blending.

v2: Fix the logic to forbid the creation ABGR2101010 fbs (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ebac76..f75505e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -52,7 +52,6 @@ static const uint32_t i8xx_primary_formats[] = {
 	DRM_FORMAT_XRGB1555,
 	DRM_FORMAT_ARGB1555,
 	DRM_FORMAT_XRGB8888,
-	DRM_FORMAT_ARGB8888,
 };
 
 /* Primary plane formats for gen >= 4 */
@@ -61,6 +60,15 @@ static const uint32_t i965_primary_formats[] = {
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
 	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+};
+
+static const uint32_t skl_primary_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
 	DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
@@ -2706,11 +2714,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_BGRX565;
 		break;
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		dspcntr |= DISPPLANE_BGRX888;
 		break;
 	case DRM_FORMAT_XBGR8888:
-	case DRM_FORMAT_ABGR8888:
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
@@ -2812,11 +2818,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_BGRX565;
 		break;
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		dspcntr |= DISPPLANE_BGRX888;
 		break;
 	case DRM_FORMAT_XBGR8888:
-	case DRM_FORMAT_ABGR8888:
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
@@ -13278,12 +13282,15 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
 		primary->plane = !pipe;
 
-	if (INTEL_INFO(dev)->gen <= 3) {
-		intel_primary_formats = i8xx_primary_formats;
-		num_formats = ARRAY_SIZE(i8xx_primary_formats);
-	} else {
+	if (INTEL_INFO(dev)->gen >= 9) {
+		intel_primary_formats = skl_primary_formats;
+		num_formats = ARRAY_SIZE(skl_primary_formats);
+	} else if (INTEL_INFO(dev)->gen >= 4) {
 		intel_primary_formats = i965_primary_formats;
 		num_formats = ARRAY_SIZE(i965_primary_formats);
+	} else {
+		intel_primary_formats = i8xx_primary_formats;
+		num_formats = ARRAY_SIZE(i8xx_primary_formats);
 	}
 
 	drm_universal_plane_init(dev, &primary->base, 0,
@@ -13961,7 +13968,6 @@ static int intel_framebuffer_init(struct drm_device *dev,
 	case DRM_FORMAT_C8:
 	case DRM_FORMAT_RGB565:
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		break;
 	case DRM_FORMAT_XRGB1555:
 	case DRM_FORMAT_ARGB1555:
@@ -13971,8 +13977,15 @@ static int intel_framebuffer_init(struct drm_device *dev,
 			return -EINVAL;
 		}
 		break;
-	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ARGB8888:
 	case DRM_FORMAT_ABGR8888:
+		if (!IS_VALLEYVIEW(dev) && INTEL_INFO(dev)->gen < 9) {
+			DRM_DEBUG("unsupported pixel format: %s\n",
+				  drm_get_format_name(mode_cmd->pixel_format));
+			return -EINVAL;
+		}
+		break;
+	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
 		if (INTEL_INFO(dev)->gen < 4) {
-- 
2.1.0

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Re: [PATCH 4/4] drm/i915: Don't expose ARGB1555 on gen2/3

[Daniel Vetter]

On Fri, May 15, 2015 at 09:57:56PM +0300, Ville Syrjälä wrote:
> On Fri, May 15, 2015 at 07:06:03PM +0100, Damien Lespiau wrote:
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> 
> Based on the docs these probably only support alpha with the 8888
> format.
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

All four patches merged to dinq, thanks.
-Daniel
-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 4/4] drm/i915: Don't expose ARGB1555 on gen2/3

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6420
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -1              272/272              271/272
ILK                 -1              302/302              301/302
SNB                 -3              315/315              312/315
IVB                 -11              343/343              332/343
BYT                                  287/287              287/287
BDW                                  317/317              317/317
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt@gem_fence_thrash@bo-write-verify-threaded-none      PASS(2)      FAIL(1)
*ILK  igt@kms_render@direct-render      PASS(2)      FAIL(1)
*SNB  igt@kms_cursor_crc@cursor-size-change      PASS(2)      FAIL(1)
*SNB  igt@pm_rpm@cursor      PASS(2)      FAIL(1)
 SNB  igt@pm_rpm@dpms-mode-unset-non-lpsp      DMESG_WARN(8)PASS(1)      DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
*IVB  igt@kms_cursor_crc@cursor-128x128-onscreen      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-128x128-random      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-128x128-sliding      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-256x256-offscreen      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-256x256-onscreen      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-256x256-sliding      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-64x64-offscreen      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-64x64-onscreen      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-64x64-random      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-64x64-sliding      PASS(2)      FAIL(1)
*IVB  igt@kms_cursor_crc@cursor-size-change      PASS(2)      FAIL(1)
Note: You need to pay more attention to line start with '*'
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Re: [PATCH v2] drm/i915: Don't expose RGB/BGR 8888 formats on primary planes before SKL

[Daniel Vetter]

On Fri, May 15, 2015 at 08:15:42PM +0100, Damien Lespiau wrote:
> We don't actually do anything different for the A version of the 8888
> RGB formats before SKL. Don't let user space think we can support alpha
> blending.
> 
> v2: Fix the logic to forbid the creation ABGR2101010 fbs (Ville)
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++++++-----------
>  1 file changed, 24 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5ebac76..f75505e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -52,7 +52,6 @@ static const uint32_t i8xx_primary_formats[] = {
>  	DRM_FORMAT_XRGB1555,
>  	DRM_FORMAT_ARGB1555,
>  	DRM_FORMAT_XRGB8888,
> -	DRM_FORMAT_ARGB8888,
>  };
>  
>  /* Primary plane formats for gen >= 4 */
> @@ -61,6 +60,15 @@ static const uint32_t i965_primary_formats[] = {
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
>  	DRM_FORMAT_XBGR8888,
> +	DRM_FORMAT_XRGB2101010,
> +	DRM_FORMAT_XBGR2101010,
> +};
> +
> +static const uint32_t skl_primary_formats[] = {
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_XBGR8888,
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_ABGR8888,
>  	DRM_FORMAT_XRGB2101010,
> @@ -2706,11 +2714,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_BGRX565;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		dspcntr |= DISPPLANE_BGRX888;
>  		break;
>  	case DRM_FORMAT_XBGR8888:
> -	case DRM_FORMAT_ABGR8888:
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> @@ -2812,11 +2818,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_BGRX565;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		dspcntr |= DISPPLANE_BGRX888;
>  		break;
>  	case DRM_FORMAT_XBGR8888:
> -	case DRM_FORMAT_ABGR8888:
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> @@ -13278,12 +13282,15 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
>  	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
>  		primary->plane = !pipe;
>  
> -	if (INTEL_INFO(dev)->gen <= 3) {
> -		intel_primary_formats = i8xx_primary_formats;
> -		num_formats = ARRAY_SIZE(i8xx_primary_formats);
> -	} else {
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		intel_primary_formats = skl_primary_formats;
> +		num_formats = ARRAY_SIZE(skl_primary_formats);
> +	} else if (INTEL_INFO(dev)->gen >= 4) {
>  		intel_primary_formats = i965_primary_formats;
>  		num_formats = ARRAY_SIZE(i965_primary_formats);
> +	} else {
> +		intel_primary_formats = i8xx_primary_formats;
> +		num_formats = ARRAY_SIZE(i8xx_primary_formats);
>  	}
>  
>  	drm_universal_plane_init(dev, &primary->base, 0,
> @@ -13961,7 +13968,6 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  	case DRM_FORMAT_C8:
>  	case DRM_FORMAT_RGB565:
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		break;
>  	case DRM_FORMAT_XRGB1555:
>  	case DRM_FORMAT_ARGB1555:
> @@ -13971,8 +13977,15 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  			return -EINVAL;
>  		}
>  		break;
> -	case DRM_FORMAT_XBGR8888:
> +	case DRM_FORMAT_ARGB8888:
>  	case DRM_FORMAT_ABGR8888:
> +		if (!IS_VALLEYVIEW(dev) && INTEL_INFO(dev)->gen < 9) {
> +			DRM_DEBUG("unsupported pixel format: %s\n",
> +				  drm_get_format_name(mode_cmd->pixel_format));
> +			return -EINVAL;
> +		}
> +		break;
> +	case DRM_FORMAT_XBGR8888:

These two hunks break cursor support, since with universal planes we
really want to be able to create rgba8888 for the cursor ...

I dropped the patch meanwhile, can you please resend?

Thanks, Daniel

>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
>  		if (INTEL_INFO(dev)->gen < 4) {
> -- 
> 2.1.0
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[PATCH 3/4 v3] drm/i915: Tighten the exposure ARGB/ABGR 8888 formats

[Damien Lespiau]

ARGB8888 is used for cursors on all platforms so we need to allow it
everywhere.

ABGR8888 is currently only honoured:
  - on VLV/CHV in sprite planes
  - on SKL+ for primary and sprite planes
so only allow it for those platforms.

Note that we only support ARGB8888/ABGR8888 on the primary plane for
SKL/BXT because we have in line of sight the pipe bottom color on those
platforms and because the primary plane programming on VLV/CHV doesn't
anything different for those formats today.

v2: Fix the logic to forbid the creation ABGR2101010 fbs (Ville)
v3: Still allow the creation of ARGB8888 fbs now that cursor planes use
    real fb objects (found by PRTS).

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 33 +++++++++++++++++++++++----------
 1 file changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8a3d936..9d2d6fb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -51,7 +51,6 @@ static const uint32_t i8xx_primary_formats[] = {
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB1555,
 	DRM_FORMAT_XRGB8888,
-	DRM_FORMAT_ARGB8888,
 };
 
 /* Primary plane formats for gen >= 4 */
@@ -60,6 +59,15 @@ static const uint32_t i965_primary_formats[] = {
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
 	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_XRGB2101010,
+	DRM_FORMAT_XBGR2101010,
+};
+
+static const uint32_t skl_primary_formats[] = {
+	DRM_FORMAT_C8,
+	DRM_FORMAT_RGB565,
+	DRM_FORMAT_XRGB8888,
+	DRM_FORMAT_XBGR8888,
 	DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_ABGR8888,
 	DRM_FORMAT_XRGB2101010,
@@ -2704,11 +2712,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_BGRX565;
 		break;
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		dspcntr |= DISPPLANE_BGRX888;
 		break;
 	case DRM_FORMAT_XBGR8888:
-	case DRM_FORMAT_ABGR8888:
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
@@ -2810,11 +2816,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
 		dspcntr |= DISPPLANE_BGRX565;
 		break;
 	case DRM_FORMAT_XRGB8888:
-	case DRM_FORMAT_ARGB8888:
 		dspcntr |= DISPPLANE_BGRX888;
 		break;
 	case DRM_FORMAT_XBGR8888:
-	case DRM_FORMAT_ABGR8888:
 		dspcntr |= DISPPLANE_RGBX888;
 		break;
 	case DRM_FORMAT_XRGB2101010:
@@ -13293,12 +13297,15 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
 		primary->plane = !pipe;
 
-	if (INTEL_INFO(dev)->gen <= 3) {
-		intel_primary_formats = i8xx_primary_formats;
-		num_formats = ARRAY_SIZE(i8xx_primary_formats);
-	} else {
+	if (INTEL_INFO(dev)->gen >= 9) {
+		intel_primary_formats = skl_primary_formats;
+		num_formats = ARRAY_SIZE(skl_primary_formats);
+	} else if (INTEL_INFO(dev)->gen >= 4) {
 		intel_primary_formats = i965_primary_formats;
 		num_formats = ARRAY_SIZE(i965_primary_formats);
+	} else {
+		intel_primary_formats = i8xx_primary_formats;
+		num_formats = ARRAY_SIZE(i8xx_primary_formats);
 	}
 
 	drm_universal_plane_init(dev, &primary->base, 0,
@@ -13985,8 +13992,14 @@ static int intel_framebuffer_init(struct drm_device *dev,
 			return -EINVAL;
 		}
 		break;
-	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_ABGR8888:
+		if (!IS_VALLEYVIEW(dev) && INTEL_INFO(dev)->gen < 9) {
+			DRM_DEBUG("unsupported pixel format: %s\n",
+				  drm_get_format_name(mode_cmd->pixel_format));
+			return -EINVAL;
+		}
+		break;
+	case DRM_FORMAT_XBGR8888:
 	case DRM_FORMAT_XRGB2101010:
 	case DRM_FORMAT_XBGR2101010:
 		if (INTEL_INFO(dev)->gen < 4) {
-- 
2.1.0

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Re: [PATCH 3/4 v3] drm/i915: Tighten the exposure ARGB/ABGR 8888 formats

[Daniel Vetter]

On Tue, May 19, 2015 at 12:29:16PM +0100, Damien Lespiau wrote:
> ARGB8888 is used for cursors on all platforms so we need to allow it
> everywhere.
> 
> ABGR8888 is currently only honoured:
>   - on VLV/CHV in sprite planes
>   - on SKL+ for primary and sprite planes
> so only allow it for those platforms.
> 
> Note that we only support ARGB8888/ABGR8888 on the primary plane for
> SKL/BXT because we have in line of sight the pipe bottom color on those
> platforms and because the primary plane programming on VLV/CHV doesn't
> anything different for those formats today.
> 
> v2: Fix the logic to forbid the creation ABGR2101010 fbs (Ville)
> v3: Still allow the creation of ARGB8888 fbs now that cursor planes use
>     real fb objects (found by PRTS).
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Let's retry. Queued for -next, thanks for the patch.
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_display.c | 33 +++++++++++++++++++++++----------
>  1 file changed, 23 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 8a3d936..9d2d6fb 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -51,7 +51,6 @@ static const uint32_t i8xx_primary_formats[] = {
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB1555,
>  	DRM_FORMAT_XRGB8888,
> -	DRM_FORMAT_ARGB8888,
>  };
>  
>  /* Primary plane formats for gen >= 4 */
> @@ -60,6 +59,15 @@ static const uint32_t i965_primary_formats[] = {
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
>  	DRM_FORMAT_XBGR8888,
> +	DRM_FORMAT_XRGB2101010,
> +	DRM_FORMAT_XBGR2101010,
> +};
> +
> +static const uint32_t skl_primary_formats[] = {
> +	DRM_FORMAT_C8,
> +	DRM_FORMAT_RGB565,
> +	DRM_FORMAT_XRGB8888,
> +	DRM_FORMAT_XBGR8888,
>  	DRM_FORMAT_ARGB8888,
>  	DRM_FORMAT_ABGR8888,
>  	DRM_FORMAT_XRGB2101010,
> @@ -2704,11 +2712,9 @@ static void i9xx_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_BGRX565;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		dspcntr |= DISPPLANE_BGRX888;
>  		break;
>  	case DRM_FORMAT_XBGR8888:
> -	case DRM_FORMAT_ABGR8888:
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> @@ -2810,11 +2816,9 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
>  		dspcntr |= DISPPLANE_BGRX565;
>  		break;
>  	case DRM_FORMAT_XRGB8888:
> -	case DRM_FORMAT_ARGB8888:
>  		dspcntr |= DISPPLANE_BGRX888;
>  		break;
>  	case DRM_FORMAT_XBGR8888:
> -	case DRM_FORMAT_ABGR8888:
>  		dspcntr |= DISPPLANE_RGBX888;
>  		break;
>  	case DRM_FORMAT_XRGB2101010:
> @@ -13293,12 +13297,15 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
>  	if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4)
>  		primary->plane = !pipe;
>  
> -	if (INTEL_INFO(dev)->gen <= 3) {
> -		intel_primary_formats = i8xx_primary_formats;
> -		num_formats = ARRAY_SIZE(i8xx_primary_formats);
> -	} else {
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		intel_primary_formats = skl_primary_formats;
> +		num_formats = ARRAY_SIZE(skl_primary_formats);
> +	} else if (INTEL_INFO(dev)->gen >= 4) {
>  		intel_primary_formats = i965_primary_formats;
>  		num_formats = ARRAY_SIZE(i965_primary_formats);
> +	} else {
> +		intel_primary_formats = i8xx_primary_formats;
> +		num_formats = ARRAY_SIZE(i8xx_primary_formats);
>  	}
>  
>  	drm_universal_plane_init(dev, &primary->base, 0,
> @@ -13985,8 +13992,14 @@ static int intel_framebuffer_init(struct drm_device *dev,
>  			return -EINVAL;
>  		}
>  		break;
> -	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_ABGR8888:
> +		if (!IS_VALLEYVIEW(dev) && INTEL_INFO(dev)->gen < 9) {
> +			DRM_DEBUG("unsupported pixel format: %s\n",
> +				  drm_get_format_name(mode_cmd->pixel_format));
> +			return -EINVAL;
> +		}
> +		break;
> +	case DRM_FORMAT_XBGR8888:
>  	case DRM_FORMAT_XRGB2101010:
>  	case DRM_FORMAT_XBGR2101010:
>  		if (INTEL_INFO(dev)->gen < 4) {
> -- 
> 2.1.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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