All of lore.kernel.org
 help / color / mirror / Atom feed
From: Stefan Agner <stefan@agner.ch>
To: shawn.guo@linaro.org, kernel@pengutronix.de, jason@lakedaemon.net
Cc: marc.zyngier@arm.com, linux@arm.linux.org.uk,
	u.kleine-koenig@pengutronix.de, olof@lixom.net, arnd@arndb.de,
	daniel.lezcano@linaro.org, tglx@linutronix.de,
	mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
	mcoquelin.stm32@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Stefan Agner <stefan@agner.ch>
Subject: [PATCH v7 05/13] irqchip: vf610-mscm: support NVIC parent
Date: Sat, 16 May 2015 11:44:17 +0200	[thread overview]
Message-ID: <1431769465-26867-6-git-send-email-stefan@agner.ch> (raw)
In-Reply-To: <1431769465-26867-1-git-send-email-stefan@agner.ch>

Support the NVIC interrupt controller as node parent of the MSCM
interrupt router. On the dual-core variants of Vybird (VF6xx), the
NVIC interrupt controller is used by the Cortex-M4. To support
running Linux on this core too, MSCM needs NVIC parent support too.

Signed-off-by: Stefan Agner <stefan@agner.ch>
---
 drivers/irqchip/irq-vf610-mscm-ir.c | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/irqchip/irq-vf610-mscm-ir.c b/drivers/irqchip/irq-vf610-mscm-ir.c
index 9521057..b932ecb 100644
--- a/drivers/irqchip/irq-vf610-mscm-ir.c
+++ b/drivers/irqchip/irq-vf610-mscm-ir.c
@@ -47,6 +47,7 @@ struct vf610_mscm_ir_chip_data {
 	void __iomem *mscm_ir_base;
 	u16 cpu_mask;
 	u16 saved_irsprc[MSCM_IRSPRC_NUM];
+	bool is_nvic;
 };
 
 static struct vf610_mscm_ir_chip_data *mscm_ir_data;
@@ -101,7 +102,7 @@ static void vf610_mscm_ir_enable(struct irq_data *data)
 	writew_relaxed(chip_data->cpu_mask,
 		       chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
 
-	irq_chip_unmask_parent(data);
+	irq_chip_enable_parent(data);
 }
 
 static void vf610_mscm_ir_disable(struct irq_data *data)
@@ -111,7 +112,7 @@ static void vf610_mscm_ir_disable(struct irq_data *data)
 
 	writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
 
-	irq_chip_mask_parent(data);
+	irq_chip_disable_parent(data);
 }
 
 static struct irq_chip vf610_mscm_ir_irq_chip = {
@@ -143,10 +144,17 @@ static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int vi
 					      domain->host_data);
 
 	gic_data.np = domain->parent->of_node;
-	gic_data.args_count = 3;
-	gic_data.args[0] = GIC_SPI;
-	gic_data.args[1] = irq_data->args[0];
-	gic_data.args[2] = irq_data->args[1];
+
+	if (mscm_ir_data->is_nvic) {
+		gic_data.args_count = 1;
+		gic_data.args[0] = irq_data->args[0];
+	} else {
+		gic_data.args_count = 3;
+		gic_data.args[0] = GIC_SPI;
+		gic_data.args[1] = irq_data->args[0];
+		gic_data.args[2] = irq_data->args[1];
+	}
+
 	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
 }
 
@@ -199,6 +207,9 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node,
 		goto out_unmap;
 	}
 
+	if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic"))
+		mscm_ir_data->is_nvic = true;
+
 	cpu_pm_register_notifier(&mscm_ir_notifier_block);
 
 	return 0;
-- 
2.4.1


WARNING: multiple messages have this Message-ID (diff)
From: stefan@agner.ch (Stefan Agner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 05/13] irqchip: vf610-mscm: support NVIC parent
Date: Sat, 16 May 2015 11:44:17 +0200	[thread overview]
Message-ID: <1431769465-26867-6-git-send-email-stefan@agner.ch> (raw)
In-Reply-To: <1431769465-26867-1-git-send-email-stefan@agner.ch>

Support the NVIC interrupt controller as node parent of the MSCM
interrupt router. On the dual-core variants of Vybird (VF6xx), the
NVIC interrupt controller is used by the Cortex-M4. To support
running Linux on this core too, MSCM needs NVIC parent support too.

Signed-off-by: Stefan Agner <stefan@agner.ch>
---
 drivers/irqchip/irq-vf610-mscm-ir.c | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/irqchip/irq-vf610-mscm-ir.c b/drivers/irqchip/irq-vf610-mscm-ir.c
index 9521057..b932ecb 100644
--- a/drivers/irqchip/irq-vf610-mscm-ir.c
+++ b/drivers/irqchip/irq-vf610-mscm-ir.c
@@ -47,6 +47,7 @@ struct vf610_mscm_ir_chip_data {
 	void __iomem *mscm_ir_base;
 	u16 cpu_mask;
 	u16 saved_irsprc[MSCM_IRSPRC_NUM];
+	bool is_nvic;
 };
 
 static struct vf610_mscm_ir_chip_data *mscm_ir_data;
@@ -101,7 +102,7 @@ static void vf610_mscm_ir_enable(struct irq_data *data)
 	writew_relaxed(chip_data->cpu_mask,
 		       chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
 
-	irq_chip_unmask_parent(data);
+	irq_chip_enable_parent(data);
 }
 
 static void vf610_mscm_ir_disable(struct irq_data *data)
@@ -111,7 +112,7 @@ static void vf610_mscm_ir_disable(struct irq_data *data)
 
 	writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
 
-	irq_chip_mask_parent(data);
+	irq_chip_disable_parent(data);
 }
 
 static struct irq_chip vf610_mscm_ir_irq_chip = {
@@ -143,10 +144,17 @@ static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int vi
 					      domain->host_data);
 
 	gic_data.np = domain->parent->of_node;
-	gic_data.args_count = 3;
-	gic_data.args[0] = GIC_SPI;
-	gic_data.args[1] = irq_data->args[0];
-	gic_data.args[2] = irq_data->args[1];
+
+	if (mscm_ir_data->is_nvic) {
+		gic_data.args_count = 1;
+		gic_data.args[0] = irq_data->args[0];
+	} else {
+		gic_data.args_count = 3;
+		gic_data.args[0] = GIC_SPI;
+		gic_data.args[1] = irq_data->args[0];
+		gic_data.args[2] = irq_data->args[1];
+	}
+
 	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
 }
 
@@ -199,6 +207,9 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node,
 		goto out_unmap;
 	}
 
+	if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic"))
+		mscm_ir_data->is_nvic = true;
+
 	cpu_pm_register_notifier(&mscm_ir_notifier_block);
 
 	return 0;
-- 
2.4.1

  parent reply	other threads:[~2015-05-16  9:46 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-16  9:44 [PATCH v7 00/13] ARM: vf610m4: Add Vybrid Cortex-M4 support Stefan Agner
2015-05-16  9:44 ` Stefan Agner
2015-05-16  9:44 ` Stefan Agner
2015-05-16  9:44 ` [PATCH v7 01/13] irqdomain: Add non-hierarchy helper irq_domain_set_info Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-18 15:36   ` [tip:irq/core] " tip-bot for Stefan Agner
2015-05-16  9:44 ` [PATCH v7 02/13] genirq: Add irq_chip_(enable|disable)_parent Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-18 15:36   ` [tip:irq/core] genirq: Add irq_chip_(enable/disable)_parent tip-bot for Stefan Agner
2015-05-16  9:44 ` [PATCH v7 03/13] genirq: generic chip: support hierarchy domain Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-18 15:37   ` [tip:irq/core] genirq: generic chip: Support " tip-bot for Stefan Agner
2015-05-16  9:44 ` [PATCH v7 04/13] irqchip: nvic: support hierarchy irq domain Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-18 15:37   ` [tip:irq/core] irqchip: nvic: Support " tip-bot for Stefan Agner
2015-05-16  9:44 ` Stefan Agner [this message]
2015-05-16  9:44   ` [PATCH v7 05/13] irqchip: vf610-mscm: support NVIC parent Stefan Agner
2015-05-18 15:37   ` [tip:irq/core] irqchip: vf610-mscm: Support NVIC parent chip tip-bot for Stefan Agner
2015-05-18 22:03   ` tip-bot for Stefan Agner
2015-05-16  9:44 ` [PATCH v7 06/13] ARM: ARMv7M: define size of vector table for Vybrid Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44 ` [PATCH v7 07/13] clocksource: add dependencies for Vybrid pit clocksource Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44 ` [PATCH v7 08/13] ARM: unify MMU/!MMU addruart calls Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16 20:51   ` Russell King - ARM Linux
2015-05-16 20:51     ` Russell King - ARM Linux
2015-05-17  7:53     ` Thomas Gleixner
2015-05-17  7:53       ` Thomas Gleixner
2015-05-18 15:36       ` Thomas Gleixner
2015-05-18 15:36         ` Thomas Gleixner
2015-05-18 15:36         ` Thomas Gleixner
2015-05-19  5:35         ` Shawn Guo
2015-05-19  5:35           ` Shawn Guo
2015-05-19  8:11           ` Thomas Gleixner
2015-05-19  8:11             ` Thomas Gleixner
2015-05-19  8:56             ` Shawn Guo
2015-05-19  8:56               ` Shawn Guo
2015-05-19 10:16           ` Russell King - ARM Linux
2015-05-19 10:16             ` Russell King - ARM Linux
2015-05-19 10:16             ` Russell King - ARM Linux
2015-05-19 11:23             ` Stefan Agner
2015-05-19 11:23               ` Stefan Agner
2015-05-19 11:23               ` Stefan Agner
2015-05-19 11:50               ` Arnd Bergmann
2015-05-19 11:50                 ` Arnd Bergmann
2015-05-19 16:06                 ` Stefan Agner
2015-05-19 16:06                   ` Stefan Agner
2015-05-19 18:24                   ` Arnd Bergmann
2015-05-19 18:24                     ` Arnd Bergmann
2015-05-19 18:24                     ` Arnd Bergmann
2015-05-19 21:26                     ` Stefan Agner
2015-05-19 21:26                       ` Stefan Agner
2015-05-19 21:26                       ` Stefan Agner
2015-05-19 21:32                       ` Thomas Gleixner
2015-05-19 21:32                         ` Thomas Gleixner
2015-05-19 21:32                         ` Thomas Gleixner
2015-05-19 21:32                         ` Stefan Agner
2015-05-19 21:32                           ` Stefan Agner
2015-05-19 21:37                       ` Arnd Bergmann
2015-05-19 21:37                         ` Arnd Bergmann
2015-05-19 21:37                       ` Joachim Eastwood
2015-05-19 21:37                         ` Joachim Eastwood
2015-05-16  9:44 ` [PATCH v7 09/13] ARM: introduce ARM_SINGLE_ARMV7M for ARMv7-M platforms Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44 ` [PATCH v7 10/13] ARM: efm32: use ARM_SINGLE_ARMV7M Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-19 12:14   ` Uwe Kleine-König
2015-05-19 12:14     ` Uwe Kleine-König
2015-05-16  9:44 ` [PATCH v7 11/13] ARM: vf610: enable Cortex-M4 configuration on Vybrid SoC Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44 ` [PATCH v7 12/13] ARM: dts: add support for Vybrid running on Cortex-M4 Stefan Agner
2015-05-16  9:44   ` Stefan Agner
2015-05-16  9:44 ` [PATCH v7 13/13] ARM: vf610m4: add defconfig for Linux on Vybrids Cortex-M4 Stefan Agner
2015-05-16  9:44   ` Stefan Agner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1431769465-26867-6-git-send-email-stefan@agner.ch \
    --to=stefan@agner.ch \
    --cc=arnd@arndb.de \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=galak@codeaurora.org \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=jason@lakedaemon.net \
    --cc=kernel@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=mcoquelin.stm32@gmail.com \
    --cc=olof@lixom.net \
    --cc=pawel.moll@arm.com \
    --cc=robh+dt@kernel.org \
    --cc=shawn.guo@linaro.org \
    --cc=tglx@linutronix.de \
    --cc=u.kleine-koenig@pengutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.