* [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version
@ 2015-05-15 18:57 Damien Lespiau
2015-05-15 18:57 ` [PATCH xf86-video-intel 2/2] pciids: Add the Broxton PCI IDs Damien Lespiau
2015-05-15 20:30 ` [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Chris Wilson
0 siblings, 2 replies; 6+ messages in thread
From: Damien Lespiau @ 2015-05-15 18:57 UTC (permalink / raw)
To: intel-gfx
We decided that liked the explicit list of IDs better than the encoded
one. The DDX may like this as well, if just to keep the files identical.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
src/i915_pciids.h | 49 +++++++++++++++++++++++++------------------------
1 file changed, 25 insertions(+), 24 deletions(-)
diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index f2e47fd..6133723 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -208,40 +208,41 @@
#define INTEL_VLV_D_IDS(info) \
INTEL_VGA_DEVICE(0x0155, info)
-#define _INTEL_BDW_M(gt, id, info) \
- INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
-#define _INTEL_BDW_D(gt, id, info) \
- INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
-
-#define _INTEL_BDW_M_IDS(gt, info) \
- _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \
- _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \
- _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \
- _INTEL_BDW_M(gt, 0x160E, info) /* ULX */
-
-#define _INTEL_BDW_D_IDS(gt, info) \
- _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \
- _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */
-
-#define INTEL_BDW_GT12M_IDS(info) \
- _INTEL_BDW_M_IDS(1, info), \
- _INTEL_BDW_M_IDS(2, info)
+#define INTEL_BDW_GT12M_IDS(info) \
+ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
+ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
+ INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
+ INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
+ INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
+ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
+ INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
+ INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
#define INTEL_BDW_GT12D_IDS(info) \
- _INTEL_BDW_D_IDS(1, info), \
- _INTEL_BDW_D_IDS(2, info)
+ INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
+ INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
+ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
+ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
#define INTEL_BDW_GT3M_IDS(info) \
- _INTEL_BDW_M_IDS(3, info)
+ INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
+ INTEL_VGA_DEVICE(0x162E, info) /* ULX */
#define INTEL_BDW_GT3D_IDS(info) \
- _INTEL_BDW_D_IDS(3, info)
+ INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
+ INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
#define INTEL_BDW_RSVDM_IDS(info) \
- _INTEL_BDW_M_IDS(4, info)
+ INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
+ INTEL_VGA_DEVICE(0x163E, info) /* ULX */
#define INTEL_BDW_RSVDD_IDS(info) \
- _INTEL_BDW_D_IDS(4, info)
+ INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
+ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
#define INTEL_BDW_M_IDS(info) \
INTEL_BDW_GT12M_IDS(info), \
--
2.1.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH xf86-video-intel 2/2] pciids: Add the Broxton PCI IDs
2015-05-15 18:57 [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Damien Lespiau
@ 2015-05-15 18:57 ` Damien Lespiau
2015-05-15 20:30 ` [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Chris Wilson
1 sibling, 0 replies; 6+ messages in thread
From: Damien Lespiau @ 2015-05-15 18:57 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
src/i915_pciids.h | 4 ++++
src/intel_module.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index 6133723..17c4456 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -286,5 +286,9 @@
INTEL_SKL_GT2_IDS(info), \
INTEL_SKL_GT3_IDS(info)
+#define INTEL_BXT_IDS(info) \
+ INTEL_VGA_DEVICE(0x0A84, info), \
+ INTEL_VGA_DEVICE(0x1A84, info), \
+ INTEL_VGA_DEVICE(0x5A84, info)
#endif /* _I915_PCIIDS_H */
diff --git a/src/intel_module.c b/src/intel_module.c
index 2a3b016..200133c 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -126,6 +126,9 @@ static const struct intel_device_info intel_skylake_info = {
.gen = 0110,
};
+static const struct intel_device_info intel_broxton_info = {
+ .gen = 0110,
+};
static const SymTabRec intel_chipsets[] = {
{PCI_CHIP_I810, "i810"},
@@ -324,6 +327,8 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_SKL_IDS(&intel_skylake_info),
+ INTEL_BXT_IDS(&intel_broxton_info),
+
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
#endif
--
2.1.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version
2015-05-15 18:57 [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Damien Lespiau
2015-05-15 18:57 ` [PATCH xf86-video-intel 2/2] pciids: Add the Broxton PCI IDs Damien Lespiau
@ 2015-05-15 20:30 ` Chris Wilson
2015-05-18 11:48 ` [PATCH xf86-video-intel v2] " Damien Lespiau
2015-05-18 11:49 ` [PATCH xf86-video-intel 1/2] " Damien Lespiau
1 sibling, 2 replies; 6+ messages in thread
From: Chris Wilson @ 2015-05-15 20:30 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote:
> We decided that liked the explicit list of IDs better than the encoded
> one. The DDX may like this as well, if just to keep the files identical.
The point is that it is an exact copy. I have been referencing the
kernel commit that we sync to each time, e.g.
commit abc9b3f5753d602da296d50c8769cefb88ec473d
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Fri Sep 26 09:22:50 2014 +0100
Add Skylake PCI IDs
From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625
Author: Damien Lespiau <damien.lespiau@intel.com>
Date: Wed Feb 13 15:27:37 2013 +0000
drm/i915/skl: Add the Skylake PCI ids
Just do the same for adding Boxton PCI ids, and give them .gen = 0111
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH xf86-video-intel v2] pciids: Sync the BDW PCI IDs from the kernel version
2015-05-15 20:30 ` [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Chris Wilson
@ 2015-05-18 11:48 ` Damien Lespiau
2015-05-18 11:49 ` [PATCH xf86-video-intel 1/2] " Damien Lespiau
1 sibling, 0 replies; 6+ messages in thread
From: Damien Lespiau @ 2015-05-18 11:48 UTC (permalink / raw)
To: intel-gfx
Sync from kernel commit:
commit 44e5e28bf64fcd7c4d3f933cb4c7f69d8aa11781
Author: Jani Nikula <jani.nikula@intel.com>
Date: Tue Feb 3 14:34:05 2015 +0200
drm/i915: remove indirection in the PCI ID macros
v2: Add a reference to the kernel commit (Chris)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
src/i915_pciids.h | 49 +++++++++++++++++++++++++------------------------
1 file changed, 25 insertions(+), 24 deletions(-)
diff --git a/src/i915_pciids.h b/src/i915_pciids.h
index f2e47fd..6133723 100644
--- a/src/i915_pciids.h
+++ b/src/i915_pciids.h
@@ -208,40 +208,41 @@
#define INTEL_VLV_D_IDS(info) \
INTEL_VGA_DEVICE(0x0155, info)
-#define _INTEL_BDW_M(gt, id, info) \
- INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
-#define _INTEL_BDW_D(gt, id, info) \
- INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
-
-#define _INTEL_BDW_M_IDS(gt, info) \
- _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \
- _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \
- _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \
- _INTEL_BDW_M(gt, 0x160E, info) /* ULX */
-
-#define _INTEL_BDW_D_IDS(gt, info) \
- _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \
- _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */
-
-#define INTEL_BDW_GT12M_IDS(info) \
- _INTEL_BDW_M_IDS(1, info), \
- _INTEL_BDW_M_IDS(2, info)
+#define INTEL_BDW_GT12M_IDS(info) \
+ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
+ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
+ INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
+ INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
+ INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
+ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
+ INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
+ INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
#define INTEL_BDW_GT12D_IDS(info) \
- _INTEL_BDW_D_IDS(1, info), \
- _INTEL_BDW_D_IDS(2, info)
+ INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
+ INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
+ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
+ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
#define INTEL_BDW_GT3M_IDS(info) \
- _INTEL_BDW_M_IDS(3, info)
+ INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
+ INTEL_VGA_DEVICE(0x162E, info) /* ULX */
#define INTEL_BDW_GT3D_IDS(info) \
- _INTEL_BDW_D_IDS(3, info)
+ INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
+ INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
#define INTEL_BDW_RSVDM_IDS(info) \
- _INTEL_BDW_M_IDS(4, info)
+ INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
+ INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
+ INTEL_VGA_DEVICE(0x163E, info) /* ULX */
#define INTEL_BDW_RSVDD_IDS(info) \
- _INTEL_BDW_D_IDS(4, info)
+ INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
+ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
#define INTEL_BDW_M_IDS(info) \
INTEL_BDW_GT12M_IDS(info), \
--
2.1.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version
2015-05-15 20:30 ` [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Chris Wilson
2015-05-18 11:48 ` [PATCH xf86-video-intel v2] " Damien Lespiau
@ 2015-05-18 11:49 ` Damien Lespiau
2015-05-18 12:00 ` Chris Wilson
1 sibling, 1 reply; 6+ messages in thread
From: Damien Lespiau @ 2015-05-18 11:49 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Fri, May 15, 2015 at 09:30:10PM +0100, Chris Wilson wrote:
> On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote:
> > We decided that liked the explicit list of IDs better than the encoded
> > one. The DDX may like this as well, if just to keep the files identical.
>
> The point is that it is an exact copy. I have been referencing the
> kernel commit that we sync to each time, e.g.
>
> commit abc9b3f5753d602da296d50c8769cefb88ec473d
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date: Fri Sep 26 09:22:50 2014 +0100
>
> Add Skylake PCI IDs
>
> From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625
> Author: Damien Lespiau <damien.lespiau@intel.com>
> Date: Wed Feb 13 15:27:37 2013 +0000
>
> drm/i915/skl: Add the Skylake PCI ids
>
> Just do the same for adding Boxton PCI ids, and give them .gen = 0111
I guess we'll have to wait for the BXT kernel patch to have a real hash?
--
Damien
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version
2015-05-18 11:49 ` [PATCH xf86-video-intel 1/2] " Damien Lespiau
@ 2015-05-18 12:00 ` Chris Wilson
0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2015-05-18 12:00 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Mon, May 18, 2015 at 12:49:30PM +0100, Damien Lespiau wrote:
> On Fri, May 15, 2015 at 09:30:10PM +0100, Chris Wilson wrote:
> > On Fri, May 15, 2015 at 07:57:13PM +0100, Damien Lespiau wrote:
> > > We decided that liked the explicit list of IDs better than the encoded
> > > one. The DDX may like this as well, if just to keep the files identical.
> >
> > The point is that it is an exact copy. I have been referencing the
> > kernel commit that we sync to each time, e.g.
> >
> > commit abc9b3f5753d602da296d50c8769cefb88ec473d
> > Author: Chris Wilson <chris@chris-wilson.co.uk>
> > Date: Fri Sep 26 09:22:50 2014 +0100
> >
> > Add Skylake PCI IDs
> >
> > From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625
> > Author: Damien Lespiau <damien.lespiau@intel.com>
> > Date: Wed Feb 13 15:27:37 2013 +0000
> >
> > drm/i915/skl: Add the Skylake PCI ids
> >
> > Just do the same for adding Boxton PCI ids, and give them .gen = 0111
>
> I guess we'll have to wait for the BXT kernel patch to have a real hash?
Yes, I like the cascade of authority from the kernel.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-05-18 12:00 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-05-15 18:57 [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Damien Lespiau
2015-05-15 18:57 ` [PATCH xf86-video-intel 2/2] pciids: Add the Broxton PCI IDs Damien Lespiau
2015-05-15 20:30 ` [PATCH xf86-video-intel 1/2] pciids: Sync the BDW PCI IDs from the kernel version Chris Wilson
2015-05-18 11:48 ` [PATCH xf86-video-intel v2] " Damien Lespiau
2015-05-18 11:49 ` [PATCH xf86-video-intel 1/2] " Damien Lespiau
2015-05-18 12:00 ` Chris Wilson
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