World-switch architected component flushing/invalidating.

World-switch architected component flushing/invalidating.

[Mazen Ezzeddine (Student)]

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Dear all,


Could you please hint me about the below:

I need to flush/invalidate all architected components (all levels of D-cache/I-cache, I-TLB D-TLB, branch predictor etc..) on Xen world/Domain switch running on a dual core ARM cortex A-15.

As such, am I on the safe side if I include the invalidate/flush code in the function :

static void schedule(void)

{

-----

-----

// code for invalidation of architected components

context_switch(prev, next);

}


Is there a header file to include and use already-implemented xen-specific functions for cache/TLB/branchPredictor invalidating? Could you please route me to the Xen file where they are implemented.


Thank you for sharing your experience.



Best regards.




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Re: World-switch architected component flushing/invalidating.

[Ian Campbell]

On Tue, 2015-05-19 at 15:23 +0000, Mazen Ezzeddine (Student) wrote:
> Is there a header file to include and use already-implemented
> xen-specific functions for cache/TLB/branchPredictor invalidating?
> Could you please route me to the Xen file where they are implemented.

I suggest you use a tool such as "grep" to search for some key words and
associated register names in the xen source tree. You may want to pay
particular attention to xen/include/asm-arm.

Ian.