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* [PATCH v2] Limit CHV max cdclk
@ 2015-06-11  7:54 Mika Kahola
  2015-06-11  7:54 ` [PATCH v2] drm/i915: " Mika Kahola
  0 siblings, 1 reply; 5+ messages in thread
From: Mika Kahola @ 2015-06-11  7:54 UTC (permalink / raw)
  To: intel-gfx

For Cherryview the CD clock is limited up
to 320MHz.

Mika Kahola (1):
  drm/i915: Limit CHV max cdclk

 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
1.9.1

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH v2] drm/i915: Limit CHV max cdclk
  2015-06-11  7:54 [PATCH v2] Limit CHV max cdclk Mika Kahola
@ 2015-06-11  7:54 ` Mika Kahola
  2015-06-11  9:03   ` Jani Nikula
  2015-06-14 16:14   ` shuang.he
  0 siblings, 2 replies; 5+ messages in thread
From: Mika Kahola @ 2015-06-11  7:54 UTC (permalink / raw)
  To: intel-gfx

Limit CHV maximum cdclk to 320MHz.

v2: Rebase to the latest

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c38c297..ab40d04 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
 		else
 			dev_priv->max_cdclk_freq = 675000;
 	} else if (IS_VALLEYVIEW(dev)) {
-		dev_priv->max_cdclk_freq = 400000;
+		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;
 	} else {
 		/* otherwise assume cdclk is fixed */
 		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
-- 
1.9.1

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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] drm/i915: Limit CHV max cdclk
  2015-06-11  7:54 ` [PATCH v2] drm/i915: " Mika Kahola
@ 2015-06-11  9:03   ` Jani Nikula
  2015-06-11  9:29     ` Mika Kahola
  2015-06-14 16:14   ` shuang.he
  1 sibling, 1 reply; 5+ messages in thread
From: Jani Nikula @ 2015-06-11  9:03 UTC (permalink / raw)
  To: Mika Kahola, intel-gfx

On Thu, 11 Jun 2015, Mika Kahola <mika.kahola@intel.com> wrote:
> Limit CHV maximum cdclk to 320MHz.
>
> v2: Rebase to the latest
>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c38c297..ab40d04 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
>  		else
>  			dev_priv->max_cdclk_freq = 675000;
>  	} else if (IS_VALLEYVIEW(dev)) {
> -		dev_priv->max_cdclk_freq = 400000;
> +		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;

I'd rather make this:

  	} else if (IS_CHERRYVIEW(dev)) {
		dev_priv->max_cdclk_freq = 320000;
 	} else if (IS_VALLEYVIEW(dev)) {
		dev_priv->max_cdclk_freq = 400000;
	} else {

BR,
Jani.

>  		/* otherwise assume cdclk is fixed */
>  		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
> -- 
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] drm/i915: Limit CHV max cdclk
  2015-06-11  9:03   ` Jani Nikula
@ 2015-06-11  9:29     ` Mika Kahola
  0 siblings, 0 replies; 5+ messages in thread
From: Mika Kahola @ 2015-06-11  9:29 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

On Thu, 2015-06-11 at 12:03 +0300, Jani Nikula wrote:
> On Thu, 11 Jun 2015, Mika Kahola <mika.kahola@intel.com> wrote:
> > Limit CHV maximum cdclk to 320MHz.
> >
> > v2: Rebase to the latest
> >
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index c38c297..ab40d04 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
> >  		else
> >  			dev_priv->max_cdclk_freq = 675000;
> >  	} else if (IS_VALLEYVIEW(dev)) {
> > -		dev_priv->max_cdclk_freq = 400000;
> > +		dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;
> 
> I'd rather make this:
> 
>   	} else if (IS_CHERRYVIEW(dev)) {
> 		dev_priv->max_cdclk_freq = 320000;
>  	} else if (IS_VALLEYVIEW(dev)) {
> 		dev_priv->max_cdclk_freq = 400000;
> 	} else {
> 
> BR,
> Jani.

It's probably more readable that way. I'll revise the patch.

Cheers,
Mika

> 
> >  		/* otherwise assume cdclk is fixed */
> >  		dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
> > -- 
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] drm/i915: Limit CHV max cdclk
  2015-06-11  7:54 ` [PATCH v2] drm/i915: " Mika Kahola
  2015-06-11  9:03   ` Jani Nikula
@ 2015-06-14 16:14   ` shuang.he
  1 sibling, 0 replies; 5+ messages in thread
From: shuang.he @ 2015-06-14 16:14 UTC (permalink / raw)
  To: shuang.he, lei.a.liu, intel-gfx, mika.kahola

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6567
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  303/303              303/303
SNB                                  312/312              312/312
IVB                                  343/343              343/343
BYT                                  287/287              287/287
BDW                                  321/321              321/321
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
Note: You need to pay more attention to line start with '*'
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-06-14 16:14 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-11  7:54 [PATCH v2] Limit CHV max cdclk Mika Kahola
2015-06-11  7:54 ` [PATCH v2] drm/i915: " Mika Kahola
2015-06-11  9:03   ` Jani Nikula
2015-06-11  9:29     ` Mika Kahola
2015-06-14 16:14   ` shuang.he

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