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* [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode
@ 2015-06-15 15:56 Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro Aurelien Jarno
                   ` (10 more replies)
  0 siblings, 11 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:56 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

This patchset adds support for CCW in TCG mode, allowing a s390-ccw
machine to boot using the s390-ccw firmware and zipl, and the Linux
kernel to access the virtio-ccw devices.

The way to do that is to wire up all the I/O instructions to the KVM
functions emulating them. This is the purpose of the last patch of the
series. However a few fixes are needed first to make the s390-ccw
machine fully functional under TCG.

Alexander Graf (2):
  s390/ioinst: fix endianness in ioinst_schib_valid
  target-s390x: wire up I/O instructions in TCG mode

Aurelien Jarno (8):
  s390/ioinst: fix IO_INT_WORD_ISC macro
  virtio-ccw: disable ioevent bit when ioeventfds are not enabled
  target-s390x: fix setcc in TCG mode
  target-s390x: correctly initialize ext interrupt queue
  target-s390x: initialize I/O interrupt queue
  target-s390x: fix s390_cpu_initial_reset
  target-s390x: wire up DIAG IPL in TCG mode
  target-s390x: wire up DIAG REIPL in TCG mode

 hw/s390x/virtio-ccw.c      |   4 ++
 target-s390x/cpu.c         |  12 ++++-
 target-s390x/cpu.h         |   7 +--
 target-s390x/helper.h      |  13 +++++-
 target-s390x/insn-data.def |  24 +++++-----
 target-s390x/ioinst.c      |   6 +--
 target-s390x/ioinst.h      |   2 +-
 target-s390x/misc_helper.c |  81 ++++++++++++++++++++++++++++++--
 target-s390x/translate.c   | 114 +++++++++++++++++++++++++++++++++++++++++----
 9 files changed, 226 insertions(+), 37 deletions(-)

-- 
2.1.4

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 18:40   ` Christian Borntraeger
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 02/10] s390/ioinst: fix endianness in ioinst_schib_valid Aurelien Jarno
                   ` (9 subsequent siblings)
  10 siblings, 1 reply; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel
  Cc: Cornelia Huck, Christian Borntraeger, Alexander Graf,
	Aurelien Jarno, Richard Henderson

The I/O-Interruption Subclass field corresponds to bits 2 to 5 (BE
notation) of the Interruption-Identification Word. The value should
be shift by 27 instead of 24.

Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Cornelia Huck <cornelia.huck@de.ibm.com>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/ioinst.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-s390x/ioinst.h b/target-s390x/ioinst.h
index 203bdba..013cc91 100644
--- a/target-s390x/ioinst.h
+++ b/target-s390x/ioinst.h
@@ -220,7 +220,7 @@ typedef struct IOIntCode {
 #define IOINST_SCHID_SSID(_schid)  ((_schid & 0x00060000) >> 17)
 #define IOINST_SCHID_NR(_schid)    (_schid & 0x0000ffff)
 
-#define IO_INT_WORD_ISC(_int_word) ((_int_word & 0x38000000) >> 24)
+#define IO_INT_WORD_ISC(_int_word) ((_int_word & 0x38000000) >> 27)
 #define ISC_TO_ISC_BITS(_isc)      ((0x80 >> _isc) << 24)
 
 #define IO_INT_WORD_AI 0x80000000
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 02/10] s390/ioinst: fix endianness in ioinst_schib_valid
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 03/10] virtio-ccw: disable ioevent bit when ioeventfds are not enabled Aurelien Jarno
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel
  Cc: Cornelia Huck, Christian Borntraeger, Alexander Graf,
	Aurelien Jarno, Richard Henderson

From: Alexander Graf <agraf@suse.de>

The ioinst_schib_valid gets a SCHIB in guest endianness, we should
byteswap the fields we access.

Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/ioinst.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Note that it creates some asymmetry with the ioinst_orb_valid function.
We might want to move the copy_schib_from_guest from hw/s390x/css.c to
target-s390x/ioinst.c and do the byteswapping only once.

diff --git a/target-s390x/ioinst.c b/target-s390x/ioinst.c
index e220cea..77f2a1f 100644
--- a/target-s390x/ioinst.c
+++ b/target-s390x/ioinst.c
@@ -129,12 +129,12 @@ void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1)
 
 static int ioinst_schib_valid(SCHIB *schib)
 {
-    if ((schib->pmcw.flags & PMCW_FLAGS_MASK_INVALID) ||
-        (schib->pmcw.chars & PMCW_CHARS_MASK_INVALID)) {
+    if ((be16_to_cpu(schib->pmcw.flags) & PMCW_FLAGS_MASK_INVALID) ||
+        (be32_to_cpu(schib->pmcw.chars) & PMCW_CHARS_MASK_INVALID)) {
         return 0;
     }
     /* Disallow extended measurements for now. */
-    if (schib->pmcw.chars & PMCW_CHARS_MASK_XMWME) {
+    if (be32_to_cpu(schib->pmcw.chars) & PMCW_CHARS_MASK_XMWME) {
         return 0;
     }
     return 1;
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 03/10] virtio-ccw: disable ioevent bit when ioeventfds are not enabled
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 02/10] s390/ioinst: fix endianness in ioinst_schib_valid Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 04/10] target-s390x: fix setcc in TCG mode Aurelien Jarno
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel
  Cc: Cornelia Huck, Christian Borntraeger, Alexander Graf,
	Aurelien Jarno, Richard Henderson

This remove the corresponding error messages in TCG mode, and allow to
simplify the s390_assign_subch_ioeventfd() function.

CC: Cornelia Huck <cornelia.huck@de.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 hw/s390x/virtio-ccw.c | 4 ++++
 target-s390x/cpu.h    | 6 +-----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index b7a88d6..e32ada9 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -1401,6 +1401,10 @@ static void virtio_ccw_device_plugged(DeviceState *d, Error **errp)
         return;
     }
 
+    if (!kvm_eventfds_enabled()) {
+        dev->flags &= ~VIRTIO_CCW_FLAG_USE_IOEVENTFD;
+    }
+
     sch->id.cu_model = virtio_bus_get_vdev_id(&dev->bus);
 
     css_generate_sch_crws(sch->cssid, sch->ssid, sch->schid,
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 584e74b..08a79dd 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -1214,11 +1214,7 @@ static inline int s390_assign_subch_ioeventfd(EventNotifier *notifier,
                                               uint32_t sch_id, int vq,
                                               bool assign)
 {
-    if (kvm_enabled()) {
-        return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
-    } else {
-        return -ENOSYS;
-    }
+    return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
 }
 
 #ifdef CONFIG_KVM
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 04/10] target-s390x: fix setcc in TCG mode
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (2 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 03/10] virtio-ccw: disable ioevent bit when ioeventfds are not enabled Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 05/10] target-s390x: correctly initialize ext interrupt queue Aurelien Jarno
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

In TCG mode we should store the CC value in env->cc_op. However do it
inconditionnaly because:
- the tcg_enabled function is not inlined
- it's probably faster to always store the value, especially given it
  is likely in the same cache line than env->psw.mask.

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/cpu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 08a79dd..93f66f9 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -709,6 +709,7 @@ static inline void setcc(S390CPU *cpu, uint64_t cc)
 
     env->psw.mask &= ~(3ull << 44);
     env->psw.mask |= (cc & 3) << 44;
+    env->cc_op = cc;
 }
 
 typedef struct LowCore
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 05/10] target-s390x: correctly initialize ext interrupt queue
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (3 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 04/10] target-s390x: fix setcc in TCG mode Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 06/10] target-s390x: initialize I/O " Aurelien Jarno
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

env->ext_index should be initialized to -1 to mark the external
interrupt queue as emtpy. This should not be done in s390_cpu_initfn
as all the interrupt fields are later reset to 0 by the memset in
s390_cpu_initial_reset or s390_cpu_full_reset. Move the initialization
there.

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index 7f17823..c4e8a87 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -117,6 +117,7 @@ static void s390_cpu_initial_reset(CPUState *s)
     env->cregs[14] = CR14_RESET;
 
     env->pfault_token = -1UL;
+    env->ext_index = -1;
 
     /* tininess for underflow is detected before rounding */
     set_float_detect_tininess(float_tininess_before_rounding,
@@ -146,6 +147,7 @@ static void s390_cpu_full_reset(CPUState *s)
     env->cregs[14] = CR14_RESET;
 
     env->pfault_token = -1UL;
+    env->ext_index = -1;
 
     /* tininess for underflow is detected before rounding */
     set_float_detect_tininess(float_tininess_before_rounding,
@@ -207,7 +209,6 @@ static void s390_cpu_initfn(Object *obj)
     s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
 #endif
     env->cpu_num = cpu_num++;
-    env->ext_index = -1;
 
     if (tcg_enabled() && !inited) {
         inited = true;
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 06/10] target-s390x: initialize I/O interrupt queue
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (4 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 05/10] target-s390x: correctly initialize ext interrupt queue Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 07/10] target-s390x: fix s390_cpu_initial_reset Aurelien Jarno
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

env->io_index[] should be set to -1 during CPU reset to mark the
I/O interrupt queue as empty.

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index c4e8a87..cc9cc37 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -106,6 +106,7 @@ static void s390_cpu_initial_reset(CPUState *s)
 {
     S390CPU *cpu = S390_CPU(s);
     CPUS390XState *env = &cpu->env;
+    int i;
 
     s390_cpu_reset(s);
     /* initial reset does not touch regs,fregs and aregs */
@@ -118,6 +119,9 @@ static void s390_cpu_initial_reset(CPUState *s)
 
     env->pfault_token = -1UL;
     env->ext_index = -1;
+    for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
+        env->io_index[i] = -1;
+    }
 
     /* tininess for underflow is detected before rounding */
     set_float_detect_tininess(float_tininess_before_rounding,
@@ -135,6 +139,7 @@ static void s390_cpu_full_reset(CPUState *s)
     S390CPU *cpu = S390_CPU(s);
     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
     CPUS390XState *env = &cpu->env;
+    int i;
 
     scc->parent_reset(s);
     cpu->env.sigp_order = 0;
@@ -148,6 +153,9 @@ static void s390_cpu_full_reset(CPUState *s)
 
     env->pfault_token = -1UL;
     env->ext_index = -1;
+    for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
+        env->io_index[i] = -1;
+    }
 
     /* tininess for underflow is detected before rounding */
     set_float_detect_tininess(float_tininess_before_rounding,
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 07/10] target-s390x: fix s390_cpu_initial_reset
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (5 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 06/10] target-s390x: initialize I/O " Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 08/10] target-s390x: wire up DIAG IPL in TCG mode Aurelien Jarno
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

The s390_cpu_initial_reset function zeroes a big part of the CPU state
structure, including CPU_COMMON, and thus the QEMU TLB structure. As
they should not be initialized with zeroes only, we need to call the
tlb_flush to initialize it correctly.

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/cpu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index cc9cc37..ba7a887 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -131,6 +131,7 @@ static void s390_cpu_initial_reset(CPUState *s)
     if (kvm_enabled()) {
         kvm_s390_reset_vcpu(cpu);
     }
+    tlb_flush(s, 1);
 }
 
 /* CPUClass:reset() */
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 08/10] target-s390x: wire up DIAG IPL in TCG mode
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (6 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 07/10] target-s390x: fix s390_cpu_initial_reset Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 09/10] target-s390x: wire up DIAG REIPL " Aurelien Jarno
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

DIAG IPL is already implemented for KVM, but not wired from TCG. For
that change the format of the instruction so that we can get R1 and R3
numbers in addition to the function code.

The diag function can change plenty of things, including CC, so we
should enter with a static CC. Also it doesn't set the value of general
register 2 to 0 as in the current code. We also need to exit the CPU
loop after a reset, which means a new PSW.

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/helper.h      |  2 +-
 target-s390x/insn-data.def |  2 +-
 target-s390x/misc_helper.c | 13 ++++++++-----
 target-s390x/translate.c   | 16 ++++++++++------
 4 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/target-s390x/helper.h b/target-s390x/helper.h
index 7e048ec..6be9f44 100644
--- a/target-s390x/helper.h
+++ b/target-s390x/helper.h
@@ -87,7 +87,7 @@ DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64)
 
 #ifndef CONFIG_USER_ONLY
 DEF_HELPER_3(servc, i32, env, i64, i64)
-DEF_HELPER_4(diag, i64, env, i32, i64, i64)
+DEF_HELPER_4(diag, void, env, i32, i32, i32)
 DEF_HELPER_3(load_psw, noreturn, env, i64, i64)
 DEF_HELPER_FLAGS_2(spx, TCG_CALL_NO_RWG, void, env, i64)
 DEF_HELPER_FLAGS_1(stck, TCG_CALL_NO_RWG_SE, i64, env)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 1223670..fe5e591 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -835,7 +835,7 @@
 /* COMPARE AND SWAP AND PURGE */
     C(0xb250, CSP,     RRE,   Z,   0, ra2, 0, 0, csp, 0)
 /* DIAGNOSE (KVM hypercall) */
-    C(0x8300, DIAG,    RX_a,  Z,   0, 0, 0, 0, diag, 0)
+    C(0x8300, DIAG,    RSI,   Z,   0, 0, 0, 0, diag, 0)
 /* INSERT STORAGE KEY EXTENDED */
     C(0xb229, ISKE,    RRE,   Z,   0, r2_o, new, r1_8, iske, 0)
 /* INVALIDATE PAGE TABLE ENTRY */
diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index b375ab7..e36d957 100644
--- a/target-s390x/misc_helper.c
+++ b/target-s390x/misc_helper.c
@@ -176,9 +176,15 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
     switch (subcode) {
     case 0:
         modified_clear_reset(s390_env_get_cpu(env));
+        if (tcg_enabled()) {
+            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
+        }
         break;
     case 1:
         load_normal_reset(s390_env_get_cpu(env));
+        if (tcg_enabled()) {
+            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
+        }
         break;
     case 5:
         if ((r1 & 1) || (addr & 0x0fffULL)) {
@@ -225,9 +231,7 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 }
 #endif
 
-/* DIAG */
-uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
-                      uint64_t code)
+void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 {
     uint64_t r;
 
@@ -242,6 +246,7 @@ uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
         break;
     case 0x308:
         /* ipl */
+        handle_diag_308(env, r1, r3);
         r = 0;
         break;
     default:
@@ -252,8 +257,6 @@ uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
     if (r) {
         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
     }
-
-    return r;
 }
 
 /* Set Prefix */
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 9b87714..bde5e8a 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -2025,15 +2025,19 @@ static ExitStatus op_ct(DisasContext *s, DisasOps *o)
 #ifndef CONFIG_USER_ONLY
 static ExitStatus op_diag(DisasContext *s, DisasOps *o)
 {
-    TCGv_i32 tmp;
+    TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
+    TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
+    TCGv_i32 func_code = tcg_const_i32(get_field(s->fields, i2));
 
     check_privileged(s);
-    potential_page_fault(s);
+    update_psw_addr(s);
+    gen_op_calc_cc(s);
 
-    /* We pretend the format is RX_a so that D2 is the field we want.  */
-    tmp = tcg_const_i32(get_field(s->fields, d2) & 0xfff);
-    gen_helper_diag(regs[2], cpu_env, tmp, regs[2], regs[1]);
-    tcg_temp_free_i32(tmp);
+    gen_helper_diag(cpu_env, r1, r3, func_code);
+
+    tcg_temp_free_i32(func_code);
+    tcg_temp_free_i32(r3);
+    tcg_temp_free_i32(r1);
     return NO_EXIT;
 }
 #endif
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 09/10] target-s390x: wire up DIAG REIPL in TCG mode
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (7 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 08/10] target-s390x: wire up DIAG IPL in TCG mode Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 10/10] target-s390x: wire up I/O instructions " Aurelien Jarno
  2015-06-16 16:19 ` [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW " Alexander Graf
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/misc_helper.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index e36d957..3addde5 100644
--- a/target-s390x/misc_helper.c
+++ b/target-s390x/misc_helper.c
@@ -186,6 +186,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
         }
         break;
+    case 3:
+        s390_reipl_request();
+        if (tcg_enabled()) {
+            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
+        }
+        break;
     case 5:
         if ((r1 & 1) || (addr & 0x0fffULL)) {
             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [Qemu-devel] [PATCH 10/10] target-s390x: wire up I/O instructions in TCG mode
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (8 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 09/10] target-s390x: wire up DIAG REIPL " Aurelien Jarno
@ 2015-06-15 15:57 ` Aurelien Jarno
  2015-06-16 16:19 ` [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW " Alexander Graf
  10 siblings, 0 replies; 13+ messages in thread
From: Aurelien Jarno @ 2015-06-15 15:57 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alexander Graf, Aurelien Jarno, Richard Henderson

From: Alexander Graf <agraf@suse.de>

The code handling the I/O instructions for KVM decodes the instruction
itself. In TCG mode also pass the full instruction word to the helpers.

Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-s390x/helper.h      | 11 ++++++
 target-s390x/insn-data.def | 22 +++++------
 target-s390x/misc_helper.c | 62 +++++++++++++++++++++++++++++
 target-s390x/translate.c   | 98 ++++++++++++++++++++++++++++++++++++++++++++--
 4 files changed, 179 insertions(+), 14 deletions(-)

diff --git a/target-s390x/helper.h b/target-s390x/helper.h
index 6be9f44..53db519 100644
--- a/target-s390x/helper.h
+++ b/target-s390x/helper.h
@@ -116,4 +116,15 @@ DEF_HELPER_FLAGS_2(lura, TCG_CALL_NO_WG, i64, env, i64)
 DEF_HELPER_FLAGS_2(lurag, TCG_CALL_NO_WG, i64, env, i64)
 DEF_HELPER_FLAGS_3(stura, TCG_CALL_NO_WG, void, env, i64, i64)
 DEF_HELPER_FLAGS_3(sturg, TCG_CALL_NO_WG, void, env, i64, i64)
+
+DEF_HELPER_2(xsch, void, env, i64)
+DEF_HELPER_2(csch, void, env, i64)
+DEF_HELPER_2(hsch, void, env, i64)
+DEF_HELPER_3(msch, void, env, i64, i64)
+DEF_HELPER_2(rchp, void, env, i64)
+DEF_HELPER_2(rsch, void, env, i64)
+DEF_HELPER_3(ssch, void, env, i64, i64)
+DEF_HELPER_3(stsch, void, env, i64, i64)
+DEF_HELPER_3(tsch, void, env, i64, i64)
+DEF_HELPER_2(chsc, void, env, i64)
 #endif
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index fe5e591..075ff59 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -915,17 +915,17 @@
 /* TEST PROTECTION */
     C(0xe501, TPROT,   SSE,   Z,   la1, a2, 0, 0, tprot, 0)
 
-/* I/O Instructions.  For each we simply indicate non-operation.  */
-    C(0xb276, XSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb230, CSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb231, HSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb232, MSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb23b, RCHP,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb238, RSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb233, SSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb234, STSCH,   S,     Z,   0, 0, 0, 0, subchannel, 0)
-    C(0xb235, TSCH,    S,     Z,   0, 0, 0, 0, subchannel, 0)
+/* CCW I/O Instructions */
+    C(0xb276, XSCH,    S,     Z,   0, 0, 0, 0, xsch, 0)
+    C(0xb230, CSCH,    S,     Z,   0, 0, 0, 0, csch, 0)
+    C(0xb231, HSCH,    S,     Z,   0, 0, 0, 0, hsch, 0)
+    C(0xb232, MSCH,    S,     Z,   0, insn, 0, 0, msch, 0)
+    C(0xb23b, RCHP,    S,     Z,   0, 0, 0, 0, rchp, 0)
+    C(0xb238, RSCH,    S,     Z,   0, 0, 0, 0, rsch, 0)
+    C(0xb233, SSCH,    S,     Z,   0, insn, 0, 0, ssch, 0)
+    C(0xb234, STSCH,   S,     Z,   0, insn, 0, 0, stsch, 0)
+    C(0xb235, TSCH,    S,     Z,   0, insn, 0, 0, tsch, 0)
     /* ??? Not listed in PoO ninth edition, but there's a linux driver that
        uses it: "A CHSC subchannel is usually present on LPAR only."  */
-    C(0xb25f, CHSC,    S,     Z,   0, 0, 0, 0, subchannel, 0)
+    C(0xb25f, CHSC,  RRE,     Z,   0, insn, 0, 0, chsc, 0)
 #endif /* CONFIG_USER_ONLY */
diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index 3addde5..a4ff172 100644
--- a/target-s390x/misc_helper.c
+++ b/target-s390x/misc_helper.c
@@ -503,3 +503,65 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
     return cc;
 }
 #endif
+
+#ifndef CONFIG_USER_ONLY
+void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_xsch(cpu, r1);
+}
+
+void HELPER(csch)(CPUS390XState *env, uint64_t r1)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_csch(cpu, r1);
+}
+
+void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_hsch(cpu, r1);
+}
+
+void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_msch(cpu, r1, inst >> 16);
+}
+
+void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_rchp(cpu, r1);
+}
+
+void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_rsch(cpu, r1);
+}
+
+void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_ssch(cpu, r1, inst >> 16);
+}
+
+void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_stsch(cpu, r1, inst >> 16);
+}
+
+void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_tsch(cpu, r1, inst >> 16);
+}
+
+void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
+{
+    S390CPU *cpu = s390_env_get_cpu(env);
+    ioinst_handle_chsc(cpu, inst >> 16);
+}
+#endif
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index bde5e8a..df3389d 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -1001,6 +1001,7 @@ enum DisasFieldIndexC {
 };
 
 struct DisasFields {
+    uint64_t raw_insn;
     unsigned op:8;
     unsigned op2:8;
     unsigned presentC:16;
@@ -3588,11 +3589,93 @@ static ExitStatus op_spx(DisasContext *s, DisasOps *o)
     return NO_EXIT;
 }
 
-static ExitStatus op_subchannel(DisasContext *s, DisasOps *o)
+static ExitStatus op_xsch(DisasContext *s, DisasOps *o)
 {
     check_privileged(s);
-    /* Not operational.  */
-    gen_op_movi_cc(s, 3);
+    potential_page_fault(s);
+    gen_helper_xsch(cpu_env, regs[1]);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_csch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_csch(cpu_env, regs[1]);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_hsch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_hsch(cpu_env, regs[1]);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_msch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_msch(cpu_env, regs[1], o->in2);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_rchp(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_rchp(cpu_env, regs[1]);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_rsch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_rsch(cpu_env, regs[1]);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_ssch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_ssch(cpu_env, regs[1], o->in2);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_stsch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_stsch(cpu_env, regs[1], o->in2);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_tsch(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_tsch(cpu_env, regs[1], o->in2);
+    set_cc_static(s);
+    return NO_EXIT;
+}
+
+static ExitStatus op_chsc(DisasContext *s, DisasOps *o)
+{
+    check_privileged(s);
+    potential_page_fault(s);
+    gen_helper_chsc(cpu_env, o->in2);
+    set_cc_static(s);
     return NO_EXIT;
 }
 
@@ -4843,6 +4926,14 @@ static void in2_i2_32u_shl(DisasContext *s, DisasFields *f, DisasOps *o)
 }
 #define SPEC_in2_i2_32u_shl 0
 
+#ifndef CONFIG_USER_ONLY
+static void in2_insn(DisasContext *s, DisasFields *f, DisasOps *o)
+{
+    o->in2 = tcg_const_i64(s->fields->raw_insn);
+}
+#define SPEC_in2_insn 0
+#endif
+
 /* ====================================================================== */
 
 /* Find opc within the table of insns.  This is formulated as a switch
@@ -5019,6 +5110,7 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s,
     }
 
     memset(f, 0, sizeof(*f));
+    f->raw_insn = insn;
     f->op = op;
     f->op2 = op2;
 
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro Aurelien Jarno
@ 2015-06-15 18:40   ` Christian Borntraeger
  0 siblings, 0 replies; 13+ messages in thread
From: Christian Borntraeger @ 2015-06-15 18:40 UTC (permalink / raw)
  To: Aurelien Jarno, qemu-devel
  Cc: Cornelia Huck, Alexander Graf, Richard Henderson

Am 15.06.2015 um 17:57 schrieb Aurelien Jarno:
> The I/O-Interruption Subclass field corresponds to bits 2 to 5 (BE
> notation) of the Interruption-Identification Word. The value should
> be shift by 27 instead of 24.
> 
> Cc: Christian Borntraeger <borntraeger@de.ibm.com>
> Cc: Cornelia Huck <cornelia.huck@de.ibm.com>
> Cc: Alexander Graf <agraf@suse.de>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  target-s390x/ioinst.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target-s390x/ioinst.h b/target-s390x/ioinst.h
> index 203bdba..013cc91 100644
> --- a/target-s390x/ioinst.h
> +++ b/target-s390x/ioinst.h
> @@ -220,7 +220,7 @@ typedef struct IOIntCode {
>  #define IOINST_SCHID_SSID(_schid)  ((_schid & 0x00060000) >> 17)
>  #define IOINST_SCHID_NR(_schid)    (_schid & 0x0000ffff)
> 
> -#define IO_INT_WORD_ISC(_int_word) ((_int_word & 0x38000000) >> 24)
> +#define IO_INT_WORD_ISC(_int_word) ((_int_word & 0x38000000) >> 27)
>  #define ISC_TO_ISC_BITS(_isc)      ((0x80 >> _isc) << 24)
> 
>  #define IO_INT_WORD_AI 0x80000000
> 

Its Connys area of competence, but your change matches the KVM
implementation in the kernel

static u64 int_word_to_isc_bits(u32 int_word)
{
        u8 isc = (int_word & 0x38000000) >> 27;

        return (0x80 >> isc) << 24;
}

so

Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode
  2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
                   ` (9 preceding siblings ...)
  2015-06-15 15:57 ` [Qemu-devel] [PATCH 10/10] target-s390x: wire up I/O instructions " Aurelien Jarno
@ 2015-06-16 16:19 ` Alexander Graf
  10 siblings, 0 replies; 13+ messages in thread
From: Alexander Graf @ 2015-06-16 16:19 UTC (permalink / raw)
  To: Aurelien Jarno, qemu-devel; +Cc: Richard Henderson

On 06/15/15 17:56, Aurelien Jarno wrote:
> This patchset adds support for CCW in TCG mode, allowing a s390-ccw
> machine to boot using the s390-ccw firmware and zipl, and the Linux
> kernel to access the virtio-ccw devices.
>
> The way to do that is to wire up all the I/O instructions to the KVM
> functions emulating them. This is the purpose of the last patch of the
> series. However a few fixes are needed first to make the s390-ccw
> machine fully functional under TCG.

Thanks, applied all to s390-next.


Alex

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2015-06-16 16:19 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-15 15:56 [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW in TCG mode Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 01/10] s390/ioinst: fix IO_INT_WORD_ISC macro Aurelien Jarno
2015-06-15 18:40   ` Christian Borntraeger
2015-06-15 15:57 ` [Qemu-devel] [PATCH 02/10] s390/ioinst: fix endianness in ioinst_schib_valid Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 03/10] virtio-ccw: disable ioevent bit when ioeventfds are not enabled Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 04/10] target-s390x: fix setcc in TCG mode Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 05/10] target-s390x: correctly initialize ext interrupt queue Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 06/10] target-s390x: initialize I/O " Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 07/10] target-s390x: fix s390_cpu_initial_reset Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 08/10] target-s390x: wire up DIAG IPL in TCG mode Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 09/10] target-s390x: wire up DIAG REIPL " Aurelien Jarno
2015-06-15 15:57 ` [Qemu-devel] [PATCH 10/10] target-s390x: wire up I/O instructions " Aurelien Jarno
2015-06-16 16:19 ` [Qemu-devel] [PATCH 00/10] target-s390x: add support for CCW " Alexander Graf

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