* [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: "David A. Long" <dave.long@linaro.org>
This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
first seen in October 2013. This version attempts to address concerns raised by
reviewers and also fixes problems discovered during testing.
This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
and return probes(kretprobes) support for ARM64.
The kprobes mechanism makes use of software breakpoint and single stepping
support available in the ARM v8 kernel.
The is patch depends on:
[PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
[PATCH 2/2] Consolidate redundant register/stack access code
Changes since v2 include:
1) Removal of NOP padding in kprobe XOL slots. Slots are now exactly one
instruction long.
2) Disabling of interrupts during execution in single-step mode.
3) Fixing of numerous problems in instruction simulation code (mostly
thanks to Will Cohen).
4) Support for the HAVE_REGS_AND_STACK_ACCESS_API feature is added, to allow
access to kprobes through debugfs.
5) kprobes is *not* enabled in defconfig.
6) Numerous complaints from checkpatch have been cleaned up, although a couple
remain as removing the function pointer typedefs results in ugly code.
Changes since v3 include:
1) Remove table-driven instruction parsing and replace with an if statement
calling out to old and new instruction test functions in insn.c.
2) I removed the addition of orig_x0 to ptrace.h.
3) Reorder the patches.
4) Replace the previous interrupt disabling (from Will Cohen) with
an improved solution (from Steve Capper).
Changes since v4 include:
1) Added insn.c functions to detect exception instructions and DAIF
read/write instructions, and use them to reject probing same.
2) Changed adr detect function to also recognize adrp. Reject both.
3) Added missing __kprobes for some new functions.
4) Added call to kprobes_fault_handler from mm do_page_fault.
5) Reject all non-simulated branch/ret instructions, not just those
that use an immediate offset.
6) Moved software breakpoint definitions into debug-monitors.h.
7) Removed "!XIP_KERNEL" from Kconfig.
8) changed kprobes_condition_check_t and kprobes_prepare_t to probes_*,
for future sharing with uprobes.
9) Removed bogus call to kprobes_restore_local_irqflag() from
trampoline_probe_handler().
Changes since v5 include:
1) Replaced installation of breakpoint hook with direct call from the
handlers in debug-monitors.c, as requested.
2) Reject probing of instructions that read the interrupt mask, in
addition to instructions that set it.
3) Cleaned up comments describing usage of Debug Mask.
4) Added KPROBE_REENTER case in reenter_kprobe.
5) Corrected the ifdef'd definitions for notify_page_fault() to be
consistent when KPROBES is not configed.
6) Changed "cpsr" to "pstate" for HAVE_REGS_AND_STACK_ACCESS_API feature.
7) Added back in missing new files in previous patch.
8) Changed two instances of pr_warning() to pr_warn().
Note that there seems to be at least a potential issue with kprobes
on multiple (possibly all) platforms having to do with use of kfree
inside of the kretprobes trampoline handler. This has manifested
occasionally in systemtap testing on arm64. There does not appear to
be an simple solution to the problem.
Changes since v6 include:
1) New trampoline code from Will Cohen fixes the occasional failure seen
when processing kretprobes by replacing the software breakpoint with
assembly code to implement the return to the original execution stream.
2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
of recognizing them as an ascii string in the stack/reg access code.
3) Removed orig_x0.
4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
arch/arm64/kernel/ptrace.c.
David A. Long (2):
arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
arm64: Add more test functions to insn.c
Sandeepa Prabhu (4):
arm64: Kprobes with single stepping support
arm64: kprobes instruction simulation support
arm64: Add kernel return probes support (kretprobes)
kprobes: Add arm64 case in kprobe example module
William Cohen (1):
arm64: Add trampoline code for kretprobes
arch/arm64/Kconfig | 3 +
arch/arm64/include/asm/debug-monitors.h | 5 +
arch/arm64/include/asm/insn.h | 18 +
arch/arm64/include/asm/kprobes.h | 63 +++
arch/arm64/include/asm/probes.h | 50 +++
arch/arm64/include/asm/ptrace.h | 28 +-
arch/arm64/kernel/Makefile | 3 +
arch/arm64/kernel/debug-monitors.c | 35 +-
arch/arm64/kernel/insn.c | 28 ++
arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
arch/arm64/kernel/kprobes-arm64.h | 71 ++++
arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
arch/arm64/kernel/kprobes.h | 24 ++
arch/arm64/kernel/probes-condn-check.c | 122 ++++++
arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
arch/arm64/kernel/probes-simulate-insn.h | 33 ++
arch/arm64/kernel/ptrace.c | 77 ++++
arch/arm64/kernel/vmlinux.lds.S | 1 +
arch/arm64/mm/fault.c | 25 ++
samples/kprobes/kprobe_example.c | 8 +
20 files changed, 1588 insertions(+), 11 deletions(-)
create mode 100644 arch/arm64/include/asm/kprobes.h
create mode 100644 arch/arm64/include/asm/probes.h
create mode 100644 arch/arm64/kernel/kprobes-arm64.c
create mode 100644 arch/arm64/kernel/kprobes-arm64.h
create mode 100644 arch/arm64/kernel/kprobes.c
create mode 100644 arch/arm64/kernel/kprobes.h
create mode 100644 arch/arm64/kernel/probes-condn-check.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
--
1.8.1.2
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: "David A. Long" <dave.long@linaro.org>
This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
first seen in October 2013. This version attempts to address concerns raised by
reviewers and also fixes problems discovered during testing.
This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
and return probes(kretprobes) support for ARM64.
The kprobes mechanism makes use of software breakpoint and single stepping
support available in the ARM v8 kernel.
The is patch depends on:
[PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
[PATCH 2/2] Consolidate redundant register/stack access code
Changes since v2 include:
1) Removal of NOP padding in kprobe XOL slots. Slots are now exactly one
instruction long.
2) Disabling of interrupts during execution in single-step mode.
3) Fixing of numerous problems in instruction simulation code (mostly
thanks to Will Cohen).
4) Support for the HAVE_REGS_AND_STACK_ACCESS_API feature is added, to allow
access to kprobes through debugfs.
5) kprobes is *not* enabled in defconfig.
6) Numerous complaints from checkpatch have been cleaned up, although a couple
remain as removing the function pointer typedefs results in ugly code.
Changes since v3 include:
1) Remove table-driven instruction parsing and replace with an if statement
calling out to old and new instruction test functions in insn.c.
2) I removed the addition of orig_x0 to ptrace.h.
3) Reorder the patches.
4) Replace the previous interrupt disabling (from Will Cohen) with
an improved solution (from Steve Capper).
Changes since v4 include:
1) Added insn.c functions to detect exception instructions and DAIF
read/write instructions, and use them to reject probing same.
2) Changed adr detect function to also recognize adrp. Reject both.
3) Added missing __kprobes for some new functions.
4) Added call to kprobes_fault_handler from mm do_page_fault.
5) Reject all non-simulated branch/ret instructions, not just those
that use an immediate offset.
6) Moved software breakpoint definitions into debug-monitors.h.
7) Removed "!XIP_KERNEL" from Kconfig.
8) changed kprobes_condition_check_t and kprobes_prepare_t to probes_*,
for future sharing with uprobes.
9) Removed bogus call to kprobes_restore_local_irqflag() from
trampoline_probe_handler().
Changes since v5 include:
1) Replaced installation of breakpoint hook with direct call from the
handlers in debug-monitors.c, as requested.
2) Reject probing of instructions that read the interrupt mask, in
addition to instructions that set it.
3) Cleaned up comments describing usage of Debug Mask.
4) Added KPROBE_REENTER case in reenter_kprobe.
5) Corrected the ifdef'd definitions for notify_page_fault() to be
consistent when KPROBES is not configed.
6) Changed "cpsr" to "pstate" for HAVE_REGS_AND_STACK_ACCESS_API feature.
7) Added back in missing new files in previous patch.
8) Changed two instances of pr_warning() to pr_warn().
Note that there seems to be at least a potential issue with kprobes
on multiple (possibly all) platforms having to do with use of kfree
inside of the kretprobes trampoline handler. This has manifested
occasionally in systemtap testing on arm64. There does not appear to
be an simple solution to the problem.
Changes since v6 include:
1) New trampoline code from Will Cohen fixes the occasional failure seen
when processing kretprobes by replacing the software breakpoint with
assembly code to implement the return to the original execution stream.
2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
of recognizing them as an ascii string in the stack/reg access code.
3) Removed orig_x0.
4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
arch/arm64/kernel/ptrace.c.
David A. Long (2):
arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
arm64: Add more test functions to insn.c
Sandeepa Prabhu (4):
arm64: Kprobes with single stepping support
arm64: kprobes instruction simulation support
arm64: Add kernel return probes support (kretprobes)
kprobes: Add arm64 case in kprobe example module
William Cohen (1):
arm64: Add trampoline code for kretprobes
arch/arm64/Kconfig | 3 +
arch/arm64/include/asm/debug-monitors.h | 5 +
arch/arm64/include/asm/insn.h | 18 +
arch/arm64/include/asm/kprobes.h | 63 +++
arch/arm64/include/asm/probes.h | 50 +++
arch/arm64/include/asm/ptrace.h | 28 +-
arch/arm64/kernel/Makefile | 3 +
arch/arm64/kernel/debug-monitors.c | 35 +-
arch/arm64/kernel/insn.c | 28 ++
arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
arch/arm64/kernel/kprobes-arm64.h | 71 ++++
arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
arch/arm64/kernel/kprobes.h | 24 ++
arch/arm64/kernel/probes-condn-check.c | 122 ++++++
arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
arch/arm64/kernel/probes-simulate-insn.h | 33 ++
arch/arm64/kernel/ptrace.c | 77 ++++
arch/arm64/kernel/vmlinux.lds.S | 1 +
arch/arm64/mm/fault.c | 25 ++
samples/kprobes/kprobe_example.c | 8 +
20 files changed, 1588 insertions(+), 11 deletions(-)
create mode 100644 arch/arm64/include/asm/kprobes.h
create mode 100644 arch/arm64/include/asm/probes.h
create mode 100644 arch/arm64/kernel/kprobes-arm64.c
create mode 100644 arch/arm64/kernel/kprobes-arm64.h
create mode 100644 arch/arm64/kernel/kprobes.c
create mode 100644 arch/arm64/kernel/kprobes.h
create mode 100644 arch/arm64/kernel/probes-condn-check.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
--
1.8.1.2
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: "David A. Long" <dave.long@linaro.org>
Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 103 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7796af4..966091f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -68,6 +68,7 @@ config ARM64
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
+ select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RCU_TABLE_FREE
select HAVE_SYSCALL_TRACEPOINTS
select IRQ_DOMAIN
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index d6dd9fd..8f440e9 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -118,6 +118,8 @@ struct pt_regs {
u64 syscallno;
};
+#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
+
#define arch_has_single_step() (1)
#ifdef CONFIG_COMPAT
@@ -146,6 +148,29 @@ struct pt_regs {
#define user_stack_pointer(regs) \
(!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
+/**
+ * regs_get_register() - get register value from its offset
+ * @regs: pt_regs from which register value is gotten
+ * @offset: offset number of the register.
+ *
+ * regs_get_register returns the value of a register whose offset from @regs.
+ * The @offset is the offset of the register in struct pt_regs.
+ * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
+ */
+static inline u64 regs_get_register(struct pt_regs *regs,
+ unsigned int offset)
+{
+ if (unlikely(offset > MAX_REG_OFFSET))
+ return 0;
+ return *(u64 *)((u64)regs + offset);
+}
+
+/* Valid only for Kernel mode traps. */
+static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
+{
+ return regs->sp;
+}
+
static inline unsigned long regs_return_value(struct pt_regs *regs)
{
return regs->regs[0];
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index d882b83..f6199a5 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -48,6 +48,83 @@
#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
+#define ARM_pstate pstate
+#define ARM_pc pc
+#define ARM_sp sp
+#define ARM_x30 regs[30]
+#define ARM_x29 regs[29]
+#define ARM_x28 regs[28]
+#define ARM_x27 regs[27]
+#define ARM_x26 regs[26]
+#define ARM_x25 regs[25]
+#define ARM_x24 regs[24]
+#define ARM_x23 regs[23]
+#define ARM_x22 regs[22]
+#define ARM_x21 regs[21]
+#define ARM_x20 regs[20]
+#define ARM_x19 regs[19]
+#define ARM_x18 regs[18]
+#define ARM_x17 regs[17]
+#define ARM_x16 regs[16]
+#define ARM_x15 regs[15]
+#define ARM_x14 regs[14]
+#define ARM_x13 regs[13]
+#define ARM_x12 regs[12]
+#define ARM_x11 regs[11]
+#define ARM_x10 regs[10]
+#define ARM_x9 regs[9]
+#define ARM_x8 regs[8]
+#define ARM_x7 regs[7]
+#define ARM_x6 regs[6]
+#define ARM_x5 regs[5]
+#define ARM_x4 regs[4]
+#define ARM_x3 regs[3]
+#define ARM_x2 regs[2]
+#define ARM_x1 regs[1]
+#define ARM_x0 regs[0]
+
+#define REG_OFFSET_NAME(r) \
+ {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
+#define REG_OFFSET_END {.name = NULL, .offset = 0}
+
+const struct pt_regs_offset regs_offset_table[] = {
+ REG_OFFSET_NAME(x0),
+ REG_OFFSET_NAME(x1),
+ REG_OFFSET_NAME(x2),
+ REG_OFFSET_NAME(x3),
+ REG_OFFSET_NAME(x4),
+ REG_OFFSET_NAME(x5),
+ REG_OFFSET_NAME(x6),
+ REG_OFFSET_NAME(x7),
+ REG_OFFSET_NAME(x8),
+ REG_OFFSET_NAME(x9),
+ REG_OFFSET_NAME(x10),
+ REG_OFFSET_NAME(x11),
+ REG_OFFSET_NAME(x12),
+ REG_OFFSET_NAME(x13),
+ REG_OFFSET_NAME(x14),
+ REG_OFFSET_NAME(x15),
+ REG_OFFSET_NAME(x16),
+ REG_OFFSET_NAME(x17),
+ REG_OFFSET_NAME(x18),
+ REG_OFFSET_NAME(x19),
+ REG_OFFSET_NAME(x20),
+ REG_OFFSET_NAME(x21),
+ REG_OFFSET_NAME(x22),
+ REG_OFFSET_NAME(x23),
+ REG_OFFSET_NAME(x24),
+ REG_OFFSET_NAME(x25),
+ REG_OFFSET_NAME(x26),
+ REG_OFFSET_NAME(x27),
+ REG_OFFSET_NAME(x28),
+ REG_OFFSET_NAME(x29),
+ REG_OFFSET_NAME(x30),
+ REG_OFFSET_NAME(sp),
+ REG_OFFSET_NAME(pc),
+ REG_OFFSET_NAME(pstate),
+ REG_OFFSET_END,
+};
+
/*
* TODO: does not yet catch signals sent when the child dies.
* in exit.c or in signal.c.
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: "David A. Long" <dave.long@linaro.org>
Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 103 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7796af4..966091f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -68,6 +68,7 @@ config ARM64
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
+ select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RCU_TABLE_FREE
select HAVE_SYSCALL_TRACEPOINTS
select IRQ_DOMAIN
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index d6dd9fd..8f440e9 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -118,6 +118,8 @@ struct pt_regs {
u64 syscallno;
};
+#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
+
#define arch_has_single_step() (1)
#ifdef CONFIG_COMPAT
@@ -146,6 +148,29 @@ struct pt_regs {
#define user_stack_pointer(regs) \
(!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
+/**
+ * regs_get_register() - get register value from its offset
+ * @regs: pt_regs from which register value is gotten
+ * @offset: offset number of the register.
+ *
+ * regs_get_register returns the value of a register whose offset from @regs.
+ * The @offset is the offset of the register in struct pt_regs.
+ * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
+ */
+static inline u64 regs_get_register(struct pt_regs *regs,
+ unsigned int offset)
+{
+ if (unlikely(offset > MAX_REG_OFFSET))
+ return 0;
+ return *(u64 *)((u64)regs + offset);
+}
+
+/* Valid only for Kernel mode traps. */
+static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
+{
+ return regs->sp;
+}
+
static inline unsigned long regs_return_value(struct pt_regs *regs)
{
return regs->regs[0];
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index d882b83..f6199a5 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -48,6 +48,83 @@
#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
+#define ARM_pstate pstate
+#define ARM_pc pc
+#define ARM_sp sp
+#define ARM_x30 regs[30]
+#define ARM_x29 regs[29]
+#define ARM_x28 regs[28]
+#define ARM_x27 regs[27]
+#define ARM_x26 regs[26]
+#define ARM_x25 regs[25]
+#define ARM_x24 regs[24]
+#define ARM_x23 regs[23]
+#define ARM_x22 regs[22]
+#define ARM_x21 regs[21]
+#define ARM_x20 regs[20]
+#define ARM_x19 regs[19]
+#define ARM_x18 regs[18]
+#define ARM_x17 regs[17]
+#define ARM_x16 regs[16]
+#define ARM_x15 regs[15]
+#define ARM_x14 regs[14]
+#define ARM_x13 regs[13]
+#define ARM_x12 regs[12]
+#define ARM_x11 regs[11]
+#define ARM_x10 regs[10]
+#define ARM_x9 regs[9]
+#define ARM_x8 regs[8]
+#define ARM_x7 regs[7]
+#define ARM_x6 regs[6]
+#define ARM_x5 regs[5]
+#define ARM_x4 regs[4]
+#define ARM_x3 regs[3]
+#define ARM_x2 regs[2]
+#define ARM_x1 regs[1]
+#define ARM_x0 regs[0]
+
+#define REG_OFFSET_NAME(r) \
+ {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
+#define REG_OFFSET_END {.name = NULL, .offset = 0}
+
+const struct pt_regs_offset regs_offset_table[] = {
+ REG_OFFSET_NAME(x0),
+ REG_OFFSET_NAME(x1),
+ REG_OFFSET_NAME(x2),
+ REG_OFFSET_NAME(x3),
+ REG_OFFSET_NAME(x4),
+ REG_OFFSET_NAME(x5),
+ REG_OFFSET_NAME(x6),
+ REG_OFFSET_NAME(x7),
+ REG_OFFSET_NAME(x8),
+ REG_OFFSET_NAME(x9),
+ REG_OFFSET_NAME(x10),
+ REG_OFFSET_NAME(x11),
+ REG_OFFSET_NAME(x12),
+ REG_OFFSET_NAME(x13),
+ REG_OFFSET_NAME(x14),
+ REG_OFFSET_NAME(x15),
+ REG_OFFSET_NAME(x16),
+ REG_OFFSET_NAME(x17),
+ REG_OFFSET_NAME(x18),
+ REG_OFFSET_NAME(x19),
+ REG_OFFSET_NAME(x20),
+ REG_OFFSET_NAME(x21),
+ REG_OFFSET_NAME(x22),
+ REG_OFFSET_NAME(x23),
+ REG_OFFSET_NAME(x24),
+ REG_OFFSET_NAME(x25),
+ REG_OFFSET_NAME(x26),
+ REG_OFFSET_NAME(x27),
+ REG_OFFSET_NAME(x28),
+ REG_OFFSET_NAME(x29),
+ REG_OFFSET_NAME(x30),
+ REG_OFFSET_NAME(sp),
+ REG_OFFSET_NAME(pc),
+ REG_OFFSET_NAME(pstate),
+ REG_OFFSET_END,
+};
+
/*
* TODO: does not yet catch signals sent when the child dies.
* in exit.c or in signal.c.
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 2/7] arm64: Add more test functions to insn.c
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: "David A. Long" <dave.long@linaro.org>
Certain instructions are hard to execute correctly out-of-line (as in
kprobes). Test functions are added to insn.[hc] to identify these. The
instructions include any that use PC-relative addressing, change the PC,
or change interrupt masking. For efficiency and simplicity test
functions are also added for small collections of related instructions.
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/include/asm/insn.h | 18 ++++++++++++++++++
arch/arm64/kernel/insn.c | 28 ++++++++++++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index f81b328..1fdd237 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -223,8 +223,13 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
{ return (val); }
+__AARCH64_INSN_FUNCS(adr_adrp, 0x1F000000, 0x10000000)
+__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
__AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
__AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
+__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
+__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
+__AARCH64_INSN_FUNCS(exclusive, 0x3F000000, 0x08000000)
__AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
__AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
__AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
@@ -264,19 +269,29 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
+__AARCH64_INSN_FUNCS(b_bl, 0x7C000000, 0x14000000)
+__AARCH64_INSN_FUNCS(cb, 0x7E000000, 0x34000000)
__AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
__AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
+__AARCH64_INSN_FUNCS(tb, 0x7E000000, 0x36000000)
__AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
__AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
+__AARCH64_INSN_FUNCS(b_bl_cb_tb, 0x5C000000, 0x14000000)
__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
__AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
__AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
+__AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
__AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
__AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
__AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
+__AARCH64_INSN_FUNCS(br_blr, 0xFFDFFC1F, 0xD61F0000)
__AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
+__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F000, 0xD5004000)
+__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
+__AARCH64_INSN_FUNCS(set_clr_daif, 0xFFFFF0DF, 0xD50340DF)
+__AARCH64_INSN_FUNCS(rd_wr_daif, 0xFFDFFFE0, 0xD51B4220)
#undef __AARCH64_INSN_FUNCS
@@ -285,6 +300,9 @@ bool aarch64_insn_is_nop(u32 insn);
int aarch64_insn_read(void *addr, u32 *insnp);
int aarch64_insn_write(void *addr, u32 insn);
enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
+bool aarch64_insn_uses_literal(u32 insn);
+bool aarch64_insn_is_branch(u32 insn);
+bool aarch64_insn_is_daif_access(u32 insn);
u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
u32 insn, u64 imm);
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index 9249020..ecd8882 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -155,6 +155,34 @@ static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn)
aarch64_insn_is_nop(insn);
}
+bool __kprobes aarch64_insn_uses_literal(u32 insn)
+{
+ /* ldr/ldrsw (literal), prfm */
+
+ return aarch64_insn_is_ldr_lit(insn) ||
+ aarch64_insn_is_ldrsw_lit(insn) ||
+ aarch64_insn_is_adr_adrp(insn) ||
+ aarch64_insn_is_prfm_lit(insn);
+}
+
+bool __kprobes aarch64_insn_is_branch(u32 insn)
+{
+ /* b, bl, cb*, tb*, b.cond, br, blr */
+
+ return aarch64_insn_is_b_bl_cb_tb(insn) ||
+ aarch64_insn_is_br_blr(insn) ||
+ aarch64_insn_is_ret(insn) ||
+ aarch64_insn_is_bcond(insn);
+}
+
+bool __kprobes aarch64_insn_is_daif_access(u32 insn)
+{
+ /* msr daif, mrs daif, msr daifset, msr daifclr */
+
+ return aarch64_insn_is_rd_wr_daif(insn) ||
+ aarch64_insn_is_set_clr_daif(insn);
+}
+
/*
* ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
* Section B2.6.5 "Concurrent modification and execution of instructions":
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 2/7] arm64: Add more test functions to insn.c
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: "David A. Long" <dave.long@linaro.org>
Certain instructions are hard to execute correctly out-of-line (as in
kprobes). Test functions are added to insn.[hc] to identify these. The
instructions include any that use PC-relative addressing, change the PC,
or change interrupt masking. For efficiency and simplicity test
functions are also added for small collections of related instructions.
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/include/asm/insn.h | 18 ++++++++++++++++++
arch/arm64/kernel/insn.c | 28 ++++++++++++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index f81b328..1fdd237 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -223,8 +223,13 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
{ return (val); }
+__AARCH64_INSN_FUNCS(adr_adrp, 0x1F000000, 0x10000000)
+__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
__AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
__AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
+__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
+__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
+__AARCH64_INSN_FUNCS(exclusive, 0x3F000000, 0x08000000)
__AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
__AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
__AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
@@ -264,19 +269,29 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
+__AARCH64_INSN_FUNCS(b_bl, 0x7C000000, 0x14000000)
+__AARCH64_INSN_FUNCS(cb, 0x7E000000, 0x34000000)
__AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
__AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
+__AARCH64_INSN_FUNCS(tb, 0x7E000000, 0x36000000)
__AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
__AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
+__AARCH64_INSN_FUNCS(b_bl_cb_tb, 0x5C000000, 0x14000000)
__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
__AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
__AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
+__AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
__AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
__AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
__AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
+__AARCH64_INSN_FUNCS(br_blr, 0xFFDFFC1F, 0xD61F0000)
__AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
+__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F000, 0xD5004000)
+__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
+__AARCH64_INSN_FUNCS(set_clr_daif, 0xFFFFF0DF, 0xD50340DF)
+__AARCH64_INSN_FUNCS(rd_wr_daif, 0xFFDFFFE0, 0xD51B4220)
#undef __AARCH64_INSN_FUNCS
@@ -285,6 +300,9 @@ bool aarch64_insn_is_nop(u32 insn);
int aarch64_insn_read(void *addr, u32 *insnp);
int aarch64_insn_write(void *addr, u32 insn);
enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
+bool aarch64_insn_uses_literal(u32 insn);
+bool aarch64_insn_is_branch(u32 insn);
+bool aarch64_insn_is_daif_access(u32 insn);
u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
u32 insn, u64 imm);
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index 9249020..ecd8882 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -155,6 +155,34 @@ static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn)
aarch64_insn_is_nop(insn);
}
+bool __kprobes aarch64_insn_uses_literal(u32 insn)
+{
+ /* ldr/ldrsw (literal), prfm */
+
+ return aarch64_insn_is_ldr_lit(insn) ||
+ aarch64_insn_is_ldrsw_lit(insn) ||
+ aarch64_insn_is_adr_adrp(insn) ||
+ aarch64_insn_is_prfm_lit(insn);
+}
+
+bool __kprobes aarch64_insn_is_branch(u32 insn)
+{
+ /* b, bl, cb*, tb*, b.cond, br, blr */
+
+ return aarch64_insn_is_b_bl_cb_tb(insn) ||
+ aarch64_insn_is_br_blr(insn) ||
+ aarch64_insn_is_ret(insn) ||
+ aarch64_insn_is_bcond(insn);
+}
+
+bool __kprobes aarch64_insn_is_daif_access(u32 insn)
+{
+ /* msr daif, mrs daif, msr daifset, msr daifclr */
+
+ return aarch64_insn_is_rd_wr_daif(insn) ||
+ aarch64_insn_is_set_clr_daif(insn);
+}
+
/*
* ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
* Section B2.6.5 "Concurrent modification and execution of instructions":
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 3/7] arm64: Kprobes with single stepping support
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes utilizes software breakpoint and single step debug
exceptions supported on ARM v8.
A software breakpoint is placed at the probe address to trap the
kernel execution into the kprobe handler.
ARM v8 supports enabling single stepping before the break exception
return (ERET), with next PC in exception return address (ELR_EL1). The
kprobe handler prepares an executable memory slot for out-of-line
execution with a copy of the original instruction being probed, and
enables single stepping. The PC is set to the out-of-line slot address
before the ERET. With this scheme, the instruction is executed with the
exact same register context except for the PC (and DAIF) registers.
Debug mask (PSTATE.D) is enabled only when single stepping a recursive
kprobe, e.g.: during kprobes reenter so that probed instruction can be
single stepped within the kprobe handler -exception- context.
The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
any further re-entry is prevented by not calling handlers and the case
counted as a missed kprobe).
Single stepping from the x-o-l slot has a drawback for PC-relative accesses
like branching and symbolic literals access as the offset from the new PC
(slot address) may not be ensured to fit in the immediate value of
the opcode. Such instructions need simulation, so reject
probing them.
Instructions generating exceptions or cpu mode change are rejected
for probing.
Instructions using Exclusive Monitor are rejected too.
System instructions are mostly enabled for stepping, except MSR/MRS
accesses to "DAIF" flags in PSTATE, which are not safe for
probing.
Thanks to Steve Capper and Pratyush Anand for several suggested
Changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/debug-monitors.h | 5 +
arch/arm64/include/asm/kprobes.h | 62 ++++
arch/arm64/include/asm/probes.h | 50 +++
arch/arm64/include/asm/ptrace.h | 3 +-
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/debug-monitors.c | 35 ++-
arch/arm64/kernel/kprobes-arm64.c | 68 ++++
arch/arm64/kernel/kprobes-arm64.h | 28 ++
arch/arm64/kernel/kprobes.c | 537 ++++++++++++++++++++++++++++++++
arch/arm64/kernel/kprobes.h | 24 ++
arch/arm64/kernel/vmlinux.lds.S | 1 +
arch/arm64/mm/fault.c | 25 ++
13 files changed, 829 insertions(+), 11 deletions(-)
create mode 100644 arch/arm64/include/asm/kprobes.h
create mode 100644 arch/arm64/include/asm/probes.h
create mode 100644 arch/arm64/kernel/kprobes-arm64.c
create mode 100644 arch/arm64/kernel/kprobes-arm64.h
create mode 100644 arch/arm64/kernel/kprobes.c
create mode 100644 arch/arm64/kernel/kprobes.h
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 966091f..45a9bd81 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -71,6 +71,7 @@ config ARM64
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RCU_TABLE_FREE
select HAVE_SYSCALL_TRACEPOINTS
+ select HAVE_KPROBES
select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select NO_BOOTMEM
diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
index 40ec68a..92d7cea 100644
--- a/arch/arm64/include/asm/debug-monitors.h
+++ b/arch/arm64/include/asm/debug-monitors.h
@@ -90,6 +90,11 @@
#define CACHE_FLUSH_IS_SAFE 1
+/* kprobes BRK opcodes with ESR encoding */
+#define BRK64_ESR_MASK 0xFFFF
+#define BRK64_ESR_KPROBES 0x0004
+#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
+
/* AArch32 */
#define DBG_ESR_EVT_BKPT 0x4
#define DBG_ESR_EVT_VECC 0x5
diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
new file mode 100644
index 0000000..af31c4d
--- /dev/null
+++ b/arch/arm64/include/asm/kprobes.h
@@ -0,0 +1,62 @@
+/*
+ * arch/arm64/include/asm/kprobes.h
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KPROBES_H
+#define _ARM_KPROBES_H
+
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/percpu.h>
+
+#define __ARCH_WANT_KPROBES_INSN_SLOT
+#define MAX_INSN_SIZE 1
+#define MAX_STACK_SIZE 128
+
+#define flush_insn_slot(p) do { } while (0)
+#define kretprobe_blacklist_size 0
+
+#include <asm/probes.h>
+
+struct prev_kprobe {
+ struct kprobe *kp;
+ unsigned int status;
+};
+
+/* Single step context for kprobe */
+struct kprobe_step_ctx {
+#define KPROBES_STEP_NONE 0x0
+#define KPROBES_STEP_PENDING 0x1
+ unsigned long ss_status;
+ unsigned long match_addr;
+};
+
+/* per-cpu kprobe control block */
+struct kprobe_ctlblk {
+ unsigned int kprobe_status;
+ unsigned long saved_irqflag;
+ struct prev_kprobe prev_kprobe;
+ struct kprobe_step_ctx ss_ctx;
+ struct pt_regs jprobe_saved_regs;
+ char jprobes_stack[MAX_STACK_SIZE];
+};
+
+void arch_remove_kprobe(struct kprobe *);
+int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
+int kprobe_exceptions_notify(struct notifier_block *self,
+ unsigned long val, void *data);
+int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
+int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
+
+#endif /* _ARM_KPROBES_H */
diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h
new file mode 100644
index 0000000..7f5a27f
--- /dev/null
+++ b/arch/arm64/include/asm/probes.h
@@ -0,0 +1,50 @@
+/*
+ * arch/arm64/include/asm/probes.h
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+#ifndef _ARM_PROBES_H
+#define _ARM_PROBES_H
+
+struct kprobe;
+struct arch_specific_insn;
+
+typedef u32 kprobe_opcode_t;
+typedef unsigned long (kprobes_pstate_check_t)(unsigned long);
+typedef unsigned long
+(probes_condition_check_t)(struct kprobe *p, struct pt_regs *);
+typedef void
+(probes_prepare_t)(struct kprobe *, struct arch_specific_insn *);
+typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
+
+enum pc_restore_type {
+ NO_RESTORE,
+ RESTORE_PC,
+};
+
+struct kprobe_pc_restore {
+ enum pc_restore_type type;
+ unsigned long addr;
+};
+
+/* architecture specific copy of original instruction */
+struct arch_specific_insn {
+ kprobe_opcode_t *insn;
+ kprobes_pstate_check_t *pstate_cc;
+ probes_condition_check_t *check_condn;
+ probes_prepare_t *prepare;
+ kprobes_handler_t *handler;
+ /* restore address after step xol */
+ struct kprobe_pc_restore restore;
+};
+
+#endif
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index 8f440e9..aadf61a 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -206,7 +206,8 @@ static inline int valid_user_regs(struct user_pt_regs *regs)
return 0;
}
-#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
+#define instruction_pointer(regs) ((regs)->pc)
+#define stack_pointer(regs) ((regs)->sp)
#ifdef CONFIG_SMP
extern unsigned long profile_pc(struct pt_regs *regs);
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 426d076..1319872 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -32,6 +32,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
arm64-obj-$(CONFIG_KGDB) += kgdb.o
+arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
arm64-obj-$(CONFIG_PCI) += pci.o
arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
index b056369..486ee94 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -23,6 +23,7 @@
#include <linux/hardirq.h>
#include <linux/init.h>
#include <linux/ptrace.h>
+#include <linux/kprobes.h>
#include <linux/stat.h>
#include <linux/uaccess.h>
@@ -228,6 +229,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
struct pt_regs *regs)
{
siginfo_t info;
+ bool handler_found = false;
/*
* If we are stepping a pending breakpoint, call the hw_breakpoint
@@ -251,15 +253,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
*/
user_rewind_single_step(current);
} else {
+#ifdef CONFIG_KPROBES
+ if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
+ handler_found = true;
+#endif
if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
- return 0;
-
- pr_warning("Unexpected kernel single-step exception at EL1\n");
- /*
- * Re-enable stepping since we know that we will be
- * returning to regs.
- */
- set_regs_spsr_ss(regs);
+ handler_found = true;
+
+ if (!handler_found) {
+ pr_warn("Unexpected kernel single-step exception at EL1\n");
+ /*
+ * Re-enable stepping since we know that we will be
+ * returning to regs.
+ */
+ set_regs_spsr_ss(regs);
+ }
}
return 0;
@@ -315,8 +323,15 @@ static int brk_handler(unsigned long addr, unsigned int esr,
};
force_sig_info(SIGTRAP, &info, current);
- } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
- pr_warning("Unexpected kernel BRK exception at EL1\n");
+ }
+#ifdef CONFIG_KPROBES
+ else if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
+ if (kprobe_breakpoint_handler(regs, esr) != DBG_HOOK_HANDLED)
+ return -EFAULT;
+ }
+#endif
+ else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
+ pr_warn("Unexpected kernel BRK exception at EL1\n");
return -EFAULT;
}
diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
new file mode 100644
index 0000000..f958c52
--- /dev/null
+++ b/arch/arm64/kernel/kprobes-arm64.c
@@ -0,0 +1,68 @@
+/*
+ * arch/arm64/kernel/kprobes-arm64.c
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+#include <asm/kprobes.h>
+#include <asm/insn.h>
+
+#include "kprobes-arm64.h"
+
+static bool __kprobes aarch64_insn_is_steppable(u32 insn)
+{
+ if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
+ if (aarch64_insn_is_branch(insn))
+ return false;
+
+ /* modification of daif creates issues */
+ if (aarch64_insn_is_daif_access(insn))
+ return false;
+
+ if (aarch64_insn_is_exception(insn))
+ return false;
+
+ if (aarch64_insn_is_hint(insn))
+ return aarch64_insn_is_nop(insn);
+
+ return true;
+ }
+
+ if (aarch64_insn_uses_literal(insn))
+ return false;
+
+ if (aarch64_insn_is_exclusive(insn))
+ return false;
+
+ return true;
+}
+
+/* Return:
+ * INSN_REJECTED If instruction is one not allowed to kprobe,
+ * INSN_GOOD If instruction is supported and uses instruction slot,
+ * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
+ */
+enum kprobe_insn __kprobes
+arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+ /*
+ * Instructions reading or modifying the PC won't work from the XOL
+ * slot.
+ */
+ if (aarch64_insn_is_steppable(insn))
+ return INSN_GOOD;
+ else
+ return INSN_REJECTED;
+}
diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
new file mode 100644
index 0000000..87e7891
--- /dev/null
+++ b/arch/arm64/kernel/kprobes-arm64.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm64/kernel/kprobes-arm64.h
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KERNEL_KPROBES_ARM64_H
+#define _ARM_KERNEL_KPROBES_ARM64_H
+
+enum kprobe_insn {
+ INSN_REJECTED,
+ INSN_GOOD_NO_SLOT,
+ INSN_GOOD,
+};
+
+enum kprobe_insn __kprobes
+arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
+
+#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
new file mode 100644
index 0000000..601d2c6
--- /dev/null
+++ b/arch/arm64/kernel/kprobes.c
@@ -0,0 +1,537 @@
+/*
+ * arch/arm64/kernel/kprobes.c
+ *
+ * Kprobes support for ARM64
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ * Author: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/stop_machine.h>
+#include <linux/stringify.h>
+#include <asm/traps.h>
+#include <asm/ptrace.h>
+#include <asm/cacheflush.h>
+#include <asm/debug-monitors.h>
+#include <asm/system_misc.h>
+#include <asm/insn.h>
+
+#include "kprobes.h"
+#include "kprobes-arm64.h"
+
+#define MIN_STACK_SIZE(addr) min((unsigned long)MAX_STACK_SIZE, \
+ (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
+
+DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
+DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
+
+static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
+{
+ /* prepare insn slot */
+ p->ainsn.insn[0] = p->opcode;
+
+ flush_icache_range((uintptr_t) (p->ainsn.insn),
+ (uintptr_t) (p->ainsn.insn) + MAX_INSN_SIZE);
+
+ /*
+ * Needs restoring of return address after stepping xol.
+ */
+ p->ainsn.restore.addr = (unsigned long) p->addr +
+ sizeof(kprobe_opcode_t);
+ p->ainsn.restore.type = RESTORE_PC;
+}
+
+int __kprobes arch_prepare_kprobe(struct kprobe *p)
+{
+ kprobe_opcode_t insn;
+ unsigned long probe_addr = (unsigned long)p->addr;
+
+ /* copy instruction */
+ insn = *p->addr;
+ p->opcode = insn;
+
+ if (in_exception_text(probe_addr))
+ return -EINVAL;
+
+ /* decode instruction */
+ switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
+ case INSN_REJECTED: /* insn not supported */
+ return -EINVAL;
+
+ case INSN_GOOD_NO_SLOT: /* insn need simulation */
+ return -EINVAL;
+
+ case INSN_GOOD: /* instruction uses slot */
+ p->ainsn.insn = get_insn_slot();
+ if (!p->ainsn.insn)
+ return -ENOMEM;
+ break;
+ };
+
+ /* prepare the instruction */
+ arch_prepare_ss_slot(p);
+
+ return 0;
+}
+
+static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
+{
+ void *addrs[1];
+ u32 insns[1];
+
+ addrs[0] = (void *)addr;
+ insns[0] = (u32)opcode;
+
+ return aarch64_insn_patch_text_sync(addrs, insns, 1);
+}
+
+/* arm kprobe: install breakpoint in text */
+void __kprobes arch_arm_kprobe(struct kprobe *p)
+{
+ patch_text(p->addr, BRK64_OPCODE_KPROBES);
+}
+
+/* disarm kprobe: remove breakpoint from text */
+void __kprobes arch_disarm_kprobe(struct kprobe *p)
+{
+ patch_text(p->addr, p->opcode);
+}
+
+void __kprobes arch_remove_kprobe(struct kprobe *p)
+{
+ if (p->ainsn.insn) {
+ free_insn_slot(p->ainsn.insn, 0);
+ p->ainsn.insn = NULL;
+ }
+}
+
+static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
+{
+ kcb->prev_kprobe.kp = kprobe_running();
+ kcb->prev_kprobe.status = kcb->kprobe_status;
+}
+
+static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
+{
+ __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
+ kcb->kprobe_status = kcb->prev_kprobe.status;
+}
+
+static void __kprobes set_current_kprobe(struct kprobe *p)
+{
+ __this_cpu_write(current_kprobe, p);
+}
+
+/*
+ * The D-flag (Debug mask) is set (masked) upon exception entry.
+ * Kprobes needs to clear (unmask) D-flag -ONLY- in case of recursive
+ * probe i.e. when probe hit from kprobe handler context upon
+ * executing the pre/post handlers. In this case we return with
+ * D-flag clear so that single-stepping can be carried-out.
+ *
+ * Leave D-flag set in all other cases.
+ */
+static void __kprobes
+spsr_set_debug_flag(struct pt_regs *regs, int mask)
+{
+ unsigned long spsr = regs->pstate;
+
+ if (mask)
+ spsr |= PSR_D_BIT;
+ else
+ spsr &= ~PSR_D_BIT;
+
+ regs->pstate = spsr;
+}
+
+/*
+ * Interrupts need to be disabled before single-step mode is set, and not
+ * reenabled until after single-step mode ends.
+ * Without disabling interrupt on local CPU, there is a chance of
+ * interrupt occurrence in the period of exception return and start of
+ * out-of-line single-step, that result in wrongly single stepping
+ * the interrupt handler.
+ */
+static void __kprobes kprobes_save_local_irqflag(struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ kcb->saved_irqflag = regs->pstate;
+ regs->pstate |= PSR_I_BIT;
+}
+
+static void __kprobes kprobes_restore_local_irqflag(struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ if (kcb->saved_irqflag & PSR_I_BIT)
+ regs->pstate |= PSR_I_BIT;
+ else
+ regs->pstate &= ~PSR_I_BIT;
+}
+
+static void __kprobes
+set_ss_context(struct kprobe_ctlblk *kcb, unsigned long addr)
+{
+ kcb->ss_ctx.ss_status = KPROBES_STEP_PENDING;
+ kcb->ss_ctx.match_addr = addr + sizeof(kprobe_opcode_t);
+}
+
+static void __kprobes clear_ss_context(struct kprobe_ctlblk *kcb)
+{
+ kcb->ss_ctx.ss_status = KPROBES_STEP_NONE;
+ kcb->ss_ctx.match_addr = 0;
+}
+
+static void __kprobes
+skip_singlestep_missed(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
+{
+ /* set return addr to next pc to continue */
+ instruction_pointer(regs) += sizeof(kprobe_opcode_t);
+}
+
+static void __kprobes setup_singlestep(struct kprobe *p,
+ struct pt_regs *regs,
+ struct kprobe_ctlblk *kcb, int reenter)
+{
+ unsigned long slot;
+
+ if (reenter) {
+ save_previous_kprobe(kcb);
+ set_current_kprobe(p);
+ kcb->kprobe_status = KPROBE_REENTER;
+ } else {
+ kcb->kprobe_status = KPROBE_HIT_SS;
+ }
+
+ if (p->ainsn.insn) {
+ /* prepare for single stepping */
+ slot = (unsigned long)p->ainsn.insn;
+
+ set_ss_context(kcb, slot); /* mark pending ss */
+
+ if (kcb->kprobe_status == KPROBE_REENTER)
+ spsr_set_debug_flag(regs, 0);
+
+ /* IRQs and single stepping do not mix well. */
+ kprobes_save_local_irqflag(regs);
+ kernel_enable_single_step(regs);
+ instruction_pointer(regs) = slot;
+ } else {
+ BUG();
+ }
+}
+
+static int __kprobes reenter_kprobe(struct kprobe *p,
+ struct pt_regs *regs,
+ struct kprobe_ctlblk *kcb)
+{
+ switch (kcb->kprobe_status) {
+ case KPROBE_HIT_SSDONE:
+ case KPROBE_HIT_ACTIVE:
+ if (!p->ainsn.check_condn || p->ainsn.check_condn(p, regs)) {
+ kprobes_inc_nmissed_count(p);
+ setup_singlestep(p, regs, kcb, 1);
+ } else {
+ /* condition check failed, skip stepping */
+ skip_singlestep_missed(kcb, regs);
+ }
+ break;
+ case KPROBE_HIT_SS:
+ case KPROBE_REENTER:
+ pr_warn("Unrecoverable kprobe detected at %p.\n", p->addr);
+ dump_kprobe(p);
+ BUG();
+ break;
+ default:
+ WARN_ON(1);
+ return 0;
+ }
+
+ return 1;
+}
+
+static void __kprobes
+post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
+{
+ struct kprobe *cur = kprobe_running();
+
+ if (!cur)
+ return;
+
+ /* return addr restore if non-branching insn */
+ if (cur->ainsn.restore.type == RESTORE_PC) {
+ instruction_pointer(regs) = cur->ainsn.restore.addr;
+ if (!instruction_pointer(regs))
+ BUG();
+ }
+
+ /* restore back original saved kprobe variables and continue */
+ if (kcb->kprobe_status == KPROBE_REENTER) {
+ restore_previous_kprobe(kcb);
+ return;
+ }
+ /* call post handler */
+ kcb->kprobe_status = KPROBE_HIT_SSDONE;
+ if (cur->post_handler) {
+ /* post_handler can hit breakpoint and single step
+ * again, so we enable D-flag for recursive exception.
+ */
+ cur->post_handler(cur, regs, 0);
+ }
+
+ reset_current_kprobe();
+}
+
+int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
+{
+ struct kprobe *cur = kprobe_running();
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ switch (kcb->kprobe_status) {
+ case KPROBE_HIT_SS:
+ case KPROBE_REENTER:
+ /*
+ * We are here because the instruction being single
+ * stepped caused a page fault. We reset the current
+ * kprobe and the ip points back to the probe address
+ * and allow the page fault handler to continue as a
+ * normal page fault.
+ */
+ instruction_pointer(regs) = (unsigned long)cur->addr;
+ if (!instruction_pointer(regs))
+ BUG();
+ if (kcb->kprobe_status == KPROBE_REENTER)
+ restore_previous_kprobe(kcb);
+ else
+ reset_current_kprobe();
+
+ break;
+ case KPROBE_HIT_ACTIVE:
+ case KPROBE_HIT_SSDONE:
+ /*
+ * We increment the nmissed count for accounting,
+ * we can also use npre/npostfault count for accounting
+ * these specific fault cases.
+ */
+ kprobes_inc_nmissed_count(cur);
+
+ /*
+ * We come here because instructions in the pre/post
+ * handler caused the page_fault, this could happen
+ * if handler tries to access user space by
+ * copy_from_user(), get_user() etc. Let the
+ * user-specified handler try to fix it first.
+ */
+ if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
+ return 1;
+
+ /*
+ * In case the user-specified fault handler returned
+ * zero, try to fix up.
+ */
+ if (fixup_exception(regs))
+ return 1;
+
+ break;
+ }
+ return 0;
+}
+
+int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
+ unsigned long val, void *data)
+{
+ return NOTIFY_DONE;
+}
+
+void __kprobes kprobe_handler(struct pt_regs *regs)
+{
+ struct kprobe *p, *cur;
+ struct kprobe_ctlblk *kcb;
+ unsigned long addr = instruction_pointer(regs);
+
+ kcb = get_kprobe_ctlblk();
+ cur = kprobe_running();
+
+ p = get_kprobe((kprobe_opcode_t *) addr);
+
+ if (p) {
+ if (cur) {
+ if (reenter_kprobe(p, regs, kcb))
+ return;
+ } else if (!p->ainsn.check_condn ||
+ p->ainsn.check_condn(p, regs)) {
+ /* Probe hit and conditional execution check ok. */
+ set_current_kprobe(p);
+ kcb->kprobe_status = KPROBE_HIT_ACTIVE;
+
+ /*
+ * If we have no pre-handler or it returned 0, we
+ * continue with normal processing. If we have a
+ * pre-handler and it returned non-zero, it prepped
+ * for calling the break_handler below on re-entry,
+ * so get out doing nothing more here.
+ *
+ * pre_handler can hit a breakpoint and can step thru
+ * before return, keep PSTATE D-flag enabled until
+ * pre_handler return back.
+ */
+ if (!p->pre_handler || !p->pre_handler(p, regs)) {
+ kcb->kprobe_status = KPROBE_HIT_SS;
+ setup_singlestep(p, regs, kcb, 0);
+ return;
+ }
+ } else {
+ /*
+ * Breakpoint hit but conditional check failed,
+ * so just skip the instruction (NOP behaviour)
+ */
+ skip_singlestep_missed(kcb, regs);
+ return;
+ }
+ } else if (*(kprobe_opcode_t *) addr != BRK64_OPCODE_KPROBES) {
+ /*
+ * The breakpoint instruction was removed right
+ * after we hit it. Another cpu has removed
+ * either a probepoint or a debugger breakpoint
+ * at this address. In either case, no further
+ * handling of this interrupt is appropriate.
+ * Return back to original instruction, and continue.
+ */
+ return;
+ } else if (cur) {
+ /* We probably hit a jprobe. Call its break handler. */
+ if (cur->break_handler && cur->break_handler(cur, regs)) {
+ kcb->kprobe_status = KPROBE_HIT_SS;
+ setup_singlestep(cur, regs, kcb, 0);
+ return;
+ }
+ } else {
+ /* breakpoint is removed, now in a race
+ * Return back to original instruction & continue.
+ */
+ }
+}
+
+static int __kprobes
+kprobe_ss_hit(struct kprobe_ctlblk *kcb, unsigned long addr)
+{
+ if ((kcb->ss_ctx.ss_status == KPROBES_STEP_PENDING)
+ && (kcb->ss_ctx.match_addr == addr)) {
+ clear_ss_context(kcb); /* clear pending ss */
+ return DBG_HOOK_HANDLED;
+ }
+ /* not ours, kprobes should ignore it */
+ return DBG_HOOK_ERROR;
+}
+
+int __kprobes
+kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+ int retval;
+
+ /* return error if this is not our step */
+ retval = kprobe_ss_hit(kcb, instruction_pointer(regs));
+
+ if (retval == DBG_HOOK_HANDLED) {
+ kprobes_restore_local_irqflag(regs);
+ kernel_disable_single_step();
+
+ if (kcb->kprobe_status == KPROBE_REENTER)
+ spsr_set_debug_flag(regs, 1);
+
+ post_kprobe_handler(kcb, regs);
+ }
+
+ return retval;
+}
+
+int __kprobes
+kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
+{
+ kprobe_handler(regs);
+ return DBG_HOOK_HANDLED;
+}
+
+int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
+{
+ struct jprobe *jp = container_of(p, struct jprobe, kp);
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+ long stack_ptr = stack_pointer(regs);
+
+ kcb->jprobe_saved_regs = *regs;
+ memcpy(kcb->jprobes_stack, (void *)stack_ptr,
+ MIN_STACK_SIZE(stack_ptr));
+
+ instruction_pointer(regs) = (long)jp->entry;
+ preempt_disable();
+ return 1;
+}
+
+void __kprobes jprobe_return(void)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ /*
+ * Jprobe handler return by entering break exception,
+ * encoded same as kprobe, but with following conditions
+ * -a magic number in x0 to identify from rest of other kprobes.
+ * -restore stack addr to original saved pt_regs
+ */
+ asm volatile ("ldr x0, [%0]\n\t"
+ "mov sp, x0\n\t"
+ "ldr x0, =" __stringify(JPROBES_MAGIC_NUM) "\n\t"
+ "BRK %1\n\t"
+ "NOP\n\t"
+ :
+ : "r"(&kcb->jprobe_saved_regs.sp),
+ "I"(BRK64_ESR_KPROBES)
+ : "memory");
+}
+
+int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+ long stack_addr = kcb->jprobe_saved_regs.sp;
+ long orig_sp = stack_pointer(regs);
+ struct jprobe *jp = container_of(p, struct jprobe, kp);
+
+ if (regs->regs[0] == JPROBES_MAGIC_NUM) {
+ if (orig_sp != stack_addr) {
+ struct pt_regs *saved_regs =
+ (struct pt_regs *)kcb->jprobe_saved_regs.sp;
+ pr_err("current sp %lx does not match saved sp %lx\n",
+ orig_sp, stack_addr);
+ pr_err("Saved registers for jprobe %p\n", jp);
+ show_regs(saved_regs);
+ pr_err("Current registers\n");
+ show_regs(regs);
+ BUG();
+ }
+ *regs = kcb->jprobe_saved_regs;
+ memcpy((void *)stack_addr, kcb->jprobes_stack,
+ MIN_STACK_SIZE(stack_addr));
+ preempt_enable_no_resched();
+ return 1;
+ }
+ return 0;
+}
+
+int __init arch_init_kprobes(void)
+{
+ return 0;
+}
diff --git a/arch/arm64/kernel/kprobes.h b/arch/arm64/kernel/kprobes.h
new file mode 100644
index 0000000..e98ad60
--- /dev/null
+++ b/arch/arm64/kernel/kprobes.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm64/kernel/kprobes.h
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KERNEL_KPROBES_H
+#define _ARM_KERNEL_KPROBES_H
+
+#define JPROBES_MAGIC_NUM 0xa5a5a5a5a5a5a5a5
+
+/* Move this out to appropriate header file */
+int fixup_exception(struct pt_regs *regs);
+
+#endif /* _ARM_KERNEL_KPROBES_H */
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index a2c2986..2da5f4e 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -94,6 +94,7 @@ SECTIONS
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
+ KPROBES_TEXT
HYPERVISOR_TEXT
*(.fixup)
*(.gnu.warning)
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 96da131..4c13dfb 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -39,6 +39,28 @@
static const char *fault_name(unsigned int esr);
+#ifdef CONFIG_KPROBES
+static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
+{
+ int ret = 0;
+
+ /* kprobe_running() needs smp_processor_id() */
+ if (!user_mode(regs)) {
+ preempt_disable();
+ if (kprobe_running() && kprobe_fault_handler(regs, esr))
+ ret = 1;
+ preempt_enable();
+ }
+
+ return ret;
+}
+#else
+static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
+{
+ return 0;
+}
+#endif
+
/*
* Dump out the page tables associated with 'addr' in mm 'mm'.
*/
@@ -200,6 +222,9 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
+ if (notify_page_fault(regs, esr))
+ return 0;
+
tsk = current;
mm = tsk->mm;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 3/7] arm64: Kprobes with single stepping support
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Add support for basic kernel probes(kprobes) and jump probes
(jprobes) for ARM64.
Kprobes utilizes software breakpoint and single step debug
exceptions supported on ARM v8.
A software breakpoint is placed at the probe address to trap the
kernel execution into the kprobe handler.
ARM v8 supports enabling single stepping before the break exception
return (ERET), with next PC in exception return address (ELR_EL1). The
kprobe handler prepares an executable memory slot for out-of-line
execution with a copy of the original instruction being probed, and
enables single stepping. The PC is set to the out-of-line slot address
before the ERET. With this scheme, the instruction is executed with the
exact same register context except for the PC (and DAIF) registers.
Debug mask (PSTATE.D) is enabled only when single stepping a recursive
kprobe, e.g.: during kprobes reenter so that probed instruction can be
single stepped within the kprobe handler -exception- context.
The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
any further re-entry is prevented by not calling handlers and the case
counted as a missed kprobe).
Single stepping from the x-o-l slot has a drawback for PC-relative accesses
like branching and symbolic literals access as the offset from the new PC
(slot address) may not be ensured to fit in the immediate value of
the opcode. Such instructions need simulation, so reject
probing them.
Instructions generating exceptions or cpu mode change are rejected
for probing.
Instructions using Exclusive Monitor are rejected too.
System instructions are mostly enabled for stepping, except MSR/MRS
accesses to "DAIF" flags in PSTATE, which are not safe for
probing.
Thanks to Steve Capper and Pratyush Anand for several suggested
Changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/debug-monitors.h | 5 +
arch/arm64/include/asm/kprobes.h | 62 ++++
arch/arm64/include/asm/probes.h | 50 +++
arch/arm64/include/asm/ptrace.h | 3 +-
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/debug-monitors.c | 35 ++-
arch/arm64/kernel/kprobes-arm64.c | 68 ++++
arch/arm64/kernel/kprobes-arm64.h | 28 ++
arch/arm64/kernel/kprobes.c | 537 ++++++++++++++++++++++++++++++++
arch/arm64/kernel/kprobes.h | 24 ++
arch/arm64/kernel/vmlinux.lds.S | 1 +
arch/arm64/mm/fault.c | 25 ++
13 files changed, 829 insertions(+), 11 deletions(-)
create mode 100644 arch/arm64/include/asm/kprobes.h
create mode 100644 arch/arm64/include/asm/probes.h
create mode 100644 arch/arm64/kernel/kprobes-arm64.c
create mode 100644 arch/arm64/kernel/kprobes-arm64.h
create mode 100644 arch/arm64/kernel/kprobes.c
create mode 100644 arch/arm64/kernel/kprobes.h
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 966091f..45a9bd81 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -71,6 +71,7 @@ config ARM64
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RCU_TABLE_FREE
select HAVE_SYSCALL_TRACEPOINTS
+ select HAVE_KPROBES
select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select NO_BOOTMEM
diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
index 40ec68a..92d7cea 100644
--- a/arch/arm64/include/asm/debug-monitors.h
+++ b/arch/arm64/include/asm/debug-monitors.h
@@ -90,6 +90,11 @@
#define CACHE_FLUSH_IS_SAFE 1
+/* kprobes BRK opcodes with ESR encoding */
+#define BRK64_ESR_MASK 0xFFFF
+#define BRK64_ESR_KPROBES 0x0004
+#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
+
/* AArch32 */
#define DBG_ESR_EVT_BKPT 0x4
#define DBG_ESR_EVT_VECC 0x5
diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
new file mode 100644
index 0000000..af31c4d
--- /dev/null
+++ b/arch/arm64/include/asm/kprobes.h
@@ -0,0 +1,62 @@
+/*
+ * arch/arm64/include/asm/kprobes.h
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KPROBES_H
+#define _ARM_KPROBES_H
+
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/percpu.h>
+
+#define __ARCH_WANT_KPROBES_INSN_SLOT
+#define MAX_INSN_SIZE 1
+#define MAX_STACK_SIZE 128
+
+#define flush_insn_slot(p) do { } while (0)
+#define kretprobe_blacklist_size 0
+
+#include <asm/probes.h>
+
+struct prev_kprobe {
+ struct kprobe *kp;
+ unsigned int status;
+};
+
+/* Single step context for kprobe */
+struct kprobe_step_ctx {
+#define KPROBES_STEP_NONE 0x0
+#define KPROBES_STEP_PENDING 0x1
+ unsigned long ss_status;
+ unsigned long match_addr;
+};
+
+/* per-cpu kprobe control block */
+struct kprobe_ctlblk {
+ unsigned int kprobe_status;
+ unsigned long saved_irqflag;
+ struct prev_kprobe prev_kprobe;
+ struct kprobe_step_ctx ss_ctx;
+ struct pt_regs jprobe_saved_regs;
+ char jprobes_stack[MAX_STACK_SIZE];
+};
+
+void arch_remove_kprobe(struct kprobe *);
+int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
+int kprobe_exceptions_notify(struct notifier_block *self,
+ unsigned long val, void *data);
+int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
+int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
+
+#endif /* _ARM_KPROBES_H */
diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h
new file mode 100644
index 0000000..7f5a27f
--- /dev/null
+++ b/arch/arm64/include/asm/probes.h
@@ -0,0 +1,50 @@
+/*
+ * arch/arm64/include/asm/probes.h
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+#ifndef _ARM_PROBES_H
+#define _ARM_PROBES_H
+
+struct kprobe;
+struct arch_specific_insn;
+
+typedef u32 kprobe_opcode_t;
+typedef unsigned long (kprobes_pstate_check_t)(unsigned long);
+typedef unsigned long
+(probes_condition_check_t)(struct kprobe *p, struct pt_regs *);
+typedef void
+(probes_prepare_t)(struct kprobe *, struct arch_specific_insn *);
+typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
+
+enum pc_restore_type {
+ NO_RESTORE,
+ RESTORE_PC,
+};
+
+struct kprobe_pc_restore {
+ enum pc_restore_type type;
+ unsigned long addr;
+};
+
+/* architecture specific copy of original instruction */
+struct arch_specific_insn {
+ kprobe_opcode_t *insn;
+ kprobes_pstate_check_t *pstate_cc;
+ probes_condition_check_t *check_condn;
+ probes_prepare_t *prepare;
+ kprobes_handler_t *handler;
+ /* restore address after step xol */
+ struct kprobe_pc_restore restore;
+};
+
+#endif
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index 8f440e9..aadf61a 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -206,7 +206,8 @@ static inline int valid_user_regs(struct user_pt_regs *regs)
return 0;
}
-#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
+#define instruction_pointer(regs) ((regs)->pc)
+#define stack_pointer(regs) ((regs)->sp)
#ifdef CONFIG_SMP
extern unsigned long profile_pc(struct pt_regs *regs);
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 426d076..1319872 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -32,6 +32,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
arm64-obj-$(CONFIG_KGDB) += kgdb.o
+arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
arm64-obj-$(CONFIG_PCI) += pci.o
arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
index b056369..486ee94 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -23,6 +23,7 @@
#include <linux/hardirq.h>
#include <linux/init.h>
#include <linux/ptrace.h>
+#include <linux/kprobes.h>
#include <linux/stat.h>
#include <linux/uaccess.h>
@@ -228,6 +229,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
struct pt_regs *regs)
{
siginfo_t info;
+ bool handler_found = false;
/*
* If we are stepping a pending breakpoint, call the hw_breakpoint
@@ -251,15 +253,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
*/
user_rewind_single_step(current);
} else {
+#ifdef CONFIG_KPROBES
+ if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
+ handler_found = true;
+#endif
if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
- return 0;
-
- pr_warning("Unexpected kernel single-step exception at EL1\n");
- /*
- * Re-enable stepping since we know that we will be
- * returning to regs.
- */
- set_regs_spsr_ss(regs);
+ handler_found = true;
+
+ if (!handler_found) {
+ pr_warn("Unexpected kernel single-step exception at EL1\n");
+ /*
+ * Re-enable stepping since we know that we will be
+ * returning to regs.
+ */
+ set_regs_spsr_ss(regs);
+ }
}
return 0;
@@ -315,8 +323,15 @@ static int brk_handler(unsigned long addr, unsigned int esr,
};
force_sig_info(SIGTRAP, &info, current);
- } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
- pr_warning("Unexpected kernel BRK exception at EL1\n");
+ }
+#ifdef CONFIG_KPROBES
+ else if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
+ if (kprobe_breakpoint_handler(regs, esr) != DBG_HOOK_HANDLED)
+ return -EFAULT;
+ }
+#endif
+ else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
+ pr_warn("Unexpected kernel BRK exception at EL1\n");
return -EFAULT;
}
diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
new file mode 100644
index 0000000..f958c52
--- /dev/null
+++ b/arch/arm64/kernel/kprobes-arm64.c
@@ -0,0 +1,68 @@
+/*
+ * arch/arm64/kernel/kprobes-arm64.c
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+#include <asm/kprobes.h>
+#include <asm/insn.h>
+
+#include "kprobes-arm64.h"
+
+static bool __kprobes aarch64_insn_is_steppable(u32 insn)
+{
+ if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
+ if (aarch64_insn_is_branch(insn))
+ return false;
+
+ /* modification of daif creates issues */
+ if (aarch64_insn_is_daif_access(insn))
+ return false;
+
+ if (aarch64_insn_is_exception(insn))
+ return false;
+
+ if (aarch64_insn_is_hint(insn))
+ return aarch64_insn_is_nop(insn);
+
+ return true;
+ }
+
+ if (aarch64_insn_uses_literal(insn))
+ return false;
+
+ if (aarch64_insn_is_exclusive(insn))
+ return false;
+
+ return true;
+}
+
+/* Return:
+ * INSN_REJECTED If instruction is one not allowed to kprobe,
+ * INSN_GOOD If instruction is supported and uses instruction slot,
+ * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
+ */
+enum kprobe_insn __kprobes
+arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+ /*
+ * Instructions reading or modifying the PC won't work from the XOL
+ * slot.
+ */
+ if (aarch64_insn_is_steppable(insn))
+ return INSN_GOOD;
+ else
+ return INSN_REJECTED;
+}
diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
new file mode 100644
index 0000000..87e7891
--- /dev/null
+++ b/arch/arm64/kernel/kprobes-arm64.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm64/kernel/kprobes-arm64.h
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KERNEL_KPROBES_ARM64_H
+#define _ARM_KERNEL_KPROBES_ARM64_H
+
+enum kprobe_insn {
+ INSN_REJECTED,
+ INSN_GOOD_NO_SLOT,
+ INSN_GOOD,
+};
+
+enum kprobe_insn __kprobes
+arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
+
+#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
new file mode 100644
index 0000000..601d2c6
--- /dev/null
+++ b/arch/arm64/kernel/kprobes.c
@@ -0,0 +1,537 @@
+/*
+ * arch/arm64/kernel/kprobes.c
+ *
+ * Kprobes support for ARM64
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ * Author: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/stop_machine.h>
+#include <linux/stringify.h>
+#include <asm/traps.h>
+#include <asm/ptrace.h>
+#include <asm/cacheflush.h>
+#include <asm/debug-monitors.h>
+#include <asm/system_misc.h>
+#include <asm/insn.h>
+
+#include "kprobes.h"
+#include "kprobes-arm64.h"
+
+#define MIN_STACK_SIZE(addr) min((unsigned long)MAX_STACK_SIZE, \
+ (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
+
+DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
+DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
+
+static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
+{
+ /* prepare insn slot */
+ p->ainsn.insn[0] = p->opcode;
+
+ flush_icache_range((uintptr_t) (p->ainsn.insn),
+ (uintptr_t) (p->ainsn.insn) + MAX_INSN_SIZE);
+
+ /*
+ * Needs restoring of return address after stepping xol.
+ */
+ p->ainsn.restore.addr = (unsigned long) p->addr +
+ sizeof(kprobe_opcode_t);
+ p->ainsn.restore.type = RESTORE_PC;
+}
+
+int __kprobes arch_prepare_kprobe(struct kprobe *p)
+{
+ kprobe_opcode_t insn;
+ unsigned long probe_addr = (unsigned long)p->addr;
+
+ /* copy instruction */
+ insn = *p->addr;
+ p->opcode = insn;
+
+ if (in_exception_text(probe_addr))
+ return -EINVAL;
+
+ /* decode instruction */
+ switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
+ case INSN_REJECTED: /* insn not supported */
+ return -EINVAL;
+
+ case INSN_GOOD_NO_SLOT: /* insn need simulation */
+ return -EINVAL;
+
+ case INSN_GOOD: /* instruction uses slot */
+ p->ainsn.insn = get_insn_slot();
+ if (!p->ainsn.insn)
+ return -ENOMEM;
+ break;
+ };
+
+ /* prepare the instruction */
+ arch_prepare_ss_slot(p);
+
+ return 0;
+}
+
+static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
+{
+ void *addrs[1];
+ u32 insns[1];
+
+ addrs[0] = (void *)addr;
+ insns[0] = (u32)opcode;
+
+ return aarch64_insn_patch_text_sync(addrs, insns, 1);
+}
+
+/* arm kprobe: install breakpoint in text */
+void __kprobes arch_arm_kprobe(struct kprobe *p)
+{
+ patch_text(p->addr, BRK64_OPCODE_KPROBES);
+}
+
+/* disarm kprobe: remove breakpoint from text */
+void __kprobes arch_disarm_kprobe(struct kprobe *p)
+{
+ patch_text(p->addr, p->opcode);
+}
+
+void __kprobes arch_remove_kprobe(struct kprobe *p)
+{
+ if (p->ainsn.insn) {
+ free_insn_slot(p->ainsn.insn, 0);
+ p->ainsn.insn = NULL;
+ }
+}
+
+static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
+{
+ kcb->prev_kprobe.kp = kprobe_running();
+ kcb->prev_kprobe.status = kcb->kprobe_status;
+}
+
+static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
+{
+ __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
+ kcb->kprobe_status = kcb->prev_kprobe.status;
+}
+
+static void __kprobes set_current_kprobe(struct kprobe *p)
+{
+ __this_cpu_write(current_kprobe, p);
+}
+
+/*
+ * The D-flag (Debug mask) is set (masked) upon exception entry.
+ * Kprobes needs to clear (unmask) D-flag -ONLY- in case of recursive
+ * probe i.e. when probe hit from kprobe handler context upon
+ * executing the pre/post handlers. In this case we return with
+ * D-flag clear so that single-stepping can be carried-out.
+ *
+ * Leave D-flag set in all other cases.
+ */
+static void __kprobes
+spsr_set_debug_flag(struct pt_regs *regs, int mask)
+{
+ unsigned long spsr = regs->pstate;
+
+ if (mask)
+ spsr |= PSR_D_BIT;
+ else
+ spsr &= ~PSR_D_BIT;
+
+ regs->pstate = spsr;
+}
+
+/*
+ * Interrupts need to be disabled before single-step mode is set, and not
+ * reenabled until after single-step mode ends.
+ * Without disabling interrupt on local CPU, there is a chance of
+ * interrupt occurrence in the period of exception return and start of
+ * out-of-line single-step, that result in wrongly single stepping
+ * the interrupt handler.
+ */
+static void __kprobes kprobes_save_local_irqflag(struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ kcb->saved_irqflag = regs->pstate;
+ regs->pstate |= PSR_I_BIT;
+}
+
+static void __kprobes kprobes_restore_local_irqflag(struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ if (kcb->saved_irqflag & PSR_I_BIT)
+ regs->pstate |= PSR_I_BIT;
+ else
+ regs->pstate &= ~PSR_I_BIT;
+}
+
+static void __kprobes
+set_ss_context(struct kprobe_ctlblk *kcb, unsigned long addr)
+{
+ kcb->ss_ctx.ss_status = KPROBES_STEP_PENDING;
+ kcb->ss_ctx.match_addr = addr + sizeof(kprobe_opcode_t);
+}
+
+static void __kprobes clear_ss_context(struct kprobe_ctlblk *kcb)
+{
+ kcb->ss_ctx.ss_status = KPROBES_STEP_NONE;
+ kcb->ss_ctx.match_addr = 0;
+}
+
+static void __kprobes
+skip_singlestep_missed(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
+{
+ /* set return addr to next pc to continue */
+ instruction_pointer(regs) += sizeof(kprobe_opcode_t);
+}
+
+static void __kprobes setup_singlestep(struct kprobe *p,
+ struct pt_regs *regs,
+ struct kprobe_ctlblk *kcb, int reenter)
+{
+ unsigned long slot;
+
+ if (reenter) {
+ save_previous_kprobe(kcb);
+ set_current_kprobe(p);
+ kcb->kprobe_status = KPROBE_REENTER;
+ } else {
+ kcb->kprobe_status = KPROBE_HIT_SS;
+ }
+
+ if (p->ainsn.insn) {
+ /* prepare for single stepping */
+ slot = (unsigned long)p->ainsn.insn;
+
+ set_ss_context(kcb, slot); /* mark pending ss */
+
+ if (kcb->kprobe_status == KPROBE_REENTER)
+ spsr_set_debug_flag(regs, 0);
+
+ /* IRQs and single stepping do not mix well. */
+ kprobes_save_local_irqflag(regs);
+ kernel_enable_single_step(regs);
+ instruction_pointer(regs) = slot;
+ } else {
+ BUG();
+ }
+}
+
+static int __kprobes reenter_kprobe(struct kprobe *p,
+ struct pt_regs *regs,
+ struct kprobe_ctlblk *kcb)
+{
+ switch (kcb->kprobe_status) {
+ case KPROBE_HIT_SSDONE:
+ case KPROBE_HIT_ACTIVE:
+ if (!p->ainsn.check_condn || p->ainsn.check_condn(p, regs)) {
+ kprobes_inc_nmissed_count(p);
+ setup_singlestep(p, regs, kcb, 1);
+ } else {
+ /* condition check failed, skip stepping */
+ skip_singlestep_missed(kcb, regs);
+ }
+ break;
+ case KPROBE_HIT_SS:
+ case KPROBE_REENTER:
+ pr_warn("Unrecoverable kprobe detected at %p.\n", p->addr);
+ dump_kprobe(p);
+ BUG();
+ break;
+ default:
+ WARN_ON(1);
+ return 0;
+ }
+
+ return 1;
+}
+
+static void __kprobes
+post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
+{
+ struct kprobe *cur = kprobe_running();
+
+ if (!cur)
+ return;
+
+ /* return addr restore if non-branching insn */
+ if (cur->ainsn.restore.type == RESTORE_PC) {
+ instruction_pointer(regs) = cur->ainsn.restore.addr;
+ if (!instruction_pointer(regs))
+ BUG();
+ }
+
+ /* restore back original saved kprobe variables and continue */
+ if (kcb->kprobe_status == KPROBE_REENTER) {
+ restore_previous_kprobe(kcb);
+ return;
+ }
+ /* call post handler */
+ kcb->kprobe_status = KPROBE_HIT_SSDONE;
+ if (cur->post_handler) {
+ /* post_handler can hit breakpoint and single step
+ * again, so we enable D-flag for recursive exception.
+ */
+ cur->post_handler(cur, regs, 0);
+ }
+
+ reset_current_kprobe();
+}
+
+int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
+{
+ struct kprobe *cur = kprobe_running();
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ switch (kcb->kprobe_status) {
+ case KPROBE_HIT_SS:
+ case KPROBE_REENTER:
+ /*
+ * We are here because the instruction being single
+ * stepped caused a page fault. We reset the current
+ * kprobe and the ip points back to the probe address
+ * and allow the page fault handler to continue as a
+ * normal page fault.
+ */
+ instruction_pointer(regs) = (unsigned long)cur->addr;
+ if (!instruction_pointer(regs))
+ BUG();
+ if (kcb->kprobe_status == KPROBE_REENTER)
+ restore_previous_kprobe(kcb);
+ else
+ reset_current_kprobe();
+
+ break;
+ case KPROBE_HIT_ACTIVE:
+ case KPROBE_HIT_SSDONE:
+ /*
+ * We increment the nmissed count for accounting,
+ * we can also use npre/npostfault count for accounting
+ * these specific fault cases.
+ */
+ kprobes_inc_nmissed_count(cur);
+
+ /*
+ * We come here because instructions in the pre/post
+ * handler caused the page_fault, this could happen
+ * if handler tries to access user space by
+ * copy_from_user(), get_user() etc. Let the
+ * user-specified handler try to fix it first.
+ */
+ if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
+ return 1;
+
+ /*
+ * In case the user-specified fault handler returned
+ * zero, try to fix up.
+ */
+ if (fixup_exception(regs))
+ return 1;
+
+ break;
+ }
+ return 0;
+}
+
+int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
+ unsigned long val, void *data)
+{
+ return NOTIFY_DONE;
+}
+
+void __kprobes kprobe_handler(struct pt_regs *regs)
+{
+ struct kprobe *p, *cur;
+ struct kprobe_ctlblk *kcb;
+ unsigned long addr = instruction_pointer(regs);
+
+ kcb = get_kprobe_ctlblk();
+ cur = kprobe_running();
+
+ p = get_kprobe((kprobe_opcode_t *) addr);
+
+ if (p) {
+ if (cur) {
+ if (reenter_kprobe(p, regs, kcb))
+ return;
+ } else if (!p->ainsn.check_condn ||
+ p->ainsn.check_condn(p, regs)) {
+ /* Probe hit and conditional execution check ok. */
+ set_current_kprobe(p);
+ kcb->kprobe_status = KPROBE_HIT_ACTIVE;
+
+ /*
+ * If we have no pre-handler or it returned 0, we
+ * continue with normal processing. If we have a
+ * pre-handler and it returned non-zero, it prepped
+ * for calling the break_handler below on re-entry,
+ * so get out doing nothing more here.
+ *
+ * pre_handler can hit a breakpoint and can step thru
+ * before return, keep PSTATE D-flag enabled until
+ * pre_handler return back.
+ */
+ if (!p->pre_handler || !p->pre_handler(p, regs)) {
+ kcb->kprobe_status = KPROBE_HIT_SS;
+ setup_singlestep(p, regs, kcb, 0);
+ return;
+ }
+ } else {
+ /*
+ * Breakpoint hit but conditional check failed,
+ * so just skip the instruction (NOP behaviour)
+ */
+ skip_singlestep_missed(kcb, regs);
+ return;
+ }
+ } else if (*(kprobe_opcode_t *) addr != BRK64_OPCODE_KPROBES) {
+ /*
+ * The breakpoint instruction was removed right
+ * after we hit it. Another cpu has removed
+ * either a probepoint or a debugger breakpoint
+ * at this address. In either case, no further
+ * handling of this interrupt is appropriate.
+ * Return back to original instruction, and continue.
+ */
+ return;
+ } else if (cur) {
+ /* We probably hit a jprobe. Call its break handler. */
+ if (cur->break_handler && cur->break_handler(cur, regs)) {
+ kcb->kprobe_status = KPROBE_HIT_SS;
+ setup_singlestep(cur, regs, kcb, 0);
+ return;
+ }
+ } else {
+ /* breakpoint is removed, now in a race
+ * Return back to original instruction & continue.
+ */
+ }
+}
+
+static int __kprobes
+kprobe_ss_hit(struct kprobe_ctlblk *kcb, unsigned long addr)
+{
+ if ((kcb->ss_ctx.ss_status == KPROBES_STEP_PENDING)
+ && (kcb->ss_ctx.match_addr == addr)) {
+ clear_ss_context(kcb); /* clear pending ss */
+ return DBG_HOOK_HANDLED;
+ }
+ /* not ours, kprobes should ignore it */
+ return DBG_HOOK_ERROR;
+}
+
+int __kprobes
+kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+ int retval;
+
+ /* return error if this is not our step */
+ retval = kprobe_ss_hit(kcb, instruction_pointer(regs));
+
+ if (retval == DBG_HOOK_HANDLED) {
+ kprobes_restore_local_irqflag(regs);
+ kernel_disable_single_step();
+
+ if (kcb->kprobe_status == KPROBE_REENTER)
+ spsr_set_debug_flag(regs, 1);
+
+ post_kprobe_handler(kcb, regs);
+ }
+
+ return retval;
+}
+
+int __kprobes
+kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
+{
+ kprobe_handler(regs);
+ return DBG_HOOK_HANDLED;
+}
+
+int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
+{
+ struct jprobe *jp = container_of(p, struct jprobe, kp);
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+ long stack_ptr = stack_pointer(regs);
+
+ kcb->jprobe_saved_regs = *regs;
+ memcpy(kcb->jprobes_stack, (void *)stack_ptr,
+ MIN_STACK_SIZE(stack_ptr));
+
+ instruction_pointer(regs) = (long)jp->entry;
+ preempt_disable();
+ return 1;
+}
+
+void __kprobes jprobe_return(void)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ /*
+ * Jprobe handler return by entering break exception,
+ * encoded same as kprobe, but with following conditions
+ * -a magic number in x0 to identify from rest of other kprobes.
+ * -restore stack addr to original saved pt_regs
+ */
+ asm volatile ("ldr x0, [%0]\n\t"
+ "mov sp, x0\n\t"
+ "ldr x0, =" __stringify(JPROBES_MAGIC_NUM) "\n\t"
+ "BRK %1\n\t"
+ "NOP\n\t"
+ :
+ : "r"(&kcb->jprobe_saved_regs.sp),
+ "I"(BRK64_ESR_KPROBES)
+ : "memory");
+}
+
+int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+ long stack_addr = kcb->jprobe_saved_regs.sp;
+ long orig_sp = stack_pointer(regs);
+ struct jprobe *jp = container_of(p, struct jprobe, kp);
+
+ if (regs->regs[0] == JPROBES_MAGIC_NUM) {
+ if (orig_sp != stack_addr) {
+ struct pt_regs *saved_regs =
+ (struct pt_regs *)kcb->jprobe_saved_regs.sp;
+ pr_err("current sp %lx does not match saved sp %lx\n",
+ orig_sp, stack_addr);
+ pr_err("Saved registers for jprobe %p\n", jp);
+ show_regs(saved_regs);
+ pr_err("Current registers\n");
+ show_regs(regs);
+ BUG();
+ }
+ *regs = kcb->jprobe_saved_regs;
+ memcpy((void *)stack_addr, kcb->jprobes_stack,
+ MIN_STACK_SIZE(stack_addr));
+ preempt_enable_no_resched();
+ return 1;
+ }
+ return 0;
+}
+
+int __init arch_init_kprobes(void)
+{
+ return 0;
+}
diff --git a/arch/arm64/kernel/kprobes.h b/arch/arm64/kernel/kprobes.h
new file mode 100644
index 0000000..e98ad60
--- /dev/null
+++ b/arch/arm64/kernel/kprobes.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm64/kernel/kprobes.h
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KERNEL_KPROBES_H
+#define _ARM_KERNEL_KPROBES_H
+
+#define JPROBES_MAGIC_NUM 0xa5a5a5a5a5a5a5a5
+
+/* Move this out to appropriate header file */
+int fixup_exception(struct pt_regs *regs);
+
+#endif /* _ARM_KERNEL_KPROBES_H */
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index a2c2986..2da5f4e 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -94,6 +94,7 @@ SECTIONS
TEXT_TEXT
SCHED_TEXT
LOCK_TEXT
+ KPROBES_TEXT
HYPERVISOR_TEXT
*(.fixup)
*(.gnu.warning)
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 96da131..4c13dfb 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -39,6 +39,28 @@
static const char *fault_name(unsigned int esr);
+#ifdef CONFIG_KPROBES
+static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
+{
+ int ret = 0;
+
+ /* kprobe_running() needs smp_processor_id() */
+ if (!user_mode(regs)) {
+ preempt_disable();
+ if (kprobe_running() && kprobe_fault_handler(regs, esr))
+ ret = 1;
+ preempt_enable();
+ }
+
+ return ret;
+}
+#else
+static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
+{
+ return 0;
+}
+#endif
+
/*
* Dump out the page tables associated with 'addr' in mm 'mm'.
*/
@@ -200,6 +222,9 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
+ if (notify_page_fault(regs, esr))
+ return 0;
+
tsk = current;
mm = tsk->mm;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 4/7] arm64: kprobes instruction simulation support
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Kprobes needs simulation of instructions that cannot be stepped
from different memory location, e.g.: those instructions
that uses PC-relative addressing. In simulation, the behaviour
of the instruction is implemented using a copy of pt_regs.
Following instruction catagories are simulated:
- All branching instructions(conditional, register, and immediate)
- Literal access instructions(load-literal, adr/adrp)
Conditional execution is limited to branching instructions in
ARM v8. If conditions at PSTATE do not match the condition fields
of opcode, the instruction is effectively NOP. Kprobes considers
this case as 'miss'.
Thanks to Will Cohen for assorted suggested changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Signed-off-by: William Cohen <wcohen@redhat.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/kernel/Makefile | 4 +-
arch/arm64/kernel/kprobes-arm64.c | 98 +++++++++++++++++
arch/arm64/kernel/kprobes-arm64.h | 2 +
arch/arm64/kernel/kprobes.c | 35 ++++++-
arch/arm64/kernel/probes-condn-check.c | 122 ++++++++++++++++++++++
arch/arm64/kernel/probes-simulate-insn.c | 174 +++++++++++++++++++++++++++++++
arch/arm64/kernel/probes-simulate-insn.h | 33 ++++++
7 files changed, 464 insertions(+), 4 deletions(-)
create mode 100644 arch/arm64/kernel/probes-condn-check.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 1319872..5e9d54f 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -32,7 +32,9 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
arm64-obj-$(CONFIG_KGDB) += kgdb.o
-arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
+arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o \
+ probes-simulate-insn.o \
+ probes-condn-check.o
arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
arm64-obj-$(CONFIG_PCI) += pci.o
arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
index f958c52..8a7e6b0 100644
--- a/arch/arm64/kernel/kprobes-arm64.c
+++ b/arch/arm64/kernel/kprobes-arm64.c
@@ -20,6 +20,76 @@
#include <asm/insn.h>
#include "kprobes-arm64.h"
+#include "probes-simulate-insn.h"
+
+/*
+ * condition check functions for kprobes simulation
+ */
+static unsigned long __kprobes
+__check_pstate(struct kprobe *p, struct pt_regs *regs)
+{
+ struct arch_specific_insn *asi = &p->ainsn;
+ unsigned long pstate = regs->pstate & 0xffffffff;
+
+ return asi->pstate_cc(pstate);
+}
+
+static unsigned long __kprobes
+__check_cbz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_cbz((u32)p->opcode, regs);
+}
+
+static unsigned long __kprobes
+__check_cbnz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_cbnz((u32)p->opcode, regs);
+}
+
+static unsigned long __kprobes
+__check_tbz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_tbz((u32)p->opcode, regs);
+}
+
+static unsigned long __kprobes
+__check_tbnz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_tbnz((u32)p->opcode, regs);
+}
+
+/*
+ * prepare functions for instruction simulation
+ */
+static void __kprobes
+prepare_none(struct kprobe *p, struct arch_specific_insn *asi)
+{
+}
+
+static void __kprobes
+prepare_bcond(struct kprobe *p, struct arch_specific_insn *asi)
+{
+ kprobe_opcode_t insn = p->opcode;
+
+ asi->check_condn = __check_pstate;
+ asi->pstate_cc = kprobe_condition_checks[insn & 0xf];
+}
+
+static void __kprobes
+prepare_cbz_cbnz(struct kprobe *p, struct arch_specific_insn *asi)
+{
+ kprobe_opcode_t insn = p->opcode;
+
+ asi->check_condn = (insn & (1 << 24)) ? __check_cbnz : __check_cbz;
+}
+
+static void __kprobes
+prepare_tbz_tbnz(struct kprobe *p, struct arch_specific_insn *asi)
+{
+ kprobe_opcode_t insn = p->opcode;
+
+ asi->check_condn = (insn & (1 << 24)) ? __check_tbnz : __check_tbz;
+}
static bool __kprobes aarch64_insn_is_steppable(u32 insn)
{
@@ -63,6 +133,34 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
*/
if (aarch64_insn_is_steppable(insn))
return INSN_GOOD;
+
+ asi->prepare = prepare_none;
+
+ if (aarch64_insn_is_bcond(insn)) {
+ asi->prepare = prepare_bcond;
+ asi->handler = simulate_b_cond;
+ } else if (aarch64_insn_is_cb(insn)) {
+ asi->prepare = prepare_cbz_cbnz;
+ asi->handler = simulate_cbz_cbnz;
+ } else if (aarch64_insn_is_tb(insn)) {
+ asi->prepare = prepare_tbz_tbnz;
+ asi->handler = simulate_tbz_tbnz;
+ } else if (aarch64_insn_is_adr_adrp(insn))
+ asi->handler = simulate_adr_adrp;
+ else if (aarch64_insn_is_b_bl(insn))
+ asi->handler = simulate_b_bl;
+ else if (aarch64_insn_is_br_blr(insn) || aarch64_insn_is_ret(insn))
+ asi->handler = simulate_br_blr_ret;
+ else if (aarch64_insn_is_ldr_lit(insn))
+ asi->handler = simulate_ldr_literal;
+ else if (aarch64_insn_is_ldrsw_lit(insn))
+ asi->handler = simulate_ldrsw_literal;
else
+ /*
+ * Instruction cannot be stepped out-of-line and we don't
+ * (yet) simulate it.
+ */
return INSN_REJECTED;
+
+ return INSN_GOOD_NO_SLOT;
}
diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
index 87e7891..ff8a55f 100644
--- a/arch/arm64/kernel/kprobes-arm64.h
+++ b/arch/arm64/kernel/kprobes-arm64.h
@@ -22,6 +22,8 @@ enum kprobe_insn {
INSN_GOOD,
};
+extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
+
enum kprobe_insn __kprobes
arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
index 601d2c6..6255814 100644
--- a/arch/arm64/kernel/kprobes.c
+++ b/arch/arm64/kernel/kprobes.c
@@ -38,6 +38,9 @@
DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
+static void __kprobes
+post_kprobe_handler(struct kprobe_ctlblk *, struct pt_regs *);
+
static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
{
/* prepare insn slot */
@@ -54,6 +57,27 @@ static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
p->ainsn.restore.type = RESTORE_PC;
}
+static void __kprobes arch_prepare_simulate(struct kprobe *p)
+{
+ if (p->ainsn.prepare)
+ p->ainsn.prepare(p, &p->ainsn);
+
+ /* This instructions is not executed xol. No need to adjust the PC */
+ p->ainsn.restore.addr = 0;
+ p->ainsn.restore.type = NO_RESTORE;
+}
+
+static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ if (p->ainsn.handler)
+ p->ainsn.handler((u32)p->opcode, (long)p->addr, regs);
+
+ /* single step simulated, now go for post processing */
+ post_kprobe_handler(kcb, regs);
+}
+
int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
kprobe_opcode_t insn;
@@ -72,7 +96,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
return -EINVAL;
case INSN_GOOD_NO_SLOT: /* insn need simulation */
- return -EINVAL;
+ p->ainsn.insn = NULL;
+ break;
case INSN_GOOD: /* instruction uses slot */
p->ainsn.insn = get_insn_slot();
@@ -82,7 +107,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
};
/* prepare the instruction */
- arch_prepare_ss_slot(p);
+ if (p->ainsn.insn)
+ arch_prepare_ss_slot(p);
+ else
+ arch_prepare_simulate(p);
return 0;
}
@@ -231,7 +259,8 @@ static void __kprobes setup_singlestep(struct kprobe *p,
kernel_enable_single_step(regs);
instruction_pointer(regs) = slot;
} else {
- BUG();
+ /* insn simulation */
+ arch_simulate_insn(p, regs);
}
}
diff --git a/arch/arm64/kernel/probes-condn-check.c b/arch/arm64/kernel/probes-condn-check.c
new file mode 100644
index 0000000..e68aa0c
--- /dev/null
+++ b/arch/arm64/kernel/probes-condn-check.c
@@ -0,0 +1,122 @@
+/*
+ * arch/arm64/kernel/probes-condn-check.c
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * Copied from: arch/arm/kernel/kprobes-common.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Description:
+ *
+ * AArch64 and AArch32 shares same conditional(CNZV) flags encoding.
+ * This file implements conditional check helpers compatible with
+ * both AArch64 and AArch32 modes. Uprobes on v8 can handle both 32-bit
+ * & 64-bit user-space instructions, so we abstract the common functions
+ * in this file. While AArch64 and AArch32 specific instruction handling
+ * are implemented in separate files, this file contains common bits.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/probes.h>
+
+static unsigned long __kprobes __check_eq(unsigned long pstate)
+{
+ return pstate & PSR_Z_BIT;
+}
+
+static unsigned long __kprobes __check_ne(unsigned long pstate)
+{
+ return (~pstate) & PSR_Z_BIT;
+}
+
+static unsigned long __kprobes __check_cs(unsigned long pstate)
+{
+ return pstate & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_cc(unsigned long pstate)
+{
+ return (~pstate) & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_mi(unsigned long pstate)
+{
+ return pstate & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_pl(unsigned long pstate)
+{
+ return (~pstate) & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_vs(unsigned long pstate)
+{
+ return pstate & PSR_V_BIT;
+}
+
+static unsigned long __kprobes __check_vc(unsigned long pstate)
+{
+ return (~pstate) & PSR_V_BIT;
+}
+
+static unsigned long __kprobes __check_hi(unsigned long pstate)
+{
+ pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
+ return pstate & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_ls(unsigned long pstate)
+{
+ pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
+ return (~pstate) & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_ge(unsigned long pstate)
+{
+ pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
+ return (~pstate) & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_lt(unsigned long pstate)
+{
+ pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
+ return pstate & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_gt(unsigned long pstate)
+{
+ /*PSR_N_BIT ^= PSR_V_BIT */
+ unsigned long temp = pstate ^ (pstate << 3);
+
+ temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
+ return (~temp) & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_le(unsigned long pstate)
+{
+ /*PSR_N_BIT ^= PSR_V_BIT */
+ unsigned long temp = pstate ^ (pstate << 3);
+
+ temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
+ return temp & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_al(unsigned long pstate)
+{
+ return true;
+}
+
+kprobes_pstate_check_t * const kprobe_condition_checks[16] = {
+ &__check_eq, &__check_ne, &__check_cs, &__check_cc,
+ &__check_mi, &__check_pl, &__check_vs, &__check_vc,
+ &__check_hi, &__check_ls, &__check_ge, &__check_lt,
+ &__check_gt, &__check_le, &__check_al, &__check_al
+};
diff --git a/arch/arm64/kernel/probes-simulate-insn.c b/arch/arm64/kernel/probes-simulate-insn.c
new file mode 100644
index 0000000..a224c91
--- /dev/null
+++ b/arch/arm64/kernel/probes-simulate-insn.c
@@ -0,0 +1,174 @@
+/*
+ * arch/arm64/kernel/probes-simulate-insn.c
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+
+#include "probes-simulate-insn.h"
+
+#define sign_extend(x, signbit) \
+ ((x) | (0 - ((x) & (1 << (signbit)))))
+
+#define bbl_displacement(insn) \
+ sign_extend(((insn) & 0x3ffffff) << 2, 27)
+
+#define bcond_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
+
+#define cbz_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
+
+#define tbz_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x3fff) << 2, 15)
+
+#define ldr_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
+
+
+unsigned long __kprobes check_cbz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+
+ return (opcode & (1 << 31)) ?
+ !(regs->regs[xn]) : !(regs->regs[xn] & 0xffffffff);
+}
+
+unsigned long __kprobes check_cbnz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+
+ return (opcode & (1 << 31)) ?
+ (regs->regs[xn]) : (regs->regs[xn] & 0xffffffff);
+}
+
+unsigned long __kprobes check_tbz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+ int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
+
+ return ~((regs->regs[xn] >> bit_pos) & 0x1);
+}
+
+unsigned long __kprobes check_tbnz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+ int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
+
+ return (regs->regs[xn] >> bit_pos) & 0x1;
+}
+
+/*
+ * instruction simulate functions
+ */
+void __kprobes simulate_none(u32 opcode, long addr, struct pt_regs *regs)
+{
+}
+
+void __kprobes
+simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs)
+{
+ long imm, xn, val;
+
+ xn = opcode & 0x1f;
+ imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);
+ imm = sign_extend(imm, 20);
+ if (opcode & 0x80000000)
+ val = (imm<<12) + (addr & 0xfffffffffffff000);
+ else
+ val = imm + addr;
+
+ regs->regs[xn] = val;
+
+ instruction_pointer(regs) += 4;
+}
+
+void __kprobes
+simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = bbl_displacement(opcode);
+
+ /* Link register is x30 */
+ if (opcode & (1 << 31))
+ regs->regs[30] = addr + 4;
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = bcond_displacement(opcode);
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int xn = (opcode >> 5) & 0x1f;
+
+ /* Link register is x30 */
+ if (((opcode >> 21) & 0x3) == 1)
+ regs->regs[30] = addr + 4;
+
+ instruction_pointer(regs) = regs->regs[xn];
+}
+
+void __kprobes
+simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = cbz_displacement(opcode);
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = tbz_displacement(opcode);
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)
+{
+ u64 *load_addr;
+ int xn = opcode & 0x1f;
+ int disp = ldr_displacement(opcode);
+
+ load_addr = (u64 *) (addr + disp);
+
+ if (opcode & (1 << 30)) /* x0-x31 */
+ regs->regs[xn] = *load_addr;
+ else /* w0-w31 */
+ *(u32 *) (®s->regs[xn]) = (*(u32 *) (load_addr));
+
+ instruction_pointer(regs) += 4;
+}
+
+void __kprobes
+simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)
+{
+ s32 *load_addr;
+ int xn = opcode & 0x1f;
+ int disp = ldr_displacement(opcode);
+
+ load_addr = (s32 *) (addr + disp);
+ regs->regs[xn] = *load_addr;
+
+ instruction_pointer(regs) += 4;
+}
diff --git a/arch/arm64/kernel/probes-simulate-insn.h b/arch/arm64/kernel/probes-simulate-insn.h
new file mode 100644
index 0000000..406f5c2
--- /dev/null
+++ b/arch/arm64/kernel/probes-simulate-insn.h
@@ -0,0 +1,33 @@
+/*
+ * arch/arm64/kernel/probes-simulate-insn.h
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KERNEL_PROBES_SIMULATE_INSN_H
+#define _ARM_KERNEL_PROBES_SIMULATE_INSN_H
+
+unsigned long check_cbz(u32 opcode, struct pt_regs *regs);
+unsigned long check_cbnz(u32 opcode, struct pt_regs *regs);
+unsigned long check_tbz(u32 opcode, struct pt_regs *regs);
+unsigned long check_tbnz(u32 opcode, struct pt_regs *regs);
+void simulate_none(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
+
+#endif /* _ARM_KERNEL_PROBES_SIMULATE_INSN_H */
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 4/7] arm64: kprobes instruction simulation support
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Kprobes needs simulation of instructions that cannot be stepped
from different memory location, e.g.: those instructions
that uses PC-relative addressing. In simulation, the behaviour
of the instruction is implemented using a copy of pt_regs.
Following instruction catagories are simulated:
- All branching instructions(conditional, register, and immediate)
- Literal access instructions(load-literal, adr/adrp)
Conditional execution is limited to branching instructions in
ARM v8. If conditions at PSTATE do not match the condition fields
of opcode, the instruction is effectively NOP. Kprobes considers
this case as 'miss'.
Thanks to Will Cohen for assorted suggested changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Signed-off-by: William Cohen <wcohen@redhat.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/kernel/Makefile | 4 +-
arch/arm64/kernel/kprobes-arm64.c | 98 +++++++++++++++++
arch/arm64/kernel/kprobes-arm64.h | 2 +
arch/arm64/kernel/kprobes.c | 35 ++++++-
arch/arm64/kernel/probes-condn-check.c | 122 ++++++++++++++++++++++
arch/arm64/kernel/probes-simulate-insn.c | 174 +++++++++++++++++++++++++++++++
arch/arm64/kernel/probes-simulate-insn.h | 33 ++++++
7 files changed, 464 insertions(+), 4 deletions(-)
create mode 100644 arch/arm64/kernel/probes-condn-check.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 1319872..5e9d54f 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -32,7 +32,9 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
arm64-obj-$(CONFIG_KGDB) += kgdb.o
-arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
+arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o \
+ probes-simulate-insn.o \
+ probes-condn-check.o
arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
arm64-obj-$(CONFIG_PCI) += pci.o
arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
index f958c52..8a7e6b0 100644
--- a/arch/arm64/kernel/kprobes-arm64.c
+++ b/arch/arm64/kernel/kprobes-arm64.c
@@ -20,6 +20,76 @@
#include <asm/insn.h>
#include "kprobes-arm64.h"
+#include "probes-simulate-insn.h"
+
+/*
+ * condition check functions for kprobes simulation
+ */
+static unsigned long __kprobes
+__check_pstate(struct kprobe *p, struct pt_regs *regs)
+{
+ struct arch_specific_insn *asi = &p->ainsn;
+ unsigned long pstate = regs->pstate & 0xffffffff;
+
+ return asi->pstate_cc(pstate);
+}
+
+static unsigned long __kprobes
+__check_cbz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_cbz((u32)p->opcode, regs);
+}
+
+static unsigned long __kprobes
+__check_cbnz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_cbnz((u32)p->opcode, regs);
+}
+
+static unsigned long __kprobes
+__check_tbz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_tbz((u32)p->opcode, regs);
+}
+
+static unsigned long __kprobes
+__check_tbnz(struct kprobe *p, struct pt_regs *regs)
+{
+ return check_tbnz((u32)p->opcode, regs);
+}
+
+/*
+ * prepare functions for instruction simulation
+ */
+static void __kprobes
+prepare_none(struct kprobe *p, struct arch_specific_insn *asi)
+{
+}
+
+static void __kprobes
+prepare_bcond(struct kprobe *p, struct arch_specific_insn *asi)
+{
+ kprobe_opcode_t insn = p->opcode;
+
+ asi->check_condn = __check_pstate;
+ asi->pstate_cc = kprobe_condition_checks[insn & 0xf];
+}
+
+static void __kprobes
+prepare_cbz_cbnz(struct kprobe *p, struct arch_specific_insn *asi)
+{
+ kprobe_opcode_t insn = p->opcode;
+
+ asi->check_condn = (insn & (1 << 24)) ? __check_cbnz : __check_cbz;
+}
+
+static void __kprobes
+prepare_tbz_tbnz(struct kprobe *p, struct arch_specific_insn *asi)
+{
+ kprobe_opcode_t insn = p->opcode;
+
+ asi->check_condn = (insn & (1 << 24)) ? __check_tbnz : __check_tbz;
+}
static bool __kprobes aarch64_insn_is_steppable(u32 insn)
{
@@ -63,6 +133,34 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
*/
if (aarch64_insn_is_steppable(insn))
return INSN_GOOD;
+
+ asi->prepare = prepare_none;
+
+ if (aarch64_insn_is_bcond(insn)) {
+ asi->prepare = prepare_bcond;
+ asi->handler = simulate_b_cond;
+ } else if (aarch64_insn_is_cb(insn)) {
+ asi->prepare = prepare_cbz_cbnz;
+ asi->handler = simulate_cbz_cbnz;
+ } else if (aarch64_insn_is_tb(insn)) {
+ asi->prepare = prepare_tbz_tbnz;
+ asi->handler = simulate_tbz_tbnz;
+ } else if (aarch64_insn_is_adr_adrp(insn))
+ asi->handler = simulate_adr_adrp;
+ else if (aarch64_insn_is_b_bl(insn))
+ asi->handler = simulate_b_bl;
+ else if (aarch64_insn_is_br_blr(insn) || aarch64_insn_is_ret(insn))
+ asi->handler = simulate_br_blr_ret;
+ else if (aarch64_insn_is_ldr_lit(insn))
+ asi->handler = simulate_ldr_literal;
+ else if (aarch64_insn_is_ldrsw_lit(insn))
+ asi->handler = simulate_ldrsw_literal;
else
+ /*
+ * Instruction cannot be stepped out-of-line and we don't
+ * (yet) simulate it.
+ */
return INSN_REJECTED;
+
+ return INSN_GOOD_NO_SLOT;
}
diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
index 87e7891..ff8a55f 100644
--- a/arch/arm64/kernel/kprobes-arm64.h
+++ b/arch/arm64/kernel/kprobes-arm64.h
@@ -22,6 +22,8 @@ enum kprobe_insn {
INSN_GOOD,
};
+extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
+
enum kprobe_insn __kprobes
arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
index 601d2c6..6255814 100644
--- a/arch/arm64/kernel/kprobes.c
+++ b/arch/arm64/kernel/kprobes.c
@@ -38,6 +38,9 @@
DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
+static void __kprobes
+post_kprobe_handler(struct kprobe_ctlblk *, struct pt_regs *);
+
static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
{
/* prepare insn slot */
@@ -54,6 +57,27 @@ static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
p->ainsn.restore.type = RESTORE_PC;
}
+static void __kprobes arch_prepare_simulate(struct kprobe *p)
+{
+ if (p->ainsn.prepare)
+ p->ainsn.prepare(p, &p->ainsn);
+
+ /* This instructions is not executed xol. No need to adjust the PC */
+ p->ainsn.restore.addr = 0;
+ p->ainsn.restore.type = NO_RESTORE;
+}
+
+static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
+{
+ struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+ if (p->ainsn.handler)
+ p->ainsn.handler((u32)p->opcode, (long)p->addr, regs);
+
+ /* single step simulated, now go for post processing */
+ post_kprobe_handler(kcb, regs);
+}
+
int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
kprobe_opcode_t insn;
@@ -72,7 +96,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
return -EINVAL;
case INSN_GOOD_NO_SLOT: /* insn need simulation */
- return -EINVAL;
+ p->ainsn.insn = NULL;
+ break;
case INSN_GOOD: /* instruction uses slot */
p->ainsn.insn = get_insn_slot();
@@ -82,7 +107,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
};
/* prepare the instruction */
- arch_prepare_ss_slot(p);
+ if (p->ainsn.insn)
+ arch_prepare_ss_slot(p);
+ else
+ arch_prepare_simulate(p);
return 0;
}
@@ -231,7 +259,8 @@ static void __kprobes setup_singlestep(struct kprobe *p,
kernel_enable_single_step(regs);
instruction_pointer(regs) = slot;
} else {
- BUG();
+ /* insn simulation */
+ arch_simulate_insn(p, regs);
}
}
diff --git a/arch/arm64/kernel/probes-condn-check.c b/arch/arm64/kernel/probes-condn-check.c
new file mode 100644
index 0000000..e68aa0c
--- /dev/null
+++ b/arch/arm64/kernel/probes-condn-check.c
@@ -0,0 +1,122 @@
+/*
+ * arch/arm64/kernel/probes-condn-check.c
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * Copied from: arch/arm/kernel/kprobes-common.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Description:
+ *
+ * AArch64 and AArch32 shares same conditional(CNZV) flags encoding.
+ * This file implements conditional check helpers compatible with
+ * both AArch64 and AArch32 modes. Uprobes on v8 can handle both 32-bit
+ * & 64-bit user-space instructions, so we abstract the common functions
+ * in this file. While AArch64 and AArch32 specific instruction handling
+ * are implemented in separate files, this file contains common bits.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/probes.h>
+
+static unsigned long __kprobes __check_eq(unsigned long pstate)
+{
+ return pstate & PSR_Z_BIT;
+}
+
+static unsigned long __kprobes __check_ne(unsigned long pstate)
+{
+ return (~pstate) & PSR_Z_BIT;
+}
+
+static unsigned long __kprobes __check_cs(unsigned long pstate)
+{
+ return pstate & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_cc(unsigned long pstate)
+{
+ return (~pstate) & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_mi(unsigned long pstate)
+{
+ return pstate & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_pl(unsigned long pstate)
+{
+ return (~pstate) & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_vs(unsigned long pstate)
+{
+ return pstate & PSR_V_BIT;
+}
+
+static unsigned long __kprobes __check_vc(unsigned long pstate)
+{
+ return (~pstate) & PSR_V_BIT;
+}
+
+static unsigned long __kprobes __check_hi(unsigned long pstate)
+{
+ pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
+ return pstate & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_ls(unsigned long pstate)
+{
+ pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
+ return (~pstate) & PSR_C_BIT;
+}
+
+static unsigned long __kprobes __check_ge(unsigned long pstate)
+{
+ pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
+ return (~pstate) & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_lt(unsigned long pstate)
+{
+ pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
+ return pstate & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_gt(unsigned long pstate)
+{
+ /*PSR_N_BIT ^= PSR_V_BIT */
+ unsigned long temp = pstate ^ (pstate << 3);
+
+ temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
+ return (~temp) & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_le(unsigned long pstate)
+{
+ /*PSR_N_BIT ^= PSR_V_BIT */
+ unsigned long temp = pstate ^ (pstate << 3);
+
+ temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
+ return temp & PSR_N_BIT;
+}
+
+static unsigned long __kprobes __check_al(unsigned long pstate)
+{
+ return true;
+}
+
+kprobes_pstate_check_t * const kprobe_condition_checks[16] = {
+ &__check_eq, &__check_ne, &__check_cs, &__check_cc,
+ &__check_mi, &__check_pl, &__check_vs, &__check_vc,
+ &__check_hi, &__check_ls, &__check_ge, &__check_lt,
+ &__check_gt, &__check_le, &__check_al, &__check_al
+};
diff --git a/arch/arm64/kernel/probes-simulate-insn.c b/arch/arm64/kernel/probes-simulate-insn.c
new file mode 100644
index 0000000..a224c91
--- /dev/null
+++ b/arch/arm64/kernel/probes-simulate-insn.c
@@ -0,0 +1,174 @@
+/*
+ * arch/arm64/kernel/probes-simulate-insn.c
+ *
+ * Copyright (C) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+
+#include "probes-simulate-insn.h"
+
+#define sign_extend(x, signbit) \
+ ((x) | (0 - ((x) & (1 << (signbit)))))
+
+#define bbl_displacement(insn) \
+ sign_extend(((insn) & 0x3ffffff) << 2, 27)
+
+#define bcond_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
+
+#define cbz_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
+
+#define tbz_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x3fff) << 2, 15)
+
+#define ldr_displacement(insn) \
+ sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
+
+
+unsigned long __kprobes check_cbz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+
+ return (opcode & (1 << 31)) ?
+ !(regs->regs[xn]) : !(regs->regs[xn] & 0xffffffff);
+}
+
+unsigned long __kprobes check_cbnz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+
+ return (opcode & (1 << 31)) ?
+ (regs->regs[xn]) : (regs->regs[xn] & 0xffffffff);
+}
+
+unsigned long __kprobes check_tbz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+ int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
+
+ return ~((regs->regs[xn] >> bit_pos) & 0x1);
+}
+
+unsigned long __kprobes check_tbnz(u32 opcode, struct pt_regs *regs)
+{
+ int xn = opcode & 0x1f;
+ int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
+
+ return (regs->regs[xn] >> bit_pos) & 0x1;
+}
+
+/*
+ * instruction simulate functions
+ */
+void __kprobes simulate_none(u32 opcode, long addr, struct pt_regs *regs)
+{
+}
+
+void __kprobes
+simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs)
+{
+ long imm, xn, val;
+
+ xn = opcode & 0x1f;
+ imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);
+ imm = sign_extend(imm, 20);
+ if (opcode & 0x80000000)
+ val = (imm<<12) + (addr & 0xfffffffffffff000);
+ else
+ val = imm + addr;
+
+ regs->regs[xn] = val;
+
+ instruction_pointer(regs) += 4;
+}
+
+void __kprobes
+simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = bbl_displacement(opcode);
+
+ /* Link register is x30 */
+ if (opcode & (1 << 31))
+ regs->regs[30] = addr + 4;
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = bcond_displacement(opcode);
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int xn = (opcode >> 5) & 0x1f;
+
+ /* Link register is x30 */
+ if (((opcode >> 21) & 0x3) == 1)
+ regs->regs[30] = addr + 4;
+
+ instruction_pointer(regs) = regs->regs[xn];
+}
+
+void __kprobes
+simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = cbz_displacement(opcode);
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)
+{
+ int disp = tbz_displacement(opcode);
+
+ instruction_pointer(regs) = addr + disp;
+}
+
+void __kprobes
+simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)
+{
+ u64 *load_addr;
+ int xn = opcode & 0x1f;
+ int disp = ldr_displacement(opcode);
+
+ load_addr = (u64 *) (addr + disp);
+
+ if (opcode & (1 << 30)) /* x0-x31 */
+ regs->regs[xn] = *load_addr;
+ else /* w0-w31 */
+ *(u32 *) (®s->regs[xn]) = (*(u32 *) (load_addr));
+
+ instruction_pointer(regs) += 4;
+}
+
+void __kprobes
+simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)
+{
+ s32 *load_addr;
+ int xn = opcode & 0x1f;
+ int disp = ldr_displacement(opcode);
+
+ load_addr = (s32 *) (addr + disp);
+ regs->regs[xn] = *load_addr;
+
+ instruction_pointer(regs) += 4;
+}
diff --git a/arch/arm64/kernel/probes-simulate-insn.h b/arch/arm64/kernel/probes-simulate-insn.h
new file mode 100644
index 0000000..406f5c2
--- /dev/null
+++ b/arch/arm64/kernel/probes-simulate-insn.h
@@ -0,0 +1,33 @@
+/*
+ * arch/arm64/kernel/probes-simulate-insn.h
+ *
+ * Copyright (C) 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef _ARM_KERNEL_PROBES_SIMULATE_INSN_H
+#define _ARM_KERNEL_PROBES_SIMULATE_INSN_H
+
+unsigned long check_cbz(u32 opcode, struct pt_regs *regs);
+unsigned long check_cbnz(u32 opcode, struct pt_regs *regs);
+unsigned long check_tbz(u32 opcode, struct pt_regs *regs);
+unsigned long check_tbnz(u32 opcode, struct pt_regs *regs);
+void simulate_none(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
+void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
+
+#endif /* _ARM_KERNEL_PROBES_SIMULATE_INSN_H */
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: William Cohen <wcohen@redhat.com>
The trampoline code is used by kretprobes to capture a return from a probed
function. This is done by saving the registers, calling the handler, and
restoring the registers. The code then returns to the roginal saved caller
return address. It is necessary to do this directly instead of using a
software breakpoint because the code used in processing that breakpoint
could itself be kprobe'd and cause a problematic reentry into the debug
exception handler.
Signed-off-by: William Cohen <wcohen@redhat.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/include/asm/kprobes.h | 1 +
arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
3 files changed, 68 insertions(+)
diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
index af31c4d..d081f49 100644
--- a/arch/arm64/include/asm/kprobes.h
+++ b/arch/arm64/include/asm/kprobes.h
@@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
unsigned long val, void *data);
int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
+void kretprobe_trampoline(void);
#endif /* _ARM_KPROBES_H */
diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
index ff8a55f..bdcfa62 100644
--- a/arch/arm64/kernel/kprobes-arm64.h
+++ b/arch/arm64/kernel/kprobes-arm64.h
@@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
enum kprobe_insn __kprobes
arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
+#define SAVE_REGS_STRING\
+ " stp x0, x1, [sp, #16 * 0]\n" \
+ " stp x2, x3, [sp, #16 * 1]\n" \
+ " stp x4, x5, [sp, #16 * 2]\n" \
+ " stp x6, x7, [sp, #16 * 3]\n" \
+ " stp x8, x9, [sp, #16 * 4]\n" \
+ " stp x10, x11, [sp, #16 * 5]\n" \
+ " stp x12, x13, [sp, #16 * 6]\n" \
+ " stp x14, x15, [sp, #16 * 7]\n" \
+ " stp x16, x17, [sp, #16 * 8]\n" \
+ " stp x18, x19, [sp, #16 * 9]\n" \
+ " stp x20, x21, [sp, #16 * 10]\n" \
+ " stp x22, x23, [sp, #16 * 11]\n" \
+ " stp x24, x25, [sp, #16 * 12]\n" \
+ " stp x26, x27, [sp, #16 * 13]\n" \
+ " stp x28, x29, [sp, #16 * 14]\n" \
+ " str x30, [sp, #16 * 15]\n" \
+ " mrs x0, nzcv\n" \
+ " str x0, [sp, #8 * 33]\n"
+
+
+#define RESTORE_REGS_STRING\
+ " ldr x0, [sp, #8 * 33]\n" \
+ " msr nzcv, x0\n" \
+ " ldp x0, x1, [sp, #16 * 0]\n" \
+ " ldp x2, x3, [sp, #16 * 1]\n" \
+ " ldp x4, x5, [sp, #16 * 2]\n" \
+ " ldp x6, x7, [sp, #16 * 3]\n" \
+ " ldp x8, x9, [sp, #16 * 4]\n" \
+ " ldp x10, x11, [sp, #16 * 5]\n" \
+ " ldp x12, x13, [sp, #16 * 6]\n" \
+ " ldp x14, x15, [sp, #16 * 7]\n" \
+ " ldp x16, x17, [sp, #16 * 8]\n" \
+ " ldp x18, x19, [sp, #16 * 9]\n" \
+ " ldp x20, x21, [sp, #16 * 10]\n" \
+ " ldp x22, x23, [sp, #16 * 11]\n" \
+ " ldp x24, x25, [sp, #16 * 12]\n" \
+ " ldp x26, x27, [sp, #16 * 13]\n" \
+ " ldp x28, x29, [sp, #16 * 14]\n" \
+ " ldr x30, [sp, #16 * 15]\n"
+
#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
index 6255814..570218c 100644
--- a/arch/arm64/kernel/kprobes.c
+++ b/arch/arm64/kernel/kprobes.c
@@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
return 0;
}
+/*
+ * When a retprobed function returns, this code saves registers and
+ * calls trampoline_handler() runs, which calls the kretprobe's handler.
+ */
+static void __used __kprobes kretprobe_trampoline_holder(void)
+{
+ asm volatile (".global kretprobe_trampoline\n"
+ "kretprobe_trampoline:\n"
+ "sub sp, sp, %0\n"
+ SAVE_REGS_STRING
+ "mov x0, sp\n"
+ "bl trampoline_probe_handler\n"
+ /* Replace trampoline address in lr with actual
+ orig_ret_addr return address. */
+ "str x0, [sp, #16 * 15]\n"
+ RESTORE_REGS_STRING
+ "add sp, sp, %0\n"
+ "ret\n"
+ : : "I"(sizeof(struct pt_regs)) : "memory");
+}
+
+static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
+{
+ return (void *) 0;
+}
+
int __init arch_init_kprobes(void)
{
return 0;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: William Cohen <wcohen@redhat.com>
The trampoline code is used by kretprobes to capture a return from a probed
function. This is done by saving the registers, calling the handler, and
restoring the registers. The code then returns to the roginal saved caller
return address. It is necessary to do this directly instead of using a
software breakpoint because the code used in processing that breakpoint
could itself be kprobe'd and cause a problematic reentry into the debug
exception handler.
Signed-off-by: William Cohen <wcohen@redhat.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/include/asm/kprobes.h | 1 +
arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
3 files changed, 68 insertions(+)
diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
index af31c4d..d081f49 100644
--- a/arch/arm64/include/asm/kprobes.h
+++ b/arch/arm64/include/asm/kprobes.h
@@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
unsigned long val, void *data);
int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
+void kretprobe_trampoline(void);
#endif /* _ARM_KPROBES_H */
diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
index ff8a55f..bdcfa62 100644
--- a/arch/arm64/kernel/kprobes-arm64.h
+++ b/arch/arm64/kernel/kprobes-arm64.h
@@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
enum kprobe_insn __kprobes
arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
+#define SAVE_REGS_STRING\
+ " stp x0, x1, [sp, #16 * 0]\n" \
+ " stp x2, x3, [sp, #16 * 1]\n" \
+ " stp x4, x5, [sp, #16 * 2]\n" \
+ " stp x6, x7, [sp, #16 * 3]\n" \
+ " stp x8, x9, [sp, #16 * 4]\n" \
+ " stp x10, x11, [sp, #16 * 5]\n" \
+ " stp x12, x13, [sp, #16 * 6]\n" \
+ " stp x14, x15, [sp, #16 * 7]\n" \
+ " stp x16, x17, [sp, #16 * 8]\n" \
+ " stp x18, x19, [sp, #16 * 9]\n" \
+ " stp x20, x21, [sp, #16 * 10]\n" \
+ " stp x22, x23, [sp, #16 * 11]\n" \
+ " stp x24, x25, [sp, #16 * 12]\n" \
+ " stp x26, x27, [sp, #16 * 13]\n" \
+ " stp x28, x29, [sp, #16 * 14]\n" \
+ " str x30, [sp, #16 * 15]\n" \
+ " mrs x0, nzcv\n" \
+ " str x0, [sp, #8 * 33]\n"
+
+
+#define RESTORE_REGS_STRING\
+ " ldr x0, [sp, #8 * 33]\n" \
+ " msr nzcv, x0\n" \
+ " ldp x0, x1, [sp, #16 * 0]\n" \
+ " ldp x2, x3, [sp, #16 * 1]\n" \
+ " ldp x4, x5, [sp, #16 * 2]\n" \
+ " ldp x6, x7, [sp, #16 * 3]\n" \
+ " ldp x8, x9, [sp, #16 * 4]\n" \
+ " ldp x10, x11, [sp, #16 * 5]\n" \
+ " ldp x12, x13, [sp, #16 * 6]\n" \
+ " ldp x14, x15, [sp, #16 * 7]\n" \
+ " ldp x16, x17, [sp, #16 * 8]\n" \
+ " ldp x18, x19, [sp, #16 * 9]\n" \
+ " ldp x20, x21, [sp, #16 * 10]\n" \
+ " ldp x22, x23, [sp, #16 * 11]\n" \
+ " ldp x24, x25, [sp, #16 * 12]\n" \
+ " ldp x26, x27, [sp, #16 * 13]\n" \
+ " ldp x28, x29, [sp, #16 * 14]\n" \
+ " ldr x30, [sp, #16 * 15]\n"
+
#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
index 6255814..570218c 100644
--- a/arch/arm64/kernel/kprobes.c
+++ b/arch/arm64/kernel/kprobes.c
@@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
return 0;
}
+/*
+ * When a retprobed function returns, this code saves registers and
+ * calls trampoline_handler() runs, which calls the kretprobe's handler.
+ */
+static void __used __kprobes kretprobe_trampoline_holder(void)
+{
+ asm volatile (".global kretprobe_trampoline\n"
+ "kretprobe_trampoline:\n"
+ "sub sp, sp, %0\n"
+ SAVE_REGS_STRING
+ "mov x0, sp\n"
+ "bl trampoline_probe_handler\n"
+ /* Replace trampoline address in lr with actual
+ orig_ret_addr return address. */
+ "str x0, [sp, #16 * 15]\n"
+ RESTORE_REGS_STRING
+ "add sp, sp, %0\n"
+ "ret\n"
+ : : "I"(sizeof(struct pt_regs)) : "memory");
+}
+
+static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
+{
+ return (void *) 0;
+}
+
int __init arch_init_kprobes(void)
{
return 0;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 6/7] arm64: Add kernel return probes support (kretprobes)
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
The pre-handler of this special 'trampoline' kprobe executes the return
probe handler functions and restores original return address in ELR_EL1.
This way the saved pt_regs still hold the original register context to be
carried back to the probed kernel function.
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/kprobes.c | 75 ++++++++++++++++++++++++++++++++++++++++++++-
2 files changed, 75 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 45a9bd81..5312be5 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -72,6 +72,7 @@ config ARM64
select HAVE_RCU_TABLE_FREE
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_KPROBES
+ select HAVE_KRETPROBES if HAVE_KPROBES
select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select NO_BOOTMEM
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
index 570218c..7e34ef3 100644
--- a/arch/arm64/kernel/kprobes.c
+++ b/arch/arm64/kernel/kprobes.c
@@ -583,7 +583,80 @@ static void __used __kprobes kretprobe_trampoline_holder(void)
static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
{
- return (void *) 0;
+ struct kretprobe_instance *ri = NULL;
+ struct hlist_head *head, empty_rp;
+ struct hlist_node *tmp;
+ unsigned long flags, orig_ret_addr = 0;
+ unsigned long trampoline_address =
+ (unsigned long)&kretprobe_trampoline;
+
+ INIT_HLIST_HEAD(&empty_rp);
+ kretprobe_hash_lock(current, &head, &flags);
+
+ /*
+ * It is possible to have multiple instances associated with a given
+ * task either because multiple functions in the call path have
+ * a return probe installed on them, and/or more than one return
+ * probe was registered for a target function.
+ *
+ * We can handle this because:
+ * - instances are always inserted at the head of the list
+ * - when multiple return probes are registered for the same
+ * function, the first instance's ret_addr will point to the
+ * real return address, and all the rest will point to
+ * kretprobe_trampoline
+ */
+ hlist_for_each_entry_safe(ri, tmp, head, hlist) {
+ if (ri->task != current)
+ /* another task is sharing our hash bucket */
+ continue;
+
+ if (ri->rp && ri->rp->handler) {
+ __this_cpu_write(current_kprobe, &ri->rp->kp);
+ get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
+ ri->rp->handler(ri, regs);
+ __this_cpu_write(current_kprobe, NULL);
+ }
+
+ orig_ret_addr = (unsigned long)ri->ret_addr;
+ recycle_rp_inst(ri, &empty_rp);
+
+ if (orig_ret_addr != trampoline_address)
+ /*
+ * This is the real return address. Any other
+ * instances associated with this task are for
+ * other calls deeper on the call stack
+ */
+ break;
+ }
+
+ kretprobe_assert(ri, orig_ret_addr, trampoline_address);
+ /* restore the original return address */
+ instruction_pointer(regs) = orig_ret_addr;
+ reset_current_kprobe();
+ kretprobe_hash_unlock(current, &flags);
+
+ hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {
+ hlist_del(&ri->hlist);
+ kfree(ri);
+ }
+
+ /* return 1 so that post handlers not called */
+ return (void *) orig_ret_addr;
+}
+
+void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
+ struct pt_regs *regs)
+{
+ ri->ret_addr = (kprobe_opcode_t *)regs->regs[30];
+
+ /* replace return addr (x30) with trampoline */
+ regs->regs[30] = (long)&kretprobe_trampoline;
+}
+
+int __kprobes arch_trampoline_kprobe(struct kprobe *p)
+{
+ return 0;
}
int __init arch_init_kprobes(void)
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 6/7] arm64: Add kernel return probes support (kretprobes)
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
The pre-handler of this special 'trampoline' kprobe executes the return
probe handler functions and restores original return address in ELR_EL1.
This way the saved pt_regs still hold the original register context to be
carried back to the probed kernel function.
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Signed-off-by: David A. Long <dave.long@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/kprobes.c | 75 ++++++++++++++++++++++++++++++++++++++++++++-
2 files changed, 75 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 45a9bd81..5312be5 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -72,6 +72,7 @@ config ARM64
select HAVE_RCU_TABLE_FREE
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_KPROBES
+ select HAVE_KRETPROBES if HAVE_KPROBES
select IRQ_DOMAIN
select MODULES_USE_ELF_RELA
select NO_BOOTMEM
diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
index 570218c..7e34ef3 100644
--- a/arch/arm64/kernel/kprobes.c
+++ b/arch/arm64/kernel/kprobes.c
@@ -583,7 +583,80 @@ static void __used __kprobes kretprobe_trampoline_holder(void)
static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
{
- return (void *) 0;
+ struct kretprobe_instance *ri = NULL;
+ struct hlist_head *head, empty_rp;
+ struct hlist_node *tmp;
+ unsigned long flags, orig_ret_addr = 0;
+ unsigned long trampoline_address =
+ (unsigned long)&kretprobe_trampoline;
+
+ INIT_HLIST_HEAD(&empty_rp);
+ kretprobe_hash_lock(current, &head, &flags);
+
+ /*
+ * It is possible to have multiple instances associated with a given
+ * task either because multiple functions in the call path have
+ * a return probe installed on them, and/or more than one return
+ * probe was registered for a target function.
+ *
+ * We can handle this because:
+ * - instances are always inserted at the head of the list
+ * - when multiple return probes are registered for the same
+ * function, the first instance's ret_addr will point to the
+ * real return address, and all the rest will point to
+ * kretprobe_trampoline
+ */
+ hlist_for_each_entry_safe(ri, tmp, head, hlist) {
+ if (ri->task != current)
+ /* another task is sharing our hash bucket */
+ continue;
+
+ if (ri->rp && ri->rp->handler) {
+ __this_cpu_write(current_kprobe, &ri->rp->kp);
+ get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
+ ri->rp->handler(ri, regs);
+ __this_cpu_write(current_kprobe, NULL);
+ }
+
+ orig_ret_addr = (unsigned long)ri->ret_addr;
+ recycle_rp_inst(ri, &empty_rp);
+
+ if (orig_ret_addr != trampoline_address)
+ /*
+ * This is the real return address. Any other
+ * instances associated with this task are for
+ * other calls deeper on the call stack
+ */
+ break;
+ }
+
+ kretprobe_assert(ri, orig_ret_addr, trampoline_address);
+ /* restore the original return address */
+ instruction_pointer(regs) = orig_ret_addr;
+ reset_current_kprobe();
+ kretprobe_hash_unlock(current, &flags);
+
+ hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {
+ hlist_del(&ri->hlist);
+ kfree(ri);
+ }
+
+ /* return 1 so that post handlers not called */
+ return (void *) orig_ret_addr;
+}
+
+void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
+ struct pt_regs *regs)
+{
+ ri->ret_addr = (kprobe_opcode_t *)regs->regs[30];
+
+ /* replace return addr (x30) with trampoline */
+ regs->regs[30] = (long)&kretprobe_trampoline;
+}
+
+int __kprobes arch_trampoline_kprobe(struct kprobe *p)
+{
+ return 0;
}
int __init arch_init_kprobes(void)
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 7/7] kprobes: Add arm64 case in kprobe example module
2015-06-15 19:07 ` David Long
@ 2015-06-15 19:07 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, William Cohen, Steve Capper,
Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Add info prints in sample kprobe handlers for ARM64
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
---
samples/kprobes/kprobe_example.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/samples/kprobes/kprobe_example.c b/samples/kprobes/kprobe_example.c
index 366db1a..51d459c 100644
--- a/samples/kprobes/kprobe_example.c
+++ b/samples/kprobes/kprobe_example.c
@@ -42,6 +42,10 @@ static int handler_pre(struct kprobe *p, struct pt_regs *regs)
" ex1 = 0x%lx\n",
p->addr, regs->pc, regs->ex1);
#endif
+#ifdef CONFIG_ARM64
+ pr_info("pre_handler: p->addr = 0x%p, pc = 0x%lx\n",
+ p->addr, (long)regs->pc);
+#endif
/* A dump_stack() here will give a stack backtrace */
return 0;
@@ -67,6 +71,10 @@ static void handler_post(struct kprobe *p, struct pt_regs *regs,
printk(KERN_INFO "post_handler: p->addr = 0x%p, ex1 = 0x%lx\n",
p->addr, regs->ex1);
#endif
+#ifdef CONFIG_ARM64
+ pr_info("post_handler: p->addr = 0x%p, pc = 0x%lx\n",
+ p->addr, (long)regs->pc);
+#endif
}
/*
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH v7 7/7] kprobes: Add arm64 case in kprobe example module
@ 2015-06-15 19:07 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-15 19:07 UTC (permalink / raw)
To: linux-arm-kernel
From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
Add info prints in sample kprobe handlers for ARM64
Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
---
samples/kprobes/kprobe_example.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/samples/kprobes/kprobe_example.c b/samples/kprobes/kprobe_example.c
index 366db1a..51d459c 100644
--- a/samples/kprobes/kprobe_example.c
+++ b/samples/kprobes/kprobe_example.c
@@ -42,6 +42,10 @@ static int handler_pre(struct kprobe *p, struct pt_regs *regs)
" ex1 = 0x%lx\n",
p->addr, regs->pc, regs->ex1);
#endif
+#ifdef CONFIG_ARM64
+ pr_info("pre_handler: p->addr = 0x%p, pc = 0x%lx\n",
+ p->addr, (long)regs->pc);
+#endif
/* A dump_stack() here will give a stack backtrace */
return 0;
@@ -67,6 +71,10 @@ static void handler_post(struct kprobe *p, struct pt_regs *regs,
printk(KERN_INFO "post_handler: p->addr = 0x%p, ex1 = 0x%lx\n",
p->addr, regs->ex1);
#endif
+#ifdef CONFIG_ARM64
+ pr_info("post_handler: p->addr = 0x%p, pc = 0x%lx\n",
+ p->addr, (long)regs->pc);
+#endif
}
/*
--
1.8.1.2
^ permalink raw reply related [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-15 19:07 ` David Long
@ 2015-06-16 15:09 ` William Cohen
-1 siblings, 0 replies; 52+ messages in thread
From: William Cohen @ 2015-06-16 15:09 UTC (permalink / raw)
To: David Long, Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: sandeepa.s.prabhu, Steve Capper, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
On 06/15/2015 03:07 PM, David Long wrote:
> From: William Cohen <wcohen@redhat.com>
>
> The trampoline code is used by kretprobes to capture a return from a probed
> function. This is done by saving the registers, calling the handler, and
> restoring the registers. The code then returns to the roginal saved caller
s/roginal/original
> return address. It is necessary to do this directly instead of using a
> software breakpoint because the code used in processing that breakpoint
> could itself be kprobe'd and cause a problematic reentry into the debug
> exception handler.
>
> Signed-off-by: William Cohen <wcohen@redhat.com>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/include/asm/kprobes.h | 1 +
> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
> 3 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
> index af31c4d..d081f49 100644
> --- a/arch/arm64/include/asm/kprobes.h
> +++ b/arch/arm64/include/asm/kprobes.h
> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
> unsigned long val, void *data);
> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
> +void kretprobe_trampoline(void);
>
> #endif /* _ARM_KPROBES_H */
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> index ff8a55f..bdcfa62 100644
> --- a/arch/arm64/kernel/kprobes-arm64.h
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> enum kprobe_insn __kprobes
> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>
> +#define SAVE_REGS_STRING\
> + " stp x0, x1, [sp, #16 * 0]\n" \
> + " stp x2, x3, [sp, #16 * 1]\n" \
> + " stp x4, x5, [sp, #16 * 2]\n" \
> + " stp x6, x7, [sp, #16 * 3]\n" \
> + " stp x8, x9, [sp, #16 * 4]\n" \
> + " stp x10, x11, [sp, #16 * 5]\n" \
> + " stp x12, x13, [sp, #16 * 6]\n" \
> + " stp x14, x15, [sp, #16 * 7]\n" \
> + " stp x16, x17, [sp, #16 * 8]\n" \
> + " stp x18, x19, [sp, #16 * 9]\n" \
> + " stp x20, x21, [sp, #16 * 10]\n" \
> + " stp x22, x23, [sp, #16 * 11]\n" \
> + " stp x24, x25, [sp, #16 * 12]\n" \
> + " stp x26, x27, [sp, #16 * 13]\n" \
> + " stp x28, x29, [sp, #16 * 14]\n" \
> + " str x30, [sp, #16 * 15]\n" \
> + " mrs x0, nzcv\n" \
> + " str x0, [sp, #8 * 33]\n"
> +
> +
> +#define RESTORE_REGS_STRING\
> + " ldr x0, [sp, #8 * 33]\n" \
> + " msr nzcv, x0\n" \
> + " ldp x0, x1, [sp, #16 * 0]\n" \
> + " ldp x2, x3, [sp, #16 * 1]\n" \
> + " ldp x4, x5, [sp, #16 * 2]\n" \
> + " ldp x6, x7, [sp, #16 * 3]\n" \
> + " ldp x8, x9, [sp, #16 * 4]\n" \
> + " ldp x10, x11, [sp, #16 * 5]\n" \
> + " ldp x12, x13, [sp, #16 * 6]\n" \
> + " ldp x14, x15, [sp, #16 * 7]\n" \
> + " ldp x16, x17, [sp, #16 * 8]\n" \
> + " ldp x18, x19, [sp, #16 * 9]\n" \
> + " ldp x20, x21, [sp, #16 * 10]\n" \
> + " ldp x22, x23, [sp, #16 * 11]\n" \
> + " ldp x24, x25, [sp, #16 * 12]\n" \
> + " ldp x26, x27, [sp, #16 * 13]\n" \
> + " ldp x28, x29, [sp, #16 * 14]\n" \
> + " ldr x30, [sp, #16 * 15]\n"
> +
> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> index 6255814..570218c 100644
> --- a/arch/arm64/kernel/kprobes.c
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
> return 0;
> }
>
> +/*
> + * When a retprobed function returns, this code saves registers and
> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
> + */
> +static void __used __kprobes kretprobe_trampoline_holder(void)
> +{
> + asm volatile (".global kretprobe_trampoline\n"
> + "kretprobe_trampoline:\n"
> + "sub sp, sp, %0\n"
> + SAVE_REGS_STRING
> + "mov x0, sp\n"
> + "bl trampoline_probe_handler\n"
> + /* Replace trampoline address in lr with actual
> + orig_ret_addr return address. */
> + "str x0, [sp, #16 * 15]\n"
> + RESTORE_REGS_STRING
> + "add sp, sp, %0\n"
> + "ret\n"
> + : : "I"(sizeof(struct pt_regs)) : "memory");
> +}
> +
> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
> +{
> + return (void *) 0;
> +}
> +
> int __init arch_init_kprobes(void)
> {
> return 0;
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-16 15:09 ` William Cohen
0 siblings, 0 replies; 52+ messages in thread
From: William Cohen @ 2015-06-16 15:09 UTC (permalink / raw)
To: linux-arm-kernel
On 06/15/2015 03:07 PM, David Long wrote:
> From: William Cohen <wcohen@redhat.com>
>
> The trampoline code is used by kretprobes to capture a return from a probed
> function. This is done by saving the registers, calling the handler, and
> restoring the registers. The code then returns to the roginal saved caller
s/roginal/original
> return address. It is necessary to do this directly instead of using a
> software breakpoint because the code used in processing that breakpoint
> could itself be kprobe'd and cause a problematic reentry into the debug
> exception handler.
>
> Signed-off-by: William Cohen <wcohen@redhat.com>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/include/asm/kprobes.h | 1 +
> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
> 3 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
> index af31c4d..d081f49 100644
> --- a/arch/arm64/include/asm/kprobes.h
> +++ b/arch/arm64/include/asm/kprobes.h
> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
> unsigned long val, void *data);
> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
> +void kretprobe_trampoline(void);
>
> #endif /* _ARM_KPROBES_H */
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> index ff8a55f..bdcfa62 100644
> --- a/arch/arm64/kernel/kprobes-arm64.h
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> enum kprobe_insn __kprobes
> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>
> +#define SAVE_REGS_STRING\
> + " stp x0, x1, [sp, #16 * 0]\n" \
> + " stp x2, x3, [sp, #16 * 1]\n" \
> + " stp x4, x5, [sp, #16 * 2]\n" \
> + " stp x6, x7, [sp, #16 * 3]\n" \
> + " stp x8, x9, [sp, #16 * 4]\n" \
> + " stp x10, x11, [sp, #16 * 5]\n" \
> + " stp x12, x13, [sp, #16 * 6]\n" \
> + " stp x14, x15, [sp, #16 * 7]\n" \
> + " stp x16, x17, [sp, #16 * 8]\n" \
> + " stp x18, x19, [sp, #16 * 9]\n" \
> + " stp x20, x21, [sp, #16 * 10]\n" \
> + " stp x22, x23, [sp, #16 * 11]\n" \
> + " stp x24, x25, [sp, #16 * 12]\n" \
> + " stp x26, x27, [sp, #16 * 13]\n" \
> + " stp x28, x29, [sp, #16 * 14]\n" \
> + " str x30, [sp, #16 * 15]\n" \
> + " mrs x0, nzcv\n" \
> + " str x0, [sp, #8 * 33]\n"
> +
> +
> +#define RESTORE_REGS_STRING\
> + " ldr x0, [sp, #8 * 33]\n" \
> + " msr nzcv, x0\n" \
> + " ldp x0, x1, [sp, #16 * 0]\n" \
> + " ldp x2, x3, [sp, #16 * 1]\n" \
> + " ldp x4, x5, [sp, #16 * 2]\n" \
> + " ldp x6, x7, [sp, #16 * 3]\n" \
> + " ldp x8, x9, [sp, #16 * 4]\n" \
> + " ldp x10, x11, [sp, #16 * 5]\n" \
> + " ldp x12, x13, [sp, #16 * 6]\n" \
> + " ldp x14, x15, [sp, #16 * 7]\n" \
> + " ldp x16, x17, [sp, #16 * 8]\n" \
> + " ldp x18, x19, [sp, #16 * 9]\n" \
> + " ldp x20, x21, [sp, #16 * 10]\n" \
> + " ldp x22, x23, [sp, #16 * 11]\n" \
> + " ldp x24, x25, [sp, #16 * 12]\n" \
> + " ldp x26, x27, [sp, #16 * 13]\n" \
> + " ldp x28, x29, [sp, #16 * 14]\n" \
> + " ldr x30, [sp, #16 * 15]\n"
> +
> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> index 6255814..570218c 100644
> --- a/arch/arm64/kernel/kprobes.c
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
> return 0;
> }
>
> +/*
> + * When a retprobed function returns, this code saves registers and
> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
> + */
> +static void __used __kprobes kretprobe_trampoline_holder(void)
> +{
> + asm volatile (".global kretprobe_trampoline\n"
> + "kretprobe_trampoline:\n"
> + "sub sp, sp, %0\n"
> + SAVE_REGS_STRING
> + "mov x0, sp\n"
> + "bl trampoline_probe_handler\n"
> + /* Replace trampoline address in lr with actual
> + orig_ret_addr return address. */
> + "str x0, [sp, #16 * 15]\n"
> + RESTORE_REGS_STRING
> + "add sp, sp, %0\n"
> + "ret\n"
> + : : "I"(sizeof(struct pt_regs)) : "memory");
> +}
> +
> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
> +{
> + return (void *) 0;
> +}
> +
> int __init arch_init_kprobes(void)
> {
> return 0;
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
2015-06-15 19:07 ` David Long
@ 2015-06-17 14:18 ` Masami Hiramatsu
-1 siblings, 0 replies; 52+ messages in thread
From: Masami Hiramatsu @ 2015-06-17 14:18 UTC (permalink / raw)
To: David Long, Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King
Cc: Jon Medhurst (Tixy),
Steve Capper, Ananth N Mavinakayanahalli, linux-kernel,
Anil S Keshavamurthy, Mark Brown, sandeepa.s.prabhu,
William Cohen, davem
Hi David,
At first, thank you for updating this series! :)
On 2015/06/16 4:07, David Long wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
> first seen in October 2013. This version attempts to address concerns raised by
> reviewers and also fixes problems discovered during testing.
>
> This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
> and return probes(kretprobes) support for ARM64.
>
> The kprobes mechanism makes use of software breakpoint and single stepping
> support available in the ARM v8 kernel.
>
> The is patch depends on:
> [PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
> [PATCH 2/2] Consolidate redundant register/stack access code
>
Hmm, what are those patches ? Would they be not merged to upstream yet?
If so, where I can get them from? I'd like to know the actual url for them.
[...]
> Changes since v6 include:
>
> 1) New trampoline code from Will Cohen fixes the occasional failure seen
> when processing kretprobes by replacing the software breakpoint with
> assembly code to implement the return to the original execution stream.
Yeah, that's what we need :)
Thank you,
> 2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
> of recognizing them as an ascii string in the stack/reg access code.
> 3) Removed orig_x0.
> 4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
> arch/arm64/kernel/ptrace.c.
>
> David A. Long (2):
> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
> arm64: Add more test functions to insn.c
>
> Sandeepa Prabhu (4):
> arm64: Kprobes with single stepping support
> arm64: kprobes instruction simulation support
> arm64: Add kernel return probes support (kretprobes)
> kprobes: Add arm64 case in kprobe example module
>
> William Cohen (1):
> arm64: Add trampoline code for kretprobes
>
> arch/arm64/Kconfig | 3 +
> arch/arm64/include/asm/debug-monitors.h | 5 +
> arch/arm64/include/asm/insn.h | 18 +
> arch/arm64/include/asm/kprobes.h | 63 +++
> arch/arm64/include/asm/probes.h | 50 +++
> arch/arm64/include/asm/ptrace.h | 28 +-
> arch/arm64/kernel/Makefile | 3 +
> arch/arm64/kernel/debug-monitors.c | 35 +-
> arch/arm64/kernel/insn.c | 28 ++
> arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
> arch/arm64/kernel/kprobes-arm64.h | 71 ++++
> arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.h | 24 ++
> arch/arm64/kernel/probes-condn-check.c | 122 ++++++
> arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
> arch/arm64/kernel/probes-simulate-insn.h | 33 ++
> arch/arm64/kernel/ptrace.c | 77 ++++
> arch/arm64/kernel/vmlinux.lds.S | 1 +
> arch/arm64/mm/fault.c | 25 ++
> samples/kprobes/kprobe_example.c | 8 +
> 20 files changed, 1588 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm64/include/asm/kprobes.h
> create mode 100644 arch/arm64/include/asm/probes.h
> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
> create mode 100644 arch/arm64/kernel/kprobes.c
> create mode 100644 arch/arm64/kernel/kprobes.h
> create mode 100644 arch/arm64/kernel/probes-condn-check.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>
--
Masami HIRAMATSU
Linux Technology Research Center, System Productivity Research Dept.
Center for Technology Innovation - Systems Engineering
Hitachi, Ltd., Research & Development Group
E-mail: masami.hiramatsu.pt@hitachi.com
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
@ 2015-06-17 14:18 ` Masami Hiramatsu
0 siblings, 0 replies; 52+ messages in thread
From: Masami Hiramatsu @ 2015-06-17 14:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi David,
At first, thank you for updating this series! :)
On 2015/06/16 4:07, David Long wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
> first seen in October 2013. This version attempts to address concerns raised by
> reviewers and also fixes problems discovered during testing.
>
> This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
> and return probes(kretprobes) support for ARM64.
>
> The kprobes mechanism makes use of software breakpoint and single stepping
> support available in the ARM v8 kernel.
>
> The is patch depends on:
> [PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
> [PATCH 2/2] Consolidate redundant register/stack access code
>
Hmm, what are those patches ? Would they be not merged to upstream yet?
If so, where I can get them from? I'd like to know the actual url for them.
[...]
> Changes since v6 include:
>
> 1) New trampoline code from Will Cohen fixes the occasional failure seen
> when processing kretprobes by replacing the software breakpoint with
> assembly code to implement the return to the original execution stream.
Yeah, that's what we need :)
Thank you,
> 2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
> of recognizing them as an ascii string in the stack/reg access code.
> 3) Removed orig_x0.
> 4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
> arch/arm64/kernel/ptrace.c.
>
> David A. Long (2):
> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
> arm64: Add more test functions to insn.c
>
> Sandeepa Prabhu (4):
> arm64: Kprobes with single stepping support
> arm64: kprobes instruction simulation support
> arm64: Add kernel return probes support (kretprobes)
> kprobes: Add arm64 case in kprobe example module
>
> William Cohen (1):
> arm64: Add trampoline code for kretprobes
>
> arch/arm64/Kconfig | 3 +
> arch/arm64/include/asm/debug-monitors.h | 5 +
> arch/arm64/include/asm/insn.h | 18 +
> arch/arm64/include/asm/kprobes.h | 63 +++
> arch/arm64/include/asm/probes.h | 50 +++
> arch/arm64/include/asm/ptrace.h | 28 +-
> arch/arm64/kernel/Makefile | 3 +
> arch/arm64/kernel/debug-monitors.c | 35 +-
> arch/arm64/kernel/insn.c | 28 ++
> arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
> arch/arm64/kernel/kprobes-arm64.h | 71 ++++
> arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.h | 24 ++
> arch/arm64/kernel/probes-condn-check.c | 122 ++++++
> arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
> arch/arm64/kernel/probes-simulate-insn.h | 33 ++
> arch/arm64/kernel/ptrace.c | 77 ++++
> arch/arm64/kernel/vmlinux.lds.S | 1 +
> arch/arm64/mm/fault.c | 25 ++
> samples/kprobes/kprobe_example.c | 8 +
> 20 files changed, 1588 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm64/include/asm/kprobes.h
> create mode 100644 arch/arm64/include/asm/probes.h
> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
> create mode 100644 arch/arm64/kernel/kprobes.c
> create mode 100644 arch/arm64/kernel/kprobes.h
> create mode 100644 arch/arm64/kernel/probes-condn-check.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>
--
Masami HIRAMATSU
Linux Technology Research Center, System Productivity Research Dept.
Center for Technology Innovation - Systems Engineering
Hitachi, Ltd., Research & Development Group
E-mail: masami.hiramatsu.pt at hitachi.com
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-16 15:09 ` William Cohen
@ 2015-06-17 18:37 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-17 18:37 UTC (permalink / raw)
To: William Cohen, Catalin Marinas, Will Deacon, linux-arm-kernel,
Russell King
Cc: sandeepa.s.prabhu, Steve Capper, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, davem, Mark Brown, linux-kernel
On 06/16/15 11:09, William Cohen wrote:
> On 06/15/2015 03:07 PM, David Long wrote:
>> From: William Cohen <wcohen@redhat.com>
>>
>> The trampoline code is used by kretprobes to capture a return from a probed
>> function. This is done by saving the registers, calling the handler, and
>> restoring the registers. The code then returns to the roginal saved caller
>
> s/roginal/original
>
Hopefully no one wants a v8 if it turns out only to be to fix this typo
in the commit description. I'll keep this in mind if a respin is needed
for other reasons.
>> return address. It is necessary to do this directly instead of using a
>> software breakpoint because the code used in processing that breakpoint
>> could itself be kprobe'd and cause a problematic reentry into the debug
>> exception handler.
>>
>> Signed-off-by: William Cohen <wcohen@redhat.com>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/include/asm/kprobes.h | 1 +
>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>> 3 files changed, 68 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>> index af31c4d..d081f49 100644
>> --- a/arch/arm64/include/asm/kprobes.h
>> +++ b/arch/arm64/include/asm/kprobes.h
>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>> unsigned long val, void *data);
>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>> +void kretprobe_trampoline(void);
>>
>> #endif /* _ARM_KPROBES_H */
>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>> index ff8a55f..bdcfa62 100644
>> --- a/arch/arm64/kernel/kprobes-arm64.h
>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>> enum kprobe_insn __kprobes
>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>
>> +#define SAVE_REGS_STRING\
>> + " stp x0, x1, [sp, #16 * 0]\n" \
>> + " stp x2, x3, [sp, #16 * 1]\n" \
>> + " stp x4, x5, [sp, #16 * 2]\n" \
>> + " stp x6, x7, [sp, #16 * 3]\n" \
>> + " stp x8, x9, [sp, #16 * 4]\n" \
>> + " stp x10, x11, [sp, #16 * 5]\n" \
>> + " stp x12, x13, [sp, #16 * 6]\n" \
>> + " stp x14, x15, [sp, #16 * 7]\n" \
>> + " stp x16, x17, [sp, #16 * 8]\n" \
>> + " stp x18, x19, [sp, #16 * 9]\n" \
>> + " stp x20, x21, [sp, #16 * 10]\n" \
>> + " stp x22, x23, [sp, #16 * 11]\n" \
>> + " stp x24, x25, [sp, #16 * 12]\n" \
>> + " stp x26, x27, [sp, #16 * 13]\n" \
>> + " stp x28, x29, [sp, #16 * 14]\n" \
>> + " str x30, [sp, #16 * 15]\n" \
>> + " mrs x0, nzcv\n" \
>> + " str x0, [sp, #8 * 33]\n"
>> +
>> +
>> +#define RESTORE_REGS_STRING\
>> + " ldr x0, [sp, #8 * 33]\n" \
>> + " msr nzcv, x0\n" \
>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>> + " ldr x30, [sp, #16 * 15]\n"
>> +
>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>> index 6255814..570218c 100644
>> --- a/arch/arm64/kernel/kprobes.c
>> +++ b/arch/arm64/kernel/kprobes.c
>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>> return 0;
>> }
>>
>> +/*
>> + * When a retprobed function returns, this code saves registers and
>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>> + */
>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>> +{
>> + asm volatile (".global kretprobe_trampoline\n"
>> + "kretprobe_trampoline:\n"
>> + "sub sp, sp, %0\n"
>> + SAVE_REGS_STRING
>> + "mov x0, sp\n"
>> + "bl trampoline_probe_handler\n"
>> + /* Replace trampoline address in lr with actual
>> + orig_ret_addr return address. */
>> + "str x0, [sp, #16 * 15]\n"
>> + RESTORE_REGS_STRING
>> + "add sp, sp, %0\n"
>> + "ret\n"
>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>> +}
>> +
>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>> +{
>> + return (void *) 0;
>> +}
>> +
>> int __init arch_init_kprobes(void)
>> {
>> return 0;
>>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-17 18:37 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-17 18:37 UTC (permalink / raw)
To: linux-arm-kernel
On 06/16/15 11:09, William Cohen wrote:
> On 06/15/2015 03:07 PM, David Long wrote:
>> From: William Cohen <wcohen@redhat.com>
>>
>> The trampoline code is used by kretprobes to capture a return from a probed
>> function. This is done by saving the registers, calling the handler, and
>> restoring the registers. The code then returns to the roginal saved caller
>
> s/roginal/original
>
Hopefully no one wants a v8 if it turns out only to be to fix this typo
in the commit description. I'll keep this in mind if a respin is needed
for other reasons.
>> return address. It is necessary to do this directly instead of using a
>> software breakpoint because the code used in processing that breakpoint
>> could itself be kprobe'd and cause a problematic reentry into the debug
>> exception handler.
>>
>> Signed-off-by: William Cohen <wcohen@redhat.com>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/include/asm/kprobes.h | 1 +
>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>> 3 files changed, 68 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>> index af31c4d..d081f49 100644
>> --- a/arch/arm64/include/asm/kprobes.h
>> +++ b/arch/arm64/include/asm/kprobes.h
>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>> unsigned long val, void *data);
>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>> +void kretprobe_trampoline(void);
>>
>> #endif /* _ARM_KPROBES_H */
>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>> index ff8a55f..bdcfa62 100644
>> --- a/arch/arm64/kernel/kprobes-arm64.h
>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>> enum kprobe_insn __kprobes
>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>
>> +#define SAVE_REGS_STRING\
>> + " stp x0, x1, [sp, #16 * 0]\n" \
>> + " stp x2, x3, [sp, #16 * 1]\n" \
>> + " stp x4, x5, [sp, #16 * 2]\n" \
>> + " stp x6, x7, [sp, #16 * 3]\n" \
>> + " stp x8, x9, [sp, #16 * 4]\n" \
>> + " stp x10, x11, [sp, #16 * 5]\n" \
>> + " stp x12, x13, [sp, #16 * 6]\n" \
>> + " stp x14, x15, [sp, #16 * 7]\n" \
>> + " stp x16, x17, [sp, #16 * 8]\n" \
>> + " stp x18, x19, [sp, #16 * 9]\n" \
>> + " stp x20, x21, [sp, #16 * 10]\n" \
>> + " stp x22, x23, [sp, #16 * 11]\n" \
>> + " stp x24, x25, [sp, #16 * 12]\n" \
>> + " stp x26, x27, [sp, #16 * 13]\n" \
>> + " stp x28, x29, [sp, #16 * 14]\n" \
>> + " str x30, [sp, #16 * 15]\n" \
>> + " mrs x0, nzcv\n" \
>> + " str x0, [sp, #8 * 33]\n"
>> +
>> +
>> +#define RESTORE_REGS_STRING\
>> + " ldr x0, [sp, #8 * 33]\n" \
>> + " msr nzcv, x0\n" \
>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>> + " ldr x30, [sp, #16 * 15]\n"
>> +
>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>> index 6255814..570218c 100644
>> --- a/arch/arm64/kernel/kprobes.c
>> +++ b/arch/arm64/kernel/kprobes.c
>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>> return 0;
>> }
>>
>> +/*
>> + * When a retprobed function returns, this code saves registers and
>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>> + */
>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>> +{
>> + asm volatile (".global kretprobe_trampoline\n"
>> + "kretprobe_trampoline:\n"
>> + "sub sp, sp, %0\n"
>> + SAVE_REGS_STRING
>> + "mov x0, sp\n"
>> + "bl trampoline_probe_handler\n"
>> + /* Replace trampoline address in lr with actual
>> + orig_ret_addr return address. */
>> + "str x0, [sp, #16 * 15]\n"
>> + RESTORE_REGS_STRING
>> + "add sp, sp, %0\n"
>> + "ret\n"
>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>> +}
>> +
>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>> +{
>> + return (void *) 0;
>> +}
>> +
>> int __init arch_init_kprobes(void)
>> {
>> return 0;
>>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
2015-06-17 14:18 ` Masami Hiramatsu
@ 2015-06-17 18:51 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-17 18:51 UTC (permalink / raw)
To: Masami Hiramatsu, Catalin Marinas, Will Deacon, linux-arm-kernel,
Russell King
Cc: Jon Medhurst (Tixy),
Steve Capper, Ananth N Mavinakayanahalli, linux-kernel,
Anil S Keshavamurthy, Mark Brown, sandeepa.s.prabhu,
William Cohen, davem
On 06/17/15 10:18, Masami Hiramatsu wrote:
> Hi David,
>
> At first, thank you for updating this series! :)
>
> On 2015/06/16 4:07, David Long wrote:
>> From: "David A. Long" <dave.long@linaro.org>
>>
>> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
>> first seen in October 2013. This version attempts to address concerns raised by
>> reviewers and also fixes problems discovered during testing.
>>
>> This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
>> and return probes(kretprobes) support for ARM64.
>>
>> The kprobes mechanism makes use of software breakpoint and single stepping
>> support available in the ARM v8 kernel.
>>
>> The is patch depends on:
>> [PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
>> [PATCH 2/2] Consolidate redundant register/stack access code
>>
>
> Hmm, what are those patches ? Would they be not merged to upstream yet?
> If so, where I can get them from? I'd like to know the actual url for them.
>
These patches were sent out to the kernel mailing lists shortly before
the kprobes64 patch. Until such time as they are accepted upstream they
can also be found on the "kprobes64-v7" branch of my personal git repo at:
https://git.linaro.org/people/dave.long/linux.git
as commits:
3ce7d917bef3aee9fff70252d83e65f1cc7f909b
03f4bece51a068f4e1dac8813a57feeccfa24c26
Since I'm not planning on keeping that branch around forever I did not
include that info in the cover-letter email. Please advise if there is
a better way to record dependencies like this.
>
> [...]
>> Changes since v6 include:
>>
>> 1) New trampoline code from Will Cohen fixes the occasional failure seen
>> when processing kretprobes by replacing the software breakpoint with
>> assembly code to implement the return to the original execution stream.
>
> Yeah, that's what we need :)
>
> Thank you,
>
You're welcome :-)
>> 2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
>> of recognizing them as an ascii string in the stack/reg access code.
>> 3) Removed orig_x0.
>> 4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
>> arch/arm64/kernel/ptrace.c.
>>
>> David A. Long (2):
>> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
>> arm64: Add more test functions to insn.c
>>
>> Sandeepa Prabhu (4):
>> arm64: Kprobes with single stepping support
>> arm64: kprobes instruction simulation support
>> arm64: Add kernel return probes support (kretprobes)
>> kprobes: Add arm64 case in kprobe example module
>>
>> William Cohen (1):
>> arm64: Add trampoline code for kretprobes
>>
>> arch/arm64/Kconfig | 3 +
>> arch/arm64/include/asm/debug-monitors.h | 5 +
>> arch/arm64/include/asm/insn.h | 18 +
>> arch/arm64/include/asm/kprobes.h | 63 +++
>> arch/arm64/include/asm/probes.h | 50 +++
>> arch/arm64/include/asm/ptrace.h | 28 +-
>> arch/arm64/kernel/Makefile | 3 +
>> arch/arm64/kernel/debug-monitors.c | 35 +-
>> arch/arm64/kernel/insn.c | 28 ++
>> arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
>> arch/arm64/kernel/kprobes-arm64.h | 71 ++++
>> arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.h | 24 ++
>> arch/arm64/kernel/probes-condn-check.c | 122 ++++++
>> arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
>> arch/arm64/kernel/probes-simulate-insn.h | 33 ++
>> arch/arm64/kernel/ptrace.c | 77 ++++
>> arch/arm64/kernel/vmlinux.lds.S | 1 +
>> arch/arm64/mm/fault.c | 25 ++
>> samples/kprobes/kprobe_example.c | 8 +
>> 20 files changed, 1588 insertions(+), 11 deletions(-)
>> create mode 100644 arch/arm64/include/asm/kprobes.h
>> create mode 100644 arch/arm64/include/asm/probes.h
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
>> create mode 100644 arch/arm64/kernel/kprobes.c
>> create mode 100644 arch/arm64/kernel/kprobes.h
>> create mode 100644 arch/arm64/kernel/probes-condn-check.c
>> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
>> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>>
>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
@ 2015-06-17 18:51 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-17 18:51 UTC (permalink / raw)
To: linux-arm-kernel
On 06/17/15 10:18, Masami Hiramatsu wrote:
> Hi David,
>
> At first, thank you for updating this series! :)
>
> On 2015/06/16 4:07, David Long wrote:
>> From: "David A. Long" <dave.long@linaro.org>
>>
>> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
>> first seen in October 2013. This version attempts to address concerns raised by
>> reviewers and also fixes problems discovered during testing.
>>
>> This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
>> and return probes(kretprobes) support for ARM64.
>>
>> The kprobes mechanism makes use of software breakpoint and single stepping
>> support available in the ARM v8 kernel.
>>
>> The is patch depends on:
>> [PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
>> [PATCH 2/2] Consolidate redundant register/stack access code
>>
>
> Hmm, what are those patches ? Would they be not merged to upstream yet?
> If so, where I can get them from? I'd like to know the actual url for them.
>
These patches were sent out to the kernel mailing lists shortly before
the kprobes64 patch. Until such time as they are accepted upstream they
can also be found on the "kprobes64-v7" branch of my personal git repo at:
https://git.linaro.org/people/dave.long/linux.git
as commits:
3ce7d917bef3aee9fff70252d83e65f1cc7f909b
03f4bece51a068f4e1dac8813a57feeccfa24c26
Since I'm not planning on keeping that branch around forever I did not
include that info in the cover-letter email. Please advise if there is
a better way to record dependencies like this.
>
> [...]
>> Changes since v6 include:
>>
>> 1) New trampoline code from Will Cohen fixes the occasional failure seen
>> when processing kretprobes by replacing the software breakpoint with
>> assembly code to implement the return to the original execution stream.
>
> Yeah, that's what we need :)
>
> Thank you,
>
You're welcome :-)
>> 2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
>> of recognizing them as an ascii string in the stack/reg access code.
>> 3) Removed orig_x0.
>> 4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
>> arch/arm64/kernel/ptrace.c.
>>
>> David A. Long (2):
>> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
>> arm64: Add more test functions to insn.c
>>
>> Sandeepa Prabhu (4):
>> arm64: Kprobes with single stepping support
>> arm64: kprobes instruction simulation support
>> arm64: Add kernel return probes support (kretprobes)
>> kprobes: Add arm64 case in kprobe example module
>>
>> William Cohen (1):
>> arm64: Add trampoline code for kretprobes
>>
>> arch/arm64/Kconfig | 3 +
>> arch/arm64/include/asm/debug-monitors.h | 5 +
>> arch/arm64/include/asm/insn.h | 18 +
>> arch/arm64/include/asm/kprobes.h | 63 +++
>> arch/arm64/include/asm/probes.h | 50 +++
>> arch/arm64/include/asm/ptrace.h | 28 +-
>> arch/arm64/kernel/Makefile | 3 +
>> arch/arm64/kernel/debug-monitors.c | 35 +-
>> arch/arm64/kernel/insn.c | 28 ++
>> arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
>> arch/arm64/kernel/kprobes-arm64.h | 71 ++++
>> arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.h | 24 ++
>> arch/arm64/kernel/probes-condn-check.c | 122 ++++++
>> arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
>> arch/arm64/kernel/probes-simulate-insn.h | 33 ++
>> arch/arm64/kernel/ptrace.c | 77 ++++
>> arch/arm64/kernel/vmlinux.lds.S | 1 +
>> arch/arm64/mm/fault.c | 25 ++
>> samples/kprobes/kprobe_example.c | 8 +
>> 20 files changed, 1588 insertions(+), 11 deletions(-)
>> create mode 100644 arch/arm64/include/asm/kprobes.h
>> create mode 100644 arch/arm64/include/asm/probes.h
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
>> create mode 100644 arch/arm64/kernel/kprobes.c
>> create mode 100644 arch/arm64/kernel/kprobes.h
>> create mode 100644 arch/arm64/kernel/probes-condn-check.c
>> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
>> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>>
>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
2015-06-15 19:07 ` David Long
@ 2015-06-29 17:23 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:23 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
> first seen in October 2013. This version attempts to address concerns raised by
> reviewers and also fixes problems discovered during testing.
>
> This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
> and return probes(kretprobes) support for ARM64.
>
> The kprobes mechanism makes use of software breakpoint and single stepping
> support available in the ARM v8 kernel.
>
Hi David,
Thanks for this, and apologies for getting to this late...
I've had a good read through the patches in this series, and have some comments.
Cheers,
--
Steve
> The is patch depends on:
> [PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
> [PATCH 2/2] Consolidate redundant register/stack access code
>
> Changes since v2 include:
>
> 1) Removal of NOP padding in kprobe XOL slots. Slots are now exactly one
> instruction long.
> 2) Disabling of interrupts during execution in single-step mode.
> 3) Fixing of numerous problems in instruction simulation code (mostly
> thanks to Will Cohen).
> 4) Support for the HAVE_REGS_AND_STACK_ACCESS_API feature is added, to allow
> access to kprobes through debugfs.
> 5) kprobes is *not* enabled in defconfig.
> 6) Numerous complaints from checkpatch have been cleaned up, although a couple
> remain as removing the function pointer typedefs results in ugly code.
>
> Changes since v3 include:
>
> 1) Remove table-driven instruction parsing and replace with an if statement
> calling out to old and new instruction test functions in insn.c.
> 2) I removed the addition of orig_x0 to ptrace.h.
> 3) Reorder the patches.
> 4) Replace the previous interrupt disabling (from Will Cohen) with
> an improved solution (from Steve Capper).
>
> Changes since v4 include:
>
> 1) Added insn.c functions to detect exception instructions and DAIF
> read/write instructions, and use them to reject probing same.
> 2) Changed adr detect function to also recognize adrp. Reject both.
> 3) Added missing __kprobes for some new functions.
> 4) Added call to kprobes_fault_handler from mm do_page_fault.
> 5) Reject all non-simulated branch/ret instructions, not just those
> that use an immediate offset.
> 6) Moved software breakpoint definitions into debug-monitors.h.
> 7) Removed "!XIP_KERNEL" from Kconfig.
> 8) changed kprobes_condition_check_t and kprobes_prepare_t to probes_*,
> for future sharing with uprobes.
> 9) Removed bogus call to kprobes_restore_local_irqflag() from
> trampoline_probe_handler().
>
> Changes since v5 include:
>
> 1) Replaced installation of breakpoint hook with direct call from the
> handlers in debug-monitors.c, as requested.
> 2) Reject probing of instructions that read the interrupt mask, in
> addition to instructions that set it.
> 3) Cleaned up comments describing usage of Debug Mask.
> 4) Added KPROBE_REENTER case in reenter_kprobe.
> 5) Corrected the ifdef'd definitions for notify_page_fault() to be
> consistent when KPROBES is not configed.
> 6) Changed "cpsr" to "pstate" for HAVE_REGS_AND_STACK_ACCESS_API feature.
> 7) Added back in missing new files in previous patch.
> 8) Changed two instances of pr_warning() to pr_warn().
>
> Note that there seems to be at least a potential issue with kprobes
> on multiple (possibly all) platforms having to do with use of kfree
> inside of the kretprobes trampoline handler. This has manifested
> occasionally in systemtap testing on arm64. There does not appear to
> be an simple solution to the problem.
>
> Changes since v6 include:
>
> 1) New trampoline code from Will Cohen fixes the occasional failure seen
> when processing kretprobes by replacing the software breakpoint with
> assembly code to implement the return to the original execution stream.
> 2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
> of recognizing them as an ascii string in the stack/reg access code.
> 3) Removed orig_x0.
> 4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
> arch/arm64/kernel/ptrace.c.
>
> David A. Long (2):
> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
> arm64: Add more test functions to insn.c
>
> Sandeepa Prabhu (4):
> arm64: Kprobes with single stepping support
> arm64: kprobes instruction simulation support
> arm64: Add kernel return probes support (kretprobes)
> kprobes: Add arm64 case in kprobe example module
>
> William Cohen (1):
> arm64: Add trampoline code for kretprobes
>
> arch/arm64/Kconfig | 3 +
> arch/arm64/include/asm/debug-monitors.h | 5 +
> arch/arm64/include/asm/insn.h | 18 +
> arch/arm64/include/asm/kprobes.h | 63 +++
> arch/arm64/include/asm/probes.h | 50 +++
> arch/arm64/include/asm/ptrace.h | 28 +-
> arch/arm64/kernel/Makefile | 3 +
> arch/arm64/kernel/debug-monitors.c | 35 +-
> arch/arm64/kernel/insn.c | 28 ++
> arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
> arch/arm64/kernel/kprobes-arm64.h | 71 ++++
> arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.h | 24 ++
> arch/arm64/kernel/probes-condn-check.c | 122 ++++++
> arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
> arch/arm64/kernel/probes-simulate-insn.h | 33 ++
> arch/arm64/kernel/ptrace.c | 77 ++++
> arch/arm64/kernel/vmlinux.lds.S | 1 +
> arch/arm64/mm/fault.c | 25 ++
> samples/kprobes/kprobe_example.c | 8 +
> 20 files changed, 1588 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm64/include/asm/kprobes.h
> create mode 100644 arch/arm64/include/asm/probes.h
> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
> create mode 100644 arch/arm64/kernel/kprobes.c
> create mode 100644 arch/arm64/kernel/kprobes.h
> create mode 100644 arch/arm64/kernel/probes-condn-check.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support
@ 2015-06-29 17:23 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:23 UTC (permalink / raw)
To: linux-arm-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> This patchset is heavily based on Sandeepa Prabhu's ARM v8 kprobes patches,
> first seen in October 2013. This version attempts to address concerns raised by
> reviewers and also fixes problems discovered during testing.
>
> This patchset adds support for kernel probes(kprobes), jump probes(jprobes)
> and return probes(kretprobes) support for ARM64.
>
> The kprobes mechanism makes use of software breakpoint and single stepping
> support available in the ARM v8 kernel.
>
Hi David,
Thanks for this, and apologies for getting to this late...
I've had a good read through the patches in this series, and have some comments.
Cheers,
--
Steve
> The is patch depends on:
> [PATCH 1/2] Move the pt_regs_offset struct definition from arch to common include file
> [PATCH 2/2] Consolidate redundant register/stack access code
>
> Changes since v2 include:
>
> 1) Removal of NOP padding in kprobe XOL slots. Slots are now exactly one
> instruction long.
> 2) Disabling of interrupts during execution in single-step mode.
> 3) Fixing of numerous problems in instruction simulation code (mostly
> thanks to Will Cohen).
> 4) Support for the HAVE_REGS_AND_STACK_ACCESS_API feature is added, to allow
> access to kprobes through debugfs.
> 5) kprobes is *not* enabled in defconfig.
> 6) Numerous complaints from checkpatch have been cleaned up, although a couple
> remain as removing the function pointer typedefs results in ugly code.
>
> Changes since v3 include:
>
> 1) Remove table-driven instruction parsing and replace with an if statement
> calling out to old and new instruction test functions in insn.c.
> 2) I removed the addition of orig_x0 to ptrace.h.
> 3) Reorder the patches.
> 4) Replace the previous interrupt disabling (from Will Cohen) with
> an improved solution (from Steve Capper).
>
> Changes since v4 include:
>
> 1) Added insn.c functions to detect exception instructions and DAIF
> read/write instructions, and use them to reject probing same.
> 2) Changed adr detect function to also recognize adrp. Reject both.
> 3) Added missing __kprobes for some new functions.
> 4) Added call to kprobes_fault_handler from mm do_page_fault.
> 5) Reject all non-simulated branch/ret instructions, not just those
> that use an immediate offset.
> 6) Moved software breakpoint definitions into debug-monitors.h.
> 7) Removed "!XIP_KERNEL" from Kconfig.
> 8) changed kprobes_condition_check_t and kprobes_prepare_t to probes_*,
> for future sharing with uprobes.
> 9) Removed bogus call to kprobes_restore_local_irqflag() from
> trampoline_probe_handler().
>
> Changes since v5 include:
>
> 1) Replaced installation of breakpoint hook with direct call from the
> handlers in debug-monitors.c, as requested.
> 2) Reject probing of instructions that read the interrupt mask, in
> addition to instructions that set it.
> 3) Cleaned up comments describing usage of Debug Mask.
> 4) Added KPROBE_REENTER case in reenter_kprobe.
> 5) Corrected the ifdef'd definitions for notify_page_fault() to be
> consistent when KPROBES is not configed.
> 6) Changed "cpsr" to "pstate" for HAVE_REGS_AND_STACK_ACCESS_API feature.
> 7) Added back in missing new files in previous patch.
> 8) Changed two instances of pr_warning() to pr_warn().
>
> Note that there seems to be at least a potential issue with kprobes
> on multiple (possibly all) platforms having to do with use of kfree
> inside of the kretprobes trampoline handler. This has manifested
> occasionally in systemtap testing on arm64. There does not appear to
> be an simple solution to the problem.
>
> Changes since v6 include:
>
> 1) New trampoline code from Will Cohen fixes the occasional failure seen
> when processing kretprobes by replacing the software breakpoint with
> assembly code to implement the return to the original execution stream.
> 2) Changed ip0, ip1, fp, and lr to plain numbered registers for purposes
> of recognizing them as an ascii string in the stack/reg access code.
> 3) Removed orig_x0.
> 4) Moved ARM_x* defines from arch/arm64/include/uapi/asm/ptrace.h to
> arch/arm64/kernel/ptrace.c.
>
> David A. Long (2):
> arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
> arm64: Add more test functions to insn.c
>
> Sandeepa Prabhu (4):
> arm64: Kprobes with single stepping support
> arm64: kprobes instruction simulation support
> arm64: Add kernel return probes support (kretprobes)
> kprobes: Add arm64 case in kprobe example module
>
> William Cohen (1):
> arm64: Add trampoline code for kretprobes
>
> arch/arm64/Kconfig | 3 +
> arch/arm64/include/asm/debug-monitors.h | 5 +
> arch/arm64/include/asm/insn.h | 18 +
> arch/arm64/include/asm/kprobes.h | 63 +++
> arch/arm64/include/asm/probes.h | 50 +++
> arch/arm64/include/asm/ptrace.h | 28 +-
> arch/arm64/kernel/Makefile | 3 +
> arch/arm64/kernel/debug-monitors.c | 35 +-
> arch/arm64/kernel/insn.c | 28 ++
> arch/arm64/kernel/kprobes-arm64.c | 166 ++++++++
> arch/arm64/kernel/kprobes-arm64.h | 71 ++++
> arch/arm64/kernel/kprobes.c | 665 +++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.h | 24 ++
> arch/arm64/kernel/probes-condn-check.c | 122 ++++++
> arch/arm64/kernel/probes-simulate-insn.c | 174 ++++++++
> arch/arm64/kernel/probes-simulate-insn.h | 33 ++
> arch/arm64/kernel/ptrace.c | 77 ++++
> arch/arm64/kernel/vmlinux.lds.S | 1 +
> arch/arm64/mm/fault.c | 25 ++
> samples/kprobes/kprobe_example.c | 8 +
> 20 files changed, 1588 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm64/include/asm/kprobes.h
> create mode 100644 arch/arm64/include/asm/probes.h
> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
> create mode 100644 arch/arm64/kernel/kprobes.c
> create mode 100644 arch/arm64/kernel/kprobes.h
> create mode 100644 arch/arm64/kernel/probes-condn-check.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
2015-06-15 19:07 ` David Long
@ 2015-06-29 17:23 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:23 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
> arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 103 insertions(+)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 7796af4..966091f 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -68,6 +68,7 @@ config ARM64
> select HAVE_PERF_EVENTS
> select HAVE_PERF_REGS
> select HAVE_PERF_USER_STACK_DUMP
> + select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_RCU_TABLE_FREE
> select HAVE_SYSCALL_TRACEPOINTS
> select IRQ_DOMAIN
> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
> index d6dd9fd..8f440e9 100644
> --- a/arch/arm64/include/asm/ptrace.h
> +++ b/arch/arm64/include/asm/ptrace.h
> @@ -118,6 +118,8 @@ struct pt_regs {
> u64 syscallno;
> };
>
> +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
> +
> #define arch_has_single_step() (1)
>
> #ifdef CONFIG_COMPAT
> @@ -146,6 +148,29 @@ struct pt_regs {
> #define user_stack_pointer(regs) \
> (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
>
> +/**
> + * regs_get_register() - get register value from its offset
> + * @regs: pt_regs from which register value is gotten
> + * @offset: offset number of the register.
> + *
> + * regs_get_register returns the value of a register whose offset from @regs.
> + * The @offset is the offset of the register in struct pt_regs.
> + * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
> + */
> +static inline u64 regs_get_register(struct pt_regs *regs,
> + unsigned int offset)
> +{
> + if (unlikely(offset > MAX_REG_OFFSET))
> + return 0;
> + return *(u64 *)((u64)regs + offset);
Why not:
return regs->regs[offset];
> +}
> +
> +/* Valid only for Kernel mode traps. */
> +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
> +{
> + return regs->sp;
> +}
> +
> static inline unsigned long regs_return_value(struct pt_regs *regs)
> {
> return regs->regs[0];
> diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
> index d882b83..f6199a5 100644
> --- a/arch/arm64/kernel/ptrace.c
> +++ b/arch/arm64/kernel/ptrace.c
> @@ -48,6 +48,83 @@
> #define CREATE_TRACE_POINTS
> #include <trace/events/syscalls.h>
>
> +#define ARM_pstate pstate
> +#define ARM_pc pc
> +#define ARM_sp sp
> +#define ARM_x30 regs[30]
> +#define ARM_x29 regs[29]
> +#define ARM_x28 regs[28]
> +#define ARM_x27 regs[27]
> +#define ARM_x26 regs[26]
> +#define ARM_x25 regs[25]
> +#define ARM_x24 regs[24]
> +#define ARM_x23 regs[23]
> +#define ARM_x22 regs[22]
> +#define ARM_x21 regs[21]
> +#define ARM_x20 regs[20]
> +#define ARM_x19 regs[19]
> +#define ARM_x18 regs[18]
> +#define ARM_x17 regs[17]
> +#define ARM_x16 regs[16]
> +#define ARM_x15 regs[15]
> +#define ARM_x14 regs[14]
> +#define ARM_x13 regs[13]
> +#define ARM_x12 regs[12]
> +#define ARM_x11 regs[11]
> +#define ARM_x10 regs[10]
> +#define ARM_x9 regs[9]
> +#define ARM_x8 regs[8]
> +#define ARM_x7 regs[7]
> +#define ARM_x6 regs[6]
> +#define ARM_x5 regs[5]
> +#define ARM_x4 regs[4]
> +#define ARM_x3 regs[3]
> +#define ARM_x2 regs[2]
> +#define ARM_x1 regs[1]
> +#define ARM_x0 regs[0]
> +
> +#define REG_OFFSET_NAME(r) \
> + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
> +
> +const struct pt_regs_offset regs_offset_table[] = {
> + REG_OFFSET_NAME(x0),
> + REG_OFFSET_NAME(x1),
> + REG_OFFSET_NAME(x2),
> + REG_OFFSET_NAME(x3),
> + REG_OFFSET_NAME(x4),
> + REG_OFFSET_NAME(x5),
> + REG_OFFSET_NAME(x6),
> + REG_OFFSET_NAME(x7),
> + REG_OFFSET_NAME(x8),
> + REG_OFFSET_NAME(x9),
> + REG_OFFSET_NAME(x10),
> + REG_OFFSET_NAME(x11),
> + REG_OFFSET_NAME(x12),
> + REG_OFFSET_NAME(x13),
> + REG_OFFSET_NAME(x14),
> + REG_OFFSET_NAME(x15),
> + REG_OFFSET_NAME(x16),
> + REG_OFFSET_NAME(x17),
> + REG_OFFSET_NAME(x18),
> + REG_OFFSET_NAME(x19),
> + REG_OFFSET_NAME(x20),
> + REG_OFFSET_NAME(x21),
> + REG_OFFSET_NAME(x22),
> + REG_OFFSET_NAME(x23),
> + REG_OFFSET_NAME(x24),
> + REG_OFFSET_NAME(x25),
> + REG_OFFSET_NAME(x26),
> + REG_OFFSET_NAME(x27),
> + REG_OFFSET_NAME(x28),
> + REG_OFFSET_NAME(x29),
> + REG_OFFSET_NAME(x30),
> + REG_OFFSET_NAME(sp),
> + REG_OFFSET_NAME(pc),
> + REG_OFFSET_NAME(pstate),
> + REG_OFFSET_END,
> +};
> +
> /*
> * TODO: does not yet catch signals sent when the child dies.
> * in exit.c or in signal.c.
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
@ 2015-06-29 17:23 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:23 UTC (permalink / raw)
To: linux-arm-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
> arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 103 insertions(+)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 7796af4..966091f 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -68,6 +68,7 @@ config ARM64
> select HAVE_PERF_EVENTS
> select HAVE_PERF_REGS
> select HAVE_PERF_USER_STACK_DUMP
> + select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_RCU_TABLE_FREE
> select HAVE_SYSCALL_TRACEPOINTS
> select IRQ_DOMAIN
> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
> index d6dd9fd..8f440e9 100644
> --- a/arch/arm64/include/asm/ptrace.h
> +++ b/arch/arm64/include/asm/ptrace.h
> @@ -118,6 +118,8 @@ struct pt_regs {
> u64 syscallno;
> };
>
> +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
> +
> #define arch_has_single_step() (1)
>
> #ifdef CONFIG_COMPAT
> @@ -146,6 +148,29 @@ struct pt_regs {
> #define user_stack_pointer(regs) \
> (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
>
> +/**
> + * regs_get_register() - get register value from its offset
> + * @regs: pt_regs from which register value is gotten
> + * @offset: offset number of the register.
> + *
> + * regs_get_register returns the value of a register whose offset from @regs.
> + * The @offset is the offset of the register in struct pt_regs.
> + * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
> + */
> +static inline u64 regs_get_register(struct pt_regs *regs,
> + unsigned int offset)
> +{
> + if (unlikely(offset > MAX_REG_OFFSET))
> + return 0;
> + return *(u64 *)((u64)regs + offset);
Why not:
return regs->regs[offset];
> +}
> +
> +/* Valid only for Kernel mode traps. */
> +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
> +{
> + return regs->sp;
> +}
> +
> static inline unsigned long regs_return_value(struct pt_regs *regs)
> {
> return regs->regs[0];
> diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
> index d882b83..f6199a5 100644
> --- a/arch/arm64/kernel/ptrace.c
> +++ b/arch/arm64/kernel/ptrace.c
> @@ -48,6 +48,83 @@
> #define CREATE_TRACE_POINTS
> #include <trace/events/syscalls.h>
>
> +#define ARM_pstate pstate
> +#define ARM_pc pc
> +#define ARM_sp sp
> +#define ARM_x30 regs[30]
> +#define ARM_x29 regs[29]
> +#define ARM_x28 regs[28]
> +#define ARM_x27 regs[27]
> +#define ARM_x26 regs[26]
> +#define ARM_x25 regs[25]
> +#define ARM_x24 regs[24]
> +#define ARM_x23 regs[23]
> +#define ARM_x22 regs[22]
> +#define ARM_x21 regs[21]
> +#define ARM_x20 regs[20]
> +#define ARM_x19 regs[19]
> +#define ARM_x18 regs[18]
> +#define ARM_x17 regs[17]
> +#define ARM_x16 regs[16]
> +#define ARM_x15 regs[15]
> +#define ARM_x14 regs[14]
> +#define ARM_x13 regs[13]
> +#define ARM_x12 regs[12]
> +#define ARM_x11 regs[11]
> +#define ARM_x10 regs[10]
> +#define ARM_x9 regs[9]
> +#define ARM_x8 regs[8]
> +#define ARM_x7 regs[7]
> +#define ARM_x6 regs[6]
> +#define ARM_x5 regs[5]
> +#define ARM_x4 regs[4]
> +#define ARM_x3 regs[3]
> +#define ARM_x2 regs[2]
> +#define ARM_x1 regs[1]
> +#define ARM_x0 regs[0]
> +
> +#define REG_OFFSET_NAME(r) \
> + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
> +
> +const struct pt_regs_offset regs_offset_table[] = {
> + REG_OFFSET_NAME(x0),
> + REG_OFFSET_NAME(x1),
> + REG_OFFSET_NAME(x2),
> + REG_OFFSET_NAME(x3),
> + REG_OFFSET_NAME(x4),
> + REG_OFFSET_NAME(x5),
> + REG_OFFSET_NAME(x6),
> + REG_OFFSET_NAME(x7),
> + REG_OFFSET_NAME(x8),
> + REG_OFFSET_NAME(x9),
> + REG_OFFSET_NAME(x10),
> + REG_OFFSET_NAME(x11),
> + REG_OFFSET_NAME(x12),
> + REG_OFFSET_NAME(x13),
> + REG_OFFSET_NAME(x14),
> + REG_OFFSET_NAME(x15),
> + REG_OFFSET_NAME(x16),
> + REG_OFFSET_NAME(x17),
> + REG_OFFSET_NAME(x18),
> + REG_OFFSET_NAME(x19),
> + REG_OFFSET_NAME(x20),
> + REG_OFFSET_NAME(x21),
> + REG_OFFSET_NAME(x22),
> + REG_OFFSET_NAME(x23),
> + REG_OFFSET_NAME(x24),
> + REG_OFFSET_NAME(x25),
> + REG_OFFSET_NAME(x26),
> + REG_OFFSET_NAME(x27),
> + REG_OFFSET_NAME(x28),
> + REG_OFFSET_NAME(x29),
> + REG_OFFSET_NAME(x30),
> + REG_OFFSET_NAME(sp),
> + REG_OFFSET_NAME(pc),
> + REG_OFFSET_NAME(pstate),
> + REG_OFFSET_END,
> +};
> +
> /*
> * TODO: does not yet catch signals sent when the child dies.
> * in exit.c or in signal.c.
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 2/7] arm64: Add more test functions to insn.c
2015-06-15 19:07 ` David Long
@ 2015-06-29 17:23 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:23 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
Hi David,
Some comments below.
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> Certain instructions are hard to execute correctly out-of-line (as in
> kprobes). Test functions are added to insn.[hc] to identify these. The
> instructions include any that use PC-relative addressing, change the PC,
> or change interrupt masking. For efficiency and simplicity test
> functions are also added for small collections of related instructions.
>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/include/asm/insn.h | 18 ++++++++++++++++++
> arch/arm64/kernel/insn.c | 28 ++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
> index f81b328..1fdd237 100644
> --- a/arch/arm64/include/asm/insn.h
> +++ b/arch/arm64/include/asm/insn.h
> @@ -223,8 +223,13 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
> static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
> { return (val); }
>
> +__AARCH64_INSN_FUNCS(adr_adrp, 0x1F000000, 0x10000000)
> +__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
> __AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
> __AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
> +__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
> +__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
> +__AARCH64_INSN_FUNCS(exclusive, 0x3F000000, 0x08000000)
Going one step back, if we're worried about the exclusive monitors
then we'll be worried about instructions in-between the monitor pairs
too?
> __AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
> __AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
> __AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
> @@ -264,19 +269,29 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
> __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
> __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
> __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
> +__AARCH64_INSN_FUNCS(b_bl, 0x7C000000, 0x14000000)
> +__AARCH64_INSN_FUNCS(cb, 0x7E000000, 0x34000000)
> __AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
> __AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
> +__AARCH64_INSN_FUNCS(tb, 0x7E000000, 0x36000000)
> __AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
> __AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
> +__AARCH64_INSN_FUNCS(b_bl_cb_tb, 0x5C000000, 0x14000000)
> __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
> __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
> __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
> __AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
> __AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
> +__AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
> __AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
> __AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
> __AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
> +__AARCH64_INSN_FUNCS(br_blr, 0xFFDFFC1F, 0xD61F0000)
> __AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
> +__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F000, 0xD5004000)
Should this not be:
__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F01F, 0xD500401F)
As the lower 5 bits of an MSR (immediate) are all 1?
> +__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
> +__AARCH64_INSN_FUNCS(set_clr_daif, 0xFFFFF0DF, 0xD50340DF)
Looks good, just an MSR immediate with either DAIFSet or DAIFClr.
> +__AARCH64_INSN_FUNCS(rd_wr_daif, 0xFFDFFFE0, 0xD51B4220)
Looks good, either MRS or MSR (register) where systemreg = DAIF.
>
> #undef __AARCH64_INSN_FUNCS
>
> @@ -285,6 +300,9 @@ bool aarch64_insn_is_nop(u32 insn);
> int aarch64_insn_read(void *addr, u32 *insnp);
> int aarch64_insn_write(void *addr, u32 insn);
> enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
> +bool aarch64_insn_uses_literal(u32 insn);
> +bool aarch64_insn_is_branch(u32 insn);
> +bool aarch64_insn_is_daif_access(u32 insn);
> u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
> u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
> u32 insn, u64 imm);
> diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
> index 9249020..ecd8882 100644
> --- a/arch/arm64/kernel/insn.c
> +++ b/arch/arm64/kernel/insn.c
> @@ -155,6 +155,34 @@ static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn)
> aarch64_insn_is_nop(insn);
> }
>
> +bool __kprobes aarch64_insn_uses_literal(u32 insn)
> +{
> + /* ldr/ldrsw (literal), prfm */
> +
> + return aarch64_insn_is_ldr_lit(insn) ||
> + aarch64_insn_is_ldrsw_lit(insn) ||
> + aarch64_insn_is_adr_adrp(insn) ||
> + aarch64_insn_is_prfm_lit(insn);
> +}
> +
> +bool __kprobes aarch64_insn_is_branch(u32 insn)
> +{
> + /* b, bl, cb*, tb*, b.cond, br, blr */
> +
> + return aarch64_insn_is_b_bl_cb_tb(insn) ||
> + aarch64_insn_is_br_blr(insn) ||
> + aarch64_insn_is_ret(insn) ||
> + aarch64_insn_is_bcond(insn);
> +}
> +
> +bool __kprobes aarch64_insn_is_daif_access(u32 insn)
> +{
> + /* msr daif, mrs daif, msr daifset, msr daifclr */
> +
> + return aarch64_insn_is_rd_wr_daif(insn) ||
> + aarch64_insn_is_set_clr_daif(insn);
> +}
> +
> /*
> * ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
> * Section B2.6.5 "Concurrent modification and execution of instructions":
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 2/7] arm64: Add more test functions to insn.c
@ 2015-06-29 17:23 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:23 UTC (permalink / raw)
To: linux-arm-kernel
Hi David,
Some comments below.
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: "David A. Long" <dave.long@linaro.org>
>
> Certain instructions are hard to execute correctly out-of-line (as in
> kprobes). Test functions are added to insn.[hc] to identify these. The
> instructions include any that use PC-relative addressing, change the PC,
> or change interrupt masking. For efficiency and simplicity test
> functions are also added for small collections of related instructions.
>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/include/asm/insn.h | 18 ++++++++++++++++++
> arch/arm64/kernel/insn.c | 28 ++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
> index f81b328..1fdd237 100644
> --- a/arch/arm64/include/asm/insn.h
> +++ b/arch/arm64/include/asm/insn.h
> @@ -223,8 +223,13 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
> static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
> { return (val); }
>
> +__AARCH64_INSN_FUNCS(adr_adrp, 0x1F000000, 0x10000000)
> +__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
> __AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
> __AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
> +__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
> +__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
> +__AARCH64_INSN_FUNCS(exclusive, 0x3F000000, 0x08000000)
Going one step back, if we're worried about the exclusive monitors
then we'll be worried about instructions in-between the monitor pairs
too?
> __AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
> __AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
> __AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
> @@ -264,19 +269,29 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
> __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
> __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
> __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
> +__AARCH64_INSN_FUNCS(b_bl, 0x7C000000, 0x14000000)
> +__AARCH64_INSN_FUNCS(cb, 0x7E000000, 0x34000000)
> __AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
> __AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
> +__AARCH64_INSN_FUNCS(tb, 0x7E000000, 0x36000000)
> __AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
> __AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
> +__AARCH64_INSN_FUNCS(b_bl_cb_tb, 0x5C000000, 0x14000000)
> __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
> __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
> __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
> __AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
> __AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
> +__AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
> __AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
> __AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
> __AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
> +__AARCH64_INSN_FUNCS(br_blr, 0xFFDFFC1F, 0xD61F0000)
> __AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
> +__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F000, 0xD5004000)
Should this not be:
__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F01F, 0xD500401F)
As the lower 5 bits of an MSR (immediate) are all 1?
> +__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
> +__AARCH64_INSN_FUNCS(set_clr_daif, 0xFFFFF0DF, 0xD50340DF)
Looks good, just an MSR immediate with either DAIFSet or DAIFClr.
> +__AARCH64_INSN_FUNCS(rd_wr_daif, 0xFFDFFFE0, 0xD51B4220)
Looks good, either MRS or MSR (register) where systemreg = DAIF.
>
> #undef __AARCH64_INSN_FUNCS
>
> @@ -285,6 +300,9 @@ bool aarch64_insn_is_nop(u32 insn);
> int aarch64_insn_read(void *addr, u32 *insnp);
> int aarch64_insn_write(void *addr, u32 insn);
> enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
> +bool aarch64_insn_uses_literal(u32 insn);
> +bool aarch64_insn_is_branch(u32 insn);
> +bool aarch64_insn_is_daif_access(u32 insn);
> u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
> u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
> u32 insn, u64 imm);
> diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
> index 9249020..ecd8882 100644
> --- a/arch/arm64/kernel/insn.c
> +++ b/arch/arm64/kernel/insn.c
> @@ -155,6 +155,34 @@ static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn)
> aarch64_insn_is_nop(insn);
> }
>
> +bool __kprobes aarch64_insn_uses_literal(u32 insn)
> +{
> + /* ldr/ldrsw (literal), prfm */
> +
> + return aarch64_insn_is_ldr_lit(insn) ||
> + aarch64_insn_is_ldrsw_lit(insn) ||
> + aarch64_insn_is_adr_adrp(insn) ||
> + aarch64_insn_is_prfm_lit(insn);
> +}
> +
> +bool __kprobes aarch64_insn_is_branch(u32 insn)
> +{
> + /* b, bl, cb*, tb*, b.cond, br, blr */
> +
> + return aarch64_insn_is_b_bl_cb_tb(insn) ||
> + aarch64_insn_is_br_blr(insn) ||
> + aarch64_insn_is_ret(insn) ||
> + aarch64_insn_is_bcond(insn);
> +}
> +
> +bool __kprobes aarch64_insn_is_daif_access(u32 insn)
> +{
> + /* msr daif, mrs daif, msr daifset, msr daifclr */
> +
> + return aarch64_insn_is_rd_wr_daif(insn) ||
> + aarch64_insn_is_set_clr_daif(insn);
> +}
> +
> /*
> * ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
> * Section B2.6.5 "Concurrent modification and execution of instructions":
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 3/7] arm64: Kprobes with single stepping support
2015-06-15 19:07 ` David Long
@ 2015-06-29 17:24 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:24 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>
> Add support for basic kernel probes(kprobes) and jump probes
> (jprobes) for ARM64.
>
> Kprobes utilizes software breakpoint and single step debug
> exceptions supported on ARM v8.
>
> A software breakpoint is placed at the probe address to trap the
> kernel execution into the kprobe handler.
>
> ARM v8 supports enabling single stepping before the break exception
> return (ERET), with next PC in exception return address (ELR_EL1). The
> kprobe handler prepares an executable memory slot for out-of-line
> execution with a copy of the original instruction being probed, and
> enables single stepping. The PC is set to the out-of-line slot address
> before the ERET. With this scheme, the instruction is executed with the
> exact same register context except for the PC (and DAIF) registers.
>
> Debug mask (PSTATE.D) is enabled only when single stepping a recursive
> kprobe, e.g.: during kprobes reenter so that probed instruction can be
> single stepped within the kprobe handler -exception- context.
> The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
> any further re-entry is prevented by not calling handlers and the case
> counted as a missed kprobe).
>
> Single stepping from the x-o-l slot has a drawback for PC-relative accesses
> like branching and symbolic literals access as the offset from the new PC
> (slot address) may not be ensured to fit in the immediate value of
> the opcode. Such instructions need simulation, so reject
> probing them.
>
> Instructions generating exceptions or cpu mode change are rejected
> for probing.
>
> Instructions using Exclusive Monitor are rejected too.
>
> System instructions are mostly enabled for stepping, except MSR/MRS
> accesses to "DAIF" flags in PSTATE, which are not safe for
> probing.
>
> Thanks to Steve Capper and Pratyush Anand for several suggested
> Changes.
>
> Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
> Signed-off-by: Steve Capper <steve.capper@linaro.org>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/debug-monitors.h | 5 +
> arch/arm64/include/asm/kprobes.h | 62 ++++
> arch/arm64/include/asm/probes.h | 50 +++
> arch/arm64/include/asm/ptrace.h | 3 +-
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/debug-monitors.c | 35 ++-
> arch/arm64/kernel/kprobes-arm64.c | 68 ++++
> arch/arm64/kernel/kprobes-arm64.h | 28 ++
> arch/arm64/kernel/kprobes.c | 537 ++++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.h | 24 ++
> arch/arm64/kernel/vmlinux.lds.S | 1 +
> arch/arm64/mm/fault.c | 25 ++
> 13 files changed, 829 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm64/include/asm/kprobes.h
> create mode 100644 arch/arm64/include/asm/probes.h
> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
> create mode 100644 arch/arm64/kernel/kprobes.c
> create mode 100644 arch/arm64/kernel/kprobes.h
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 966091f..45a9bd81 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -71,6 +71,7 @@ config ARM64
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_RCU_TABLE_FREE
> select HAVE_SYSCALL_TRACEPOINTS
> + select HAVE_KPROBES
> select IRQ_DOMAIN
> select MODULES_USE_ELF_RELA
> select NO_BOOTMEM
> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
> index 40ec68a..92d7cea 100644
> --- a/arch/arm64/include/asm/debug-monitors.h
> +++ b/arch/arm64/include/asm/debug-monitors.h
> @@ -90,6 +90,11 @@
>
> #define CACHE_FLUSH_IS_SAFE 1
>
> +/* kprobes BRK opcodes with ESR encoding */
> +#define BRK64_ESR_MASK 0xFFFF
> +#define BRK64_ESR_KPROBES 0x0004
> +#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
> +
> /* AArch32 */
> #define DBG_ESR_EVT_BKPT 0x4
> #define DBG_ESR_EVT_VECC 0x5
> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
> new file mode 100644
> index 0000000..af31c4d
> --- /dev/null
> +++ b/arch/arm64/include/asm/kprobes.h
> @@ -0,0 +1,62 @@
> +/*
> + * arch/arm64/include/asm/kprobes.h
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KPROBES_H
> +#define _ARM_KPROBES_H
> +
> +#include <linux/types.h>
> +#include <linux/ptrace.h>
> +#include <linux/percpu.h>
> +
> +#define __ARCH_WANT_KPROBES_INSN_SLOT
> +#define MAX_INSN_SIZE 1
> +#define MAX_STACK_SIZE 128
> +
> +#define flush_insn_slot(p) do { } while (0)
> +#define kretprobe_blacklist_size 0
> +
> +#include <asm/probes.h>
> +
> +struct prev_kprobe {
> + struct kprobe *kp;
> + unsigned int status;
> +};
> +
> +/* Single step context for kprobe */
> +struct kprobe_step_ctx {
> +#define KPROBES_STEP_NONE 0x0
> +#define KPROBES_STEP_PENDING 0x1
> + unsigned long ss_status;
> + unsigned long match_addr;
> +};
> +
> +/* per-cpu kprobe control block */
> +struct kprobe_ctlblk {
> + unsigned int kprobe_status;
> + unsigned long saved_irqflag;
> + struct prev_kprobe prev_kprobe;
> + struct kprobe_step_ctx ss_ctx;
> + struct pt_regs jprobe_saved_regs;
> + char jprobes_stack[MAX_STACK_SIZE];
> +};
> +
> +void arch_remove_kprobe(struct kprobe *);
> +int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
> +int kprobe_exceptions_notify(struct notifier_block *self,
> + unsigned long val, void *data);
> +int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
> +int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
> +
> +#endif /* _ARM_KPROBES_H */
> diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h
> new file mode 100644
> index 0000000..7f5a27f
> --- /dev/null
> +++ b/arch/arm64/include/asm/probes.h
> @@ -0,0 +1,50 @@
> +/*
> + * arch/arm64/include/asm/probes.h
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +#ifndef _ARM_PROBES_H
> +#define _ARM_PROBES_H
> +
> +struct kprobe;
> +struct arch_specific_insn;
> +
> +typedef u32 kprobe_opcode_t;
> +typedef unsigned long (kprobes_pstate_check_t)(unsigned long);
> +typedef unsigned long
> +(probes_condition_check_t)(struct kprobe *p, struct pt_regs *);
> +typedef void
> +(probes_prepare_t)(struct kprobe *, struct arch_specific_insn *);
> +typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
> +
> +enum pc_restore_type {
> + NO_RESTORE,
> + RESTORE_PC,
> +};
> +
> +struct kprobe_pc_restore {
> + enum pc_restore_type type;
> + unsigned long addr;
> +};
> +
> +/* architecture specific copy of original instruction */
> +struct arch_specific_insn {
> + kprobe_opcode_t *insn;
> + kprobes_pstate_check_t *pstate_cc;
> + probes_condition_check_t *check_condn;
> + probes_prepare_t *prepare;
> + kprobes_handler_t *handler;
> + /* restore address after step xol */
> + struct kprobe_pc_restore restore;
> +};
> +
> +#endif
> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
> index 8f440e9..aadf61a 100644
> --- a/arch/arm64/include/asm/ptrace.h
> +++ b/arch/arm64/include/asm/ptrace.h
> @@ -206,7 +206,8 @@ static inline int valid_user_regs(struct user_pt_regs *regs)
> return 0;
> }
>
> -#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
> +#define instruction_pointer(regs) ((regs)->pc)
> +#define stack_pointer(regs) ((regs)->sp)
>
> #ifdef CONFIG_SMP
> extern unsigned long profile_pc(struct pt_regs *regs);
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index 426d076..1319872 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -32,6 +32,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
> arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
> arm64-obj-$(CONFIG_KGDB) += kgdb.o
> +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
> arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
> arm64-obj-$(CONFIG_PCI) += pci.o
> arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
> index b056369..486ee94 100644
> --- a/arch/arm64/kernel/debug-monitors.c
> +++ b/arch/arm64/kernel/debug-monitors.c
> @@ -23,6 +23,7 @@
> #include <linux/hardirq.h>
> #include <linux/init.h>
> #include <linux/ptrace.h>
> +#include <linux/kprobes.h>
> #include <linux/stat.h>
> #include <linux/uaccess.h>
>
> @@ -228,6 +229,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
> struct pt_regs *regs)
> {
> siginfo_t info;
> + bool handler_found = false;
>
> /*
> * If we are stepping a pending breakpoint, call the hw_breakpoint
> @@ -251,15 +253,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
> */
> user_rewind_single_step(current);
> } else {
> +#ifdef CONFIG_KPROBES
> + if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
> + handler_found = true;
> +#endif
> if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
> - return 0;
> -
> - pr_warning("Unexpected kernel single-step exception at EL1\n");
> - /*
> - * Re-enable stepping since we know that we will be
> - * returning to regs.
> - */
> - set_regs_spsr_ss(regs);
> + handler_found = true;
> +
> + if (!handler_found) {
> + pr_warn("Unexpected kernel single-step exception at EL1\n");
> + /*
> + * Re-enable stepping since we know that we will be
> + * returning to regs.
> + */
> + set_regs_spsr_ss(regs);
> + }
> }
>
> return 0;
> @@ -315,8 +323,15 @@ static int brk_handler(unsigned long addr, unsigned int esr,
> };
>
> force_sig_info(SIGTRAP, &info, current);
> - } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
> - pr_warning("Unexpected kernel BRK exception at EL1\n");
> + }
> +#ifdef CONFIG_KPROBES
> + else if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
> + if (kprobe_breakpoint_handler(regs, esr) != DBG_HOOK_HANDLED)
> + return -EFAULT;
> + }
> +#endif
> + else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
> + pr_warn("Unexpected kernel BRK exception at EL1\n");
> return -EFAULT;
> }
>
> diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
> new file mode 100644
> index 0000000..f958c52
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes-arm64.c
> @@ -0,0 +1,68 @@
> +/*
> + * arch/arm64/kernel/kprobes-arm64.c
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/kprobes.h>
> +#include <linux/module.h>
> +#include <asm/kprobes.h>
> +#include <asm/insn.h>
> +
> +#include "kprobes-arm64.h"
> +
> +static bool __kprobes aarch64_insn_is_steppable(u32 insn)
> +{
> + if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
> + if (aarch64_insn_is_branch(insn))
> + return false;
> +
> + /* modification of daif creates issues */
> + if (aarch64_insn_is_daif_access(insn))
> + return false;
> +
> + if (aarch64_insn_is_exception(insn))
> + return false;
> +
> + if (aarch64_insn_is_hint(insn))
> + return aarch64_insn_is_nop(insn);
> +
> + return true;
> + }
> +
> + if (aarch64_insn_uses_literal(insn))
> + return false;
> +
> + if (aarch64_insn_is_exclusive(insn))
> + return false;
> +
> + return true;
> +}
> +
> +/* Return:
> + * INSN_REJECTED If instruction is one not allowed to kprobe,
> + * INSN_GOOD If instruction is supported and uses instruction slot,
> + * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
> + */
> +enum kprobe_insn __kprobes
> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
> +{
> + /*
> + * Instructions reading or modifying the PC won't work from the XOL
> + * slot.
> + */
> + if (aarch64_insn_is_steppable(insn))
> + return INSN_GOOD;
> + else
> + return INSN_REJECTED;
> +}
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> new file mode 100644
> index 0000000..87e7891
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -0,0 +1,28 @@
> +/*
> + * arch/arm64/kernel/kprobes-arm64.h
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KERNEL_KPROBES_ARM64_H
> +#define _ARM_KERNEL_KPROBES_ARM64_H
> +
> +enum kprobe_insn {
> + INSN_REJECTED,
> + INSN_GOOD_NO_SLOT,
> + INSN_GOOD,
> +};
> +
> +enum kprobe_insn __kprobes
> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
> +
> +#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> new file mode 100644
> index 0000000..601d2c6
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -0,0 +1,537 @@
> +/*
> + * arch/arm64/kernel/kprobes.c
> + *
> + * Kprobes support for ARM64
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + * Author: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +#include <linux/kernel.h>
> +#include <linux/kprobes.h>
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/stop_machine.h>
> +#include <linux/stringify.h>
> +#include <asm/traps.h>
> +#include <asm/ptrace.h>
> +#include <asm/cacheflush.h>
> +#include <asm/debug-monitors.h>
> +#include <asm/system_misc.h>
> +#include <asm/insn.h>
> +
> +#include "kprobes.h"
> +#include "kprobes-arm64.h"
> +
> +#define MIN_STACK_SIZE(addr) min((unsigned long)MAX_STACK_SIZE, \
> + (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
> +
> +DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
> +DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
> +
> +static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> +{
> + /* prepare insn slot */
> + p->ainsn.insn[0] = p->opcode;
> +
> + flush_icache_range((uintptr_t) (p->ainsn.insn),
> + (uintptr_t) (p->ainsn.insn) + MAX_INSN_SIZE);
> +
> + /*
> + * Needs restoring of return address after stepping xol.
> + */
> + p->ainsn.restore.addr = (unsigned long) p->addr +
> + sizeof(kprobe_opcode_t);
> + p->ainsn.restore.type = RESTORE_PC;
> +}
> +
> +int __kprobes arch_prepare_kprobe(struct kprobe *p)
> +{
> + kprobe_opcode_t insn;
> + unsigned long probe_addr = (unsigned long)p->addr;
> +
> + /* copy instruction */
> + insn = *p->addr;
> + p->opcode = insn;
> +
> + if (in_exception_text(probe_addr))
> + return -EINVAL;
> +
> + /* decode instruction */
> + switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
> + case INSN_REJECTED: /* insn not supported */
> + return -EINVAL;
> +
> + case INSN_GOOD_NO_SLOT: /* insn need simulation */
> + return -EINVAL;
> +
> + case INSN_GOOD: /* instruction uses slot */
> + p->ainsn.insn = get_insn_slot();
> + if (!p->ainsn.insn)
> + return -ENOMEM;
> + break;
> + };
> +
> + /* prepare the instruction */
> + arch_prepare_ss_slot(p);
> +
> + return 0;
> +}
> +
> +static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
> +{
> + void *addrs[1];
> + u32 insns[1];
> +
> + addrs[0] = (void *)addr;
> + insns[0] = (u32)opcode;
> +
> + return aarch64_insn_patch_text_sync(addrs, insns, 1);
> +}
> +
> +/* arm kprobe: install breakpoint in text */
> +void __kprobes arch_arm_kprobe(struct kprobe *p)
> +{
> + patch_text(p->addr, BRK64_OPCODE_KPROBES);
> +}
> +
> +/* disarm kprobe: remove breakpoint from text */
> +void __kprobes arch_disarm_kprobe(struct kprobe *p)
> +{
> + patch_text(p->addr, p->opcode);
> +}
> +
> +void __kprobes arch_remove_kprobe(struct kprobe *p)
> +{
> + if (p->ainsn.insn) {
> + free_insn_slot(p->ainsn.insn, 0);
> + p->ainsn.insn = NULL;
> + }
> +}
> +
> +static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
> +{
> + kcb->prev_kprobe.kp = kprobe_running();
> + kcb->prev_kprobe.status = kcb->kprobe_status;
> +}
> +
> +static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
> +{
> + __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
> + kcb->kprobe_status = kcb->prev_kprobe.status;
> +}
> +
> +static void __kprobes set_current_kprobe(struct kprobe *p)
> +{
> + __this_cpu_write(current_kprobe, p);
> +}
> +
> +/*
> + * The D-flag (Debug mask) is set (masked) upon exception entry.
> + * Kprobes needs to clear (unmask) D-flag -ONLY- in case of recursive
> + * probe i.e. when probe hit from kprobe handler context upon
> + * executing the pre/post handlers. In this case we return with
> + * D-flag clear so that single-stepping can be carried-out.
> + *
> + * Leave D-flag set in all other cases.
> + */
> +static void __kprobes
> +spsr_set_debug_flag(struct pt_regs *regs, int mask)
> +{
> + unsigned long spsr = regs->pstate;
> +
> + if (mask)
> + spsr |= PSR_D_BIT;
> + else
> + spsr &= ~PSR_D_BIT;
> +
> + regs->pstate = spsr;
> +}
> +
> +/*
> + * Interrupts need to be disabled before single-step mode is set, and not
> + * reenabled until after single-step mode ends.
> + * Without disabling interrupt on local CPU, there is a chance of
> + * interrupt occurrence in the period of exception return and start of
> + * out-of-line single-step, that result in wrongly single stepping
> + * the interrupt handler.
> + */
> +static void __kprobes kprobes_save_local_irqflag(struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + kcb->saved_irqflag = regs->pstate;
> + regs->pstate |= PSR_I_BIT;
> +}
> +
> +static void __kprobes kprobes_restore_local_irqflag(struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + if (kcb->saved_irqflag & PSR_I_BIT)
> + regs->pstate |= PSR_I_BIT;
> + else
> + regs->pstate &= ~PSR_I_BIT;
> +}
> +
> +static void __kprobes
> +set_ss_context(struct kprobe_ctlblk *kcb, unsigned long addr)
> +{
> + kcb->ss_ctx.ss_status = KPROBES_STEP_PENDING;
> + kcb->ss_ctx.match_addr = addr + sizeof(kprobe_opcode_t);
> +}
> +
> +static void __kprobes clear_ss_context(struct kprobe_ctlblk *kcb)
> +{
> + kcb->ss_ctx.ss_status = KPROBES_STEP_NONE;
> + kcb->ss_ctx.match_addr = 0;
> +}
> +
> +static void __kprobes
> +skip_singlestep_missed(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
> +{
> + /* set return addr to next pc to continue */
> + instruction_pointer(regs) += sizeof(kprobe_opcode_t);
> +}
I'm not sure if this is the best approach for skip_singlestep_missed?
If the condition check fails, we have very little to simulate :-), but
I think the user will expect the kprobe to fire?
For instance I have the following memcpy in my kernel:
ffffffc0003b6500 <memcpy>:
ffffffc0003b6500: aa0003e6 mov x6, x0
ffffffc0003b6504: f100405f cmp x2, #0x10
ffffffc0003b6508: 540003c3 b.cc ffffffc0003b6580 <memcpy+0x80>
ffffffc0003b650c: cb0103e4 neg x4, x1
ffffffc0003b6510: f2400c84 ands x4, x4, #0xf
ffffffc0003b6514: 540001c0 b.eq ffffffc0003b654c <memcpy+0x4c>
If I set the following kprobes:
p:kprobes/memcpy1 0xffffffc0003b6500
p:kprobes/memcpy2 0xffffffc0003b6508
So the second kprobe is placed on a conditional instruction.
I get the following statistics from perf:
perf stat -e kprobes:memcpy1 -e kprobes:memcpy2 -a sleep 10
Performance counter stats for 'system wide':
2,001 kprobes:memcpy1
(100.00%)
1,563 kprobes:memcpy2
10.001287601 seconds time elapsed
I (maybe naively) would expect the event counts to be the same? (as
both pc values are "hit").
For a case where the condition check fails, I think we should do something like:
set_current_probe(p);
instruction_pointer(regs) += sizeof(kprobe_opcode_t);
post_kprobe_handler(kcb, regs);
> +
> +static void __kprobes setup_singlestep(struct kprobe *p,
> + struct pt_regs *regs,
> + struct kprobe_ctlblk *kcb, int reenter)
> +{
> + unsigned long slot;
> +
> + if (reenter) {
> + save_previous_kprobe(kcb);
> + set_current_kprobe(p);
> + kcb->kprobe_status = KPROBE_REENTER;
> + } else {
> + kcb->kprobe_status = KPROBE_HIT_SS;
> + }
> +
> + if (p->ainsn.insn) {
> + /* prepare for single stepping */
> + slot = (unsigned long)p->ainsn.insn;
> +
> + set_ss_context(kcb, slot); /* mark pending ss */
> +
> + if (kcb->kprobe_status == KPROBE_REENTER)
> + spsr_set_debug_flag(regs, 0);
> +
> + /* IRQs and single stepping do not mix well. */
> + kprobes_save_local_irqflag(regs);
> + kernel_enable_single_step(regs);
> + instruction_pointer(regs) = slot;
> + } else {
> + BUG();
> + }
> +}
> +
> +static int __kprobes reenter_kprobe(struct kprobe *p,
> + struct pt_regs *regs,
> + struct kprobe_ctlblk *kcb)
> +{
> + switch (kcb->kprobe_status) {
> + case KPROBE_HIT_SSDONE:
> + case KPROBE_HIT_ACTIVE:
> + if (!p->ainsn.check_condn || p->ainsn.check_condn(p, regs)) {
> + kprobes_inc_nmissed_count(p);
> + setup_singlestep(p, regs, kcb, 1);
> + } else {
> + /* condition check failed, skip stepping */
> + skip_singlestep_missed(kcb, regs);
> + }
> + break;
> + case KPROBE_HIT_SS:
> + case KPROBE_REENTER:
> + pr_warn("Unrecoverable kprobe detected at %p.\n", p->addr);
> + dump_kprobe(p);
> + BUG();
> + break;
> + default:
> + WARN_ON(1);
> + return 0;
> + }
> +
> + return 1;
> +}
> +
> +static void __kprobes
> +post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
> +{
> + struct kprobe *cur = kprobe_running();
> +
> + if (!cur)
> + return;
> +
> + /* return addr restore if non-branching insn */
> + if (cur->ainsn.restore.type == RESTORE_PC) {
> + instruction_pointer(regs) = cur->ainsn.restore.addr;
> + if (!instruction_pointer(regs))
> + BUG();
> + }
> +
> + /* restore back original saved kprobe variables and continue */
> + if (kcb->kprobe_status == KPROBE_REENTER) {
> + restore_previous_kprobe(kcb);
> + return;
> + }
> + /* call post handler */
> + kcb->kprobe_status = KPROBE_HIT_SSDONE;
> + if (cur->post_handler) {
> + /* post_handler can hit breakpoint and single step
> + * again, so we enable D-flag for recursive exception.
> + */
> + cur->post_handler(cur, regs, 0);
> + }
> +
> + reset_current_kprobe();
> +}
> +
> +int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
> +{
> + struct kprobe *cur = kprobe_running();
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + switch (kcb->kprobe_status) {
> + case KPROBE_HIT_SS:
> + case KPROBE_REENTER:
> + /*
> + * We are here because the instruction being single
> + * stepped caused a page fault. We reset the current
> + * kprobe and the ip points back to the probe address
> + * and allow the page fault handler to continue as a
> + * normal page fault.
> + */
> + instruction_pointer(regs) = (unsigned long)cur->addr;
> + if (!instruction_pointer(regs))
> + BUG();
> + if (kcb->kprobe_status == KPROBE_REENTER)
> + restore_previous_kprobe(kcb);
> + else
> + reset_current_kprobe();
> +
> + break;
> + case KPROBE_HIT_ACTIVE:
> + case KPROBE_HIT_SSDONE:
> + /*
> + * We increment the nmissed count for accounting,
> + * we can also use npre/npostfault count for accounting
> + * these specific fault cases.
> + */
> + kprobes_inc_nmissed_count(cur);
> +
> + /*
> + * We come here because instructions in the pre/post
> + * handler caused the page_fault, this could happen
> + * if handler tries to access user space by
> + * copy_from_user(), get_user() etc. Let the
> + * user-specified handler try to fix it first.
> + */
> + if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
> + return 1;
> +
> + /*
> + * In case the user-specified fault handler returned
> + * zero, try to fix up.
> + */
> + if (fixup_exception(regs))
> + return 1;
> +
> + break;
> + }
> + return 0;
> +}
> +
> +int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
> + unsigned long val, void *data)
> +{
> + return NOTIFY_DONE;
> +}
> +
> +void __kprobes kprobe_handler(struct pt_regs *regs)
> +{
> + struct kprobe *p, *cur;
> + struct kprobe_ctlblk *kcb;
> + unsigned long addr = instruction_pointer(regs);
> +
> + kcb = get_kprobe_ctlblk();
> + cur = kprobe_running();
> +
> + p = get_kprobe((kprobe_opcode_t *) addr);
> +
> + if (p) {
> + if (cur) {
> + if (reenter_kprobe(p, regs, kcb))
> + return;
> + } else if (!p->ainsn.check_condn ||
> + p->ainsn.check_condn(p, regs)) {
> + /* Probe hit and conditional execution check ok. */
> + set_current_kprobe(p);
> + kcb->kprobe_status = KPROBE_HIT_ACTIVE;
> +
> + /*
> + * If we have no pre-handler or it returned 0, we
> + * continue with normal processing. If we have a
> + * pre-handler and it returned non-zero, it prepped
> + * for calling the break_handler below on re-entry,
> + * so get out doing nothing more here.
> + *
> + * pre_handler can hit a breakpoint and can step thru
> + * before return, keep PSTATE D-flag enabled until
> + * pre_handler return back.
> + */
> + if (!p->pre_handler || !p->pre_handler(p, regs)) {
> + kcb->kprobe_status = KPROBE_HIT_SS;
> + setup_singlestep(p, regs, kcb, 0);
> + return;
> + }
> + } else {
> + /*
> + * Breakpoint hit but conditional check failed,
> + * so just skip the instruction (NOP behaviour)
> + */
> + skip_singlestep_missed(kcb, regs);
> + return;
> + }
> + } else if (*(kprobe_opcode_t *) addr != BRK64_OPCODE_KPROBES) {
> + /*
> + * The breakpoint instruction was removed right
> + * after we hit it. Another cpu has removed
> + * either a probepoint or a debugger breakpoint
> + * at this address. In either case, no further
> + * handling of this interrupt is appropriate.
> + * Return back to original instruction, and continue.
> + */
> + return;
> + } else if (cur) {
> + /* We probably hit a jprobe. Call its break handler. */
> + if (cur->break_handler && cur->break_handler(cur, regs)) {
> + kcb->kprobe_status = KPROBE_HIT_SS;
> + setup_singlestep(cur, regs, kcb, 0);
> + return;
> + }
> + } else {
> + /* breakpoint is removed, now in a race
> + * Return back to original instruction & continue.
> + */
> + }
> +}
> +
> +static int __kprobes
> +kprobe_ss_hit(struct kprobe_ctlblk *kcb, unsigned long addr)
> +{
> + if ((kcb->ss_ctx.ss_status == KPROBES_STEP_PENDING)
> + && (kcb->ss_ctx.match_addr == addr)) {
> + clear_ss_context(kcb); /* clear pending ss */
> + return DBG_HOOK_HANDLED;
> + }
> + /* not ours, kprobes should ignore it */
> + return DBG_HOOK_ERROR;
> +}
> +
> +int __kprobes
> +kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> + int retval;
> +
> + /* return error if this is not our step */
> + retval = kprobe_ss_hit(kcb, instruction_pointer(regs));
> +
> + if (retval == DBG_HOOK_HANDLED) {
> + kprobes_restore_local_irqflag(regs);
> + kernel_disable_single_step();
> +
> + if (kcb->kprobe_status == KPROBE_REENTER)
> + spsr_set_debug_flag(regs, 1);
> +
> + post_kprobe_handler(kcb, regs);
> + }
> +
> + return retval;
> +}
> +
> +int __kprobes
> +kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
> +{
> + kprobe_handler(regs);
> + return DBG_HOOK_HANDLED;
> +}
> +
> +int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct jprobe *jp = container_of(p, struct jprobe, kp);
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> + long stack_ptr = stack_pointer(regs);
> +
> + kcb->jprobe_saved_regs = *regs;
> + memcpy(kcb->jprobes_stack, (void *)stack_ptr,
> + MIN_STACK_SIZE(stack_ptr));
> +
> + instruction_pointer(regs) = (long)jp->entry;
> + preempt_disable();
> + return 1;
> +}
> +
> +void __kprobes jprobe_return(void)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + /*
> + * Jprobe handler return by entering break exception,
> + * encoded same as kprobe, but with following conditions
> + * -a magic number in x0 to identify from rest of other kprobes.
> + * -restore stack addr to original saved pt_regs
> + */
> + asm volatile ("ldr x0, [%0]\n\t"
> + "mov sp, x0\n\t"
> + "ldr x0, =" __stringify(JPROBES_MAGIC_NUM) "\n\t"
> + "BRK %1\n\t"
> + "NOP\n\t"
> + :
> + : "r"(&kcb->jprobe_saved_regs.sp),
> + "I"(BRK64_ESR_KPROBES)
> + : "memory");
> +}
> +
> +int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> + long stack_addr = kcb->jprobe_saved_regs.sp;
> + long orig_sp = stack_pointer(regs);
> + struct jprobe *jp = container_of(p, struct jprobe, kp);
> +
> + if (regs->regs[0] == JPROBES_MAGIC_NUM) {
> + if (orig_sp != stack_addr) {
> + struct pt_regs *saved_regs =
> + (struct pt_regs *)kcb->jprobe_saved_regs.sp;
> + pr_err("current sp %lx does not match saved sp %lx\n",
> + orig_sp, stack_addr);
> + pr_err("Saved registers for jprobe %p\n", jp);
> + show_regs(saved_regs);
> + pr_err("Current registers\n");
> + show_regs(regs);
> + BUG();
> + }
> + *regs = kcb->jprobe_saved_regs;
> + memcpy((void *)stack_addr, kcb->jprobes_stack,
> + MIN_STACK_SIZE(stack_addr));
> + preempt_enable_no_resched();
> + return 1;
> + }
> + return 0;
> +}
> +
> +int __init arch_init_kprobes(void)
> +{
> + return 0;
> +}
> diff --git a/arch/arm64/kernel/kprobes.h b/arch/arm64/kernel/kprobes.h
> new file mode 100644
> index 0000000..e98ad60
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes.h
> @@ -0,0 +1,24 @@
> +/*
> + * arch/arm64/kernel/kprobes.h
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KERNEL_KPROBES_H
> +#define _ARM_KERNEL_KPROBES_H
> +
> +#define JPROBES_MAGIC_NUM 0xa5a5a5a5a5a5a5a5
> +
> +/* Move this out to appropriate header file */
> +int fixup_exception(struct pt_regs *regs);
> +
> +#endif /* _ARM_KERNEL_KPROBES_H */
> diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
> index a2c2986..2da5f4e 100644
> --- a/arch/arm64/kernel/vmlinux.lds.S
> +++ b/arch/arm64/kernel/vmlinux.lds.S
> @@ -94,6 +94,7 @@ SECTIONS
> TEXT_TEXT
> SCHED_TEXT
> LOCK_TEXT
> + KPROBES_TEXT
> HYPERVISOR_TEXT
> *(.fixup)
> *(.gnu.warning)
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index 96da131..4c13dfb 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -39,6 +39,28 @@
>
> static const char *fault_name(unsigned int esr);
>
> +#ifdef CONFIG_KPROBES
> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
> +{
> + int ret = 0;
> +
> + /* kprobe_running() needs smp_processor_id() */
> + if (!user_mode(regs)) {
> + preempt_disable();
> + if (kprobe_running() && kprobe_fault_handler(regs, esr))
> + ret = 1;
> + preempt_enable();
> + }
> +
> + return ret;
> +}
> +#else
> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
> +{
> + return 0;
> +}
> +#endif
> +
> /*
> * Dump out the page tables associated with 'addr' in mm 'mm'.
> */
> @@ -200,6 +222,9 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
> unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
> unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
>
> + if (notify_page_fault(regs, esr))
> + return 0;
> +
> tsk = current;
> mm = tsk->mm;
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 3/7] arm64: Kprobes with single stepping support
@ 2015-06-29 17:24 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:24 UTC (permalink / raw)
To: linux-arm-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>
> Add support for basic kernel probes(kprobes) and jump probes
> (jprobes) for ARM64.
>
> Kprobes utilizes software breakpoint and single step debug
> exceptions supported on ARM v8.
>
> A software breakpoint is placed at the probe address to trap the
> kernel execution into the kprobe handler.
>
> ARM v8 supports enabling single stepping before the break exception
> return (ERET), with next PC in exception return address (ELR_EL1). The
> kprobe handler prepares an executable memory slot for out-of-line
> execution with a copy of the original instruction being probed, and
> enables single stepping. The PC is set to the out-of-line slot address
> before the ERET. With this scheme, the instruction is executed with the
> exact same register context except for the PC (and DAIF) registers.
>
> Debug mask (PSTATE.D) is enabled only when single stepping a recursive
> kprobe, e.g.: during kprobes reenter so that probed instruction can be
> single stepped within the kprobe handler -exception- context.
> The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
> any further re-entry is prevented by not calling handlers and the case
> counted as a missed kprobe).
>
> Single stepping from the x-o-l slot has a drawback for PC-relative accesses
> like branching and symbolic literals access as the offset from the new PC
> (slot address) may not be ensured to fit in the immediate value of
> the opcode. Such instructions need simulation, so reject
> probing them.
>
> Instructions generating exceptions or cpu mode change are rejected
> for probing.
>
> Instructions using Exclusive Monitor are rejected too.
>
> System instructions are mostly enabled for stepping, except MSR/MRS
> accesses to "DAIF" flags in PSTATE, which are not safe for
> probing.
>
> Thanks to Steve Capper and Pratyush Anand for several suggested
> Changes.
>
> Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
> Signed-off-by: Steve Capper <steve.capper@linaro.org>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/debug-monitors.h | 5 +
> arch/arm64/include/asm/kprobes.h | 62 ++++
> arch/arm64/include/asm/probes.h | 50 +++
> arch/arm64/include/asm/ptrace.h | 3 +-
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/debug-monitors.c | 35 ++-
> arch/arm64/kernel/kprobes-arm64.c | 68 ++++
> arch/arm64/kernel/kprobes-arm64.h | 28 ++
> arch/arm64/kernel/kprobes.c | 537 ++++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.h | 24 ++
> arch/arm64/kernel/vmlinux.lds.S | 1 +
> arch/arm64/mm/fault.c | 25 ++
> 13 files changed, 829 insertions(+), 11 deletions(-)
> create mode 100644 arch/arm64/include/asm/kprobes.h
> create mode 100644 arch/arm64/include/asm/probes.h
> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
> create mode 100644 arch/arm64/kernel/kprobes.c
> create mode 100644 arch/arm64/kernel/kprobes.h
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 966091f..45a9bd81 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -71,6 +71,7 @@ config ARM64
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_RCU_TABLE_FREE
> select HAVE_SYSCALL_TRACEPOINTS
> + select HAVE_KPROBES
> select IRQ_DOMAIN
> select MODULES_USE_ELF_RELA
> select NO_BOOTMEM
> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
> index 40ec68a..92d7cea 100644
> --- a/arch/arm64/include/asm/debug-monitors.h
> +++ b/arch/arm64/include/asm/debug-monitors.h
> @@ -90,6 +90,11 @@
>
> #define CACHE_FLUSH_IS_SAFE 1
>
> +/* kprobes BRK opcodes with ESR encoding */
> +#define BRK64_ESR_MASK 0xFFFF
> +#define BRK64_ESR_KPROBES 0x0004
> +#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
> +
> /* AArch32 */
> #define DBG_ESR_EVT_BKPT 0x4
> #define DBG_ESR_EVT_VECC 0x5
> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
> new file mode 100644
> index 0000000..af31c4d
> --- /dev/null
> +++ b/arch/arm64/include/asm/kprobes.h
> @@ -0,0 +1,62 @@
> +/*
> + * arch/arm64/include/asm/kprobes.h
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KPROBES_H
> +#define _ARM_KPROBES_H
> +
> +#include <linux/types.h>
> +#include <linux/ptrace.h>
> +#include <linux/percpu.h>
> +
> +#define __ARCH_WANT_KPROBES_INSN_SLOT
> +#define MAX_INSN_SIZE 1
> +#define MAX_STACK_SIZE 128
> +
> +#define flush_insn_slot(p) do { } while (0)
> +#define kretprobe_blacklist_size 0
> +
> +#include <asm/probes.h>
> +
> +struct prev_kprobe {
> + struct kprobe *kp;
> + unsigned int status;
> +};
> +
> +/* Single step context for kprobe */
> +struct kprobe_step_ctx {
> +#define KPROBES_STEP_NONE 0x0
> +#define KPROBES_STEP_PENDING 0x1
> + unsigned long ss_status;
> + unsigned long match_addr;
> +};
> +
> +/* per-cpu kprobe control block */
> +struct kprobe_ctlblk {
> + unsigned int kprobe_status;
> + unsigned long saved_irqflag;
> + struct prev_kprobe prev_kprobe;
> + struct kprobe_step_ctx ss_ctx;
> + struct pt_regs jprobe_saved_regs;
> + char jprobes_stack[MAX_STACK_SIZE];
> +};
> +
> +void arch_remove_kprobe(struct kprobe *);
> +int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
> +int kprobe_exceptions_notify(struct notifier_block *self,
> + unsigned long val, void *data);
> +int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
> +int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
> +
> +#endif /* _ARM_KPROBES_H */
> diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h
> new file mode 100644
> index 0000000..7f5a27f
> --- /dev/null
> +++ b/arch/arm64/include/asm/probes.h
> @@ -0,0 +1,50 @@
> +/*
> + * arch/arm64/include/asm/probes.h
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +#ifndef _ARM_PROBES_H
> +#define _ARM_PROBES_H
> +
> +struct kprobe;
> +struct arch_specific_insn;
> +
> +typedef u32 kprobe_opcode_t;
> +typedef unsigned long (kprobes_pstate_check_t)(unsigned long);
> +typedef unsigned long
> +(probes_condition_check_t)(struct kprobe *p, struct pt_regs *);
> +typedef void
> +(probes_prepare_t)(struct kprobe *, struct arch_specific_insn *);
> +typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
> +
> +enum pc_restore_type {
> + NO_RESTORE,
> + RESTORE_PC,
> +};
> +
> +struct kprobe_pc_restore {
> + enum pc_restore_type type;
> + unsigned long addr;
> +};
> +
> +/* architecture specific copy of original instruction */
> +struct arch_specific_insn {
> + kprobe_opcode_t *insn;
> + kprobes_pstate_check_t *pstate_cc;
> + probes_condition_check_t *check_condn;
> + probes_prepare_t *prepare;
> + kprobes_handler_t *handler;
> + /* restore address after step xol */
> + struct kprobe_pc_restore restore;
> +};
> +
> +#endif
> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
> index 8f440e9..aadf61a 100644
> --- a/arch/arm64/include/asm/ptrace.h
> +++ b/arch/arm64/include/asm/ptrace.h
> @@ -206,7 +206,8 @@ static inline int valid_user_regs(struct user_pt_regs *regs)
> return 0;
> }
>
> -#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
> +#define instruction_pointer(regs) ((regs)->pc)
> +#define stack_pointer(regs) ((regs)->sp)
>
> #ifdef CONFIG_SMP
> extern unsigned long profile_pc(struct pt_regs *regs);
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index 426d076..1319872 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -32,6 +32,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
> arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
> arm64-obj-$(CONFIG_KGDB) += kgdb.o
> +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
> arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
> arm64-obj-$(CONFIG_PCI) += pci.o
> arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
> index b056369..486ee94 100644
> --- a/arch/arm64/kernel/debug-monitors.c
> +++ b/arch/arm64/kernel/debug-monitors.c
> @@ -23,6 +23,7 @@
> #include <linux/hardirq.h>
> #include <linux/init.h>
> #include <linux/ptrace.h>
> +#include <linux/kprobes.h>
> #include <linux/stat.h>
> #include <linux/uaccess.h>
>
> @@ -228,6 +229,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
> struct pt_regs *regs)
> {
> siginfo_t info;
> + bool handler_found = false;
>
> /*
> * If we are stepping a pending breakpoint, call the hw_breakpoint
> @@ -251,15 +253,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
> */
> user_rewind_single_step(current);
> } else {
> +#ifdef CONFIG_KPROBES
> + if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
> + handler_found = true;
> +#endif
> if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
> - return 0;
> -
> - pr_warning("Unexpected kernel single-step exception at EL1\n");
> - /*
> - * Re-enable stepping since we know that we will be
> - * returning to regs.
> - */
> - set_regs_spsr_ss(regs);
> + handler_found = true;
> +
> + if (!handler_found) {
> + pr_warn("Unexpected kernel single-step exception at EL1\n");
> + /*
> + * Re-enable stepping since we know that we will be
> + * returning to regs.
> + */
> + set_regs_spsr_ss(regs);
> + }
> }
>
> return 0;
> @@ -315,8 +323,15 @@ static int brk_handler(unsigned long addr, unsigned int esr,
> };
>
> force_sig_info(SIGTRAP, &info, current);
> - } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
> - pr_warning("Unexpected kernel BRK exception at EL1\n");
> + }
> +#ifdef CONFIG_KPROBES
> + else if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
> + if (kprobe_breakpoint_handler(regs, esr) != DBG_HOOK_HANDLED)
> + return -EFAULT;
> + }
> +#endif
> + else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
> + pr_warn("Unexpected kernel BRK exception at EL1\n");
> return -EFAULT;
> }
>
> diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
> new file mode 100644
> index 0000000..f958c52
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes-arm64.c
> @@ -0,0 +1,68 @@
> +/*
> + * arch/arm64/kernel/kprobes-arm64.c
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/kprobes.h>
> +#include <linux/module.h>
> +#include <asm/kprobes.h>
> +#include <asm/insn.h>
> +
> +#include "kprobes-arm64.h"
> +
> +static bool __kprobes aarch64_insn_is_steppable(u32 insn)
> +{
> + if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
> + if (aarch64_insn_is_branch(insn))
> + return false;
> +
> + /* modification of daif creates issues */
> + if (aarch64_insn_is_daif_access(insn))
> + return false;
> +
> + if (aarch64_insn_is_exception(insn))
> + return false;
> +
> + if (aarch64_insn_is_hint(insn))
> + return aarch64_insn_is_nop(insn);
> +
> + return true;
> + }
> +
> + if (aarch64_insn_uses_literal(insn))
> + return false;
> +
> + if (aarch64_insn_is_exclusive(insn))
> + return false;
> +
> + return true;
> +}
> +
> +/* Return:
> + * INSN_REJECTED If instruction is one not allowed to kprobe,
> + * INSN_GOOD If instruction is supported and uses instruction slot,
> + * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
> + */
> +enum kprobe_insn __kprobes
> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
> +{
> + /*
> + * Instructions reading or modifying the PC won't work from the XOL
> + * slot.
> + */
> + if (aarch64_insn_is_steppable(insn))
> + return INSN_GOOD;
> + else
> + return INSN_REJECTED;
> +}
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> new file mode 100644
> index 0000000..87e7891
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -0,0 +1,28 @@
> +/*
> + * arch/arm64/kernel/kprobes-arm64.h
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KERNEL_KPROBES_ARM64_H
> +#define _ARM_KERNEL_KPROBES_ARM64_H
> +
> +enum kprobe_insn {
> + INSN_REJECTED,
> + INSN_GOOD_NO_SLOT,
> + INSN_GOOD,
> +};
> +
> +enum kprobe_insn __kprobes
> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
> +
> +#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> new file mode 100644
> index 0000000..601d2c6
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -0,0 +1,537 @@
> +/*
> + * arch/arm64/kernel/kprobes.c
> + *
> + * Kprobes support for ARM64
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + * Author: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + */
> +#include <linux/kernel.h>
> +#include <linux/kprobes.h>
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/stop_machine.h>
> +#include <linux/stringify.h>
> +#include <asm/traps.h>
> +#include <asm/ptrace.h>
> +#include <asm/cacheflush.h>
> +#include <asm/debug-monitors.h>
> +#include <asm/system_misc.h>
> +#include <asm/insn.h>
> +
> +#include "kprobes.h"
> +#include "kprobes-arm64.h"
> +
> +#define MIN_STACK_SIZE(addr) min((unsigned long)MAX_STACK_SIZE, \
> + (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
> +
> +DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
> +DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
> +
> +static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> +{
> + /* prepare insn slot */
> + p->ainsn.insn[0] = p->opcode;
> +
> + flush_icache_range((uintptr_t) (p->ainsn.insn),
> + (uintptr_t) (p->ainsn.insn) + MAX_INSN_SIZE);
> +
> + /*
> + * Needs restoring of return address after stepping xol.
> + */
> + p->ainsn.restore.addr = (unsigned long) p->addr +
> + sizeof(kprobe_opcode_t);
> + p->ainsn.restore.type = RESTORE_PC;
> +}
> +
> +int __kprobes arch_prepare_kprobe(struct kprobe *p)
> +{
> + kprobe_opcode_t insn;
> + unsigned long probe_addr = (unsigned long)p->addr;
> +
> + /* copy instruction */
> + insn = *p->addr;
> + p->opcode = insn;
> +
> + if (in_exception_text(probe_addr))
> + return -EINVAL;
> +
> + /* decode instruction */
> + switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
> + case INSN_REJECTED: /* insn not supported */
> + return -EINVAL;
> +
> + case INSN_GOOD_NO_SLOT: /* insn need simulation */
> + return -EINVAL;
> +
> + case INSN_GOOD: /* instruction uses slot */
> + p->ainsn.insn = get_insn_slot();
> + if (!p->ainsn.insn)
> + return -ENOMEM;
> + break;
> + };
> +
> + /* prepare the instruction */
> + arch_prepare_ss_slot(p);
> +
> + return 0;
> +}
> +
> +static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
> +{
> + void *addrs[1];
> + u32 insns[1];
> +
> + addrs[0] = (void *)addr;
> + insns[0] = (u32)opcode;
> +
> + return aarch64_insn_patch_text_sync(addrs, insns, 1);
> +}
> +
> +/* arm kprobe: install breakpoint in text */
> +void __kprobes arch_arm_kprobe(struct kprobe *p)
> +{
> + patch_text(p->addr, BRK64_OPCODE_KPROBES);
> +}
> +
> +/* disarm kprobe: remove breakpoint from text */
> +void __kprobes arch_disarm_kprobe(struct kprobe *p)
> +{
> + patch_text(p->addr, p->opcode);
> +}
> +
> +void __kprobes arch_remove_kprobe(struct kprobe *p)
> +{
> + if (p->ainsn.insn) {
> + free_insn_slot(p->ainsn.insn, 0);
> + p->ainsn.insn = NULL;
> + }
> +}
> +
> +static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
> +{
> + kcb->prev_kprobe.kp = kprobe_running();
> + kcb->prev_kprobe.status = kcb->kprobe_status;
> +}
> +
> +static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
> +{
> + __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
> + kcb->kprobe_status = kcb->prev_kprobe.status;
> +}
> +
> +static void __kprobes set_current_kprobe(struct kprobe *p)
> +{
> + __this_cpu_write(current_kprobe, p);
> +}
> +
> +/*
> + * The D-flag (Debug mask) is set (masked) upon exception entry.
> + * Kprobes needs to clear (unmask) D-flag -ONLY- in case of recursive
> + * probe i.e. when probe hit from kprobe handler context upon
> + * executing the pre/post handlers. In this case we return with
> + * D-flag clear so that single-stepping can be carried-out.
> + *
> + * Leave D-flag set in all other cases.
> + */
> +static void __kprobes
> +spsr_set_debug_flag(struct pt_regs *regs, int mask)
> +{
> + unsigned long spsr = regs->pstate;
> +
> + if (mask)
> + spsr |= PSR_D_BIT;
> + else
> + spsr &= ~PSR_D_BIT;
> +
> + regs->pstate = spsr;
> +}
> +
> +/*
> + * Interrupts need to be disabled before single-step mode is set, and not
> + * reenabled until after single-step mode ends.
> + * Without disabling interrupt on local CPU, there is a chance of
> + * interrupt occurrence in the period of exception return and start of
> + * out-of-line single-step, that result in wrongly single stepping
> + * the interrupt handler.
> + */
> +static void __kprobes kprobes_save_local_irqflag(struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + kcb->saved_irqflag = regs->pstate;
> + regs->pstate |= PSR_I_BIT;
> +}
> +
> +static void __kprobes kprobes_restore_local_irqflag(struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + if (kcb->saved_irqflag & PSR_I_BIT)
> + regs->pstate |= PSR_I_BIT;
> + else
> + regs->pstate &= ~PSR_I_BIT;
> +}
> +
> +static void __kprobes
> +set_ss_context(struct kprobe_ctlblk *kcb, unsigned long addr)
> +{
> + kcb->ss_ctx.ss_status = KPROBES_STEP_PENDING;
> + kcb->ss_ctx.match_addr = addr + sizeof(kprobe_opcode_t);
> +}
> +
> +static void __kprobes clear_ss_context(struct kprobe_ctlblk *kcb)
> +{
> + kcb->ss_ctx.ss_status = KPROBES_STEP_NONE;
> + kcb->ss_ctx.match_addr = 0;
> +}
> +
> +static void __kprobes
> +skip_singlestep_missed(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
> +{
> + /* set return addr to next pc to continue */
> + instruction_pointer(regs) += sizeof(kprobe_opcode_t);
> +}
I'm not sure if this is the best approach for skip_singlestep_missed?
If the condition check fails, we have very little to simulate :-), but
I think the user will expect the kprobe to fire?
For instance I have the following memcpy in my kernel:
ffffffc0003b6500 <memcpy>:
ffffffc0003b6500: aa0003e6 mov x6, x0
ffffffc0003b6504: f100405f cmp x2, #0x10
ffffffc0003b6508: 540003c3 b.cc ffffffc0003b6580 <memcpy+0x80>
ffffffc0003b650c: cb0103e4 neg x4, x1
ffffffc0003b6510: f2400c84 ands x4, x4, #0xf
ffffffc0003b6514: 540001c0 b.eq ffffffc0003b654c <memcpy+0x4c>
If I set the following kprobes:
p:kprobes/memcpy1 0xffffffc0003b6500
p:kprobes/memcpy2 0xffffffc0003b6508
So the second kprobe is placed on a conditional instruction.
I get the following statistics from perf:
perf stat -e kprobes:memcpy1 -e kprobes:memcpy2 -a sleep 10
Performance counter stats for 'system wide':
2,001 kprobes:memcpy1
(100.00%)
1,563 kprobes:memcpy2
10.001287601 seconds time elapsed
I (maybe naively) would expect the event counts to be the same? (as
both pc values are "hit").
For a case where the condition check fails, I think we should do something like:
set_current_probe(p);
instruction_pointer(regs) += sizeof(kprobe_opcode_t);
post_kprobe_handler(kcb, regs);
> +
> +static void __kprobes setup_singlestep(struct kprobe *p,
> + struct pt_regs *regs,
> + struct kprobe_ctlblk *kcb, int reenter)
> +{
> + unsigned long slot;
> +
> + if (reenter) {
> + save_previous_kprobe(kcb);
> + set_current_kprobe(p);
> + kcb->kprobe_status = KPROBE_REENTER;
> + } else {
> + kcb->kprobe_status = KPROBE_HIT_SS;
> + }
> +
> + if (p->ainsn.insn) {
> + /* prepare for single stepping */
> + slot = (unsigned long)p->ainsn.insn;
> +
> + set_ss_context(kcb, slot); /* mark pending ss */
> +
> + if (kcb->kprobe_status == KPROBE_REENTER)
> + spsr_set_debug_flag(regs, 0);
> +
> + /* IRQs and single stepping do not mix well. */
> + kprobes_save_local_irqflag(regs);
> + kernel_enable_single_step(regs);
> + instruction_pointer(regs) = slot;
> + } else {
> + BUG();
> + }
> +}
> +
> +static int __kprobes reenter_kprobe(struct kprobe *p,
> + struct pt_regs *regs,
> + struct kprobe_ctlblk *kcb)
> +{
> + switch (kcb->kprobe_status) {
> + case KPROBE_HIT_SSDONE:
> + case KPROBE_HIT_ACTIVE:
> + if (!p->ainsn.check_condn || p->ainsn.check_condn(p, regs)) {
> + kprobes_inc_nmissed_count(p);
> + setup_singlestep(p, regs, kcb, 1);
> + } else {
> + /* condition check failed, skip stepping */
> + skip_singlestep_missed(kcb, regs);
> + }
> + break;
> + case KPROBE_HIT_SS:
> + case KPROBE_REENTER:
> + pr_warn("Unrecoverable kprobe detected at %p.\n", p->addr);
> + dump_kprobe(p);
> + BUG();
> + break;
> + default:
> + WARN_ON(1);
> + return 0;
> + }
> +
> + return 1;
> +}
> +
> +static void __kprobes
> +post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
> +{
> + struct kprobe *cur = kprobe_running();
> +
> + if (!cur)
> + return;
> +
> + /* return addr restore if non-branching insn */
> + if (cur->ainsn.restore.type == RESTORE_PC) {
> + instruction_pointer(regs) = cur->ainsn.restore.addr;
> + if (!instruction_pointer(regs))
> + BUG();
> + }
> +
> + /* restore back original saved kprobe variables and continue */
> + if (kcb->kprobe_status == KPROBE_REENTER) {
> + restore_previous_kprobe(kcb);
> + return;
> + }
> + /* call post handler */
> + kcb->kprobe_status = KPROBE_HIT_SSDONE;
> + if (cur->post_handler) {
> + /* post_handler can hit breakpoint and single step
> + * again, so we enable D-flag for recursive exception.
> + */
> + cur->post_handler(cur, regs, 0);
> + }
> +
> + reset_current_kprobe();
> +}
> +
> +int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
> +{
> + struct kprobe *cur = kprobe_running();
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + switch (kcb->kprobe_status) {
> + case KPROBE_HIT_SS:
> + case KPROBE_REENTER:
> + /*
> + * We are here because the instruction being single
> + * stepped caused a page fault. We reset the current
> + * kprobe and the ip points back to the probe address
> + * and allow the page fault handler to continue as a
> + * normal page fault.
> + */
> + instruction_pointer(regs) = (unsigned long)cur->addr;
> + if (!instruction_pointer(regs))
> + BUG();
> + if (kcb->kprobe_status == KPROBE_REENTER)
> + restore_previous_kprobe(kcb);
> + else
> + reset_current_kprobe();
> +
> + break;
> + case KPROBE_HIT_ACTIVE:
> + case KPROBE_HIT_SSDONE:
> + /*
> + * We increment the nmissed count for accounting,
> + * we can also use npre/npostfault count for accounting
> + * these specific fault cases.
> + */
> + kprobes_inc_nmissed_count(cur);
> +
> + /*
> + * We come here because instructions in the pre/post
> + * handler caused the page_fault, this could happen
> + * if handler tries to access user space by
> + * copy_from_user(), get_user() etc. Let the
> + * user-specified handler try to fix it first.
> + */
> + if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
> + return 1;
> +
> + /*
> + * In case the user-specified fault handler returned
> + * zero, try to fix up.
> + */
> + if (fixup_exception(regs))
> + return 1;
> +
> + break;
> + }
> + return 0;
> +}
> +
> +int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
> + unsigned long val, void *data)
> +{
> + return NOTIFY_DONE;
> +}
> +
> +void __kprobes kprobe_handler(struct pt_regs *regs)
> +{
> + struct kprobe *p, *cur;
> + struct kprobe_ctlblk *kcb;
> + unsigned long addr = instruction_pointer(regs);
> +
> + kcb = get_kprobe_ctlblk();
> + cur = kprobe_running();
> +
> + p = get_kprobe((kprobe_opcode_t *) addr);
> +
> + if (p) {
> + if (cur) {
> + if (reenter_kprobe(p, regs, kcb))
> + return;
> + } else if (!p->ainsn.check_condn ||
> + p->ainsn.check_condn(p, regs)) {
> + /* Probe hit and conditional execution check ok. */
> + set_current_kprobe(p);
> + kcb->kprobe_status = KPROBE_HIT_ACTIVE;
> +
> + /*
> + * If we have no pre-handler or it returned 0, we
> + * continue with normal processing. If we have a
> + * pre-handler and it returned non-zero, it prepped
> + * for calling the break_handler below on re-entry,
> + * so get out doing nothing more here.
> + *
> + * pre_handler can hit a breakpoint and can step thru
> + * before return, keep PSTATE D-flag enabled until
> + * pre_handler return back.
> + */
> + if (!p->pre_handler || !p->pre_handler(p, regs)) {
> + kcb->kprobe_status = KPROBE_HIT_SS;
> + setup_singlestep(p, regs, kcb, 0);
> + return;
> + }
> + } else {
> + /*
> + * Breakpoint hit but conditional check failed,
> + * so just skip the instruction (NOP behaviour)
> + */
> + skip_singlestep_missed(kcb, regs);
> + return;
> + }
> + } else if (*(kprobe_opcode_t *) addr != BRK64_OPCODE_KPROBES) {
> + /*
> + * The breakpoint instruction was removed right
> + * after we hit it. Another cpu has removed
> + * either a probepoint or a debugger breakpoint
> + * at this address. In either case, no further
> + * handling of this interrupt is appropriate.
> + * Return back to original instruction, and continue.
> + */
> + return;
> + } else if (cur) {
> + /* We probably hit a jprobe. Call its break handler. */
> + if (cur->break_handler && cur->break_handler(cur, regs)) {
> + kcb->kprobe_status = KPROBE_HIT_SS;
> + setup_singlestep(cur, regs, kcb, 0);
> + return;
> + }
> + } else {
> + /* breakpoint is removed, now in a race
> + * Return back to original instruction & continue.
> + */
> + }
> +}
> +
> +static int __kprobes
> +kprobe_ss_hit(struct kprobe_ctlblk *kcb, unsigned long addr)
> +{
> + if ((kcb->ss_ctx.ss_status == KPROBES_STEP_PENDING)
> + && (kcb->ss_ctx.match_addr == addr)) {
> + clear_ss_context(kcb); /* clear pending ss */
> + return DBG_HOOK_HANDLED;
> + }
> + /* not ours, kprobes should ignore it */
> + return DBG_HOOK_ERROR;
> +}
> +
> +int __kprobes
> +kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> + int retval;
> +
> + /* return error if this is not our step */
> + retval = kprobe_ss_hit(kcb, instruction_pointer(regs));
> +
> + if (retval == DBG_HOOK_HANDLED) {
> + kprobes_restore_local_irqflag(regs);
> + kernel_disable_single_step();
> +
> + if (kcb->kprobe_status == KPROBE_REENTER)
> + spsr_set_debug_flag(regs, 1);
> +
> + post_kprobe_handler(kcb, regs);
> + }
> +
> + return retval;
> +}
> +
> +int __kprobes
> +kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
> +{
> + kprobe_handler(regs);
> + return DBG_HOOK_HANDLED;
> +}
> +
> +int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct jprobe *jp = container_of(p, struct jprobe, kp);
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> + long stack_ptr = stack_pointer(regs);
> +
> + kcb->jprobe_saved_regs = *regs;
> + memcpy(kcb->jprobes_stack, (void *)stack_ptr,
> + MIN_STACK_SIZE(stack_ptr));
> +
> + instruction_pointer(regs) = (long)jp->entry;
> + preempt_disable();
> + return 1;
> +}
> +
> +void __kprobes jprobe_return(void)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + /*
> + * Jprobe handler return by entering break exception,
> + * encoded same as kprobe, but with following conditions
> + * -a magic number in x0 to identify from rest of other kprobes.
> + * -restore stack addr to original saved pt_regs
> + */
> + asm volatile ("ldr x0, [%0]\n\t"
> + "mov sp, x0\n\t"
> + "ldr x0, =" __stringify(JPROBES_MAGIC_NUM) "\n\t"
> + "BRK %1\n\t"
> + "NOP\n\t"
> + :
> + : "r"(&kcb->jprobe_saved_regs.sp),
> + "I"(BRK64_ESR_KPROBES)
> + : "memory");
> +}
> +
> +int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> + long stack_addr = kcb->jprobe_saved_regs.sp;
> + long orig_sp = stack_pointer(regs);
> + struct jprobe *jp = container_of(p, struct jprobe, kp);
> +
> + if (regs->regs[0] == JPROBES_MAGIC_NUM) {
> + if (orig_sp != stack_addr) {
> + struct pt_regs *saved_regs =
> + (struct pt_regs *)kcb->jprobe_saved_regs.sp;
> + pr_err("current sp %lx does not match saved sp %lx\n",
> + orig_sp, stack_addr);
> + pr_err("Saved registers for jprobe %p\n", jp);
> + show_regs(saved_regs);
> + pr_err("Current registers\n");
> + show_regs(regs);
> + BUG();
> + }
> + *regs = kcb->jprobe_saved_regs;
> + memcpy((void *)stack_addr, kcb->jprobes_stack,
> + MIN_STACK_SIZE(stack_addr));
> + preempt_enable_no_resched();
> + return 1;
> + }
> + return 0;
> +}
> +
> +int __init arch_init_kprobes(void)
> +{
> + return 0;
> +}
> diff --git a/arch/arm64/kernel/kprobes.h b/arch/arm64/kernel/kprobes.h
> new file mode 100644
> index 0000000..e98ad60
> --- /dev/null
> +++ b/arch/arm64/kernel/kprobes.h
> @@ -0,0 +1,24 @@
> +/*
> + * arch/arm64/kernel/kprobes.h
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KERNEL_KPROBES_H
> +#define _ARM_KERNEL_KPROBES_H
> +
> +#define JPROBES_MAGIC_NUM 0xa5a5a5a5a5a5a5a5
> +
> +/* Move this out to appropriate header file */
> +int fixup_exception(struct pt_regs *regs);
> +
> +#endif /* _ARM_KERNEL_KPROBES_H */
> diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
> index a2c2986..2da5f4e 100644
> --- a/arch/arm64/kernel/vmlinux.lds.S
> +++ b/arch/arm64/kernel/vmlinux.lds.S
> @@ -94,6 +94,7 @@ SECTIONS
> TEXT_TEXT
> SCHED_TEXT
> LOCK_TEXT
> + KPROBES_TEXT
> HYPERVISOR_TEXT
> *(.fixup)
> *(.gnu.warning)
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index 96da131..4c13dfb 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -39,6 +39,28 @@
>
> static const char *fault_name(unsigned int esr);
>
> +#ifdef CONFIG_KPROBES
> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
> +{
> + int ret = 0;
> +
> + /* kprobe_running() needs smp_processor_id() */
> + if (!user_mode(regs)) {
> + preempt_disable();
> + if (kprobe_running() && kprobe_fault_handler(regs, esr))
> + ret = 1;
> + preempt_enable();
> + }
> +
> + return ret;
> +}
> +#else
> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
> +{
> + return 0;
> +}
> +#endif
> +
> /*
> * Dump out the page tables associated with 'addr' in mm 'mm'.
> */
> @@ -200,6 +222,9 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
> unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
> unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
>
> + if (notify_page_fault(regs, esr))
> + return 0;
> +
> tsk = current;
> mm = tsk->mm;
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 4/7] arm64: kprobes instruction simulation support
2015-06-15 19:07 ` David Long
@ 2015-06-29 17:25 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:25 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>
> Kprobes needs simulation of instructions that cannot be stepped
> from different memory location, e.g.: those instructions
> that uses PC-relative addressing. In simulation, the behaviour
> of the instruction is implemented using a copy of pt_regs.
>
> Following instruction catagories are simulated:
> - All branching instructions(conditional, register, and immediate)
> - Literal access instructions(load-literal, adr/adrp)
>
> Conditional execution is limited to branching instructions in
> ARM v8. If conditions at PSTATE do not match the condition fields
> of opcode, the instruction is effectively NOP. Kprobes considers
> this case as 'miss'.
>
> Thanks to Will Cohen for assorted suggested changes.
>
> Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
> Signed-off-by: William Cohen <wcohen@redhat.com>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/kernel/Makefile | 4 +-
> arch/arm64/kernel/kprobes-arm64.c | 98 +++++++++++++++++
> arch/arm64/kernel/kprobes-arm64.h | 2 +
> arch/arm64/kernel/kprobes.c | 35 ++++++-
> arch/arm64/kernel/probes-condn-check.c | 122 ++++++++++++++++++++++
> arch/arm64/kernel/probes-simulate-insn.c | 174 +++++++++++++++++++++++++++++++
> arch/arm64/kernel/probes-simulate-insn.h | 33 ++++++
> 7 files changed, 464 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm64/kernel/probes-condn-check.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index 1319872..5e9d54f 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -32,7 +32,9 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
> arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
> arm64-obj-$(CONFIG_KGDB) += kgdb.o
> -arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
> +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o \
> + probes-simulate-insn.o \
> + probes-condn-check.o
> arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
> arm64-obj-$(CONFIG_PCI) += pci.o
> arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
> diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
> index f958c52..8a7e6b0 100644
> --- a/arch/arm64/kernel/kprobes-arm64.c
> +++ b/arch/arm64/kernel/kprobes-arm64.c
> @@ -20,6 +20,76 @@
> #include <asm/insn.h>
>
> #include "kprobes-arm64.h"
> +#include "probes-simulate-insn.h"
> +
> +/*
> + * condition check functions for kprobes simulation
> + */
> +static unsigned long __kprobes
> +__check_pstate(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct arch_specific_insn *asi = &p->ainsn;
> + unsigned long pstate = regs->pstate & 0xffffffff;
> +
> + return asi->pstate_cc(pstate);
> +}
> +
> +static unsigned long __kprobes
> +__check_cbz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_cbz((u32)p->opcode, regs);
> +}
> +
> +static unsigned long __kprobes
> +__check_cbnz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_cbnz((u32)p->opcode, regs);
> +}
> +
> +static unsigned long __kprobes
> +__check_tbz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_tbz((u32)p->opcode, regs);
> +}
> +
> +static unsigned long __kprobes
> +__check_tbnz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_tbnz((u32)p->opcode, regs);
> +}
> +
> +/*
> + * prepare functions for instruction simulation
> + */
> +static void __kprobes
> +prepare_none(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> +}
> +
> +static void __kprobes
> +prepare_bcond(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> + kprobe_opcode_t insn = p->opcode;
> +
> + asi->check_condn = __check_pstate;
> + asi->pstate_cc = kprobe_condition_checks[insn & 0xf];
> +}
> +
> +static void __kprobes
> +prepare_cbz_cbnz(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> + kprobe_opcode_t insn = p->opcode;
> +
> + asi->check_condn = (insn & (1 << 24)) ? __check_cbnz : __check_cbz;
> +}
> +
> +static void __kprobes
> +prepare_tbz_tbnz(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> + kprobe_opcode_t insn = p->opcode;
> +
> + asi->check_condn = (insn & (1 << 24)) ? __check_tbnz : __check_tbz;
> +}
>
> static bool __kprobes aarch64_insn_is_steppable(u32 insn)
> {
> @@ -63,6 +133,34 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
> */
> if (aarch64_insn_is_steppable(insn))
> return INSN_GOOD;
> +
> + asi->prepare = prepare_none;
> +
> + if (aarch64_insn_is_bcond(insn)) {
> + asi->prepare = prepare_bcond;
> + asi->handler = simulate_b_cond;
> + } else if (aarch64_insn_is_cb(insn)) {
> + asi->prepare = prepare_cbz_cbnz;
> + asi->handler = simulate_cbz_cbnz;
> + } else if (aarch64_insn_is_tb(insn)) {
> + asi->prepare = prepare_tbz_tbnz;
> + asi->handler = simulate_tbz_tbnz;
> + } else if (aarch64_insn_is_adr_adrp(insn))
> + asi->handler = simulate_adr_adrp;
> + else if (aarch64_insn_is_b_bl(insn))
> + asi->handler = simulate_b_bl;
> + else if (aarch64_insn_is_br_blr(insn) || aarch64_insn_is_ret(insn))
> + asi->handler = simulate_br_blr_ret;
> + else if (aarch64_insn_is_ldr_lit(insn))
> + asi->handler = simulate_ldr_literal;
> + else if (aarch64_insn_is_ldrsw_lit(insn))
> + asi->handler = simulate_ldrsw_literal;
> else
> + /*
> + * Instruction cannot be stepped out-of-line and we don't
> + * (yet) simulate it.
> + */
> return INSN_REJECTED;
> +
> + return INSN_GOOD_NO_SLOT;
> }
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> index 87e7891..ff8a55f 100644
> --- a/arch/arm64/kernel/kprobes-arm64.h
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -22,6 +22,8 @@ enum kprobe_insn {
> INSN_GOOD,
> };
>
> +extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> +
> enum kprobe_insn __kprobes
> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> index 601d2c6..6255814 100644
> --- a/arch/arm64/kernel/kprobes.c
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -38,6 +38,9 @@
> DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
> DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
>
> +static void __kprobes
> +post_kprobe_handler(struct kprobe_ctlblk *, struct pt_regs *);
> +
> static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> {
> /* prepare insn slot */
> @@ -54,6 +57,27 @@ static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> p->ainsn.restore.type = RESTORE_PC;
> }
>
> +static void __kprobes arch_prepare_simulate(struct kprobe *p)
> +{
> + if (p->ainsn.prepare)
> + p->ainsn.prepare(p, &p->ainsn);
> +
> + /* This instructions is not executed xol. No need to adjust the PC */
> + p->ainsn.restore.addr = 0;
> + p->ainsn.restore.type = NO_RESTORE;
> +}
> +
> +static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + if (p->ainsn.handler)
> + p->ainsn.handler((u32)p->opcode, (long)p->addr, regs);
> +
> + /* single step simulated, now go for post processing */
> + post_kprobe_handler(kcb, regs);
> +}
> +
> int __kprobes arch_prepare_kprobe(struct kprobe *p)
> {
> kprobe_opcode_t insn;
> @@ -72,7 +96,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
> return -EINVAL;
>
> case INSN_GOOD_NO_SLOT: /* insn need simulation */
> - return -EINVAL;
> + p->ainsn.insn = NULL;
> + break;
>
> case INSN_GOOD: /* instruction uses slot */
> p->ainsn.insn = get_insn_slot();
> @@ -82,7 +107,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
> };
>
> /* prepare the instruction */
> - arch_prepare_ss_slot(p);
> + if (p->ainsn.insn)
> + arch_prepare_ss_slot(p);
> + else
> + arch_prepare_simulate(p);
>
> return 0;
> }
> @@ -231,7 +259,8 @@ static void __kprobes setup_singlestep(struct kprobe *p,
> kernel_enable_single_step(regs);
> instruction_pointer(regs) = slot;
> } else {
> - BUG();
> + /* insn simulation */
> + arch_simulate_insn(p, regs);
> }
> }
>
> diff --git a/arch/arm64/kernel/probes-condn-check.c b/arch/arm64/kernel/probes-condn-check.c
> new file mode 100644
> index 0000000..e68aa0c
> --- /dev/null
> +++ b/arch/arm64/kernel/probes-condn-check.c
> @@ -0,0 +1,122 @@
> +/*
> + * arch/arm64/kernel/probes-condn-check.c
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * Copied from: arch/arm/kernel/kprobes-common.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * Description:
> + *
> + * AArch64 and AArch32 shares same conditional(CNZV) flags encoding.
> + * This file implements conditional check helpers compatible with
> + * both AArch64 and AArch32 modes. Uprobes on v8 can handle both 32-bit
> + * & 64-bit user-space instructions, so we abstract the common functions
> + * in this file. While AArch64 and AArch32 specific instruction handling
> + * are implemented in separate files, this file contains common bits.
> + */
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <asm/probes.h>
> +
> +static unsigned long __kprobes __check_eq(unsigned long pstate)
> +{
> + return pstate & PSR_Z_BIT;
> +}
> +
> +static unsigned long __kprobes __check_ne(unsigned long pstate)
> +{
> + return (~pstate) & PSR_Z_BIT;
> +}
> +
> +static unsigned long __kprobes __check_cs(unsigned long pstate)
> +{
> + return pstate & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_cc(unsigned long pstate)
> +{
> + return (~pstate) & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_mi(unsigned long pstate)
> +{
> + return pstate & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_pl(unsigned long pstate)
> +{
> + return (~pstate) & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_vs(unsigned long pstate)
> +{
> + return pstate & PSR_V_BIT;
> +}
> +
> +static unsigned long __kprobes __check_vc(unsigned long pstate)
> +{
> + return (~pstate) & PSR_V_BIT;
> +}
> +
> +static unsigned long __kprobes __check_hi(unsigned long pstate)
> +{
> + pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
> + return pstate & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_ls(unsigned long pstate)
> +{
> + pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
> + return (~pstate) & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_ge(unsigned long pstate)
> +{
> + pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
> + return (~pstate) & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_lt(unsigned long pstate)
> +{
> + pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
> + return pstate & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_gt(unsigned long pstate)
> +{
> + /*PSR_N_BIT ^= PSR_V_BIT */
> + unsigned long temp = pstate ^ (pstate << 3);
> +
> + temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
> + return (~temp) & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_le(unsigned long pstate)
> +{
> + /*PSR_N_BIT ^= PSR_V_BIT */
> + unsigned long temp = pstate ^ (pstate << 3);
> +
> + temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
> + return temp & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_al(unsigned long pstate)
> +{
> + return true;
> +}
> +
> +kprobes_pstate_check_t * const kprobe_condition_checks[16] = {
> + &__check_eq, &__check_ne, &__check_cs, &__check_cc,
> + &__check_mi, &__check_pl, &__check_vs, &__check_vc,
> + &__check_hi, &__check_ls, &__check_ge, &__check_lt,
> + &__check_gt, &__check_le, &__check_al, &__check_al
> +};
> diff --git a/arch/arm64/kernel/probes-simulate-insn.c b/arch/arm64/kernel/probes-simulate-insn.c
> new file mode 100644
> index 0000000..a224c91
> --- /dev/null
> +++ b/arch/arm64/kernel/probes-simulate-insn.c
> @@ -0,0 +1,174 @@
> +/*
> + * arch/arm64/kernel/probes-simulate-insn.c
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/kprobes.h>
> +#include <linux/module.h>
> +
> +#include "probes-simulate-insn.h"
> +
> +#define sign_extend(x, signbit) \
> + ((x) | (0 - ((x) & (1 << (signbit)))))
> +
> +#define bbl_displacement(insn) \
> + sign_extend(((insn) & 0x3ffffff) << 2, 27)
> +
> +#define bcond_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
> +
> +#define cbz_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
> +
> +#define tbz_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x3fff) << 2, 15)
> +
> +#define ldr_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
> +
> +
> +unsigned long __kprobes check_cbz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> +
> + return (opcode & (1 << 31)) ?
> + !(regs->regs[xn]) : !(regs->regs[xn] & 0xffffffff);
> +}
> +
> +unsigned long __kprobes check_cbnz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> +
> + return (opcode & (1 << 31)) ?
> + (regs->regs[xn]) : (regs->regs[xn] & 0xffffffff);
> +}
> +
> +unsigned long __kprobes check_tbz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> + int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
> +
> + return ~((regs->regs[xn] >> bit_pos) & 0x1);
> +}
> +
> +unsigned long __kprobes check_tbnz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> + int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
> +
> + return (regs->regs[xn] >> bit_pos) & 0x1;
> +}
> +
> +/*
> + * instruction simulate functions
> + */
> +void __kprobes simulate_none(u32 opcode, long addr, struct pt_regs *regs)
> +{
> +}
I can't see anything that references simulate_none?
> +
> +void __kprobes
> +simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + long imm, xn, val;
> +
> + xn = opcode & 0x1f;
> + imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);
> + imm = sign_extend(imm, 20);
> + if (opcode & 0x80000000)
> + val = (imm<<12) + (addr & 0xfffffffffffff000);
> + else
> + val = imm + addr;
> +
> + regs->regs[xn] = val;
> +
> + instruction_pointer(regs) += 4;
> +}
> +
> +void __kprobes
> +simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = bbl_displacement(opcode);
> +
> + /* Link register is x30 */
> + if (opcode & (1 << 31))
> + regs->regs[30] = addr + 4;
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = bcond_displacement(opcode);
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int xn = (opcode >> 5) & 0x1f;
> +
> + /* Link register is x30 */
> + if (((opcode >> 21) & 0x3) == 1)
> + regs->regs[30] = addr + 4;
> +
> + instruction_pointer(regs) = regs->regs[xn];
> +}
> +
> +void __kprobes
> +simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = cbz_displacement(opcode);
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = tbz_displacement(opcode);
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + u64 *load_addr;
> + int xn = opcode & 0x1f;
> + int disp = ldr_displacement(opcode);
> +
> + load_addr = (u64 *) (addr + disp);
> +
> + if (opcode & (1 << 30)) /* x0-x31 */
> + regs->regs[xn] = *load_addr;
> + else /* w0-w31 */
> + *(u32 *) (®s->regs[xn]) = (*(u32 *) (load_addr));
This looks wrong to me. The casting on the LHS will mean we set the
bottom 32 bits of regs[xn] whilst leaving the upper-bits preserved.
Loading into a w register should clear the upper 32 bits.
I think we want instead something like:
regs->regs[xn] = (u32) (*load_addr);
> +
> + instruction_pointer(regs) += 4;
> +}
> +
> +void __kprobes
> +simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + s32 *load_addr;
> + int xn = opcode & 0x1f;
> + int disp = ldr_displacement(opcode);
> +
> + load_addr = (s32 *) (addr + disp);
> + regs->regs[xn] = *load_addr;
> +
> + instruction_pointer(regs) += 4;
> +}
> diff --git a/arch/arm64/kernel/probes-simulate-insn.h b/arch/arm64/kernel/probes-simulate-insn.h
> new file mode 100644
> index 0000000..406f5c2
> --- /dev/null
> +++ b/arch/arm64/kernel/probes-simulate-insn.h
> @@ -0,0 +1,33 @@
> +/*
> + * arch/arm64/kernel/probes-simulate-insn.h
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KERNEL_PROBES_SIMULATE_INSN_H
> +#define _ARM_KERNEL_PROBES_SIMULATE_INSN_H
> +
> +unsigned long check_cbz(u32 opcode, struct pt_regs *regs);
> +unsigned long check_cbnz(u32 opcode, struct pt_regs *regs);
> +unsigned long check_tbz(u32 opcode, struct pt_regs *regs);
> +unsigned long check_tbnz(u32 opcode, struct pt_regs *regs);
> +void simulate_none(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
> +
> +#endif /* _ARM_KERNEL_PROBES_SIMULATE_INSN_H */
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 4/7] arm64: kprobes instruction simulation support
@ 2015-06-29 17:25 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:25 UTC (permalink / raw)
To: linux-arm-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>
> Kprobes needs simulation of instructions that cannot be stepped
> from different memory location, e.g.: those instructions
> that uses PC-relative addressing. In simulation, the behaviour
> of the instruction is implemented using a copy of pt_regs.
>
> Following instruction catagories are simulated:
> - All branching instructions(conditional, register, and immediate)
> - Literal access instructions(load-literal, adr/adrp)
>
> Conditional execution is limited to branching instructions in
> ARM v8. If conditions at PSTATE do not match the condition fields
> of opcode, the instruction is effectively NOP. Kprobes considers
> this case as 'miss'.
>
> Thanks to Will Cohen for assorted suggested changes.
>
> Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
> Signed-off-by: William Cohen <wcohen@redhat.com>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/kernel/Makefile | 4 +-
> arch/arm64/kernel/kprobes-arm64.c | 98 +++++++++++++++++
> arch/arm64/kernel/kprobes-arm64.h | 2 +
> arch/arm64/kernel/kprobes.c | 35 ++++++-
> arch/arm64/kernel/probes-condn-check.c | 122 ++++++++++++++++++++++
> arch/arm64/kernel/probes-simulate-insn.c | 174 +++++++++++++++++++++++++++++++
> arch/arm64/kernel/probes-simulate-insn.h | 33 ++++++
> 7 files changed, 464 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm64/kernel/probes-condn-check.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.c
> create mode 100644 arch/arm64/kernel/probes-simulate-insn.h
>
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index 1319872..5e9d54f 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -32,7 +32,9 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
> arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
> arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
> arm64-obj-$(CONFIG_KGDB) += kgdb.o
> -arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
> +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o \
> + probes-simulate-insn.o \
> + probes-condn-check.o
> arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
> arm64-obj-$(CONFIG_PCI) += pci.o
> arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
> diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
> index f958c52..8a7e6b0 100644
> --- a/arch/arm64/kernel/kprobes-arm64.c
> +++ b/arch/arm64/kernel/kprobes-arm64.c
> @@ -20,6 +20,76 @@
> #include <asm/insn.h>
>
> #include "kprobes-arm64.h"
> +#include "probes-simulate-insn.h"
> +
> +/*
> + * condition check functions for kprobes simulation
> + */
> +static unsigned long __kprobes
> +__check_pstate(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct arch_specific_insn *asi = &p->ainsn;
> + unsigned long pstate = regs->pstate & 0xffffffff;
> +
> + return asi->pstate_cc(pstate);
> +}
> +
> +static unsigned long __kprobes
> +__check_cbz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_cbz((u32)p->opcode, regs);
> +}
> +
> +static unsigned long __kprobes
> +__check_cbnz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_cbnz((u32)p->opcode, regs);
> +}
> +
> +static unsigned long __kprobes
> +__check_tbz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_tbz((u32)p->opcode, regs);
> +}
> +
> +static unsigned long __kprobes
> +__check_tbnz(struct kprobe *p, struct pt_regs *regs)
> +{
> + return check_tbnz((u32)p->opcode, regs);
> +}
> +
> +/*
> + * prepare functions for instruction simulation
> + */
> +static void __kprobes
> +prepare_none(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> +}
> +
> +static void __kprobes
> +prepare_bcond(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> + kprobe_opcode_t insn = p->opcode;
> +
> + asi->check_condn = __check_pstate;
> + asi->pstate_cc = kprobe_condition_checks[insn & 0xf];
> +}
> +
> +static void __kprobes
> +prepare_cbz_cbnz(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> + kprobe_opcode_t insn = p->opcode;
> +
> + asi->check_condn = (insn & (1 << 24)) ? __check_cbnz : __check_cbz;
> +}
> +
> +static void __kprobes
> +prepare_tbz_tbnz(struct kprobe *p, struct arch_specific_insn *asi)
> +{
> + kprobe_opcode_t insn = p->opcode;
> +
> + asi->check_condn = (insn & (1 << 24)) ? __check_tbnz : __check_tbz;
> +}
>
> static bool __kprobes aarch64_insn_is_steppable(u32 insn)
> {
> @@ -63,6 +133,34 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
> */
> if (aarch64_insn_is_steppable(insn))
> return INSN_GOOD;
> +
> + asi->prepare = prepare_none;
> +
> + if (aarch64_insn_is_bcond(insn)) {
> + asi->prepare = prepare_bcond;
> + asi->handler = simulate_b_cond;
> + } else if (aarch64_insn_is_cb(insn)) {
> + asi->prepare = prepare_cbz_cbnz;
> + asi->handler = simulate_cbz_cbnz;
> + } else if (aarch64_insn_is_tb(insn)) {
> + asi->prepare = prepare_tbz_tbnz;
> + asi->handler = simulate_tbz_tbnz;
> + } else if (aarch64_insn_is_adr_adrp(insn))
> + asi->handler = simulate_adr_adrp;
> + else if (aarch64_insn_is_b_bl(insn))
> + asi->handler = simulate_b_bl;
> + else if (aarch64_insn_is_br_blr(insn) || aarch64_insn_is_ret(insn))
> + asi->handler = simulate_br_blr_ret;
> + else if (aarch64_insn_is_ldr_lit(insn))
> + asi->handler = simulate_ldr_literal;
> + else if (aarch64_insn_is_ldrsw_lit(insn))
> + asi->handler = simulate_ldrsw_literal;
> else
> + /*
> + * Instruction cannot be stepped out-of-line and we don't
> + * (yet) simulate it.
> + */
> return INSN_REJECTED;
> +
> + return INSN_GOOD_NO_SLOT;
> }
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> index 87e7891..ff8a55f 100644
> --- a/arch/arm64/kernel/kprobes-arm64.h
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -22,6 +22,8 @@ enum kprobe_insn {
> INSN_GOOD,
> };
>
> +extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> +
> enum kprobe_insn __kprobes
> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> index 601d2c6..6255814 100644
> --- a/arch/arm64/kernel/kprobes.c
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -38,6 +38,9 @@
> DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
> DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
>
> +static void __kprobes
> +post_kprobe_handler(struct kprobe_ctlblk *, struct pt_regs *);
> +
> static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> {
> /* prepare insn slot */
> @@ -54,6 +57,27 @@ static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> p->ainsn.restore.type = RESTORE_PC;
> }
>
> +static void __kprobes arch_prepare_simulate(struct kprobe *p)
> +{
> + if (p->ainsn.prepare)
> + p->ainsn.prepare(p, &p->ainsn);
> +
> + /* This instructions is not executed xol. No need to adjust the PC */
> + p->ainsn.restore.addr = 0;
> + p->ainsn.restore.type = NO_RESTORE;
> +}
> +
> +static void __kprobes arch_simulate_insn(struct kprobe *p, struct pt_regs *regs)
> +{
> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
> +
> + if (p->ainsn.handler)
> + p->ainsn.handler((u32)p->opcode, (long)p->addr, regs);
> +
> + /* single step simulated, now go for post processing */
> + post_kprobe_handler(kcb, regs);
> +}
> +
> int __kprobes arch_prepare_kprobe(struct kprobe *p)
> {
> kprobe_opcode_t insn;
> @@ -72,7 +96,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
> return -EINVAL;
>
> case INSN_GOOD_NO_SLOT: /* insn need simulation */
> - return -EINVAL;
> + p->ainsn.insn = NULL;
> + break;
>
> case INSN_GOOD: /* instruction uses slot */
> p->ainsn.insn = get_insn_slot();
> @@ -82,7 +107,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
> };
>
> /* prepare the instruction */
> - arch_prepare_ss_slot(p);
> + if (p->ainsn.insn)
> + arch_prepare_ss_slot(p);
> + else
> + arch_prepare_simulate(p);
>
> return 0;
> }
> @@ -231,7 +259,8 @@ static void __kprobes setup_singlestep(struct kprobe *p,
> kernel_enable_single_step(regs);
> instruction_pointer(regs) = slot;
> } else {
> - BUG();
> + /* insn simulation */
> + arch_simulate_insn(p, regs);
> }
> }
>
> diff --git a/arch/arm64/kernel/probes-condn-check.c b/arch/arm64/kernel/probes-condn-check.c
> new file mode 100644
> index 0000000..e68aa0c
> --- /dev/null
> +++ b/arch/arm64/kernel/probes-condn-check.c
> @@ -0,0 +1,122 @@
> +/*
> + * arch/arm64/kernel/probes-condn-check.c
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * Copied from: arch/arm/kernel/kprobes-common.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + *
> + * Description:
> + *
> + * AArch64 and AArch32 shares same conditional(CNZV) flags encoding.
> + * This file implements conditional check helpers compatible with
> + * both AArch64 and AArch32 modes. Uprobes on v8 can handle both 32-bit
> + * & 64-bit user-space instructions, so we abstract the common functions
> + * in this file. While AArch64 and AArch32 specific instruction handling
> + * are implemented in separate files, this file contains common bits.
> + */
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <asm/probes.h>
> +
> +static unsigned long __kprobes __check_eq(unsigned long pstate)
> +{
> + return pstate & PSR_Z_BIT;
> +}
> +
> +static unsigned long __kprobes __check_ne(unsigned long pstate)
> +{
> + return (~pstate) & PSR_Z_BIT;
> +}
> +
> +static unsigned long __kprobes __check_cs(unsigned long pstate)
> +{
> + return pstate & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_cc(unsigned long pstate)
> +{
> + return (~pstate) & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_mi(unsigned long pstate)
> +{
> + return pstate & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_pl(unsigned long pstate)
> +{
> + return (~pstate) & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_vs(unsigned long pstate)
> +{
> + return pstate & PSR_V_BIT;
> +}
> +
> +static unsigned long __kprobes __check_vc(unsigned long pstate)
> +{
> + return (~pstate) & PSR_V_BIT;
> +}
> +
> +static unsigned long __kprobes __check_hi(unsigned long pstate)
> +{
> + pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
> + return pstate & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_ls(unsigned long pstate)
> +{
> + pstate &= ~(pstate >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
> + return (~pstate) & PSR_C_BIT;
> +}
> +
> +static unsigned long __kprobes __check_ge(unsigned long pstate)
> +{
> + pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
> + return (~pstate) & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_lt(unsigned long pstate)
> +{
> + pstate ^= (pstate << 3); /* PSR_N_BIT ^= PSR_V_BIT */
> + return pstate & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_gt(unsigned long pstate)
> +{
> + /*PSR_N_BIT ^= PSR_V_BIT */
> + unsigned long temp = pstate ^ (pstate << 3);
> +
> + temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
> + return (~temp) & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_le(unsigned long pstate)
> +{
> + /*PSR_N_BIT ^= PSR_V_BIT */
> + unsigned long temp = pstate ^ (pstate << 3);
> +
> + temp |= (pstate << 1); /*PSR_N_BIT |= PSR_Z_BIT */
> + return temp & PSR_N_BIT;
> +}
> +
> +static unsigned long __kprobes __check_al(unsigned long pstate)
> +{
> + return true;
> +}
> +
> +kprobes_pstate_check_t * const kprobe_condition_checks[16] = {
> + &__check_eq, &__check_ne, &__check_cs, &__check_cc,
> + &__check_mi, &__check_pl, &__check_vs, &__check_vc,
> + &__check_hi, &__check_ls, &__check_ge, &__check_lt,
> + &__check_gt, &__check_le, &__check_al, &__check_al
> +};
> diff --git a/arch/arm64/kernel/probes-simulate-insn.c b/arch/arm64/kernel/probes-simulate-insn.c
> new file mode 100644
> index 0000000..a224c91
> --- /dev/null
> +++ b/arch/arm64/kernel/probes-simulate-insn.c
> @@ -0,0 +1,174 @@
> +/*
> + * arch/arm64/kernel/probes-simulate-insn.c
> + *
> + * Copyright (C) 2013 Linaro Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/kprobes.h>
> +#include <linux/module.h>
> +
> +#include "probes-simulate-insn.h"
> +
> +#define sign_extend(x, signbit) \
> + ((x) | (0 - ((x) & (1 << (signbit)))))
> +
> +#define bbl_displacement(insn) \
> + sign_extend(((insn) & 0x3ffffff) << 2, 27)
> +
> +#define bcond_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
> +
> +#define cbz_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
> +
> +#define tbz_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x3fff) << 2, 15)
> +
> +#define ldr_displacement(insn) \
> + sign_extend(((insn >> 5) & 0x7ffff) << 2, 21)
> +
> +
> +unsigned long __kprobes check_cbz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> +
> + return (opcode & (1 << 31)) ?
> + !(regs->regs[xn]) : !(regs->regs[xn] & 0xffffffff);
> +}
> +
> +unsigned long __kprobes check_cbnz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> +
> + return (opcode & (1 << 31)) ?
> + (regs->regs[xn]) : (regs->regs[xn] & 0xffffffff);
> +}
> +
> +unsigned long __kprobes check_tbz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> + int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
> +
> + return ~((regs->regs[xn] >> bit_pos) & 0x1);
> +}
> +
> +unsigned long __kprobes check_tbnz(u32 opcode, struct pt_regs *regs)
> +{
> + int xn = opcode & 0x1f;
> + int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
> +
> + return (regs->regs[xn] >> bit_pos) & 0x1;
> +}
> +
> +/*
> + * instruction simulate functions
> + */
> +void __kprobes simulate_none(u32 opcode, long addr, struct pt_regs *regs)
> +{
> +}
I can't see anything that references simulate_none?
> +
> +void __kprobes
> +simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + long imm, xn, val;
> +
> + xn = opcode & 0x1f;
> + imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);
> + imm = sign_extend(imm, 20);
> + if (opcode & 0x80000000)
> + val = (imm<<12) + (addr & 0xfffffffffffff000);
> + else
> + val = imm + addr;
> +
> + regs->regs[xn] = val;
> +
> + instruction_pointer(regs) += 4;
> +}
> +
> +void __kprobes
> +simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = bbl_displacement(opcode);
> +
> + /* Link register is x30 */
> + if (opcode & (1 << 31))
> + regs->regs[30] = addr + 4;
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = bcond_displacement(opcode);
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int xn = (opcode >> 5) & 0x1f;
> +
> + /* Link register is x30 */
> + if (((opcode >> 21) & 0x3) == 1)
> + regs->regs[30] = addr + 4;
> +
> + instruction_pointer(regs) = regs->regs[xn];
> +}
> +
> +void __kprobes
> +simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = cbz_displacement(opcode);
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + int disp = tbz_displacement(opcode);
> +
> + instruction_pointer(regs) = addr + disp;
> +}
> +
> +void __kprobes
> +simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + u64 *load_addr;
> + int xn = opcode & 0x1f;
> + int disp = ldr_displacement(opcode);
> +
> + load_addr = (u64 *) (addr + disp);
> +
> + if (opcode & (1 << 30)) /* x0-x31 */
> + regs->regs[xn] = *load_addr;
> + else /* w0-w31 */
> + *(u32 *) (®s->regs[xn]) = (*(u32 *) (load_addr));
This looks wrong to me. The casting on the LHS will mean we set the
bottom 32 bits of regs[xn] whilst leaving the upper-bits preserved.
Loading into a w register should clear the upper 32 bits.
I think we want instead something like:
regs->regs[xn] = (u32) (*load_addr);
> +
> + instruction_pointer(regs) += 4;
> +}
> +
> +void __kprobes
> +simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)
> +{
> + s32 *load_addr;
> + int xn = opcode & 0x1f;
> + int disp = ldr_displacement(opcode);
> +
> + load_addr = (s32 *) (addr + disp);
> + regs->regs[xn] = *load_addr;
> +
> + instruction_pointer(regs) += 4;
> +}
> diff --git a/arch/arm64/kernel/probes-simulate-insn.h b/arch/arm64/kernel/probes-simulate-insn.h
> new file mode 100644
> index 0000000..406f5c2
> --- /dev/null
> +++ b/arch/arm64/kernel/probes-simulate-insn.h
> @@ -0,0 +1,33 @@
> +/*
> + * arch/arm64/kernel/probes-simulate-insn.h
> + *
> + * Copyright (C) 2013 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * General Public License for more details.
> + */
> +
> +#ifndef _ARM_KERNEL_PROBES_SIMULATE_INSN_H
> +#define _ARM_KERNEL_PROBES_SIMULATE_INSN_H
> +
> +unsigned long check_cbz(u32 opcode, struct pt_regs *regs);
> +unsigned long check_cbnz(u32 opcode, struct pt_regs *regs);
> +unsigned long check_tbz(u32 opcode, struct pt_regs *regs);
> +unsigned long check_tbnz(u32 opcode, struct pt_regs *regs);
> +void simulate_none(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs);
> +void simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs);
> +
> +#endif /* _ARM_KERNEL_PROBES_SIMULATE_INSN_H */
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-15 19:07 ` David Long
@ 2015-06-29 17:25 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:25 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: William Cohen <wcohen@redhat.com>
>
> The trampoline code is used by kretprobes to capture a return from a probed
> function. This is done by saving the registers, calling the handler, and
> restoring the registers. The code then returns to the roginal saved caller
> return address. It is necessary to do this directly instead of using a
> software breakpoint because the code used in processing that breakpoint
> could itself be kprobe'd and cause a problematic reentry into the debug
> exception handler.
>
> Signed-off-by: William Cohen <wcohen@redhat.com>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/include/asm/kprobes.h | 1 +
> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
> 3 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
> index af31c4d..d081f49 100644
> --- a/arch/arm64/include/asm/kprobes.h
> +++ b/arch/arm64/include/asm/kprobes.h
> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
> unsigned long val, void *data);
> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
> +void kretprobe_trampoline(void);
>
> #endif /* _ARM_KPROBES_H */
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> index ff8a55f..bdcfa62 100644
> --- a/arch/arm64/kernel/kprobes-arm64.h
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> enum kprobe_insn __kprobes
> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>
> +#define SAVE_REGS_STRING\
> + " stp x0, x1, [sp, #16 * 0]\n" \
> + " stp x2, x3, [sp, #16 * 1]\n" \
> + " stp x4, x5, [sp, #16 * 2]\n" \
> + " stp x6, x7, [sp, #16 * 3]\n" \
> + " stp x8, x9, [sp, #16 * 4]\n" \
> + " stp x10, x11, [sp, #16 * 5]\n" \
> + " stp x12, x13, [sp, #16 * 6]\n" \
> + " stp x14, x15, [sp, #16 * 7]\n" \
> + " stp x16, x17, [sp, #16 * 8]\n" \
> + " stp x18, x19, [sp, #16 * 9]\n" \
> + " stp x20, x21, [sp, #16 * 10]\n" \
> + " stp x22, x23, [sp, #16 * 11]\n" \
> + " stp x24, x25, [sp, #16 * 12]\n" \
> + " stp x26, x27, [sp, #16 * 13]\n" \
> + " stp x28, x29, [sp, #16 * 14]\n" \
> + " str x30, [sp, #16 * 15]\n" \
> + " mrs x0, nzcv\n" \
> + " str x0, [sp, #8 * 33]\n"
> +
> +
> +#define RESTORE_REGS_STRING\
> + " ldr x0, [sp, #8 * 33]\n" \
> + " msr nzcv, x0\n" \
> + " ldp x0, x1, [sp, #16 * 0]\n" \
> + " ldp x2, x3, [sp, #16 * 1]\n" \
> + " ldp x4, x5, [sp, #16 * 2]\n" \
> + " ldp x6, x7, [sp, #16 * 3]\n" \
> + " ldp x8, x9, [sp, #16 * 4]\n" \
> + " ldp x10, x11, [sp, #16 * 5]\n" \
> + " ldp x12, x13, [sp, #16 * 6]\n" \
> + " ldp x14, x15, [sp, #16 * 7]\n" \
> + " ldp x16, x17, [sp, #16 * 8]\n" \
> + " ldp x18, x19, [sp, #16 * 9]\n" \
> + " ldp x20, x21, [sp, #16 * 10]\n" \
> + " ldp x22, x23, [sp, #16 * 11]\n" \
> + " ldp x24, x25, [sp, #16 * 12]\n" \
> + " ldp x26, x27, [sp, #16 * 13]\n" \
> + " ldp x28, x29, [sp, #16 * 14]\n" \
> + " ldr x30, [sp, #16 * 15]\n"
Do we need to restore x19..x28 as they are callee-saved?
Okay this all matches up with the definitions of the pt_regs struct.
So regs->regs[xn] are all set as is regs->pstate.
The hard coded constant offsets make me nervous though, as does the
uncertain state of the other elements of the pt_regs struct.
> +
> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> index 6255814..570218c 100644
> --- a/arch/arm64/kernel/kprobes.c
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
> return 0;
> }
>
> +/*
> + * When a retprobed function returns, this code saves registers and
> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
> + */
> +static void __used __kprobes kretprobe_trampoline_holder(void)
> +{
> + asm volatile (".global kretprobe_trampoline\n"
> + "kretprobe_trampoline:\n"
> + "sub sp, sp, %0\n"
> + SAVE_REGS_STRING
> + "mov x0, sp\n"
> + "bl trampoline_probe_handler\n"
> + /* Replace trampoline address in lr with actual
> + orig_ret_addr return address. */
> + "str x0, [sp, #16 * 15]\n"
> + RESTORE_REGS_STRING
> + "add sp, sp, %0\n"
> + "ret\n"
> + : : "I"(sizeof(struct pt_regs)) : "memory");
I would consider placing something like:
BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
here to catch changes in pt_regs.
Or...
Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
That way you could pull in asm-offsets.h and make use of:
S_X0, S_PSTATE and S_FRAME_SIZE.
Or something else :-).
> +}
> +
> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
> +{
> + return (void *) 0;
> +}
> +
> int __init arch_init_kprobes(void)
> {
> return 0;
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-29 17:25 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-29 17:25 UTC (permalink / raw)
To: linux-arm-kernel
On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> From: William Cohen <wcohen@redhat.com>
>
> The trampoline code is used by kretprobes to capture a return from a probed
> function. This is done by saving the registers, calling the handler, and
> restoring the registers. The code then returns to the roginal saved caller
> return address. It is necessary to do this directly instead of using a
> software breakpoint because the code used in processing that breakpoint
> could itself be kprobe'd and cause a problematic reentry into the debug
> exception handler.
>
> Signed-off-by: William Cohen <wcohen@redhat.com>
> Signed-off-by: David A. Long <dave.long@linaro.org>
> ---
> arch/arm64/include/asm/kprobes.h | 1 +
> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
> 3 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
> index af31c4d..d081f49 100644
> --- a/arch/arm64/include/asm/kprobes.h
> +++ b/arch/arm64/include/asm/kprobes.h
> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
> unsigned long val, void *data);
> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
> +void kretprobe_trampoline(void);
>
> #endif /* _ARM_KPROBES_H */
> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> index ff8a55f..bdcfa62 100644
> --- a/arch/arm64/kernel/kprobes-arm64.h
> +++ b/arch/arm64/kernel/kprobes-arm64.h
> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> enum kprobe_insn __kprobes
> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>
> +#define SAVE_REGS_STRING\
> + " stp x0, x1, [sp, #16 * 0]\n" \
> + " stp x2, x3, [sp, #16 * 1]\n" \
> + " stp x4, x5, [sp, #16 * 2]\n" \
> + " stp x6, x7, [sp, #16 * 3]\n" \
> + " stp x8, x9, [sp, #16 * 4]\n" \
> + " stp x10, x11, [sp, #16 * 5]\n" \
> + " stp x12, x13, [sp, #16 * 6]\n" \
> + " stp x14, x15, [sp, #16 * 7]\n" \
> + " stp x16, x17, [sp, #16 * 8]\n" \
> + " stp x18, x19, [sp, #16 * 9]\n" \
> + " stp x20, x21, [sp, #16 * 10]\n" \
> + " stp x22, x23, [sp, #16 * 11]\n" \
> + " stp x24, x25, [sp, #16 * 12]\n" \
> + " stp x26, x27, [sp, #16 * 13]\n" \
> + " stp x28, x29, [sp, #16 * 14]\n" \
> + " str x30, [sp, #16 * 15]\n" \
> + " mrs x0, nzcv\n" \
> + " str x0, [sp, #8 * 33]\n"
> +
> +
> +#define RESTORE_REGS_STRING\
> + " ldr x0, [sp, #8 * 33]\n" \
> + " msr nzcv, x0\n" \
> + " ldp x0, x1, [sp, #16 * 0]\n" \
> + " ldp x2, x3, [sp, #16 * 1]\n" \
> + " ldp x4, x5, [sp, #16 * 2]\n" \
> + " ldp x6, x7, [sp, #16 * 3]\n" \
> + " ldp x8, x9, [sp, #16 * 4]\n" \
> + " ldp x10, x11, [sp, #16 * 5]\n" \
> + " ldp x12, x13, [sp, #16 * 6]\n" \
> + " ldp x14, x15, [sp, #16 * 7]\n" \
> + " ldp x16, x17, [sp, #16 * 8]\n" \
> + " ldp x18, x19, [sp, #16 * 9]\n" \
> + " ldp x20, x21, [sp, #16 * 10]\n" \
> + " ldp x22, x23, [sp, #16 * 11]\n" \
> + " ldp x24, x25, [sp, #16 * 12]\n" \
> + " ldp x26, x27, [sp, #16 * 13]\n" \
> + " ldp x28, x29, [sp, #16 * 14]\n" \
> + " ldr x30, [sp, #16 * 15]\n"
Do we need to restore x19..x28 as they are callee-saved?
Okay this all matches up with the definitions of the pt_regs struct.
So regs->regs[xn] are all set as is regs->pstate.
The hard coded constant offsets make me nervous though, as does the
uncertain state of the other elements of the pt_regs struct.
> +
> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
> index 6255814..570218c 100644
> --- a/arch/arm64/kernel/kprobes.c
> +++ b/arch/arm64/kernel/kprobes.c
> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
> return 0;
> }
>
> +/*
> + * When a retprobed function returns, this code saves registers and
> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
> + */
> +static void __used __kprobes kretprobe_trampoline_holder(void)
> +{
> + asm volatile (".global kretprobe_trampoline\n"
> + "kretprobe_trampoline:\n"
> + "sub sp, sp, %0\n"
> + SAVE_REGS_STRING
> + "mov x0, sp\n"
> + "bl trampoline_probe_handler\n"
> + /* Replace trampoline address in lr with actual
> + orig_ret_addr return address. */
> + "str x0, [sp, #16 * 15]\n"
> + RESTORE_REGS_STRING
> + "add sp, sp, %0\n"
> + "ret\n"
> + : : "I"(sizeof(struct pt_regs)) : "memory");
I would consider placing something like:
BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
here to catch changes in pt_regs.
Or...
Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
That way you could pull in asm-offsets.h and make use of:
S_X0, S_PSTATE and S_FRAME_SIZE.
Or something else :-).
> +}
> +
> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
> +{
> + return (void *) 0;
> +}
> +
> int __init arch_init_kprobes(void)
> {
> return 0;
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-29 17:25 ` Steve Capper
@ 2015-06-29 18:16 ` William Cohen
-1 siblings, 0 replies; 52+ messages in thread
From: William Cohen @ 2015-06-29 18:16 UTC (permalink / raw)
To: Steve Capper, David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 06/29/2015 01:25 PM, Steve Capper wrote:
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: William Cohen <wcohen@redhat.com>
>>
>> The trampoline code is used by kretprobes to capture a return from a probed
>> function. This is done by saving the registers, calling the handler, and
>> restoring the registers. The code then returns to the roginal saved caller
>> return address. It is necessary to do this directly instead of using a
>> software breakpoint because the code used in processing that breakpoint
>> could itself be kprobe'd and cause a problematic reentry into the debug
>> exception handler.
>>
>> Signed-off-by: William Cohen <wcohen@redhat.com>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/include/asm/kprobes.h | 1 +
>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>> 3 files changed, 68 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>> index af31c4d..d081f49 100644
>> --- a/arch/arm64/include/asm/kprobes.h
>> +++ b/arch/arm64/include/asm/kprobes.h
>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>> unsigned long val, void *data);
>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>> +void kretprobe_trampoline(void);
>>
>> #endif /* _ARM_KPROBES_H */
>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>> index ff8a55f..bdcfa62 100644
>> --- a/arch/arm64/kernel/kprobes-arm64.h
>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>> enum kprobe_insn __kprobes
>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>
>> +#define SAVE_REGS_STRING\
>> + " stp x0, x1, [sp, #16 * 0]\n" \
>> + " stp x2, x3, [sp, #16 * 1]\n" \
>> + " stp x4, x5, [sp, #16 * 2]\n" \
>> + " stp x6, x7, [sp, #16 * 3]\n" \
>> + " stp x8, x9, [sp, #16 * 4]\n" \
>> + " stp x10, x11, [sp, #16 * 5]\n" \
>> + " stp x12, x13, [sp, #16 * 6]\n" \
>> + " stp x14, x15, [sp, #16 * 7]\n" \
>> + " stp x16, x17, [sp, #16 * 8]\n" \
>> + " stp x18, x19, [sp, #16 * 9]\n" \
>> + " stp x20, x21, [sp, #16 * 10]\n" \
>> + " stp x22, x23, [sp, #16 * 11]\n" \
>> + " stp x24, x25, [sp, #16 * 12]\n" \
>> + " stp x26, x27, [sp, #16 * 13]\n" \
>> + " stp x28, x29, [sp, #16 * 14]\n" \
>> + " str x30, [sp, #16 * 15]\n" \
>> + " mrs x0, nzcv\n" \
>> + " str x0, [sp, #8 * 33]\n"
>> +
>> +
>> +#define RESTORE_REGS_STRING\
>> + " ldr x0, [sp, #8 * 33]\n" \
>> + " msr nzcv, x0\n" \
>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>> + " ldr x30, [sp, #16 * 15]\n"
>
> Do we need to restore x19..x28 as they are callee-saved?
Hi Steve,
The goal was to make the trampoline not affect the values in any of the registers, so if the calling conventions ever change the code will still work. Figured it was safer and clearer just to save everything rather than assuming that the compiler's code generated for trampoline_probe_handler is going to save certain registers.
>
> Okay this all matches up with the definitions of the pt_regs struct.
> So regs->regs[xn] are all set as is regs->pstate.
>
> The hard coded constant offsets make me nervous though, as does the
> uncertain state of the other elements of the pt_regs struct.
The macros in this patch are modelled after the kernel_entry and kernel_exit macros in arch/arm64/kernel/entry.S. What other elements of the pt_regs struct are of concern? The sp value will be unchanged and the pc value is going to be overwritten in the handler. Concerned about some portion of the pstate (#8 *33) not be saved/restored?
>
>> +
>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>> index 6255814..570218c 100644
>> --- a/arch/arm64/kernel/kprobes.c
>> +++ b/arch/arm64/kernel/kprobes.c
>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>> return 0;
>> }
>>
>> +/*
>> + * When a retprobed function returns, this code saves registers and
>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>> + */
>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>> +{
>> + asm volatile (".global kretprobe_trampoline\n"
>> + "kretprobe_trampoline:\n"
>> + "sub sp, sp, %0\n"
>> + SAVE_REGS_STRING
>> + "mov x0, sp\n"
>> + "bl trampoline_probe_handler\n"
>> + /* Replace trampoline address in lr with actual
>> + orig_ret_addr return address. */
>> + "str x0, [sp, #16 * 15]\n"
>> + RESTORE_REGS_STRING
>> + "add sp, sp, %0\n"
>> + "ret\n"
>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>
> I would consider placing something like:
> BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
> BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
>
> here to catch changes in pt_regs.
>
> Or...
>
> Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
> That way you could pull in asm-offsets.h and make use of:
> S_X0, S_PSTATE and S_FRAME_SIZE.
>
> Or something else :-).
>
The asm-offsets.h would make the register save and restore clearer with the symbolic names. asm-offsets.h only defines S_X0-S_X7. Other defines would be needed for the rest of the general purpose registers.
-Will
>> +}
>> +
>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>> +{
>> + return (void *) 0;
>> +}
>> +
>> int __init arch_init_kprobes(void)
>> {
>> return 0;
>> --
>> 1.8.1.2
>>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-29 18:16 ` William Cohen
0 siblings, 0 replies; 52+ messages in thread
From: William Cohen @ 2015-06-29 18:16 UTC (permalink / raw)
To: linux-arm-kernel
On 06/29/2015 01:25 PM, Steve Capper wrote:
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: William Cohen <wcohen@redhat.com>
>>
>> The trampoline code is used by kretprobes to capture a return from a probed
>> function. This is done by saving the registers, calling the handler, and
>> restoring the registers. The code then returns to the roginal saved caller
>> return address. It is necessary to do this directly instead of using a
>> software breakpoint because the code used in processing that breakpoint
>> could itself be kprobe'd and cause a problematic reentry into the debug
>> exception handler.
>>
>> Signed-off-by: William Cohen <wcohen@redhat.com>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/include/asm/kprobes.h | 1 +
>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>> 3 files changed, 68 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>> index af31c4d..d081f49 100644
>> --- a/arch/arm64/include/asm/kprobes.h
>> +++ b/arch/arm64/include/asm/kprobes.h
>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>> unsigned long val, void *data);
>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>> +void kretprobe_trampoline(void);
>>
>> #endif /* _ARM_KPROBES_H */
>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>> index ff8a55f..bdcfa62 100644
>> --- a/arch/arm64/kernel/kprobes-arm64.h
>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>> enum kprobe_insn __kprobes
>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>
>> +#define SAVE_REGS_STRING\
>> + " stp x0, x1, [sp, #16 * 0]\n" \
>> + " stp x2, x3, [sp, #16 * 1]\n" \
>> + " stp x4, x5, [sp, #16 * 2]\n" \
>> + " stp x6, x7, [sp, #16 * 3]\n" \
>> + " stp x8, x9, [sp, #16 * 4]\n" \
>> + " stp x10, x11, [sp, #16 * 5]\n" \
>> + " stp x12, x13, [sp, #16 * 6]\n" \
>> + " stp x14, x15, [sp, #16 * 7]\n" \
>> + " stp x16, x17, [sp, #16 * 8]\n" \
>> + " stp x18, x19, [sp, #16 * 9]\n" \
>> + " stp x20, x21, [sp, #16 * 10]\n" \
>> + " stp x22, x23, [sp, #16 * 11]\n" \
>> + " stp x24, x25, [sp, #16 * 12]\n" \
>> + " stp x26, x27, [sp, #16 * 13]\n" \
>> + " stp x28, x29, [sp, #16 * 14]\n" \
>> + " str x30, [sp, #16 * 15]\n" \
>> + " mrs x0, nzcv\n" \
>> + " str x0, [sp, #8 * 33]\n"
>> +
>> +
>> +#define RESTORE_REGS_STRING\
>> + " ldr x0, [sp, #8 * 33]\n" \
>> + " msr nzcv, x0\n" \
>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>> + " ldr x30, [sp, #16 * 15]\n"
>
> Do we need to restore x19..x28 as they are callee-saved?
Hi Steve,
The goal was to make the trampoline not affect the values in any of the registers, so if the calling conventions ever change the code will still work. Figured it was safer and clearer just to save everything rather than assuming that the compiler's code generated for trampoline_probe_handler is going to save certain registers.
>
> Okay this all matches up with the definitions of the pt_regs struct.
> So regs->regs[xn] are all set as is regs->pstate.
>
> The hard coded constant offsets make me nervous though, as does the
> uncertain state of the other elements of the pt_regs struct.
The macros in this patch are modelled after the kernel_entry and kernel_exit macros in arch/arm64/kernel/entry.S. What other elements of the pt_regs struct are of concern? The sp value will be unchanged and the pc value is going to be overwritten in the handler. Concerned about some portion of the pstate (#8 *33) not be saved/restored?
>
>> +
>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>> index 6255814..570218c 100644
>> --- a/arch/arm64/kernel/kprobes.c
>> +++ b/arch/arm64/kernel/kprobes.c
>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>> return 0;
>> }
>>
>> +/*
>> + * When a retprobed function returns, this code saves registers and
>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>> + */
>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>> +{
>> + asm volatile (".global kretprobe_trampoline\n"
>> + "kretprobe_trampoline:\n"
>> + "sub sp, sp, %0\n"
>> + SAVE_REGS_STRING
>> + "mov x0, sp\n"
>> + "bl trampoline_probe_handler\n"
>> + /* Replace trampoline address in lr with actual
>> + orig_ret_addr return address. */
>> + "str x0, [sp, #16 * 15]\n"
>> + RESTORE_REGS_STRING
>> + "add sp, sp, %0\n"
>> + "ret\n"
>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>
> I would consider placing something like:
> BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
> BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
>
> here to catch changes in pt_regs.
>
> Or...
>
> Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
> That way you could pull in asm-offsets.h and make use of:
> S_X0, S_PSTATE and S_FRAME_SIZE.
>
> Or something else :-).
>
The asm-offsets.h would make the register save and restore clearer with the symbolic names. asm-offsets.h only defines S_X0-S_X7. Other defines would be needed for the rest of the general purpose registers.
-Will
>> +}
>> +
>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>> +{
>> + return (void *) 0;
>> +}
>> +
>> int __init arch_init_kprobes(void)
>> {
>> return 0;
>> --
>> 1.8.1.2
>>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
2015-06-29 17:23 ` Steve Capper
@ 2015-06-29 18:36 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-29 18:36 UTC (permalink / raw)
To: Steve Capper
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 06/29/15 13:23, Steve Capper wrote:
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: "David A. Long" <dave.long@linaro.org>
>>
>> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/Kconfig | 1 +
>> arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
>> arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 103 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 7796af4..966091f 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -68,6 +68,7 @@ config ARM64
>> select HAVE_PERF_EVENTS
>> select HAVE_PERF_REGS
>> select HAVE_PERF_USER_STACK_DUMP
>> + select HAVE_REGS_AND_STACK_ACCESS_API
>> select HAVE_RCU_TABLE_FREE
>> select HAVE_SYSCALL_TRACEPOINTS
>> select IRQ_DOMAIN
>> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
>> index d6dd9fd..8f440e9 100644
>> --- a/arch/arm64/include/asm/ptrace.h
>> +++ b/arch/arm64/include/asm/ptrace.h
>> @@ -118,6 +118,8 @@ struct pt_regs {
>> u64 syscallno;
>> };
>>
>> +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
>> +
>> #define arch_has_single_step() (1)
>>
>> #ifdef CONFIG_COMPAT
>> @@ -146,6 +148,29 @@ struct pt_regs {
>> #define user_stack_pointer(regs) \
>> (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
>>
>> +/**
>> + * regs_get_register() - get register value from its offset
>> + * @regs: pt_regs from which register value is gotten
>> + * @offset: offset number of the register.
>> + *
>> + * regs_get_register returns the value of a register whose offset from @regs.
>> + * The @offset is the offset of the register in struct pt_regs.
>> + * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
>> + */
>> +static inline u64 regs_get_register(struct pt_regs *regs,
>> + unsigned int offset)
>> +{
>> + if (unlikely(offset > MAX_REG_OFFSET))
>> + return 0;
>> + return *(u64 *)((u64)regs + offset);
>
> Why not:
> return regs->regs[offset];
>
This would not be correct. The offset is a byte offset and your code
would index eight times that amount into the structure. The offset
needs to remain a byte offset so architecture-independent code does not
need to know the architecture-specific layout of the structure.
>> +}
>> +
>> +/* Valid only for Kernel mode traps. */
>> +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
>> +{
>> + return regs->sp;
>> +}
>> +
>> static inline unsigned long regs_return_value(struct pt_regs *regs)
>> {
>> return regs->regs[0];
>> diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
>> index d882b83..f6199a5 100644
>> --- a/arch/arm64/kernel/ptrace.c
>> +++ b/arch/arm64/kernel/ptrace.c
>> @@ -48,6 +48,83 @@
>> #define CREATE_TRACE_POINTS
>> #include <trace/events/syscalls.h>
>>
>> +#define ARM_pstate pstate
>> +#define ARM_pc pc
>> +#define ARM_sp sp
>> +#define ARM_x30 regs[30]
>> +#define ARM_x29 regs[29]
>> +#define ARM_x28 regs[28]
>> +#define ARM_x27 regs[27]
>> +#define ARM_x26 regs[26]
>> +#define ARM_x25 regs[25]
>> +#define ARM_x24 regs[24]
>> +#define ARM_x23 regs[23]
>> +#define ARM_x22 regs[22]
>> +#define ARM_x21 regs[21]
>> +#define ARM_x20 regs[20]
>> +#define ARM_x19 regs[19]
>> +#define ARM_x18 regs[18]
>> +#define ARM_x17 regs[17]
>> +#define ARM_x16 regs[16]
>> +#define ARM_x15 regs[15]
>> +#define ARM_x14 regs[14]
>> +#define ARM_x13 regs[13]
>> +#define ARM_x12 regs[12]
>> +#define ARM_x11 regs[11]
>> +#define ARM_x10 regs[10]
>> +#define ARM_x9 regs[9]
>> +#define ARM_x8 regs[8]
>> +#define ARM_x7 regs[7]
>> +#define ARM_x6 regs[6]
>> +#define ARM_x5 regs[5]
>> +#define ARM_x4 regs[4]
>> +#define ARM_x3 regs[3]
>> +#define ARM_x2 regs[2]
>> +#define ARM_x1 regs[1]
>> +#define ARM_x0 regs[0]
>> +
>> +#define REG_OFFSET_NAME(r) \
>> + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
>> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
>> +
>> +const struct pt_regs_offset regs_offset_table[] = {
>> + REG_OFFSET_NAME(x0),
>> + REG_OFFSET_NAME(x1),
>> + REG_OFFSET_NAME(x2),
>> + REG_OFFSET_NAME(x3),
>> + REG_OFFSET_NAME(x4),
>> + REG_OFFSET_NAME(x5),
>> + REG_OFFSET_NAME(x6),
>> + REG_OFFSET_NAME(x7),
>> + REG_OFFSET_NAME(x8),
>> + REG_OFFSET_NAME(x9),
>> + REG_OFFSET_NAME(x10),
>> + REG_OFFSET_NAME(x11),
>> + REG_OFFSET_NAME(x12),
>> + REG_OFFSET_NAME(x13),
>> + REG_OFFSET_NAME(x14),
>> + REG_OFFSET_NAME(x15),
>> + REG_OFFSET_NAME(x16),
>> + REG_OFFSET_NAME(x17),
>> + REG_OFFSET_NAME(x18),
>> + REG_OFFSET_NAME(x19),
>> + REG_OFFSET_NAME(x20),
>> + REG_OFFSET_NAME(x21),
>> + REG_OFFSET_NAME(x22),
>> + REG_OFFSET_NAME(x23),
>> + REG_OFFSET_NAME(x24),
>> + REG_OFFSET_NAME(x25),
>> + REG_OFFSET_NAME(x26),
>> + REG_OFFSET_NAME(x27),
>> + REG_OFFSET_NAME(x28),
>> + REG_OFFSET_NAME(x29),
>> + REG_OFFSET_NAME(x30),
>> + REG_OFFSET_NAME(sp),
>> + REG_OFFSET_NAME(pc),
>> + REG_OFFSET_NAME(pstate),
>> + REG_OFFSET_END,
>> +};
>> +
>> /*
>> * TODO: does not yet catch signals sent when the child dies.
>> * in exit.c or in signal.c.
>> --
>> 1.8.1.2
>>
Thanks,
-dl
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
@ 2015-06-29 18:36 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-29 18:36 UTC (permalink / raw)
To: linux-arm-kernel
On 06/29/15 13:23, Steve Capper wrote:
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: "David A. Long" <dave.long@linaro.org>
>>
>> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/Kconfig | 1 +
>> arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
>> arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 103 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 7796af4..966091f 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -68,6 +68,7 @@ config ARM64
>> select HAVE_PERF_EVENTS
>> select HAVE_PERF_REGS
>> select HAVE_PERF_USER_STACK_DUMP
>> + select HAVE_REGS_AND_STACK_ACCESS_API
>> select HAVE_RCU_TABLE_FREE
>> select HAVE_SYSCALL_TRACEPOINTS
>> select IRQ_DOMAIN
>> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
>> index d6dd9fd..8f440e9 100644
>> --- a/arch/arm64/include/asm/ptrace.h
>> +++ b/arch/arm64/include/asm/ptrace.h
>> @@ -118,6 +118,8 @@ struct pt_regs {
>> u64 syscallno;
>> };
>>
>> +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
>> +
>> #define arch_has_single_step() (1)
>>
>> #ifdef CONFIG_COMPAT
>> @@ -146,6 +148,29 @@ struct pt_regs {
>> #define user_stack_pointer(regs) \
>> (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
>>
>> +/**
>> + * regs_get_register() - get register value from its offset
>> + * @regs: pt_regs from which register value is gotten
>> + * @offset: offset number of the register.
>> + *
>> + * regs_get_register returns the value of a register whose offset from @regs.
>> + * The @offset is the offset of the register in struct pt_regs.
>> + * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
>> + */
>> +static inline u64 regs_get_register(struct pt_regs *regs,
>> + unsigned int offset)
>> +{
>> + if (unlikely(offset > MAX_REG_OFFSET))
>> + return 0;
>> + return *(u64 *)((u64)regs + offset);
>
> Why not:
> return regs->regs[offset];
>
This would not be correct. The offset is a byte offset and your code
would index eight times that amount into the structure. The offset
needs to remain a byte offset so architecture-independent code does not
need to know the architecture-specific layout of the structure.
>> +}
>> +
>> +/* Valid only for Kernel mode traps. */
>> +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
>> +{
>> + return regs->sp;
>> +}
>> +
>> static inline unsigned long regs_return_value(struct pt_regs *regs)
>> {
>> return regs->regs[0];
>> diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
>> index d882b83..f6199a5 100644
>> --- a/arch/arm64/kernel/ptrace.c
>> +++ b/arch/arm64/kernel/ptrace.c
>> @@ -48,6 +48,83 @@
>> #define CREATE_TRACE_POINTS
>> #include <trace/events/syscalls.h>
>>
>> +#define ARM_pstate pstate
>> +#define ARM_pc pc
>> +#define ARM_sp sp
>> +#define ARM_x30 regs[30]
>> +#define ARM_x29 regs[29]
>> +#define ARM_x28 regs[28]
>> +#define ARM_x27 regs[27]
>> +#define ARM_x26 regs[26]
>> +#define ARM_x25 regs[25]
>> +#define ARM_x24 regs[24]
>> +#define ARM_x23 regs[23]
>> +#define ARM_x22 regs[22]
>> +#define ARM_x21 regs[21]
>> +#define ARM_x20 regs[20]
>> +#define ARM_x19 regs[19]
>> +#define ARM_x18 regs[18]
>> +#define ARM_x17 regs[17]
>> +#define ARM_x16 regs[16]
>> +#define ARM_x15 regs[15]
>> +#define ARM_x14 regs[14]
>> +#define ARM_x13 regs[13]
>> +#define ARM_x12 regs[12]
>> +#define ARM_x11 regs[11]
>> +#define ARM_x10 regs[10]
>> +#define ARM_x9 regs[9]
>> +#define ARM_x8 regs[8]
>> +#define ARM_x7 regs[7]
>> +#define ARM_x6 regs[6]
>> +#define ARM_x5 regs[5]
>> +#define ARM_x4 regs[4]
>> +#define ARM_x3 regs[3]
>> +#define ARM_x2 regs[2]
>> +#define ARM_x1 regs[1]
>> +#define ARM_x0 regs[0]
>> +
>> +#define REG_OFFSET_NAME(r) \
>> + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
>> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
>> +
>> +const struct pt_regs_offset regs_offset_table[] = {
>> + REG_OFFSET_NAME(x0),
>> + REG_OFFSET_NAME(x1),
>> + REG_OFFSET_NAME(x2),
>> + REG_OFFSET_NAME(x3),
>> + REG_OFFSET_NAME(x4),
>> + REG_OFFSET_NAME(x5),
>> + REG_OFFSET_NAME(x6),
>> + REG_OFFSET_NAME(x7),
>> + REG_OFFSET_NAME(x8),
>> + REG_OFFSET_NAME(x9),
>> + REG_OFFSET_NAME(x10),
>> + REG_OFFSET_NAME(x11),
>> + REG_OFFSET_NAME(x12),
>> + REG_OFFSET_NAME(x13),
>> + REG_OFFSET_NAME(x14),
>> + REG_OFFSET_NAME(x15),
>> + REG_OFFSET_NAME(x16),
>> + REG_OFFSET_NAME(x17),
>> + REG_OFFSET_NAME(x18),
>> + REG_OFFSET_NAME(x19),
>> + REG_OFFSET_NAME(x20),
>> + REG_OFFSET_NAME(x21),
>> + REG_OFFSET_NAME(x22),
>> + REG_OFFSET_NAME(x23),
>> + REG_OFFSET_NAME(x24),
>> + REG_OFFSET_NAME(x25),
>> + REG_OFFSET_NAME(x26),
>> + REG_OFFSET_NAME(x27),
>> + REG_OFFSET_NAME(x28),
>> + REG_OFFSET_NAME(x29),
>> + REG_OFFSET_NAME(x30),
>> + REG_OFFSET_NAME(sp),
>> + REG_OFFSET_NAME(pc),
>> + REG_OFFSET_NAME(pstate),
>> + REG_OFFSET_END,
>> +};
>> +
>> /*
>> * TODO: does not yet catch signals sent when the child dies.
>> * in exit.c or in signal.c.
>> --
>> 1.8.1.2
>>
Thanks,
-dl
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 2/7] arm64: Add more test functions to insn.c
2015-06-29 17:23 ` Steve Capper
@ 2015-06-30 0:06 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-30 0:06 UTC (permalink / raw)
To: Steve Capper
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 06/29/15 13:23, Steve Capper wrote:
> Hi David,
> Some comments below.
>
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: "David A. Long" <dave.long@linaro.org>
>>
>> Certain instructions are hard to execute correctly out-of-line (as in
>> kprobes). Test functions are added to insn.[hc] to identify these. The
>> instructions include any that use PC-relative addressing, change the PC,
>> or change interrupt masking. For efficiency and simplicity test
>> functions are also added for small collections of related instructions.
>>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/include/asm/insn.h | 18 ++++++++++++++++++
>> arch/arm64/kernel/insn.c | 28 ++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
>> index f81b328..1fdd237 100644
>> --- a/arch/arm64/include/asm/insn.h
>> +++ b/arch/arm64/include/asm/insn.h
>> @@ -223,8 +223,13 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
>> static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
>> { return (val); }
>>
>> +__AARCH64_INSN_FUNCS(adr_adrp, 0x1F000000, 0x10000000)
>> +__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
>> __AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
>> __AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
>> +__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
>> +__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
>> +__AARCH64_INSN_FUNCS(exclusive, 0x3F000000, 0x08000000)
>
> Going one step back, if we're worried about the exclusive monitors
> then we'll be worried about instructions in-between the monitor pairs
> too?
>
Yes, but I don't see anything we can reasonably do about that.
>
>> __AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
>> __AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
>> __AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
>> @@ -264,19 +269,29 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
>> __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
>> __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
>> __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
>> +__AARCH64_INSN_FUNCS(b_bl, 0x7C000000, 0x14000000)
>> +__AARCH64_INSN_FUNCS(cb, 0x7E000000, 0x34000000)
>> __AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
>> __AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
>> +__AARCH64_INSN_FUNCS(tb, 0x7E000000, 0x36000000)
>> __AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
>> __AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
>> +__AARCH64_INSN_FUNCS(b_bl_cb_tb, 0x5C000000, 0x14000000)
>> __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
>> __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
>> __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
>> __AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
>> __AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
>> +__AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
>> __AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
>> __AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
>> __AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
>> +__AARCH64_INSN_FUNCS(br_blr, 0xFFDFFC1F, 0xD61F0000)
>> __AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
>> +__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F000, 0xD5004000)
>
> Should this not be:
> __AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F01F, 0xD500401F)
> As the lower 5 bits of an MSR (immediate) are all 1?
>
Yeah, that does look more correct.
>> +__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
>> +__AARCH64_INSN_FUNCS(set_clr_daif, 0xFFFFF0DF, 0xD50340DF)
>
> Looks good, just an MSR immediate with either DAIFSet or DAIFClr.
>
>> +__AARCH64_INSN_FUNCS(rd_wr_daif, 0xFFDFFFE0, 0xD51B4220)
>
> Looks good, either MRS or MSR (register) where systemreg = DAIF.
>
>>
>> #undef __AARCH64_INSN_FUNCS
>>
>> @@ -285,6 +300,9 @@ bool aarch64_insn_is_nop(u32 insn);
>> int aarch64_insn_read(void *addr, u32 *insnp);
>> int aarch64_insn_write(void *addr, u32 insn);
>> enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
>> +bool aarch64_insn_uses_literal(u32 insn);
>> +bool aarch64_insn_is_branch(u32 insn);
>> +bool aarch64_insn_is_daif_access(u32 insn);
>> u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
>> u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
>> u32 insn, u64 imm);
>> diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
>> index 9249020..ecd8882 100644
>> --- a/arch/arm64/kernel/insn.c
>> +++ b/arch/arm64/kernel/insn.c
>> @@ -155,6 +155,34 @@ static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn)
>> aarch64_insn_is_nop(insn);
>> }
>>
>> +bool __kprobes aarch64_insn_uses_literal(u32 insn)
>> +{
>> + /* ldr/ldrsw (literal), prfm */
>> +
>> + return aarch64_insn_is_ldr_lit(insn) ||
>> + aarch64_insn_is_ldrsw_lit(insn) ||
>> + aarch64_insn_is_adr_adrp(insn) ||
>> + aarch64_insn_is_prfm_lit(insn);
>> +}
>> +
>> +bool __kprobes aarch64_insn_is_branch(u32 insn)
>> +{
>> + /* b, bl, cb*, tb*, b.cond, br, blr */
>> +
>> + return aarch64_insn_is_b_bl_cb_tb(insn) ||
>> + aarch64_insn_is_br_blr(insn) ||
>> + aarch64_insn_is_ret(insn) ||
>> + aarch64_insn_is_bcond(insn);
>> +}
>> +
>> +bool __kprobes aarch64_insn_is_daif_access(u32 insn)
>> +{
>> + /* msr daif, mrs daif, msr daifset, msr daifclr */
>> +
>> + return aarch64_insn_is_rd_wr_daif(insn) ||
>> + aarch64_insn_is_set_clr_daif(insn);
>> +}
>> +
>> /*
>> * ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
>> * Section B2.6.5 "Concurrent modification and execution of instructions":
>> --
>> 1.8.1.2
>>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 2/7] arm64: Add more test functions to insn.c
@ 2015-06-30 0:06 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-06-30 0:06 UTC (permalink / raw)
To: linux-arm-kernel
On 06/29/15 13:23, Steve Capper wrote:
> Hi David,
> Some comments below.
>
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: "David A. Long" <dave.long@linaro.org>
>>
>> Certain instructions are hard to execute correctly out-of-line (as in
>> kprobes). Test functions are added to insn.[hc] to identify these. The
>> instructions include any that use PC-relative addressing, change the PC,
>> or change interrupt masking. For efficiency and simplicity test
>> functions are also added for small collections of related instructions.
>>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/include/asm/insn.h | 18 ++++++++++++++++++
>> arch/arm64/kernel/insn.c | 28 ++++++++++++++++++++++++++++
>> 2 files changed, 46 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
>> index f81b328..1fdd237 100644
>> --- a/arch/arm64/include/asm/insn.h
>> +++ b/arch/arm64/include/asm/insn.h
>> @@ -223,8 +223,13 @@ static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
>> static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
>> { return (val); }
>>
>> +__AARCH64_INSN_FUNCS(adr_adrp, 0x1F000000, 0x10000000)
>> +__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
>> __AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
>> __AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
>> +__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
>> +__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
>> +__AARCH64_INSN_FUNCS(exclusive, 0x3F000000, 0x08000000)
>
> Going one step back, if we're worried about the exclusive monitors
> then we'll be worried about instructions in-between the monitor pairs
> too?
>
Yes, but I don't see anything we can reasonably do about that.
>
>> __AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
>> __AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
>> __AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
>> @@ -264,19 +269,29 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
>> __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
>> __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
>> __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
>> +__AARCH64_INSN_FUNCS(b_bl, 0x7C000000, 0x14000000)
>> +__AARCH64_INSN_FUNCS(cb, 0x7E000000, 0x34000000)
>> __AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
>> __AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
>> +__AARCH64_INSN_FUNCS(tb, 0x7E000000, 0x36000000)
>> __AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
>> __AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
>> +__AARCH64_INSN_FUNCS(b_bl_cb_tb, 0x5C000000, 0x14000000)
>> __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
>> __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
>> __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
>> __AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
>> __AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
>> +__AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
>> __AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
>> __AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
>> __AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
>> +__AARCH64_INSN_FUNCS(br_blr, 0xFFDFFC1F, 0xD61F0000)
>> __AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
>> +__AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F000, 0xD5004000)
>
> Should this not be:
> __AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F01F, 0xD500401F)
> As the lower 5 bits of an MSR (immediate) are all 1?
>
Yeah, that does look more correct.
>> +__AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
>> +__AARCH64_INSN_FUNCS(set_clr_daif, 0xFFFFF0DF, 0xD50340DF)
>
> Looks good, just an MSR immediate with either DAIFSet or DAIFClr.
>
>> +__AARCH64_INSN_FUNCS(rd_wr_daif, 0xFFDFFFE0, 0xD51B4220)
>
> Looks good, either MRS or MSR (register) where systemreg = DAIF.
>
>>
>> #undef __AARCH64_INSN_FUNCS
>>
>> @@ -285,6 +300,9 @@ bool aarch64_insn_is_nop(u32 insn);
>> int aarch64_insn_read(void *addr, u32 *insnp);
>> int aarch64_insn_write(void *addr, u32 insn);
>> enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
>> +bool aarch64_insn_uses_literal(u32 insn);
>> +bool aarch64_insn_is_branch(u32 insn);
>> +bool aarch64_insn_is_daif_access(u32 insn);
>> u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
>> u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
>> u32 insn, u64 imm);
>> diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
>> index 9249020..ecd8882 100644
>> --- a/arch/arm64/kernel/insn.c
>> +++ b/arch/arm64/kernel/insn.c
>> @@ -155,6 +155,34 @@ static bool __kprobes __aarch64_insn_hotpatch_safe(u32 insn)
>> aarch64_insn_is_nop(insn);
>> }
>>
>> +bool __kprobes aarch64_insn_uses_literal(u32 insn)
>> +{
>> + /* ldr/ldrsw (literal), prfm */
>> +
>> + return aarch64_insn_is_ldr_lit(insn) ||
>> + aarch64_insn_is_ldrsw_lit(insn) ||
>> + aarch64_insn_is_adr_adrp(insn) ||
>> + aarch64_insn_is_prfm_lit(insn);
>> +}
>> +
>> +bool __kprobes aarch64_insn_is_branch(u32 insn)
>> +{
>> + /* b, bl, cb*, tb*, b.cond, br, blr */
>> +
>> + return aarch64_insn_is_b_bl_cb_tb(insn) ||
>> + aarch64_insn_is_br_blr(insn) ||
>> + aarch64_insn_is_ret(insn) ||
>> + aarch64_insn_is_bcond(insn);
>> +}
>> +
>> +bool __kprobes aarch64_insn_is_daif_access(u32 insn)
>> +{
>> + /* msr daif, mrs daif, msr daifset, msr daifclr */
>> +
>> + return aarch64_insn_is_rd_wr_daif(insn) ||
>> + aarch64_insn_is_set_clr_daif(insn);
>> +}
>> +
>> /*
>> * ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
>> * Section B2.6.5 "Concurrent modification and execution of instructions":
>> --
>> 1.8.1.2
>>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
2015-06-29 18:36 ` David Long
@ 2015-06-30 10:51 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-30 10:51 UTC (permalink / raw)
To: David Long
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 29 June 2015 at 19:36, David Long <dave.long@linaro.org> wrote:
> On 06/29/15 13:23, Steve Capper wrote:
>>
>> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>>>
>>> From: "David A. Long" <dave.long@linaro.org>
>>>
>>> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>>>
>>> Signed-off-by: David A. Long <dave.long@linaro.org>
>>> ---
>>> arch/arm64/Kconfig | 1 +
>>> arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
>>> arch/arm64/kernel/ptrace.c | 77
>>> +++++++++++++++++++++++++++++++++++++++++
>>> 3 files changed, 103 insertions(+)
>>>
>>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>>> index 7796af4..966091f 100644
>>> --- a/arch/arm64/Kconfig
>>> +++ b/arch/arm64/Kconfig
>>> @@ -68,6 +68,7 @@ config ARM64
>>> select HAVE_PERF_EVENTS
>>> select HAVE_PERF_REGS
>>> select HAVE_PERF_USER_STACK_DUMP
>>> + select HAVE_REGS_AND_STACK_ACCESS_API
>>> select HAVE_RCU_TABLE_FREE
>>> select HAVE_SYSCALL_TRACEPOINTS
>>> select IRQ_DOMAIN
>>> diff --git a/arch/arm64/include/asm/ptrace.h
>>> b/arch/arm64/include/asm/ptrace.h
>>> index d6dd9fd..8f440e9 100644
>>> --- a/arch/arm64/include/asm/ptrace.h
>>> +++ b/arch/arm64/include/asm/ptrace.h
>>> @@ -118,6 +118,8 @@ struct pt_regs {
>>> u64 syscallno;
>>> };
>>>
>>> +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
>>> +
>>> #define arch_has_single_step() (1)
>>>
>>> #ifdef CONFIG_COMPAT
>>> @@ -146,6 +148,29 @@ struct pt_regs {
>>> #define user_stack_pointer(regs) \
>>> (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
>>>
>>> +/**
>>> + * regs_get_register() - get register value from its offset
>>> + * @regs: pt_regs from which register value is gotten
>>> + * @offset: offset number of the register.
>>> + *
>>> + * regs_get_register returns the value of a register whose offset from
>>> @regs.
>>> + * The @offset is the offset of the register in struct pt_regs.
>>> + * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
>>> + */
>>> +static inline u64 regs_get_register(struct pt_regs *regs,
>>> + unsigned int offset)
>>> +{
>>> + if (unlikely(offset > MAX_REG_OFFSET))
>>> + return 0;
>>> + return *(u64 *)((u64)regs + offset);
>>
>>
>> Why not:
>> return regs->regs[offset];
>>
>
> This would not be correct. The offset is a byte offset and your code would
> index eight times that amount into the structure. The offset needs to
> remain a byte offset so architecture-independent code does not need to know
> the architecture-specific layout of the structure.
Ahh, apologies. Thank you, I substituted offset as index in my head.
>
>
>>> +}
>>> +
>>> +/* Valid only for Kernel mode traps. */
>>> +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
>>> +{
>>> + return regs->sp;
>>> +}
>>> +
>>> static inline unsigned long regs_return_value(struct pt_regs *regs)
>>> {
>>> return regs->regs[0];
>>> diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
>>> index d882b83..f6199a5 100644
>>> --- a/arch/arm64/kernel/ptrace.c
>>> +++ b/arch/arm64/kernel/ptrace.c
>>> @@ -48,6 +48,83 @@
>>> #define CREATE_TRACE_POINTS
>>> #include <trace/events/syscalls.h>
>>>
>>> +#define ARM_pstate pstate
>>> +#define ARM_pc pc
>>> +#define ARM_sp sp
>>> +#define ARM_x30 regs[30]
>>> +#define ARM_x29 regs[29]
>>> +#define ARM_x28 regs[28]
>>> +#define ARM_x27 regs[27]
>>> +#define ARM_x26 regs[26]
>>> +#define ARM_x25 regs[25]
>>> +#define ARM_x24 regs[24]
>>> +#define ARM_x23 regs[23]
>>> +#define ARM_x22 regs[22]
>>> +#define ARM_x21 regs[21]
>>> +#define ARM_x20 regs[20]
>>> +#define ARM_x19 regs[19]
>>> +#define ARM_x18 regs[18]
>>> +#define ARM_x17 regs[17]
>>> +#define ARM_x16 regs[16]
>>> +#define ARM_x15 regs[15]
>>> +#define ARM_x14 regs[14]
>>> +#define ARM_x13 regs[13]
>>> +#define ARM_x12 regs[12]
>>> +#define ARM_x11 regs[11]
>>> +#define ARM_x10 regs[10]
>>> +#define ARM_x9 regs[9]
>>> +#define ARM_x8 regs[8]
>>> +#define ARM_x7 regs[7]
>>> +#define ARM_x6 regs[6]
>>> +#define ARM_x5 regs[5]
>>> +#define ARM_x4 regs[4]
>>> +#define ARM_x3 regs[3]
>>> +#define ARM_x2 regs[2]
>>> +#define ARM_x1 regs[1]
>>> +#define ARM_x0 regs[0]
>>> +
>>> +#define REG_OFFSET_NAME(r) \
>>> + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
>>> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
>>> +
>>> +const struct pt_regs_offset regs_offset_table[] = {
>>> + REG_OFFSET_NAME(x0),
>>> + REG_OFFSET_NAME(x1),
>>> + REG_OFFSET_NAME(x2),
>>> + REG_OFFSET_NAME(x3),
>>> + REG_OFFSET_NAME(x4),
>>> + REG_OFFSET_NAME(x5),
>>> + REG_OFFSET_NAME(x6),
>>> + REG_OFFSET_NAME(x7),
>>> + REG_OFFSET_NAME(x8),
>>> + REG_OFFSET_NAME(x9),
>>> + REG_OFFSET_NAME(x10),
>>> + REG_OFFSET_NAME(x11),
>>> + REG_OFFSET_NAME(x12),
>>> + REG_OFFSET_NAME(x13),
>>> + REG_OFFSET_NAME(x14),
>>> + REG_OFFSET_NAME(x15),
>>> + REG_OFFSET_NAME(x16),
>>> + REG_OFFSET_NAME(x17),
>>> + REG_OFFSET_NAME(x18),
>>> + REG_OFFSET_NAME(x19),
>>> + REG_OFFSET_NAME(x20),
>>> + REG_OFFSET_NAME(x21),
>>> + REG_OFFSET_NAME(x22),
>>> + REG_OFFSET_NAME(x23),
>>> + REG_OFFSET_NAME(x24),
>>> + REG_OFFSET_NAME(x25),
>>> + REG_OFFSET_NAME(x26),
>>> + REG_OFFSET_NAME(x27),
>>> + REG_OFFSET_NAME(x28),
>>> + REG_OFFSET_NAME(x29),
>>> + REG_OFFSET_NAME(x30),
>>> + REG_OFFSET_NAME(sp),
>>> + REG_OFFSET_NAME(pc),
>>> + REG_OFFSET_NAME(pstate),
>>> + REG_OFFSET_END,
>>> +};
>>> +
>>> /*
>>> * TODO: does not yet catch signals sent when the child dies.
>>> * in exit.c or in signal.c.
>>> --
>>> 1.8.1.2
>>>
>
> Thanks,
> -dl
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature
@ 2015-06-30 10:51 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-30 10:51 UTC (permalink / raw)
To: linux-arm-kernel
On 29 June 2015 at 19:36, David Long <dave.long@linaro.org> wrote:
> On 06/29/15 13:23, Steve Capper wrote:
>>
>> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>>>
>>> From: "David A. Long" <dave.long@linaro.org>
>>>
>>> Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64.
>>>
>>> Signed-off-by: David A. Long <dave.long@linaro.org>
>>> ---
>>> arch/arm64/Kconfig | 1 +
>>> arch/arm64/include/asm/ptrace.h | 25 +++++++++++++
>>> arch/arm64/kernel/ptrace.c | 77
>>> +++++++++++++++++++++++++++++++++++++++++
>>> 3 files changed, 103 insertions(+)
>>>
>>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>>> index 7796af4..966091f 100644
>>> --- a/arch/arm64/Kconfig
>>> +++ b/arch/arm64/Kconfig
>>> @@ -68,6 +68,7 @@ config ARM64
>>> select HAVE_PERF_EVENTS
>>> select HAVE_PERF_REGS
>>> select HAVE_PERF_USER_STACK_DUMP
>>> + select HAVE_REGS_AND_STACK_ACCESS_API
>>> select HAVE_RCU_TABLE_FREE
>>> select HAVE_SYSCALL_TRACEPOINTS
>>> select IRQ_DOMAIN
>>> diff --git a/arch/arm64/include/asm/ptrace.h
>>> b/arch/arm64/include/asm/ptrace.h
>>> index d6dd9fd..8f440e9 100644
>>> --- a/arch/arm64/include/asm/ptrace.h
>>> +++ b/arch/arm64/include/asm/ptrace.h
>>> @@ -118,6 +118,8 @@ struct pt_regs {
>>> u64 syscallno;
>>> };
>>>
>>> +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64))
>>> +
>>> #define arch_has_single_step() (1)
>>>
>>> #ifdef CONFIG_COMPAT
>>> @@ -146,6 +148,29 @@ struct pt_regs {
>>> #define user_stack_pointer(regs) \
>>> (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
>>>
>>> +/**
>>> + * regs_get_register() - get register value from its offset
>>> + * @regs: pt_regs from which register value is gotten
>>> + * @offset: offset number of the register.
>>> + *
>>> + * regs_get_register returns the value of a register whose offset from
>>> @regs.
>>> + * The @offset is the offset of the register in struct pt_regs.
>>> + * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
>>> + */
>>> +static inline u64 regs_get_register(struct pt_regs *regs,
>>> + unsigned int offset)
>>> +{
>>> + if (unlikely(offset > MAX_REG_OFFSET))
>>> + return 0;
>>> + return *(u64 *)((u64)regs + offset);
>>
>>
>> Why not:
>> return regs->regs[offset];
>>
>
> This would not be correct. The offset is a byte offset and your code would
> index eight times that amount into the structure. The offset needs to
> remain a byte offset so architecture-independent code does not need to know
> the architecture-specific layout of the structure.
Ahh, apologies. Thank you, I substituted offset as index in my head.
>
>
>>> +}
>>> +
>>> +/* Valid only for Kernel mode traps. */
>>> +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
>>> +{
>>> + return regs->sp;
>>> +}
>>> +
>>> static inline unsigned long regs_return_value(struct pt_regs *regs)
>>> {
>>> return regs->regs[0];
>>> diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
>>> index d882b83..f6199a5 100644
>>> --- a/arch/arm64/kernel/ptrace.c
>>> +++ b/arch/arm64/kernel/ptrace.c
>>> @@ -48,6 +48,83 @@
>>> #define CREATE_TRACE_POINTS
>>> #include <trace/events/syscalls.h>
>>>
>>> +#define ARM_pstate pstate
>>> +#define ARM_pc pc
>>> +#define ARM_sp sp
>>> +#define ARM_x30 regs[30]
>>> +#define ARM_x29 regs[29]
>>> +#define ARM_x28 regs[28]
>>> +#define ARM_x27 regs[27]
>>> +#define ARM_x26 regs[26]
>>> +#define ARM_x25 regs[25]
>>> +#define ARM_x24 regs[24]
>>> +#define ARM_x23 regs[23]
>>> +#define ARM_x22 regs[22]
>>> +#define ARM_x21 regs[21]
>>> +#define ARM_x20 regs[20]
>>> +#define ARM_x19 regs[19]
>>> +#define ARM_x18 regs[18]
>>> +#define ARM_x17 regs[17]
>>> +#define ARM_x16 regs[16]
>>> +#define ARM_x15 regs[15]
>>> +#define ARM_x14 regs[14]
>>> +#define ARM_x13 regs[13]
>>> +#define ARM_x12 regs[12]
>>> +#define ARM_x11 regs[11]
>>> +#define ARM_x10 regs[10]
>>> +#define ARM_x9 regs[9]
>>> +#define ARM_x8 regs[8]
>>> +#define ARM_x7 regs[7]
>>> +#define ARM_x6 regs[6]
>>> +#define ARM_x5 regs[5]
>>> +#define ARM_x4 regs[4]
>>> +#define ARM_x3 regs[3]
>>> +#define ARM_x2 regs[2]
>>> +#define ARM_x1 regs[1]
>>> +#define ARM_x0 regs[0]
>>> +
>>> +#define REG_OFFSET_NAME(r) \
>>> + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)}
>>> +#define REG_OFFSET_END {.name = NULL, .offset = 0}
>>> +
>>> +const struct pt_regs_offset regs_offset_table[] = {
>>> + REG_OFFSET_NAME(x0),
>>> + REG_OFFSET_NAME(x1),
>>> + REG_OFFSET_NAME(x2),
>>> + REG_OFFSET_NAME(x3),
>>> + REG_OFFSET_NAME(x4),
>>> + REG_OFFSET_NAME(x5),
>>> + REG_OFFSET_NAME(x6),
>>> + REG_OFFSET_NAME(x7),
>>> + REG_OFFSET_NAME(x8),
>>> + REG_OFFSET_NAME(x9),
>>> + REG_OFFSET_NAME(x10),
>>> + REG_OFFSET_NAME(x11),
>>> + REG_OFFSET_NAME(x12),
>>> + REG_OFFSET_NAME(x13),
>>> + REG_OFFSET_NAME(x14),
>>> + REG_OFFSET_NAME(x15),
>>> + REG_OFFSET_NAME(x16),
>>> + REG_OFFSET_NAME(x17),
>>> + REG_OFFSET_NAME(x18),
>>> + REG_OFFSET_NAME(x19),
>>> + REG_OFFSET_NAME(x20),
>>> + REG_OFFSET_NAME(x21),
>>> + REG_OFFSET_NAME(x22),
>>> + REG_OFFSET_NAME(x23),
>>> + REG_OFFSET_NAME(x24),
>>> + REG_OFFSET_NAME(x25),
>>> + REG_OFFSET_NAME(x26),
>>> + REG_OFFSET_NAME(x27),
>>> + REG_OFFSET_NAME(x28),
>>> + REG_OFFSET_NAME(x29),
>>> + REG_OFFSET_NAME(x30),
>>> + REG_OFFSET_NAME(sp),
>>> + REG_OFFSET_NAME(pc),
>>> + REG_OFFSET_NAME(pstate),
>>> + REG_OFFSET_END,
>>> +};
>>> +
>>> /*
>>> * TODO: does not yet catch signals sent when the child dies.
>>> * in exit.c or in signal.c.
>>> --
>>> 1.8.1.2
>>>
>
> Thanks,
> -dl
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-29 18:16 ` William Cohen
@ 2015-06-30 11:04 ` Steve Capper
-1 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-30 11:04 UTC (permalink / raw)
To: William Cohen
Cc: David Long, Catalin Marinas, Will Deacon, linux-arm-kernel,
Russell King, Sandeepa Prabhu, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 29 June 2015 at 19:16, William Cohen <wcohen@redhat.com> wrote:
> On 06/29/2015 01:25 PM, Steve Capper wrote:
>> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>>> From: William Cohen <wcohen@redhat.com>
>>>
>>> The trampoline code is used by kretprobes to capture a return from a probed
>>> function. This is done by saving the registers, calling the handler, and
>>> restoring the registers. The code then returns to the roginal saved caller
>>> return address. It is necessary to do this directly instead of using a
>>> software breakpoint because the code used in processing that breakpoint
>>> could itself be kprobe'd and cause a problematic reentry into the debug
>>> exception handler.
>>>
>>> Signed-off-by: William Cohen <wcohen@redhat.com>
>>> Signed-off-by: David A. Long <dave.long@linaro.org>
>>> ---
>>> arch/arm64/include/asm/kprobes.h | 1 +
>>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>>> 3 files changed, 68 insertions(+)
>>>
>>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>>> index af31c4d..d081f49 100644
>>> --- a/arch/arm64/include/asm/kprobes.h
>>> +++ b/arch/arm64/include/asm/kprobes.h
>>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>>> unsigned long val, void *data);
>>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>>> +void kretprobe_trampoline(void);
>>>
>>> #endif /* _ARM_KPROBES_H */
>>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>>> index ff8a55f..bdcfa62 100644
>>> --- a/arch/arm64/kernel/kprobes-arm64.h
>>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>>> enum kprobe_insn __kprobes
>>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>>
>>> +#define SAVE_REGS_STRING\
>>> + " stp x0, x1, [sp, #16 * 0]\n" \
>>> + " stp x2, x3, [sp, #16 * 1]\n" \
>>> + " stp x4, x5, [sp, #16 * 2]\n" \
>>> + " stp x6, x7, [sp, #16 * 3]\n" \
>>> + " stp x8, x9, [sp, #16 * 4]\n" \
>>> + " stp x10, x11, [sp, #16 * 5]\n" \
>>> + " stp x12, x13, [sp, #16 * 6]\n" \
>>> + " stp x14, x15, [sp, #16 * 7]\n" \
>>> + " stp x16, x17, [sp, #16 * 8]\n" \
>>> + " stp x18, x19, [sp, #16 * 9]\n" \
>>> + " stp x20, x21, [sp, #16 * 10]\n" \
>>> + " stp x22, x23, [sp, #16 * 11]\n" \
>>> + " stp x24, x25, [sp, #16 * 12]\n" \
>>> + " stp x26, x27, [sp, #16 * 13]\n" \
>>> + " stp x28, x29, [sp, #16 * 14]\n" \
>>> + " str x30, [sp, #16 * 15]\n" \
>>> + " mrs x0, nzcv\n" \
>>> + " str x0, [sp, #8 * 33]\n"
>>> +
>>> +
>>> +#define RESTORE_REGS_STRING\
>>> + " ldr x0, [sp, #8 * 33]\n" \
>>> + " msr nzcv, x0\n" \
>>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>>> + " ldr x30, [sp, #16 * 15]\n"
>>
>> Do we need to restore x19..x28 as they are callee-saved?
>
> Hi Steve,
>
> The goal was to make the trampoline not affect the values in any of the registers, so if the calling conventions ever change the code will still work. Figured it was safer and clearer just to save everything rather than assuming that the compiler's code generated for trampoline_probe_handler is going to save certain registers.
>
>>
>> Okay this all matches up with the definitions of the pt_regs struct.
>> So regs->regs[xn] are all set as is regs->pstate.
>>
>> The hard coded constant offsets make me nervous though, as does the
>> uncertain state of the other elements of the pt_regs struct.
>
> The macros in this patch are modelled after the kernel_entry and kernel_exit macros in arch/arm64/kernel/entry.S. What other elements of the pt_regs struct are of concern? The sp value will be unchanged and the pc value is going to be overwritten in the handler. Concerned about some portion of the pstate (#8 *33) not be saved/restored?
pstate looks good to me. I was just worried that sp, pc orig_x0 and
syscallno may have uncertain values as their containing structure is
hosted on the stack. It's probably me just being overly paranoid
though.
>
>>
>>> +
>>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>>> index 6255814..570218c 100644
>>> --- a/arch/arm64/kernel/kprobes.c
>>> +++ b/arch/arm64/kernel/kprobes.c
>>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>>> return 0;
>>> }
>>>
>>> +/*
>>> + * When a retprobed function returns, this code saves registers and
>>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>>> + */
>>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>>> +{
>>> + asm volatile (".global kretprobe_trampoline\n"
>>> + "kretprobe_trampoline:\n"
>>> + "sub sp, sp, %0\n"
>>> + SAVE_REGS_STRING
>>> + "mov x0, sp\n"
>>> + "bl trampoline_probe_handler\n"
>>> + /* Replace trampoline address in lr with actual
>>> + orig_ret_addr return address. */
>>> + "str x0, [sp, #16 * 15]\n"
>>> + RESTORE_REGS_STRING
>>> + "add sp, sp, %0\n"
>>> + "ret\n"
>>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>>
>> I would consider placing something like:
>> BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
>> BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
>>
>> here to catch changes in pt_regs.
>>
>> Or...
>>
>> Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
>> That way you could pull in asm-offsets.h and make use of:
>> S_X0, S_PSTATE and S_FRAME_SIZE.
>>
>> Or something else :-).
>>
>
> The asm-offsets.h would make the register save and restore clearer with the symbolic names. asm-offsets.h only defines S_X0-S_X7. Other defines would be needed for the rest of the general purpose registers.
>
> -Will
>>> +}
>>> +
>>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>>> +{
>>> + return (void *) 0;
>>> +}
>>> +
>>> int __init arch_init_kprobes(void)
>>> {
>>> return 0;
>>> --
>>> 1.8.1.2
>>>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-30 11:04 ` Steve Capper
0 siblings, 0 replies; 52+ messages in thread
From: Steve Capper @ 2015-06-30 11:04 UTC (permalink / raw)
To: linux-arm-kernel
On 29 June 2015 at 19:16, William Cohen <wcohen@redhat.com> wrote:
> On 06/29/2015 01:25 PM, Steve Capper wrote:
>> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>>> From: William Cohen <wcohen@redhat.com>
>>>
>>> The trampoline code is used by kretprobes to capture a return from a probed
>>> function. This is done by saving the registers, calling the handler, and
>>> restoring the registers. The code then returns to the roginal saved caller
>>> return address. It is necessary to do this directly instead of using a
>>> software breakpoint because the code used in processing that breakpoint
>>> could itself be kprobe'd and cause a problematic reentry into the debug
>>> exception handler.
>>>
>>> Signed-off-by: William Cohen <wcohen@redhat.com>
>>> Signed-off-by: David A. Long <dave.long@linaro.org>
>>> ---
>>> arch/arm64/include/asm/kprobes.h | 1 +
>>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>>> 3 files changed, 68 insertions(+)
>>>
>>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>>> index af31c4d..d081f49 100644
>>> --- a/arch/arm64/include/asm/kprobes.h
>>> +++ b/arch/arm64/include/asm/kprobes.h
>>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>>> unsigned long val, void *data);
>>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>>> +void kretprobe_trampoline(void);
>>>
>>> #endif /* _ARM_KPROBES_H */
>>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>>> index ff8a55f..bdcfa62 100644
>>> --- a/arch/arm64/kernel/kprobes-arm64.h
>>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>>> enum kprobe_insn __kprobes
>>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>>
>>> +#define SAVE_REGS_STRING\
>>> + " stp x0, x1, [sp, #16 * 0]\n" \
>>> + " stp x2, x3, [sp, #16 * 1]\n" \
>>> + " stp x4, x5, [sp, #16 * 2]\n" \
>>> + " stp x6, x7, [sp, #16 * 3]\n" \
>>> + " stp x8, x9, [sp, #16 * 4]\n" \
>>> + " stp x10, x11, [sp, #16 * 5]\n" \
>>> + " stp x12, x13, [sp, #16 * 6]\n" \
>>> + " stp x14, x15, [sp, #16 * 7]\n" \
>>> + " stp x16, x17, [sp, #16 * 8]\n" \
>>> + " stp x18, x19, [sp, #16 * 9]\n" \
>>> + " stp x20, x21, [sp, #16 * 10]\n" \
>>> + " stp x22, x23, [sp, #16 * 11]\n" \
>>> + " stp x24, x25, [sp, #16 * 12]\n" \
>>> + " stp x26, x27, [sp, #16 * 13]\n" \
>>> + " stp x28, x29, [sp, #16 * 14]\n" \
>>> + " str x30, [sp, #16 * 15]\n" \
>>> + " mrs x0, nzcv\n" \
>>> + " str x0, [sp, #8 * 33]\n"
>>> +
>>> +
>>> +#define RESTORE_REGS_STRING\
>>> + " ldr x0, [sp, #8 * 33]\n" \
>>> + " msr nzcv, x0\n" \
>>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>>> + " ldr x30, [sp, #16 * 15]\n"
>>
>> Do we need to restore x19..x28 as they are callee-saved?
>
> Hi Steve,
>
> The goal was to make the trampoline not affect the values in any of the registers, so if the calling conventions ever change the code will still work. Figured it was safer and clearer just to save everything rather than assuming that the compiler's code generated for trampoline_probe_handler is going to save certain registers.
>
>>
>> Okay this all matches up with the definitions of the pt_regs struct.
>> So regs->regs[xn] are all set as is regs->pstate.
>>
>> The hard coded constant offsets make me nervous though, as does the
>> uncertain state of the other elements of the pt_regs struct.
>
> The macros in this patch are modelled after the kernel_entry and kernel_exit macros in arch/arm64/kernel/entry.S. What other elements of the pt_regs struct are of concern? The sp value will be unchanged and the pc value is going to be overwritten in the handler. Concerned about some portion of the pstate (#8 *33) not be saved/restored?
pstate looks good to me. I was just worried that sp, pc orig_x0 and
syscallno may have uncertain values as their containing structure is
hosted on the stack. It's probably me just being overly paranoid
though.
>
>>
>>> +
>>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>>> index 6255814..570218c 100644
>>> --- a/arch/arm64/kernel/kprobes.c
>>> +++ b/arch/arm64/kernel/kprobes.c
>>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>>> return 0;
>>> }
>>>
>>> +/*
>>> + * When a retprobed function returns, this code saves registers and
>>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>>> + */
>>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>>> +{
>>> + asm volatile (".global kretprobe_trampoline\n"
>>> + "kretprobe_trampoline:\n"
>>> + "sub sp, sp, %0\n"
>>> + SAVE_REGS_STRING
>>> + "mov x0, sp\n"
>>> + "bl trampoline_probe_handler\n"
>>> + /* Replace trampoline address in lr with actual
>>> + orig_ret_addr return address. */
>>> + "str x0, [sp, #16 * 15]\n"
>>> + RESTORE_REGS_STRING
>>> + "add sp, sp, %0\n"
>>> + "ret\n"
>>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>>
>> I would consider placing something like:
>> BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
>> BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
>>
>> here to catch changes in pt_regs.
>>
>> Or...
>>
>> Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
>> That way you could pull in asm-offsets.h and make use of:
>> S_X0, S_PSTATE and S_FRAME_SIZE.
>>
>> Or something else :-).
>>
>
> The asm-offsets.h would make the register save and restore clearer with the symbolic names. asm-offsets.h only defines S_X0-S_X7. Other defines would be needed for the rest of the general purpose registers.
>
> -Will
>>> +}
>>> +
>>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>>> +{
>>> + return (void *) 0;
>>> +}
>>> +
>>> int __init arch_init_kprobes(void)
>>> {
>>> return 0;
>>> --
>>> 1.8.1.2
>>>
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-30 11:04 ` Steve Capper
@ 2015-06-30 13:41 ` William Cohen
-1 siblings, 0 replies; 52+ messages in thread
From: William Cohen @ 2015-06-30 13:41 UTC (permalink / raw)
To: Steve Capper
Cc: David Long, Catalin Marinas, Will Deacon, linux-arm-kernel,
Russell King, Sandeepa Prabhu, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 06/30/2015 07:04 AM, Steve Capper wrote:
> On 29 June 2015 at 19:16, William Cohen <wcohen@redhat.com> wrote:
>> On 06/29/2015 01:25 PM, Steve Capper wrote:
>>> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>>>> From: William Cohen <wcohen@redhat.com>
>>>>
>>>> The trampoline code is used by kretprobes to capture a return from a probed
>>>> function. This is done by saving the registers, calling the handler, and
>>>> restoring the registers. The code then returns to the roginal saved caller
>>>> return address. It is necessary to do this directly instead of using a
>>>> software breakpoint because the code used in processing that breakpoint
>>>> could itself be kprobe'd and cause a problematic reentry into the debug
>>>> exception handler.
>>>>
>>>> Signed-off-by: William Cohen <wcohen@redhat.com>
>>>> Signed-off-by: David A. Long <dave.long@linaro.org>
>>>> ---
>>>> arch/arm64/include/asm/kprobes.h | 1 +
>>>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>>>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>>>> 3 files changed, 68 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>>>> index af31c4d..d081f49 100644
>>>> --- a/arch/arm64/include/asm/kprobes.h
>>>> +++ b/arch/arm64/include/asm/kprobes.h
>>>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>>>> unsigned long val, void *data);
>>>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>>>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>>>> +void kretprobe_trampoline(void);
>>>>
>>>> #endif /* _ARM_KPROBES_H */
>>>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>>>> index ff8a55f..bdcfa62 100644
>>>> --- a/arch/arm64/kernel/kprobes-arm64.h
>>>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>>>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>>>> enum kprobe_insn __kprobes
>>>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>>>
>>>> +#define SAVE_REGS_STRING\
>>>> + " stp x0, x1, [sp, #16 * 0]\n" \
>>>> + " stp x2, x3, [sp, #16 * 1]\n" \
>>>> + " stp x4, x5, [sp, #16 * 2]\n" \
>>>> + " stp x6, x7, [sp, #16 * 3]\n" \
>>>> + " stp x8, x9, [sp, #16 * 4]\n" \
>>>> + " stp x10, x11, [sp, #16 * 5]\n" \
>>>> + " stp x12, x13, [sp, #16 * 6]\n" \
>>>> + " stp x14, x15, [sp, #16 * 7]\n" \
>>>> + " stp x16, x17, [sp, #16 * 8]\n" \
>>>> + " stp x18, x19, [sp, #16 * 9]\n" \
>>>> + " stp x20, x21, [sp, #16 * 10]\n" \
>>>> + " stp x22, x23, [sp, #16 * 11]\n" \
>>>> + " stp x24, x25, [sp, #16 * 12]\n" \
>>>> + " stp x26, x27, [sp, #16 * 13]\n" \
>>>> + " stp x28, x29, [sp, #16 * 14]\n" \
>>>> + " str x30, [sp, #16 * 15]\n" \
>>>> + " mrs x0, nzcv\n" \
>>>> + " str x0, [sp, #8 * 33]\n"
>>>> +
>>>> +
>>>> +#define RESTORE_REGS_STRING\
>>>> + " ldr x0, [sp, #8 * 33]\n" \
>>>> + " msr nzcv, x0\n" \
>>>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>>>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>>>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>>>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>>>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>>>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>>>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>>>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>>>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>>>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>>>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>>>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>>>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>>>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>>>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>>>> + " ldr x30, [sp, #16 * 15]\n"
>>>
>>> Do we need to restore x19..x28 as they are callee-saved?
>>
>> Hi Steve,
>>
>> The goal was to make the trampoline not affect the values in any of the registers, so if the calling conventions ever change the code will still work. Figured it was safer and clearer just to save everything rather than assuming that the compiler's code generated for trampoline_probe_handler is going to save certain registers.
>>
>>>
>>> Okay this all matches up with the definitions of the pt_regs struct.
>>> So regs->regs[xn] are all set as is regs->pstate.
>>>
>>> The hard coded constant offsets make me nervous though, as does the
>>> uncertain state of the other elements of the pt_regs struct.
>>
>> The macros in this patch are modelled after the kernel_entry and kernel_exit macros in arch/arm64/kernel/entry.S. What other elements of the pt_regs struct are of concern? The sp value will be unchanged and the pc value is going to be overwritten in the handler. Concerned about some portion of the pstate (#8 *33) not be saved/restored?
>
> pstate looks good to me. I was just worried that sp, pc orig_x0 and
> syscallno may have uncertain values as their containing structure is
> hosted on the stack. It's probably me just being overly paranoid
> though.
Hi Steve,
Actually I am quite happy you are being paranoid about this. This kretprobe trampoline is operating completely as normal kernel code, but sections of the kprobe code are operating in exceptions, single step mode, or other unusual states, so one needs to check the assumptions about what values are valid and need to be restored. Things have gone wrong in the kprobes code in the past because of not being careful (for example not properly setting the interrupt/debug masks before doing an instruction single step).
Thanks for the review.
-Will
>
>>
>>>
>>>> +
>>>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>>>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>>>> index 6255814..570218c 100644
>>>> --- a/arch/arm64/kernel/kprobes.c
>>>> +++ b/arch/arm64/kernel/kprobes.c
>>>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>>>> return 0;
>>>> }
>>>>
>>>> +/*
>>>> + * When a retprobed function returns, this code saves registers and
>>>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>>>> + */
>>>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>>>> +{
>>>> + asm volatile (".global kretprobe_trampoline\n"
>>>> + "kretprobe_trampoline:\n"
>>>> + "sub sp, sp, %0\n"
>>>> + SAVE_REGS_STRING
>>>> + "mov x0, sp\n"
>>>> + "bl trampoline_probe_handler\n"
>>>> + /* Replace trampoline address in lr with actual
>>>> + orig_ret_addr return address. */
>>>> + "str x0, [sp, #16 * 15]\n"
>>>> + RESTORE_REGS_STRING
>>>> + "add sp, sp, %0\n"
>>>> + "ret\n"
>>>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>>>
>>> I would consider placing something like:
>>> BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
>>> BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
>>>
>>> here to catch changes in pt_regs.
>>>
>>> Or...
>>>
>>> Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
>>> That way you could pull in asm-offsets.h and make use of:
>>> S_X0, S_PSTATE and S_FRAME_SIZE.
>>>
>>> Or something else :-).
>>>
>>
>> The asm-offsets.h would make the register save and restore clearer with the symbolic names. asm-offsets.h only defines S_X0-S_X7. Other defines would be needed for the rest of the general purpose registers.
>>
>> -Will
>>>> +}
>>>> +
>>>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>>>> +{
>>>> + return (void *) 0;
>>>> +}
>>>> +
>>>> int __init arch_init_kprobes(void)
>>>> {
>>>> return 0;
>>>> --
>>>> 1.8.1.2
>>>>
>>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-06-30 13:41 ` William Cohen
0 siblings, 0 replies; 52+ messages in thread
From: William Cohen @ 2015-06-30 13:41 UTC (permalink / raw)
To: linux-arm-kernel
On 06/30/2015 07:04 AM, Steve Capper wrote:
> On 29 June 2015 at 19:16, William Cohen <wcohen@redhat.com> wrote:
>> On 06/29/2015 01:25 PM, Steve Capper wrote:
>>> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>>>> From: William Cohen <wcohen@redhat.com>
>>>>
>>>> The trampoline code is used by kretprobes to capture a return from a probed
>>>> function. This is done by saving the registers, calling the handler, and
>>>> restoring the registers. The code then returns to the roginal saved caller
>>>> return address. It is necessary to do this directly instead of using a
>>>> software breakpoint because the code used in processing that breakpoint
>>>> could itself be kprobe'd and cause a problematic reentry into the debug
>>>> exception handler.
>>>>
>>>> Signed-off-by: William Cohen <wcohen@redhat.com>
>>>> Signed-off-by: David A. Long <dave.long@linaro.org>
>>>> ---
>>>> arch/arm64/include/asm/kprobes.h | 1 +
>>>> arch/arm64/kernel/kprobes-arm64.h | 41 +++++++++++++++++++++++++++++++++++++++
>>>> arch/arm64/kernel/kprobes.c | 26 +++++++++++++++++++++++++
>>>> 3 files changed, 68 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>>>> index af31c4d..d081f49 100644
>>>> --- a/arch/arm64/include/asm/kprobes.h
>>>> +++ b/arch/arm64/include/asm/kprobes.h
>>>> @@ -58,5 +58,6 @@ int kprobe_exceptions_notify(struct notifier_block *self,
>>>> unsigned long val, void *data);
>>>> int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>>>> int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>>>> +void kretprobe_trampoline(void);
>>>>
>>>> #endif /* _ARM_KPROBES_H */
>>>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>>>> index ff8a55f..bdcfa62 100644
>>>> --- a/arch/arm64/kernel/kprobes-arm64.h
>>>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>>>> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
>>>> enum kprobe_insn __kprobes
>>>> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>>>>
>>>> +#define SAVE_REGS_STRING\
>>>> + " stp x0, x1, [sp, #16 * 0]\n" \
>>>> + " stp x2, x3, [sp, #16 * 1]\n" \
>>>> + " stp x4, x5, [sp, #16 * 2]\n" \
>>>> + " stp x6, x7, [sp, #16 * 3]\n" \
>>>> + " stp x8, x9, [sp, #16 * 4]\n" \
>>>> + " stp x10, x11, [sp, #16 * 5]\n" \
>>>> + " stp x12, x13, [sp, #16 * 6]\n" \
>>>> + " stp x14, x15, [sp, #16 * 7]\n" \
>>>> + " stp x16, x17, [sp, #16 * 8]\n" \
>>>> + " stp x18, x19, [sp, #16 * 9]\n" \
>>>> + " stp x20, x21, [sp, #16 * 10]\n" \
>>>> + " stp x22, x23, [sp, #16 * 11]\n" \
>>>> + " stp x24, x25, [sp, #16 * 12]\n" \
>>>> + " stp x26, x27, [sp, #16 * 13]\n" \
>>>> + " stp x28, x29, [sp, #16 * 14]\n" \
>>>> + " str x30, [sp, #16 * 15]\n" \
>>>> + " mrs x0, nzcv\n" \
>>>> + " str x0, [sp, #8 * 33]\n"
>>>> +
>>>> +
>>>> +#define RESTORE_REGS_STRING\
>>>> + " ldr x0, [sp, #8 * 33]\n" \
>>>> + " msr nzcv, x0\n" \
>>>> + " ldp x0, x1, [sp, #16 * 0]\n" \
>>>> + " ldp x2, x3, [sp, #16 * 1]\n" \
>>>> + " ldp x4, x5, [sp, #16 * 2]\n" \
>>>> + " ldp x6, x7, [sp, #16 * 3]\n" \
>>>> + " ldp x8, x9, [sp, #16 * 4]\n" \
>>>> + " ldp x10, x11, [sp, #16 * 5]\n" \
>>>> + " ldp x12, x13, [sp, #16 * 6]\n" \
>>>> + " ldp x14, x15, [sp, #16 * 7]\n" \
>>>> + " ldp x16, x17, [sp, #16 * 8]\n" \
>>>> + " ldp x18, x19, [sp, #16 * 9]\n" \
>>>> + " ldp x20, x21, [sp, #16 * 10]\n" \
>>>> + " ldp x22, x23, [sp, #16 * 11]\n" \
>>>> + " ldp x24, x25, [sp, #16 * 12]\n" \
>>>> + " ldp x26, x27, [sp, #16 * 13]\n" \
>>>> + " ldp x28, x29, [sp, #16 * 14]\n" \
>>>> + " ldr x30, [sp, #16 * 15]\n"
>>>
>>> Do we need to restore x19..x28 as they are callee-saved?
>>
>> Hi Steve,
>>
>> The goal was to make the trampoline not affect the values in any of the registers, so if the calling conventions ever change the code will still work. Figured it was safer and clearer just to save everything rather than assuming that the compiler's code generated for trampoline_probe_handler is going to save certain registers.
>>
>>>
>>> Okay this all matches up with the definitions of the pt_regs struct.
>>> So regs->regs[xn] are all set as is regs->pstate.
>>>
>>> The hard coded constant offsets make me nervous though, as does the
>>> uncertain state of the other elements of the pt_regs struct.
>>
>> The macros in this patch are modelled after the kernel_entry and kernel_exit macros in arch/arm64/kernel/entry.S. What other elements of the pt_regs struct are of concern? The sp value will be unchanged and the pc value is going to be overwritten in the handler. Concerned about some portion of the pstate (#8 *33) not be saved/restored?
>
> pstate looks good to me. I was just worried that sp, pc orig_x0 and
> syscallno may have uncertain values as their containing structure is
> hosted on the stack. It's probably me just being overly paranoid
> though.
Hi Steve,
Actually I am quite happy you are being paranoid about this. This kretprobe trampoline is operating completely as normal kernel code, but sections of the kprobe code are operating in exceptions, single step mode, or other unusual states, so one needs to check the assumptions about what values are valid and need to be restored. Things have gone wrong in the kprobes code in the past because of not being careful (for example not properly setting the interrupt/debug masks before doing an instruction single step).
Thanks for the review.
-Will
>
>>
>>>
>>>> +
>>>> #endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>>>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>>>> index 6255814..570218c 100644
>>>> --- a/arch/arm64/kernel/kprobes.c
>>>> +++ b/arch/arm64/kernel/kprobes.c
>>>> @@ -560,6 +560,32 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>>>> return 0;
>>>> }
>>>>
>>>> +/*
>>>> + * When a retprobed function returns, this code saves registers and
>>>> + * calls trampoline_handler() runs, which calls the kretprobe's handler.
>>>> + */
>>>> +static void __used __kprobes kretprobe_trampoline_holder(void)
>>>> +{
>>>> + asm volatile (".global kretprobe_trampoline\n"
>>>> + "kretprobe_trampoline:\n"
>>>> + "sub sp, sp, %0\n"
>>>> + SAVE_REGS_STRING
>>>> + "mov x0, sp\n"
>>>> + "bl trampoline_probe_handler\n"
>>>> + /* Replace trampoline address in lr with actual
>>>> + orig_ret_addr return address. */
>>>> + "str x0, [sp, #16 * 15]\n"
>>>> + RESTORE_REGS_STRING
>>>> + "add sp, sp, %0\n"
>>>> + "ret\n"
>>>> + : : "I"(sizeof(struct pt_regs)) : "memory");
>>>
>>> I would consider placing something like:
>>> BUILD_BUG_ON(offsetof(struct pt_regs, regs) != 0);
>>> BUILD_BUG_ON(offsetof(struct pt_regs, pstate) != 264);
>>>
>>> here to catch changes in pt_regs.
>>>
>>> Or...
>>>
>>> Perhaps it makes sense to pull kretprobe_trampoline out into its own .S file?
>>> That way you could pull in asm-offsets.h and make use of:
>>> S_X0, S_PSTATE and S_FRAME_SIZE.
>>>
>>> Or something else :-).
>>>
>>
>> The asm-offsets.h would make the register save and restore clearer with the symbolic names. asm-offsets.h only defines S_X0-S_X7. Other defines would be needed for the rest of the general purpose registers.
>>
>> -Will
>>>> +}
>>>> +
>>>> +static void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
>>>> +{
>>>> + return (void *) 0;
>>>> +}
>>>> +
>>>> int __init arch_init_kprobes(void)
>>>> {
>>>> return 0;
>>>> --
>>>> 1.8.1.2
>>>>
>>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 3/7] arm64: Kprobes with single stepping support
2015-06-29 17:24 ` Steve Capper
@ 2015-07-02 22:36 ` David Long
-1 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-07-02 22:36 UTC (permalink / raw)
To: Steve Capper
Cc: Catalin Marinas, Will Deacon, linux-arm-kernel, Russell King,
sandeepa.s.prabhu, William Cohen, Jon Medhurst (Tixy),
Masami Hiramatsu, Ananth N Mavinakayanahalli,
Anil S Keshavamurthy, David Miller, Mark Brown, linux-kernel
On 06/29/15 13:24, Steve Capper wrote:
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>>
>> Add support for basic kernel probes(kprobes) and jump probes
>> (jprobes) for ARM64.
>>
>> Kprobes utilizes software breakpoint and single step debug
>> exceptions supported on ARM v8.
>>
>> A software breakpoint is placed at the probe address to trap the
>> kernel execution into the kprobe handler.
>>
>> ARM v8 supports enabling single stepping before the break exception
>> return (ERET), with next PC in exception return address (ELR_EL1). The
>> kprobe handler prepares an executable memory slot for out-of-line
>> execution with a copy of the original instruction being probed, and
>> enables single stepping. The PC is set to the out-of-line slot address
>> before the ERET. With this scheme, the instruction is executed with the
>> exact same register context except for the PC (and DAIF) registers.
>>
>> Debug mask (PSTATE.D) is enabled only when single stepping a recursive
>> kprobe, e.g.: during kprobes reenter so that probed instruction can be
>> single stepped within the kprobe handler -exception- context.
>> The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
>> any further re-entry is prevented by not calling handlers and the case
>> counted as a missed kprobe).
>>
>> Single stepping from the x-o-l slot has a drawback for PC-relative accesses
>> like branching and symbolic literals access as the offset from the new PC
>> (slot address) may not be ensured to fit in the immediate value of
>> the opcode. Such instructions need simulation, so reject
>> probing them.
>>
>> Instructions generating exceptions or cpu mode change are rejected
>> for probing.
>>
>> Instructions using Exclusive Monitor are rejected too.
>>
>> System instructions are mostly enabled for stepping, except MSR/MRS
>> accesses to "DAIF" flags in PSTATE, which are not safe for
>> probing.
>>
>> Thanks to Steve Capper and Pratyush Anand for several suggested
>> Changes.
>>
>> Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>> Signed-off-by: Steve Capper <steve.capper@linaro.org>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/Kconfig | 1 +
>> arch/arm64/include/asm/debug-monitors.h | 5 +
>> arch/arm64/include/asm/kprobes.h | 62 ++++
>> arch/arm64/include/asm/probes.h | 50 +++
>> arch/arm64/include/asm/ptrace.h | 3 +-
>> arch/arm64/kernel/Makefile | 1 +
>> arch/arm64/kernel/debug-monitors.c | 35 ++-
>> arch/arm64/kernel/kprobes-arm64.c | 68 ++++
>> arch/arm64/kernel/kprobes-arm64.h | 28 ++
>> arch/arm64/kernel/kprobes.c | 537 ++++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.h | 24 ++
>> arch/arm64/kernel/vmlinux.lds.S | 1 +
>> arch/arm64/mm/fault.c | 25 ++
>> 13 files changed, 829 insertions(+), 11 deletions(-)
>> create mode 100644 arch/arm64/include/asm/kprobes.h
>> create mode 100644 arch/arm64/include/asm/probes.h
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
>> create mode 100644 arch/arm64/kernel/kprobes.c
>> create mode 100644 arch/arm64/kernel/kprobes.h
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 966091f..45a9bd81 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -71,6 +71,7 @@ config ARM64
>> select HAVE_REGS_AND_STACK_ACCESS_API
>> select HAVE_RCU_TABLE_FREE
>> select HAVE_SYSCALL_TRACEPOINTS
>> + select HAVE_KPROBES
>> select IRQ_DOMAIN
>> select MODULES_USE_ELF_RELA
>> select NO_BOOTMEM
>> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
>> index 40ec68a..92d7cea 100644
>> --- a/arch/arm64/include/asm/debug-monitors.h
>> +++ b/arch/arm64/include/asm/debug-monitors.h
>> @@ -90,6 +90,11 @@
>>
>> #define CACHE_FLUSH_IS_SAFE 1
>>
>> +/* kprobes BRK opcodes with ESR encoding */
>> +#define BRK64_ESR_MASK 0xFFFF
>> +#define BRK64_ESR_KPROBES 0x0004
>> +#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
>> +
>> /* AArch32 */
>> #define DBG_ESR_EVT_BKPT 0x4
>> #define DBG_ESR_EVT_VECC 0x5
>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>> new file mode 100644
>> index 0000000..af31c4d
>> --- /dev/null
>> +++ b/arch/arm64/include/asm/kprobes.h
>> @@ -0,0 +1,62 @@
>> +/*
>> + * arch/arm64/include/asm/kprobes.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#ifndef _ARM_KPROBES_H
>> +#define _ARM_KPROBES_H
>> +
>> +#include <linux/types.h>
>> +#include <linux/ptrace.h>
>> +#include <linux/percpu.h>
>> +
>> +#define __ARCH_WANT_KPROBES_INSN_SLOT
>> +#define MAX_INSN_SIZE 1
>> +#define MAX_STACK_SIZE 128
>> +
>> +#define flush_insn_slot(p) do { } while (0)
>> +#define kretprobe_blacklist_size 0
>> +
>> +#include <asm/probes.h>
>> +
>> +struct prev_kprobe {
>> + struct kprobe *kp;
>> + unsigned int status;
>> +};
>> +
>> +/* Single step context for kprobe */
>> +struct kprobe_step_ctx {
>> +#define KPROBES_STEP_NONE 0x0
>> +#define KPROBES_STEP_PENDING 0x1
>> + unsigned long ss_status;
>> + unsigned long match_addr;
>> +};
>> +
>> +/* per-cpu kprobe control block */
>> +struct kprobe_ctlblk {
>> + unsigned int kprobe_status;
>> + unsigned long saved_irqflag;
>> + struct prev_kprobe prev_kprobe;
>> + struct kprobe_step_ctx ss_ctx;
>> + struct pt_regs jprobe_saved_regs;
>> + char jprobes_stack[MAX_STACK_SIZE];
>> +};
>> +
>> +void arch_remove_kprobe(struct kprobe *);
>> +int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
>> +int kprobe_exceptions_notify(struct notifier_block *self,
>> + unsigned long val, void *data);
>> +int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>> +int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>> +
>> +#endif /* _ARM_KPROBES_H */
>> diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h
>> new file mode 100644
>> index 0000000..7f5a27f
>> --- /dev/null
>> +++ b/arch/arm64/include/asm/probes.h
>> @@ -0,0 +1,50 @@
>> +/*
>> + * arch/arm64/include/asm/probes.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +#ifndef _ARM_PROBES_H
>> +#define _ARM_PROBES_H
>> +
>> +struct kprobe;
>> +struct arch_specific_insn;
>> +
>> +typedef u32 kprobe_opcode_t;
>> +typedef unsigned long (kprobes_pstate_check_t)(unsigned long);
>> +typedef unsigned long
>> +(probes_condition_check_t)(struct kprobe *p, struct pt_regs *);
>> +typedef void
>> +(probes_prepare_t)(struct kprobe *, struct arch_specific_insn *);
>> +typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
>> +
>> +enum pc_restore_type {
>> + NO_RESTORE,
>> + RESTORE_PC,
>> +};
>> +
>> +struct kprobe_pc_restore {
>> + enum pc_restore_type type;
>> + unsigned long addr;
>> +};
>> +
>> +/* architecture specific copy of original instruction */
>> +struct arch_specific_insn {
>> + kprobe_opcode_t *insn;
>> + kprobes_pstate_check_t *pstate_cc;
>> + probes_condition_check_t *check_condn;
>> + probes_prepare_t *prepare;
>> + kprobes_handler_t *handler;
>> + /* restore address after step xol */
>> + struct kprobe_pc_restore restore;
>> +};
>> +
>> +#endif
>> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
>> index 8f440e9..aadf61a 100644
>> --- a/arch/arm64/include/asm/ptrace.h
>> +++ b/arch/arm64/include/asm/ptrace.h
>> @@ -206,7 +206,8 @@ static inline int valid_user_regs(struct user_pt_regs *regs)
>> return 0;
>> }
>>
>> -#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
>> +#define instruction_pointer(regs) ((regs)->pc)
>> +#define stack_pointer(regs) ((regs)->sp)
>>
>> #ifdef CONFIG_SMP
>> extern unsigned long profile_pc(struct pt_regs *regs);
>> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
>> index 426d076..1319872 100644
>> --- a/arch/arm64/kernel/Makefile
>> +++ b/arch/arm64/kernel/Makefile
>> @@ -32,6 +32,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
>> arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
>> arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
>> arm64-obj-$(CONFIG_KGDB) += kgdb.o
>> +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
>> arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
>> arm64-obj-$(CONFIG_PCI) += pci.o
>> arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
>> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
>> index b056369..486ee94 100644
>> --- a/arch/arm64/kernel/debug-monitors.c
>> +++ b/arch/arm64/kernel/debug-monitors.c
>> @@ -23,6 +23,7 @@
>> #include <linux/hardirq.h>
>> #include <linux/init.h>
>> #include <linux/ptrace.h>
>> +#include <linux/kprobes.h>
>> #include <linux/stat.h>
>> #include <linux/uaccess.h>
>>
>> @@ -228,6 +229,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
>> struct pt_regs *regs)
>> {
>> siginfo_t info;
>> + bool handler_found = false;
>>
>> /*
>> * If we are stepping a pending breakpoint, call the hw_breakpoint
>> @@ -251,15 +253,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
>> */
>> user_rewind_single_step(current);
>> } else {
>> +#ifdef CONFIG_KPROBES
>> + if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
>> + handler_found = true;
>> +#endif
>> if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
>> - return 0;
>> -
>> - pr_warning("Unexpected kernel single-step exception at EL1\n");
>> - /*
>> - * Re-enable stepping since we know that we will be
>> - * returning to regs.
>> - */
>> - set_regs_spsr_ss(regs);
>> + handler_found = true;
>> +
>> + if (!handler_found) {
>> + pr_warn("Unexpected kernel single-step exception at EL1\n");
>> + /*
>> + * Re-enable stepping since we know that we will be
>> + * returning to regs.
>> + */
>> + set_regs_spsr_ss(regs);
>> + }
>> }
>>
>> return 0;
>> @@ -315,8 +323,15 @@ static int brk_handler(unsigned long addr, unsigned int esr,
>> };
>>
>> force_sig_info(SIGTRAP, &info, current);
>> - } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
>> - pr_warning("Unexpected kernel BRK exception at EL1\n");
>> + }
>> +#ifdef CONFIG_KPROBES
>> + else if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
>> + if (kprobe_breakpoint_handler(regs, esr) != DBG_HOOK_HANDLED)
>> + return -EFAULT;
>> + }
>> +#endif
>> + else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
>> + pr_warn("Unexpected kernel BRK exception at EL1\n");
>> return -EFAULT;
>> }
>>
>> diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
>> new file mode 100644
>> index 0000000..f958c52
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes-arm64.c
>> @@ -0,0 +1,68 @@
>> +/*
>> + * arch/arm64/kernel/kprobes-arm64.c
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/kprobes.h>
>> +#include <linux/module.h>
>> +#include <asm/kprobes.h>
>> +#include <asm/insn.h>
>> +
>> +#include "kprobes-arm64.h"
>> +
>> +static bool __kprobes aarch64_insn_is_steppable(u32 insn)
>> +{
>> + if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
>> + if (aarch64_insn_is_branch(insn))
>> + return false;
>> +
>> + /* modification of daif creates issues */
>> + if (aarch64_insn_is_daif_access(insn))
>> + return false;
>> +
>> + if (aarch64_insn_is_exception(insn))
>> + return false;
>> +
>> + if (aarch64_insn_is_hint(insn))
>> + return aarch64_insn_is_nop(insn);
>> +
>> + return true;
>> + }
>> +
>> + if (aarch64_insn_uses_literal(insn))
>> + return false;
>> +
>> + if (aarch64_insn_is_exclusive(insn))
>> + return false;
>> +
>> + return true;
>> +}
>> +
>> +/* Return:
>> + * INSN_REJECTED If instruction is one not allowed to kprobe,
>> + * INSN_GOOD If instruction is supported and uses instruction slot,
>> + * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
>> + */
>> +enum kprobe_insn __kprobes
>> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
>> +{
>> + /*
>> + * Instructions reading or modifying the PC won't work from the XOL
>> + * slot.
>> + */
>> + if (aarch64_insn_is_steppable(insn))
>> + return INSN_GOOD;
>> + else
>> + return INSN_REJECTED;
>> +}
>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>> new file mode 100644
>> index 0000000..87e7891
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>> @@ -0,0 +1,28 @@
>> +/*
>> + * arch/arm64/kernel/kprobes-arm64.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#ifndef _ARM_KERNEL_KPROBES_ARM64_H
>> +#define _ARM_KERNEL_KPROBES_ARM64_H
>> +
>> +enum kprobe_insn {
>> + INSN_REJECTED,
>> + INSN_GOOD_NO_SLOT,
>> + INSN_GOOD,
>> +};
>> +
>> +enum kprobe_insn __kprobes
>> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>> +
>> +#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>> new file mode 100644
>> index 0000000..601d2c6
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes.c
>> @@ -0,0 +1,537 @@
>> +/*
>> + * arch/arm64/kernel/kprobes.c
>> + *
>> + * Kprobes support for ARM64
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + * Author: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + *
>> + */
>> +#include <linux/kernel.h>
>> +#include <linux/kprobes.h>
>> +#include <linux/module.h>
>> +#include <linux/slab.h>
>> +#include <linux/stop_machine.h>
>> +#include <linux/stringify.h>
>> +#include <asm/traps.h>
>> +#include <asm/ptrace.h>
>> +#include <asm/cacheflush.h>
>> +#include <asm/debug-monitors.h>
>> +#include <asm/system_misc.h>
>> +#include <asm/insn.h>
>> +
>> +#include "kprobes.h"
>> +#include "kprobes-arm64.h"
>> +
>> +#define MIN_STACK_SIZE(addr) min((unsigned long)MAX_STACK_SIZE, \
>> + (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
>> +
>> +DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
>> +DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
>> +
>> +static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
>> +{
>> + /* prepare insn slot */
>> + p->ainsn.insn[0] = p->opcode;
>> +
>> + flush_icache_range((uintptr_t) (p->ainsn.insn),
>> + (uintptr_t) (p->ainsn.insn) + MAX_INSN_SIZE);
>> +
>> + /*
>> + * Needs restoring of return address after stepping xol.
>> + */
>> + p->ainsn.restore.addr = (unsigned long) p->addr +
>> + sizeof(kprobe_opcode_t);
>> + p->ainsn.restore.type = RESTORE_PC;
>> +}
>> +
>> +int __kprobes arch_prepare_kprobe(struct kprobe *p)
>> +{
>> + kprobe_opcode_t insn;
>> + unsigned long probe_addr = (unsigned long)p->addr;
>> +
>> + /* copy instruction */
>> + insn = *p->addr;
>> + p->opcode = insn;
>> +
>> + if (in_exception_text(probe_addr))
>> + return -EINVAL;
>> +
>> + /* decode instruction */
>> + switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
>> + case INSN_REJECTED: /* insn not supported */
>> + return -EINVAL;
>> +
>> + case INSN_GOOD_NO_SLOT: /* insn need simulation */
>> + return -EINVAL;
>> +
>> + case INSN_GOOD: /* instruction uses slot */
>> + p->ainsn.insn = get_insn_slot();
>> + if (!p->ainsn.insn)
>> + return -ENOMEM;
>> + break;
>> + };
>> +
>> + /* prepare the instruction */
>> + arch_prepare_ss_slot(p);
>> +
>> + return 0;
>> +}
>> +
>> +static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
>> +{
>> + void *addrs[1];
>> + u32 insns[1];
>> +
>> + addrs[0] = (void *)addr;
>> + insns[0] = (u32)opcode;
>> +
>> + return aarch64_insn_patch_text_sync(addrs, insns, 1);
>> +}
>> +
>> +/* arm kprobe: install breakpoint in text */
>> +void __kprobes arch_arm_kprobe(struct kprobe *p)
>> +{
>> + patch_text(p->addr, BRK64_OPCODE_KPROBES);
>> +}
>> +
>> +/* disarm kprobe: remove breakpoint from text */
>> +void __kprobes arch_disarm_kprobe(struct kprobe *p)
>> +{
>> + patch_text(p->addr, p->opcode);
>> +}
>> +
>> +void __kprobes arch_remove_kprobe(struct kprobe *p)
>> +{
>> + if (p->ainsn.insn) {
>> + free_insn_slot(p->ainsn.insn, 0);
>> + p->ainsn.insn = NULL;
>> + }
>> +}
>> +
>> +static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
>> +{
>> + kcb->prev_kprobe.kp = kprobe_running();
>> + kcb->prev_kprobe.status = kcb->kprobe_status;
>> +}
>> +
>> +static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
>> +{
>> + __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
>> + kcb->kprobe_status = kcb->prev_kprobe.status;
>> +}
>> +
>> +static void __kprobes set_current_kprobe(struct kprobe *p)
>> +{
>> + __this_cpu_write(current_kprobe, p);
>> +}
>> +
>> +/*
>> + * The D-flag (Debug mask) is set (masked) upon exception entry.
>> + * Kprobes needs to clear (unmask) D-flag -ONLY- in case of recursive
>> + * probe i.e. when probe hit from kprobe handler context upon
>> + * executing the pre/post handlers. In this case we return with
>> + * D-flag clear so that single-stepping can be carried-out.
>> + *
>> + * Leave D-flag set in all other cases.
>> + */
>> +static void __kprobes
>> +spsr_set_debug_flag(struct pt_regs *regs, int mask)
>> +{
>> + unsigned long spsr = regs->pstate;
>> +
>> + if (mask)
>> + spsr |= PSR_D_BIT;
>> + else
>> + spsr &= ~PSR_D_BIT;
>> +
>> + regs->pstate = spsr;
>> +}
>> +
>> +/*
>> + * Interrupts need to be disabled before single-step mode is set, and not
>> + * reenabled until after single-step mode ends.
>> + * Without disabling interrupt on local CPU, there is a chance of
>> + * interrupt occurrence in the period of exception return and start of
>> + * out-of-line single-step, that result in wrongly single stepping
>> + * the interrupt handler.
>> + */
>> +static void __kprobes kprobes_save_local_irqflag(struct pt_regs *regs)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + kcb->saved_irqflag = regs->pstate;
>> + regs->pstate |= PSR_I_BIT;
>> +}
>> +
>> +static void __kprobes kprobes_restore_local_irqflag(struct pt_regs *regs)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + if (kcb->saved_irqflag & PSR_I_BIT)
>> + regs->pstate |= PSR_I_BIT;
>> + else
>> + regs->pstate &= ~PSR_I_BIT;
>> +}
>> +
>> +static void __kprobes
>> +set_ss_context(struct kprobe_ctlblk *kcb, unsigned long addr)
>> +{
>> + kcb->ss_ctx.ss_status = KPROBES_STEP_PENDING;
>> + kcb->ss_ctx.match_addr = addr + sizeof(kprobe_opcode_t);
>> +}
>> +
>> +static void __kprobes clear_ss_context(struct kprobe_ctlblk *kcb)
>> +{
>> + kcb->ss_ctx.ss_status = KPROBES_STEP_NONE;
>> + kcb->ss_ctx.match_addr = 0;
>> +}
>> +
>> +static void __kprobes
>> +skip_singlestep_missed(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
>> +{
>> + /* set return addr to next pc to continue */
>> + instruction_pointer(regs) += sizeof(kprobe_opcode_t);
>> +}
>
> I'm not sure if this is the best approach for skip_singlestep_missed?
> If the condition check fails, we have very little to simulate :-), but
> I think the user will expect the kprobe to fire?
>
> For instance I have the following memcpy in my kernel:
>
> ffffffc0003b6500 <memcpy>:
> ffffffc0003b6500: aa0003e6 mov x6, x0
> ffffffc0003b6504: f100405f cmp x2, #0x10
> ffffffc0003b6508: 540003c3 b.cc ffffffc0003b6580 <memcpy+0x80>
> ffffffc0003b650c: cb0103e4 neg x4, x1
> ffffffc0003b6510: f2400c84 ands x4, x4, #0xf
> ffffffc0003b6514: 540001c0 b.eq ffffffc0003b654c <memcpy+0x4c>
>
> If I set the following kprobes:
> p:kprobes/memcpy1 0xffffffc0003b6500
> p:kprobes/memcpy2 0xffffffc0003b6508
>
> So the second kprobe is placed on a conditional instruction.
>
> I get the following statistics from perf:
> perf stat -e kprobes:memcpy1 -e kprobes:memcpy2 -a sleep 10
>
> Performance counter stats for 'system wide':
>
> 2,001 kprobes:memcpy1
> (100.00%)
> 1,563 kprobes:memcpy2
>
> 10.001287601 seconds time elapsed
>
> I (maybe naively) would expect the event counts to be the same? (as
> both pc values are "hit").
> For a case where the condition check fails, I think we should do something like:
>
> set_current_probe(p);
> instruction_pointer(regs) += sizeof(kprobe_opcode_t);
> post_kprobe_handler(kcb, regs);
>
Well maybe it's debatable but the implementations of both the 32bit and
64bit ARM kprobes feature assumes a conditional instruction that is not
executed (condition is false) is not to be considered as having been a
kprobe hit. Maybe the problem is how one defines "executed", but the
existing code assumes it means the condition must be true. I really
think this is reasonable, but if we change it we really should be
changing it for both ARM architectures and for any other architecture
with conditional instruction execution that implements it the way arm
does now. Right now users presumably look at the trace log and hit
counts on conditional instructions as an indication of how often a
condition has been met. Changing that is likely to be confusing and I
think removes useful information from the log. In your specific example
the existing behavior can be used for calculating a percentage of times
the condition was true or false. I personally think this is more useful
than the alternative behavior.
>> +
>> +static void __kprobes setup_singlestep(struct kprobe *p,
>> + struct pt_regs *regs,
>> + struct kprobe_ctlblk *kcb, int reenter)
>> +{
>> + unsigned long slot;
>> +
>> + if (reenter) {
>> + save_previous_kprobe(kcb);
>> + set_current_kprobe(p);
>> + kcb->kprobe_status = KPROBE_REENTER;
>> + } else {
>> + kcb->kprobe_status = KPROBE_HIT_SS;
>> + }
>> +
>> + if (p->ainsn.insn) {
>> + /* prepare for single stepping */
>> + slot = (unsigned long)p->ainsn.insn;
>> +
>> + set_ss_context(kcb, slot); /* mark pending ss */
>> +
>> + if (kcb->kprobe_status == KPROBE_REENTER)
>> + spsr_set_debug_flag(regs, 0);
>> +
>> + /* IRQs and single stepping do not mix well. */
>> + kprobes_save_local_irqflag(regs);
>> + kernel_enable_single_step(regs);
>> + instruction_pointer(regs) = slot;
>> + } else {
>> + BUG();
>> + }
>> +}
>> +
>> +static int __kprobes reenter_kprobe(struct kprobe *p,
>> + struct pt_regs *regs,
>> + struct kprobe_ctlblk *kcb)
>> +{
>> + switch (kcb->kprobe_status) {
>> + case KPROBE_HIT_SSDONE:
>> + case KPROBE_HIT_ACTIVE:
>> + if (!p->ainsn.check_condn || p->ainsn.check_condn(p, regs)) {
>> + kprobes_inc_nmissed_count(p);
>> + setup_singlestep(p, regs, kcb, 1);
>> + } else {
>> + /* condition check failed, skip stepping */
>> + skip_singlestep_missed(kcb, regs);
>> + }
>> + break;
>> + case KPROBE_HIT_SS:
>> + case KPROBE_REENTER:
>> + pr_warn("Unrecoverable kprobe detected at %p.\n", p->addr);
>> + dump_kprobe(p);
>> + BUG();
>> + break;
>> + default:
>> + WARN_ON(1);
>> + return 0;
>> + }
>> +
>> + return 1;
>> +}
>> +
>> +static void __kprobes
>> +post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
>> +{
>> + struct kprobe *cur = kprobe_running();
>> +
>> + if (!cur)
>> + return;
>> +
>> + /* return addr restore if non-branching insn */
>> + if (cur->ainsn.restore.type == RESTORE_PC) {
>> + instruction_pointer(regs) = cur->ainsn.restore.addr;
>> + if (!instruction_pointer(regs))
>> + BUG();
>> + }
>> +
>> + /* restore back original saved kprobe variables and continue */
>> + if (kcb->kprobe_status == KPROBE_REENTER) {
>> + restore_previous_kprobe(kcb);
>> + return;
>> + }
>> + /* call post handler */
>> + kcb->kprobe_status = KPROBE_HIT_SSDONE;
>> + if (cur->post_handler) {
>> + /* post_handler can hit breakpoint and single step
>> + * again, so we enable D-flag for recursive exception.
>> + */
>> + cur->post_handler(cur, regs, 0);
>> + }
>> +
>> + reset_current_kprobe();
>> +}
>> +
>> +int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
>> +{
>> + struct kprobe *cur = kprobe_running();
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + switch (kcb->kprobe_status) {
>> + case KPROBE_HIT_SS:
>> + case KPROBE_REENTER:
>> + /*
>> + * We are here because the instruction being single
>> + * stepped caused a page fault. We reset the current
>> + * kprobe and the ip points back to the probe address
>> + * and allow the page fault handler to continue as a
>> + * normal page fault.
>> + */
>> + instruction_pointer(regs) = (unsigned long)cur->addr;
>> + if (!instruction_pointer(regs))
>> + BUG();
>> + if (kcb->kprobe_status == KPROBE_REENTER)
>> + restore_previous_kprobe(kcb);
>> + else
>> + reset_current_kprobe();
>> +
>> + break;
>> + case KPROBE_HIT_ACTIVE:
>> + case KPROBE_HIT_SSDONE:
>> + /*
>> + * We increment the nmissed count for accounting,
>> + * we can also use npre/npostfault count for accounting
>> + * these specific fault cases.
>> + */
>> + kprobes_inc_nmissed_count(cur);
>> +
>> + /*
>> + * We come here because instructions in the pre/post
>> + * handler caused the page_fault, this could happen
>> + * if handler tries to access user space by
>> + * copy_from_user(), get_user() etc. Let the
>> + * user-specified handler try to fix it first.
>> + */
>> + if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
>> + return 1;
>> +
>> + /*
>> + * In case the user-specified fault handler returned
>> + * zero, try to fix up.
>> + */
>> + if (fixup_exception(regs))
>> + return 1;
>> +
>> + break;
>> + }
>> + return 0;
>> +}
>> +
>> +int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
>> + unsigned long val, void *data)
>> +{
>> + return NOTIFY_DONE;
>> +}
>> +
>> +void __kprobes kprobe_handler(struct pt_regs *regs)
>> +{
>> + struct kprobe *p, *cur;
>> + struct kprobe_ctlblk *kcb;
>> + unsigned long addr = instruction_pointer(regs);
>> +
>> + kcb = get_kprobe_ctlblk();
>> + cur = kprobe_running();
>> +
>> + p = get_kprobe((kprobe_opcode_t *) addr);
>> +
>> + if (p) {
>> + if (cur) {
>> + if (reenter_kprobe(p, regs, kcb))
>> + return;
>> + } else if (!p->ainsn.check_condn ||
>> + p->ainsn.check_condn(p, regs)) {
>> + /* Probe hit and conditional execution check ok. */
>> + set_current_kprobe(p);
>> + kcb->kprobe_status = KPROBE_HIT_ACTIVE;
>> +
>> + /*
>> + * If we have no pre-handler or it returned 0, we
>> + * continue with normal processing. If we have a
>> + * pre-handler and it returned non-zero, it prepped
>> + * for calling the break_handler below on re-entry,
>> + * so get out doing nothing more here.
>> + *
>> + * pre_handler can hit a breakpoint and can step thru
>> + * before return, keep PSTATE D-flag enabled until
>> + * pre_handler return back.
>> + */
>> + if (!p->pre_handler || !p->pre_handler(p, regs)) {
>> + kcb->kprobe_status = KPROBE_HIT_SS;
>> + setup_singlestep(p, regs, kcb, 0);
>> + return;
>> + }
>> + } else {
>> + /*
>> + * Breakpoint hit but conditional check failed,
>> + * so just skip the instruction (NOP behaviour)
>> + */
>> + skip_singlestep_missed(kcb, regs);
>> + return;
>> + }
>> + } else if (*(kprobe_opcode_t *) addr != BRK64_OPCODE_KPROBES) {
>> + /*
>> + * The breakpoint instruction was removed right
>> + * after we hit it. Another cpu has removed
>> + * either a probepoint or a debugger breakpoint
>> + * at this address. In either case, no further
>> + * handling of this interrupt is appropriate.
>> + * Return back to original instruction, and continue.
>> + */
>> + return;
>> + } else if (cur) {
>> + /* We probably hit a jprobe. Call its break handler. */
>> + if (cur->break_handler && cur->break_handler(cur, regs)) {
>> + kcb->kprobe_status = KPROBE_HIT_SS;
>> + setup_singlestep(cur, regs, kcb, 0);
>> + return;
>> + }
>> + } else {
>> + /* breakpoint is removed, now in a race
>> + * Return back to original instruction & continue.
>> + */
>> + }
>> +}
>> +
>> +static int __kprobes
>> +kprobe_ss_hit(struct kprobe_ctlblk *kcb, unsigned long addr)
>> +{
>> + if ((kcb->ss_ctx.ss_status == KPROBES_STEP_PENDING)
>> + && (kcb->ss_ctx.match_addr == addr)) {
>> + clear_ss_context(kcb); /* clear pending ss */
>> + return DBG_HOOK_HANDLED;
>> + }
>> + /* not ours, kprobes should ignore it */
>> + return DBG_HOOK_ERROR;
>> +}
>> +
>> +int __kprobes
>> +kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> + int retval;
>> +
>> + /* return error if this is not our step */
>> + retval = kprobe_ss_hit(kcb, instruction_pointer(regs));
>> +
>> + if (retval == DBG_HOOK_HANDLED) {
>> + kprobes_restore_local_irqflag(regs);
>> + kernel_disable_single_step();
>> +
>> + if (kcb->kprobe_status == KPROBE_REENTER)
>> + spsr_set_debug_flag(regs, 1);
>> +
>> + post_kprobe_handler(kcb, regs);
>> + }
>> +
>> + return retval;
>> +}
>> +
>> +int __kprobes
>> +kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
>> +{
>> + kprobe_handler(regs);
>> + return DBG_HOOK_HANDLED;
>> +}
>> +
>> +int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
>> +{
>> + struct jprobe *jp = container_of(p, struct jprobe, kp);
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> + long stack_ptr = stack_pointer(regs);
>> +
>> + kcb->jprobe_saved_regs = *regs;
>> + memcpy(kcb->jprobes_stack, (void *)stack_ptr,
>> + MIN_STACK_SIZE(stack_ptr));
>> +
>> + instruction_pointer(regs) = (long)jp->entry;
>> + preempt_disable();
>> + return 1;
>> +}
>> +
>> +void __kprobes jprobe_return(void)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + /*
>> + * Jprobe handler return by entering break exception,
>> + * encoded same as kprobe, but with following conditions
>> + * -a magic number in x0 to identify from rest of other kprobes.
>> + * -restore stack addr to original saved pt_regs
>> + */
>> + asm volatile ("ldr x0, [%0]\n\t"
>> + "mov sp, x0\n\t"
>> + "ldr x0, =" __stringify(JPROBES_MAGIC_NUM) "\n\t"
>> + "BRK %1\n\t"
>> + "NOP\n\t"
>> + :
>> + : "r"(&kcb->jprobe_saved_regs.sp),
>> + "I"(BRK64_ESR_KPROBES)
>> + : "memory");
>> +}
>> +
>> +int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> + long stack_addr = kcb->jprobe_saved_regs.sp;
>> + long orig_sp = stack_pointer(regs);
>> + struct jprobe *jp = container_of(p, struct jprobe, kp);
>> +
>> + if (regs->regs[0] == JPROBES_MAGIC_NUM) {
>> + if (orig_sp != stack_addr) {
>> + struct pt_regs *saved_regs =
>> + (struct pt_regs *)kcb->jprobe_saved_regs.sp;
>> + pr_err("current sp %lx does not match saved sp %lx\n",
>> + orig_sp, stack_addr);
>> + pr_err("Saved registers for jprobe %p\n", jp);
>> + show_regs(saved_regs);
>> + pr_err("Current registers\n");
>> + show_regs(regs);
>> + BUG();
>> + }
>> + *regs = kcb->jprobe_saved_regs;
>> + memcpy((void *)stack_addr, kcb->jprobes_stack,
>> + MIN_STACK_SIZE(stack_addr));
>> + preempt_enable_no_resched();
>> + return 1;
>> + }
>> + return 0;
>> +}
>> +
>> +int __init arch_init_kprobes(void)
>> +{
>> + return 0;
>> +}
>> diff --git a/arch/arm64/kernel/kprobes.h b/arch/arm64/kernel/kprobes.h
>> new file mode 100644
>> index 0000000..e98ad60
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes.h
>> @@ -0,0 +1,24 @@
>> +/*
>> + * arch/arm64/kernel/kprobes.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#ifndef _ARM_KERNEL_KPROBES_H
>> +#define _ARM_KERNEL_KPROBES_H
>> +
>> +#define JPROBES_MAGIC_NUM 0xa5a5a5a5a5a5a5a5
>> +
>> +/* Move this out to appropriate header file */
>> +int fixup_exception(struct pt_regs *regs);
>> +
>> +#endif /* _ARM_KERNEL_KPROBES_H */
>> diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
>> index a2c2986..2da5f4e 100644
>> --- a/arch/arm64/kernel/vmlinux.lds.S
>> +++ b/arch/arm64/kernel/vmlinux.lds.S
>> @@ -94,6 +94,7 @@ SECTIONS
>> TEXT_TEXT
>> SCHED_TEXT
>> LOCK_TEXT
>> + KPROBES_TEXT
>> HYPERVISOR_TEXT
>> *(.fixup)
>> *(.gnu.warning)
>> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
>> index 96da131..4c13dfb 100644
>> --- a/arch/arm64/mm/fault.c
>> +++ b/arch/arm64/mm/fault.c
>> @@ -39,6 +39,28 @@
>>
>> static const char *fault_name(unsigned int esr);
>>
>> +#ifdef CONFIG_KPROBES
>> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
>> +{
>> + int ret = 0;
>> +
>> + /* kprobe_running() needs smp_processor_id() */
>> + if (!user_mode(regs)) {
>> + preempt_disable();
>> + if (kprobe_running() && kprobe_fault_handler(regs, esr))
>> + ret = 1;
>> + preempt_enable();
>> + }
>> +
>> + return ret;
>> +}
>> +#else
>> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
>> +{
>> + return 0;
>> +}
>> +#endif
>> +
>> /*
>> * Dump out the page tables associated with 'addr' in mm 'mm'.
>> */
>> @@ -200,6 +222,9 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
>> unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
>> unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
>>
>> + if (notify_page_fault(regs, esr))
>> + return 0;
>> +
>> tsk = current;
>> mm = tsk->mm;
>>
>> --
>> 1.8.1.2
>>
Thanks,
-dl
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 3/7] arm64: Kprobes with single stepping support
@ 2015-07-02 22:36 ` David Long
0 siblings, 0 replies; 52+ messages in thread
From: David Long @ 2015-07-02 22:36 UTC (permalink / raw)
To: linux-arm-kernel
On 06/29/15 13:24, Steve Capper wrote:
> On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
>> From: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>>
>> Add support for basic kernel probes(kprobes) and jump probes
>> (jprobes) for ARM64.
>>
>> Kprobes utilizes software breakpoint and single step debug
>> exceptions supported on ARM v8.
>>
>> A software breakpoint is placed at the probe address to trap the
>> kernel execution into the kprobe handler.
>>
>> ARM v8 supports enabling single stepping before the break exception
>> return (ERET), with next PC in exception return address (ELR_EL1). The
>> kprobe handler prepares an executable memory slot for out-of-line
>> execution with a copy of the original instruction being probed, and
>> enables single stepping. The PC is set to the out-of-line slot address
>> before the ERET. With this scheme, the instruction is executed with the
>> exact same register context except for the PC (and DAIF) registers.
>>
>> Debug mask (PSTATE.D) is enabled only when single stepping a recursive
>> kprobe, e.g.: during kprobes reenter so that probed instruction can be
>> single stepped within the kprobe handler -exception- context.
>> The recursion depth of kprobe is always 2, i.e. upon probe re-entry,
>> any further re-entry is prevented by not calling handlers and the case
>> counted as a missed kprobe).
>>
>> Single stepping from the x-o-l slot has a drawback for PC-relative accesses
>> like branching and symbolic literals access as the offset from the new PC
>> (slot address) may not be ensured to fit in the immediate value of
>> the opcode. Such instructions need simulation, so reject
>> probing them.
>>
>> Instructions generating exceptions or cpu mode change are rejected
>> for probing.
>>
>> Instructions using Exclusive Monitor are rejected too.
>>
>> System instructions are mostly enabled for stepping, except MSR/MRS
>> accesses to "DAIF" flags in PSTATE, which are not safe for
>> probing.
>>
>> Thanks to Steve Capper and Pratyush Anand for several suggested
>> Changes.
>>
>> Signed-off-by: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>> Signed-off-by: Steve Capper <steve.capper@linaro.org>
>> Signed-off-by: David A. Long <dave.long@linaro.org>
>> ---
>> arch/arm64/Kconfig | 1 +
>> arch/arm64/include/asm/debug-monitors.h | 5 +
>> arch/arm64/include/asm/kprobes.h | 62 ++++
>> arch/arm64/include/asm/probes.h | 50 +++
>> arch/arm64/include/asm/ptrace.h | 3 +-
>> arch/arm64/kernel/Makefile | 1 +
>> arch/arm64/kernel/debug-monitors.c | 35 ++-
>> arch/arm64/kernel/kprobes-arm64.c | 68 ++++
>> arch/arm64/kernel/kprobes-arm64.h | 28 ++
>> arch/arm64/kernel/kprobes.c | 537 ++++++++++++++++++++++++++++++++
>> arch/arm64/kernel/kprobes.h | 24 ++
>> arch/arm64/kernel/vmlinux.lds.S | 1 +
>> arch/arm64/mm/fault.c | 25 ++
>> 13 files changed, 829 insertions(+), 11 deletions(-)
>> create mode 100644 arch/arm64/include/asm/kprobes.h
>> create mode 100644 arch/arm64/include/asm/probes.h
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.c
>> create mode 100644 arch/arm64/kernel/kprobes-arm64.h
>> create mode 100644 arch/arm64/kernel/kprobes.c
>> create mode 100644 arch/arm64/kernel/kprobes.h
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 966091f..45a9bd81 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -71,6 +71,7 @@ config ARM64
>> select HAVE_REGS_AND_STACK_ACCESS_API
>> select HAVE_RCU_TABLE_FREE
>> select HAVE_SYSCALL_TRACEPOINTS
>> + select HAVE_KPROBES
>> select IRQ_DOMAIN
>> select MODULES_USE_ELF_RELA
>> select NO_BOOTMEM
>> diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
>> index 40ec68a..92d7cea 100644
>> --- a/arch/arm64/include/asm/debug-monitors.h
>> +++ b/arch/arm64/include/asm/debug-monitors.h
>> @@ -90,6 +90,11 @@
>>
>> #define CACHE_FLUSH_IS_SAFE 1
>>
>> +/* kprobes BRK opcodes with ESR encoding */
>> +#define BRK64_ESR_MASK 0xFFFF
>> +#define BRK64_ESR_KPROBES 0x0004
>> +#define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
>> +
>> /* AArch32 */
>> #define DBG_ESR_EVT_BKPT 0x4
>> #define DBG_ESR_EVT_VECC 0x5
>> diff --git a/arch/arm64/include/asm/kprobes.h b/arch/arm64/include/asm/kprobes.h
>> new file mode 100644
>> index 0000000..af31c4d
>> --- /dev/null
>> +++ b/arch/arm64/include/asm/kprobes.h
>> @@ -0,0 +1,62 @@
>> +/*
>> + * arch/arm64/include/asm/kprobes.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#ifndef _ARM_KPROBES_H
>> +#define _ARM_KPROBES_H
>> +
>> +#include <linux/types.h>
>> +#include <linux/ptrace.h>
>> +#include <linux/percpu.h>
>> +
>> +#define __ARCH_WANT_KPROBES_INSN_SLOT
>> +#define MAX_INSN_SIZE 1
>> +#define MAX_STACK_SIZE 128
>> +
>> +#define flush_insn_slot(p) do { } while (0)
>> +#define kretprobe_blacklist_size 0
>> +
>> +#include <asm/probes.h>
>> +
>> +struct prev_kprobe {
>> + struct kprobe *kp;
>> + unsigned int status;
>> +};
>> +
>> +/* Single step context for kprobe */
>> +struct kprobe_step_ctx {
>> +#define KPROBES_STEP_NONE 0x0
>> +#define KPROBES_STEP_PENDING 0x1
>> + unsigned long ss_status;
>> + unsigned long match_addr;
>> +};
>> +
>> +/* per-cpu kprobe control block */
>> +struct kprobe_ctlblk {
>> + unsigned int kprobe_status;
>> + unsigned long saved_irqflag;
>> + struct prev_kprobe prev_kprobe;
>> + struct kprobe_step_ctx ss_ctx;
>> + struct pt_regs jprobe_saved_regs;
>> + char jprobes_stack[MAX_STACK_SIZE];
>> +};
>> +
>> +void arch_remove_kprobe(struct kprobe *);
>> +int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
>> +int kprobe_exceptions_notify(struct notifier_block *self,
>> + unsigned long val, void *data);
>> +int kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr);
>> +int kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr);
>> +
>> +#endif /* _ARM_KPROBES_H */
>> diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h
>> new file mode 100644
>> index 0000000..7f5a27f
>> --- /dev/null
>> +++ b/arch/arm64/include/asm/probes.h
>> @@ -0,0 +1,50 @@
>> +/*
>> + * arch/arm64/include/asm/probes.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +#ifndef _ARM_PROBES_H
>> +#define _ARM_PROBES_H
>> +
>> +struct kprobe;
>> +struct arch_specific_insn;
>> +
>> +typedef u32 kprobe_opcode_t;
>> +typedef unsigned long (kprobes_pstate_check_t)(unsigned long);
>> +typedef unsigned long
>> +(probes_condition_check_t)(struct kprobe *p, struct pt_regs *);
>> +typedef void
>> +(probes_prepare_t)(struct kprobe *, struct arch_specific_insn *);
>> +typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *);
>> +
>> +enum pc_restore_type {
>> + NO_RESTORE,
>> + RESTORE_PC,
>> +};
>> +
>> +struct kprobe_pc_restore {
>> + enum pc_restore_type type;
>> + unsigned long addr;
>> +};
>> +
>> +/* architecture specific copy of original instruction */
>> +struct arch_specific_insn {
>> + kprobe_opcode_t *insn;
>> + kprobes_pstate_check_t *pstate_cc;
>> + probes_condition_check_t *check_condn;
>> + probes_prepare_t *prepare;
>> + kprobes_handler_t *handler;
>> + /* restore address after step xol */
>> + struct kprobe_pc_restore restore;
>> +};
>> +
>> +#endif
>> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
>> index 8f440e9..aadf61a 100644
>> --- a/arch/arm64/include/asm/ptrace.h
>> +++ b/arch/arm64/include/asm/ptrace.h
>> @@ -206,7 +206,8 @@ static inline int valid_user_regs(struct user_pt_regs *regs)
>> return 0;
>> }
>>
>> -#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
>> +#define instruction_pointer(regs) ((regs)->pc)
>> +#define stack_pointer(regs) ((regs)->sp)
>>
>> #ifdef CONFIG_SMP
>> extern unsigned long profile_pc(struct pt_regs *regs);
>> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
>> index 426d076..1319872 100644
>> --- a/arch/arm64/kernel/Makefile
>> +++ b/arch/arm64/kernel/Makefile
>> @@ -32,6 +32,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
>> arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
>> arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
>> arm64-obj-$(CONFIG_KGDB) += kgdb.o
>> +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o
>> arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
>> arm64-obj-$(CONFIG_PCI) += pci.o
>> arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o
>> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
>> index b056369..486ee94 100644
>> --- a/arch/arm64/kernel/debug-monitors.c
>> +++ b/arch/arm64/kernel/debug-monitors.c
>> @@ -23,6 +23,7 @@
>> #include <linux/hardirq.h>
>> #include <linux/init.h>
>> #include <linux/ptrace.h>
>> +#include <linux/kprobes.h>
>> #include <linux/stat.h>
>> #include <linux/uaccess.h>
>>
>> @@ -228,6 +229,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
>> struct pt_regs *regs)
>> {
>> siginfo_t info;
>> + bool handler_found = false;
>>
>> /*
>> * If we are stepping a pending breakpoint, call the hw_breakpoint
>> @@ -251,15 +253,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
>> */
>> user_rewind_single_step(current);
>> } else {
>> +#ifdef CONFIG_KPROBES
>> + if (kprobe_single_step_handler(regs, esr) == DBG_HOOK_HANDLED)
>> + handler_found = true;
>> +#endif
>> if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
>> - return 0;
>> -
>> - pr_warning("Unexpected kernel single-step exception at EL1\n");
>> - /*
>> - * Re-enable stepping since we know that we will be
>> - * returning to regs.
>> - */
>> - set_regs_spsr_ss(regs);
>> + handler_found = true;
>> +
>> + if (!handler_found) {
>> + pr_warn("Unexpected kernel single-step exception at EL1\n");
>> + /*
>> + * Re-enable stepping since we know that we will be
>> + * returning to regs.
>> + */
>> + set_regs_spsr_ss(regs);
>> + }
>> }
>>
>> return 0;
>> @@ -315,8 +323,15 @@ static int brk_handler(unsigned long addr, unsigned int esr,
>> };
>>
>> force_sig_info(SIGTRAP, &info, current);
>> - } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
>> - pr_warning("Unexpected kernel BRK exception at EL1\n");
>> + }
>> +#ifdef CONFIG_KPROBES
>> + else if ((esr & BRK64_ESR_MASK) == BRK64_ESR_KPROBES) {
>> + if (kprobe_breakpoint_handler(regs, esr) != DBG_HOOK_HANDLED)
>> + return -EFAULT;
>> + }
>> +#endif
>> + else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
>> + pr_warn("Unexpected kernel BRK exception at EL1\n");
>> return -EFAULT;
>> }
>>
>> diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c
>> new file mode 100644
>> index 0000000..f958c52
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes-arm64.c
>> @@ -0,0 +1,68 @@
>> +/*
>> + * arch/arm64/kernel/kprobes-arm64.c
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/kprobes.h>
>> +#include <linux/module.h>
>> +#include <asm/kprobes.h>
>> +#include <asm/insn.h>
>> +
>> +#include "kprobes-arm64.h"
>> +
>> +static bool __kprobes aarch64_insn_is_steppable(u32 insn)
>> +{
>> + if (aarch64_get_insn_class(insn) == AARCH64_INSN_CLS_BR_SYS) {
>> + if (aarch64_insn_is_branch(insn))
>> + return false;
>> +
>> + /* modification of daif creates issues */
>> + if (aarch64_insn_is_daif_access(insn))
>> + return false;
>> +
>> + if (aarch64_insn_is_exception(insn))
>> + return false;
>> +
>> + if (aarch64_insn_is_hint(insn))
>> + return aarch64_insn_is_nop(insn);
>> +
>> + return true;
>> + }
>> +
>> + if (aarch64_insn_uses_literal(insn))
>> + return false;
>> +
>> + if (aarch64_insn_is_exclusive(insn))
>> + return false;
>> +
>> + return true;
>> +}
>> +
>> +/* Return:
>> + * INSN_REJECTED If instruction is one not allowed to kprobe,
>> + * INSN_GOOD If instruction is supported and uses instruction slot,
>> + * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
>> + */
>> +enum kprobe_insn __kprobes
>> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
>> +{
>> + /*
>> + * Instructions reading or modifying the PC won't work from the XOL
>> + * slot.
>> + */
>> + if (aarch64_insn_is_steppable(insn))
>> + return INSN_GOOD;
>> + else
>> + return INSN_REJECTED;
>> +}
>> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
>> new file mode 100644
>> index 0000000..87e7891
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes-arm64.h
>> @@ -0,0 +1,28 @@
>> +/*
>> + * arch/arm64/kernel/kprobes-arm64.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#ifndef _ARM_KERNEL_KPROBES_ARM64_H
>> +#define _ARM_KERNEL_KPROBES_ARM64_H
>> +
>> +enum kprobe_insn {
>> + INSN_REJECTED,
>> + INSN_GOOD_NO_SLOT,
>> + INSN_GOOD,
>> +};
>> +
>> +enum kprobe_insn __kprobes
>> +arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
>> +
>> +#endif /* _ARM_KERNEL_KPROBES_ARM64_H */
>> diff --git a/arch/arm64/kernel/kprobes.c b/arch/arm64/kernel/kprobes.c
>> new file mode 100644
>> index 0000000..601d2c6
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes.c
>> @@ -0,0 +1,537 @@
>> +/*
>> + * arch/arm64/kernel/kprobes.c
>> + *
>> + * Kprobes support for ARM64
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + * Author: Sandeepa Prabhu <sandeepa.prabhu@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + *
>> + */
>> +#include <linux/kernel.h>
>> +#include <linux/kprobes.h>
>> +#include <linux/module.h>
>> +#include <linux/slab.h>
>> +#include <linux/stop_machine.h>
>> +#include <linux/stringify.h>
>> +#include <asm/traps.h>
>> +#include <asm/ptrace.h>
>> +#include <asm/cacheflush.h>
>> +#include <asm/debug-monitors.h>
>> +#include <asm/system_misc.h>
>> +#include <asm/insn.h>
>> +
>> +#include "kprobes.h"
>> +#include "kprobes-arm64.h"
>> +
>> +#define MIN_STACK_SIZE(addr) min((unsigned long)MAX_STACK_SIZE, \
>> + (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
>> +
>> +DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
>> +DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
>> +
>> +static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
>> +{
>> + /* prepare insn slot */
>> + p->ainsn.insn[0] = p->opcode;
>> +
>> + flush_icache_range((uintptr_t) (p->ainsn.insn),
>> + (uintptr_t) (p->ainsn.insn) + MAX_INSN_SIZE);
>> +
>> + /*
>> + * Needs restoring of return address after stepping xol.
>> + */
>> + p->ainsn.restore.addr = (unsigned long) p->addr +
>> + sizeof(kprobe_opcode_t);
>> + p->ainsn.restore.type = RESTORE_PC;
>> +}
>> +
>> +int __kprobes arch_prepare_kprobe(struct kprobe *p)
>> +{
>> + kprobe_opcode_t insn;
>> + unsigned long probe_addr = (unsigned long)p->addr;
>> +
>> + /* copy instruction */
>> + insn = *p->addr;
>> + p->opcode = insn;
>> +
>> + if (in_exception_text(probe_addr))
>> + return -EINVAL;
>> +
>> + /* decode instruction */
>> + switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
>> + case INSN_REJECTED: /* insn not supported */
>> + return -EINVAL;
>> +
>> + case INSN_GOOD_NO_SLOT: /* insn need simulation */
>> + return -EINVAL;
>> +
>> + case INSN_GOOD: /* instruction uses slot */
>> + p->ainsn.insn = get_insn_slot();
>> + if (!p->ainsn.insn)
>> + return -ENOMEM;
>> + break;
>> + };
>> +
>> + /* prepare the instruction */
>> + arch_prepare_ss_slot(p);
>> +
>> + return 0;
>> +}
>> +
>> +static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
>> +{
>> + void *addrs[1];
>> + u32 insns[1];
>> +
>> + addrs[0] = (void *)addr;
>> + insns[0] = (u32)opcode;
>> +
>> + return aarch64_insn_patch_text_sync(addrs, insns, 1);
>> +}
>> +
>> +/* arm kprobe: install breakpoint in text */
>> +void __kprobes arch_arm_kprobe(struct kprobe *p)
>> +{
>> + patch_text(p->addr, BRK64_OPCODE_KPROBES);
>> +}
>> +
>> +/* disarm kprobe: remove breakpoint from text */
>> +void __kprobes arch_disarm_kprobe(struct kprobe *p)
>> +{
>> + patch_text(p->addr, p->opcode);
>> +}
>> +
>> +void __kprobes arch_remove_kprobe(struct kprobe *p)
>> +{
>> + if (p->ainsn.insn) {
>> + free_insn_slot(p->ainsn.insn, 0);
>> + p->ainsn.insn = NULL;
>> + }
>> +}
>> +
>> +static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
>> +{
>> + kcb->prev_kprobe.kp = kprobe_running();
>> + kcb->prev_kprobe.status = kcb->kprobe_status;
>> +}
>> +
>> +static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
>> +{
>> + __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
>> + kcb->kprobe_status = kcb->prev_kprobe.status;
>> +}
>> +
>> +static void __kprobes set_current_kprobe(struct kprobe *p)
>> +{
>> + __this_cpu_write(current_kprobe, p);
>> +}
>> +
>> +/*
>> + * The D-flag (Debug mask) is set (masked) upon exception entry.
>> + * Kprobes needs to clear (unmask) D-flag -ONLY- in case of recursive
>> + * probe i.e. when probe hit from kprobe handler context upon
>> + * executing the pre/post handlers. In this case we return with
>> + * D-flag clear so that single-stepping can be carried-out.
>> + *
>> + * Leave D-flag set in all other cases.
>> + */
>> +static void __kprobes
>> +spsr_set_debug_flag(struct pt_regs *regs, int mask)
>> +{
>> + unsigned long spsr = regs->pstate;
>> +
>> + if (mask)
>> + spsr |= PSR_D_BIT;
>> + else
>> + spsr &= ~PSR_D_BIT;
>> +
>> + regs->pstate = spsr;
>> +}
>> +
>> +/*
>> + * Interrupts need to be disabled before single-step mode is set, and not
>> + * reenabled until after single-step mode ends.
>> + * Without disabling interrupt on local CPU, there is a chance of
>> + * interrupt occurrence in the period of exception return and start of
>> + * out-of-line single-step, that result in wrongly single stepping
>> + * the interrupt handler.
>> + */
>> +static void __kprobes kprobes_save_local_irqflag(struct pt_regs *regs)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + kcb->saved_irqflag = regs->pstate;
>> + regs->pstate |= PSR_I_BIT;
>> +}
>> +
>> +static void __kprobes kprobes_restore_local_irqflag(struct pt_regs *regs)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + if (kcb->saved_irqflag & PSR_I_BIT)
>> + regs->pstate |= PSR_I_BIT;
>> + else
>> + regs->pstate &= ~PSR_I_BIT;
>> +}
>> +
>> +static void __kprobes
>> +set_ss_context(struct kprobe_ctlblk *kcb, unsigned long addr)
>> +{
>> + kcb->ss_ctx.ss_status = KPROBES_STEP_PENDING;
>> + kcb->ss_ctx.match_addr = addr + sizeof(kprobe_opcode_t);
>> +}
>> +
>> +static void __kprobes clear_ss_context(struct kprobe_ctlblk *kcb)
>> +{
>> + kcb->ss_ctx.ss_status = KPROBES_STEP_NONE;
>> + kcb->ss_ctx.match_addr = 0;
>> +}
>> +
>> +static void __kprobes
>> +skip_singlestep_missed(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
>> +{
>> + /* set return addr to next pc to continue */
>> + instruction_pointer(regs) += sizeof(kprobe_opcode_t);
>> +}
>
> I'm not sure if this is the best approach for skip_singlestep_missed?
> If the condition check fails, we have very little to simulate :-), but
> I think the user will expect the kprobe to fire?
>
> For instance I have the following memcpy in my kernel:
>
> ffffffc0003b6500 <memcpy>:
> ffffffc0003b6500: aa0003e6 mov x6, x0
> ffffffc0003b6504: f100405f cmp x2, #0x10
> ffffffc0003b6508: 540003c3 b.cc ffffffc0003b6580 <memcpy+0x80>
> ffffffc0003b650c: cb0103e4 neg x4, x1
> ffffffc0003b6510: f2400c84 ands x4, x4, #0xf
> ffffffc0003b6514: 540001c0 b.eq ffffffc0003b654c <memcpy+0x4c>
>
> If I set the following kprobes:
> p:kprobes/memcpy1 0xffffffc0003b6500
> p:kprobes/memcpy2 0xffffffc0003b6508
>
> So the second kprobe is placed on a conditional instruction.
>
> I get the following statistics from perf:
> perf stat -e kprobes:memcpy1 -e kprobes:memcpy2 -a sleep 10
>
> Performance counter stats for 'system wide':
>
> 2,001 kprobes:memcpy1
> (100.00%)
> 1,563 kprobes:memcpy2
>
> 10.001287601 seconds time elapsed
>
> I (maybe naively) would expect the event counts to be the same? (as
> both pc values are "hit").
> For a case where the condition check fails, I think we should do something like:
>
> set_current_probe(p);
> instruction_pointer(regs) += sizeof(kprobe_opcode_t);
> post_kprobe_handler(kcb, regs);
>
Well maybe it's debatable but the implementations of both the 32bit and
64bit ARM kprobes feature assumes a conditional instruction that is not
executed (condition is false) is not to be considered as having been a
kprobe hit. Maybe the problem is how one defines "executed", but the
existing code assumes it means the condition must be true. I really
think this is reasonable, but if we change it we really should be
changing it for both ARM architectures and for any other architecture
with conditional instruction execution that implements it the way arm
does now. Right now users presumably look at the trace log and hit
counts on conditional instructions as an indication of how often a
condition has been met. Changing that is likely to be confusing and I
think removes useful information from the log. In your specific example
the existing behavior can be used for calculating a percentage of times
the condition was true or false. I personally think this is more useful
than the alternative behavior.
>> +
>> +static void __kprobes setup_singlestep(struct kprobe *p,
>> + struct pt_regs *regs,
>> + struct kprobe_ctlblk *kcb, int reenter)
>> +{
>> + unsigned long slot;
>> +
>> + if (reenter) {
>> + save_previous_kprobe(kcb);
>> + set_current_kprobe(p);
>> + kcb->kprobe_status = KPROBE_REENTER;
>> + } else {
>> + kcb->kprobe_status = KPROBE_HIT_SS;
>> + }
>> +
>> + if (p->ainsn.insn) {
>> + /* prepare for single stepping */
>> + slot = (unsigned long)p->ainsn.insn;
>> +
>> + set_ss_context(kcb, slot); /* mark pending ss */
>> +
>> + if (kcb->kprobe_status == KPROBE_REENTER)
>> + spsr_set_debug_flag(regs, 0);
>> +
>> + /* IRQs and single stepping do not mix well. */
>> + kprobes_save_local_irqflag(regs);
>> + kernel_enable_single_step(regs);
>> + instruction_pointer(regs) = slot;
>> + } else {
>> + BUG();
>> + }
>> +}
>> +
>> +static int __kprobes reenter_kprobe(struct kprobe *p,
>> + struct pt_regs *regs,
>> + struct kprobe_ctlblk *kcb)
>> +{
>> + switch (kcb->kprobe_status) {
>> + case KPROBE_HIT_SSDONE:
>> + case KPROBE_HIT_ACTIVE:
>> + if (!p->ainsn.check_condn || p->ainsn.check_condn(p, regs)) {
>> + kprobes_inc_nmissed_count(p);
>> + setup_singlestep(p, regs, kcb, 1);
>> + } else {
>> + /* condition check failed, skip stepping */
>> + skip_singlestep_missed(kcb, regs);
>> + }
>> + break;
>> + case KPROBE_HIT_SS:
>> + case KPROBE_REENTER:
>> + pr_warn("Unrecoverable kprobe detected at %p.\n", p->addr);
>> + dump_kprobe(p);
>> + BUG();
>> + break;
>> + default:
>> + WARN_ON(1);
>> + return 0;
>> + }
>> +
>> + return 1;
>> +}
>> +
>> +static void __kprobes
>> +post_kprobe_handler(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
>> +{
>> + struct kprobe *cur = kprobe_running();
>> +
>> + if (!cur)
>> + return;
>> +
>> + /* return addr restore if non-branching insn */
>> + if (cur->ainsn.restore.type == RESTORE_PC) {
>> + instruction_pointer(regs) = cur->ainsn.restore.addr;
>> + if (!instruction_pointer(regs))
>> + BUG();
>> + }
>> +
>> + /* restore back original saved kprobe variables and continue */
>> + if (kcb->kprobe_status == KPROBE_REENTER) {
>> + restore_previous_kprobe(kcb);
>> + return;
>> + }
>> + /* call post handler */
>> + kcb->kprobe_status = KPROBE_HIT_SSDONE;
>> + if (cur->post_handler) {
>> + /* post_handler can hit breakpoint and single step
>> + * again, so we enable D-flag for recursive exception.
>> + */
>> + cur->post_handler(cur, regs, 0);
>> + }
>> +
>> + reset_current_kprobe();
>> +}
>> +
>> +int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
>> +{
>> + struct kprobe *cur = kprobe_running();
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + switch (kcb->kprobe_status) {
>> + case KPROBE_HIT_SS:
>> + case KPROBE_REENTER:
>> + /*
>> + * We are here because the instruction being single
>> + * stepped caused a page fault. We reset the current
>> + * kprobe and the ip points back to the probe address
>> + * and allow the page fault handler to continue as a
>> + * normal page fault.
>> + */
>> + instruction_pointer(regs) = (unsigned long)cur->addr;
>> + if (!instruction_pointer(regs))
>> + BUG();
>> + if (kcb->kprobe_status == KPROBE_REENTER)
>> + restore_previous_kprobe(kcb);
>> + else
>> + reset_current_kprobe();
>> +
>> + break;
>> + case KPROBE_HIT_ACTIVE:
>> + case KPROBE_HIT_SSDONE:
>> + /*
>> + * We increment the nmissed count for accounting,
>> + * we can also use npre/npostfault count for accounting
>> + * these specific fault cases.
>> + */
>> + kprobes_inc_nmissed_count(cur);
>> +
>> + /*
>> + * We come here because instructions in the pre/post
>> + * handler caused the page_fault, this could happen
>> + * if handler tries to access user space by
>> + * copy_from_user(), get_user() etc. Let the
>> + * user-specified handler try to fix it first.
>> + */
>> + if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
>> + return 1;
>> +
>> + /*
>> + * In case the user-specified fault handler returned
>> + * zero, try to fix up.
>> + */
>> + if (fixup_exception(regs))
>> + return 1;
>> +
>> + break;
>> + }
>> + return 0;
>> +}
>> +
>> +int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
>> + unsigned long val, void *data)
>> +{
>> + return NOTIFY_DONE;
>> +}
>> +
>> +void __kprobes kprobe_handler(struct pt_regs *regs)
>> +{
>> + struct kprobe *p, *cur;
>> + struct kprobe_ctlblk *kcb;
>> + unsigned long addr = instruction_pointer(regs);
>> +
>> + kcb = get_kprobe_ctlblk();
>> + cur = kprobe_running();
>> +
>> + p = get_kprobe((kprobe_opcode_t *) addr);
>> +
>> + if (p) {
>> + if (cur) {
>> + if (reenter_kprobe(p, regs, kcb))
>> + return;
>> + } else if (!p->ainsn.check_condn ||
>> + p->ainsn.check_condn(p, regs)) {
>> + /* Probe hit and conditional execution check ok. */
>> + set_current_kprobe(p);
>> + kcb->kprobe_status = KPROBE_HIT_ACTIVE;
>> +
>> + /*
>> + * If we have no pre-handler or it returned 0, we
>> + * continue with normal processing. If we have a
>> + * pre-handler and it returned non-zero, it prepped
>> + * for calling the break_handler below on re-entry,
>> + * so get out doing nothing more here.
>> + *
>> + * pre_handler can hit a breakpoint and can step thru
>> + * before return, keep PSTATE D-flag enabled until
>> + * pre_handler return back.
>> + */
>> + if (!p->pre_handler || !p->pre_handler(p, regs)) {
>> + kcb->kprobe_status = KPROBE_HIT_SS;
>> + setup_singlestep(p, regs, kcb, 0);
>> + return;
>> + }
>> + } else {
>> + /*
>> + * Breakpoint hit but conditional check failed,
>> + * so just skip the instruction (NOP behaviour)
>> + */
>> + skip_singlestep_missed(kcb, regs);
>> + return;
>> + }
>> + } else if (*(kprobe_opcode_t *) addr != BRK64_OPCODE_KPROBES) {
>> + /*
>> + * The breakpoint instruction was removed right
>> + * after we hit it. Another cpu has removed
>> + * either a probepoint or a debugger breakpoint
>> + * at this address. In either case, no further
>> + * handling of this interrupt is appropriate.
>> + * Return back to original instruction, and continue.
>> + */
>> + return;
>> + } else if (cur) {
>> + /* We probably hit a jprobe. Call its break handler. */
>> + if (cur->break_handler && cur->break_handler(cur, regs)) {
>> + kcb->kprobe_status = KPROBE_HIT_SS;
>> + setup_singlestep(cur, regs, kcb, 0);
>> + return;
>> + }
>> + } else {
>> + /* breakpoint is removed, now in a race
>> + * Return back to original instruction & continue.
>> + */
>> + }
>> +}
>> +
>> +static int __kprobes
>> +kprobe_ss_hit(struct kprobe_ctlblk *kcb, unsigned long addr)
>> +{
>> + if ((kcb->ss_ctx.ss_status == KPROBES_STEP_PENDING)
>> + && (kcb->ss_ctx.match_addr == addr)) {
>> + clear_ss_context(kcb); /* clear pending ss */
>> + return DBG_HOOK_HANDLED;
>> + }
>> + /* not ours, kprobes should ignore it */
>> + return DBG_HOOK_ERROR;
>> +}
>> +
>> +int __kprobes
>> +kprobe_single_step_handler(struct pt_regs *regs, unsigned int esr)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> + int retval;
>> +
>> + /* return error if this is not our step */
>> + retval = kprobe_ss_hit(kcb, instruction_pointer(regs));
>> +
>> + if (retval == DBG_HOOK_HANDLED) {
>> + kprobes_restore_local_irqflag(regs);
>> + kernel_disable_single_step();
>> +
>> + if (kcb->kprobe_status == KPROBE_REENTER)
>> + spsr_set_debug_flag(regs, 1);
>> +
>> + post_kprobe_handler(kcb, regs);
>> + }
>> +
>> + return retval;
>> +}
>> +
>> +int __kprobes
>> +kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
>> +{
>> + kprobe_handler(regs);
>> + return DBG_HOOK_HANDLED;
>> +}
>> +
>> +int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
>> +{
>> + struct jprobe *jp = container_of(p, struct jprobe, kp);
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> + long stack_ptr = stack_pointer(regs);
>> +
>> + kcb->jprobe_saved_regs = *regs;
>> + memcpy(kcb->jprobes_stack, (void *)stack_ptr,
>> + MIN_STACK_SIZE(stack_ptr));
>> +
>> + instruction_pointer(regs) = (long)jp->entry;
>> + preempt_disable();
>> + return 1;
>> +}
>> +
>> +void __kprobes jprobe_return(void)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> +
>> + /*
>> + * Jprobe handler return by entering break exception,
>> + * encoded same as kprobe, but with following conditions
>> + * -a magic number in x0 to identify from rest of other kprobes.
>> + * -restore stack addr to original saved pt_regs
>> + */
>> + asm volatile ("ldr x0, [%0]\n\t"
>> + "mov sp, x0\n\t"
>> + "ldr x0, =" __stringify(JPROBES_MAGIC_NUM) "\n\t"
>> + "BRK %1\n\t"
>> + "NOP\n\t"
>> + :
>> + : "r"(&kcb->jprobe_saved_regs.sp),
>> + "I"(BRK64_ESR_KPROBES)
>> + : "memory");
>> +}
>> +
>> +int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
>> +{
>> + struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
>> + long stack_addr = kcb->jprobe_saved_regs.sp;
>> + long orig_sp = stack_pointer(regs);
>> + struct jprobe *jp = container_of(p, struct jprobe, kp);
>> +
>> + if (regs->regs[0] == JPROBES_MAGIC_NUM) {
>> + if (orig_sp != stack_addr) {
>> + struct pt_regs *saved_regs =
>> + (struct pt_regs *)kcb->jprobe_saved_regs.sp;
>> + pr_err("current sp %lx does not match saved sp %lx\n",
>> + orig_sp, stack_addr);
>> + pr_err("Saved registers for jprobe %p\n", jp);
>> + show_regs(saved_regs);
>> + pr_err("Current registers\n");
>> + show_regs(regs);
>> + BUG();
>> + }
>> + *regs = kcb->jprobe_saved_regs;
>> + memcpy((void *)stack_addr, kcb->jprobes_stack,
>> + MIN_STACK_SIZE(stack_addr));
>> + preempt_enable_no_resched();
>> + return 1;
>> + }
>> + return 0;
>> +}
>> +
>> +int __init arch_init_kprobes(void)
>> +{
>> + return 0;
>> +}
>> diff --git a/arch/arm64/kernel/kprobes.h b/arch/arm64/kernel/kprobes.h
>> new file mode 100644
>> index 0000000..e98ad60
>> --- /dev/null
>> +++ b/arch/arm64/kernel/kprobes.h
>> @@ -0,0 +1,24 @@
>> +/*
>> + * arch/arm64/kernel/kprobes.h
>> + *
>> + * Copyright (C) 2013 Linaro Limited.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
>> + * General Public License for more details.
>> + */
>> +
>> +#ifndef _ARM_KERNEL_KPROBES_H
>> +#define _ARM_KERNEL_KPROBES_H
>> +
>> +#define JPROBES_MAGIC_NUM 0xa5a5a5a5a5a5a5a5
>> +
>> +/* Move this out to appropriate header file */
>> +int fixup_exception(struct pt_regs *regs);
>> +
>> +#endif /* _ARM_KERNEL_KPROBES_H */
>> diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
>> index a2c2986..2da5f4e 100644
>> --- a/arch/arm64/kernel/vmlinux.lds.S
>> +++ b/arch/arm64/kernel/vmlinux.lds.S
>> @@ -94,6 +94,7 @@ SECTIONS
>> TEXT_TEXT
>> SCHED_TEXT
>> LOCK_TEXT
>> + KPROBES_TEXT
>> HYPERVISOR_TEXT
>> *(.fixup)
>> *(.gnu.warning)
>> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
>> index 96da131..4c13dfb 100644
>> --- a/arch/arm64/mm/fault.c
>> +++ b/arch/arm64/mm/fault.c
>> @@ -39,6 +39,28 @@
>>
>> static const char *fault_name(unsigned int esr);
>>
>> +#ifdef CONFIG_KPROBES
>> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
>> +{
>> + int ret = 0;
>> +
>> + /* kprobe_running() needs smp_processor_id() */
>> + if (!user_mode(regs)) {
>> + preempt_disable();
>> + if (kprobe_running() && kprobe_fault_handler(regs, esr))
>> + ret = 1;
>> + preempt_enable();
>> + }
>> +
>> + return ret;
>> +}
>> +#else
>> +static inline int notify_page_fault(struct pt_regs *regs, unsigned int esr)
>> +{
>> + return 0;
>> +}
>> +#endif
>> +
>> /*
>> * Dump out the page tables associated with 'addr' in mm 'mm'.
>> */
>> @@ -200,6 +222,9 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
>> unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
>> unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
>>
>> + if (notify_page_fault(regs, esr))
>> + return 0;
>> +
>> tsk = current;
>> mm = tsk->mm;
>>
>> --
>> 1.8.1.2
>>
Thanks,
-dl
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
2015-06-29 18:16 ` William Cohen
@ 2015-07-31 14:15 ` Catalin Marinas
-1 siblings, 0 replies; 52+ messages in thread
From: Catalin Marinas @ 2015-07-31 14:15 UTC (permalink / raw)
To: William Cohen
Cc: Steve Capper, David Long, Jon Medhurst (Tixy),
Russell King, Ananth N Mavinakayanahalli, Will Deacon,
linux-kernel, Anil S Keshavamurthy, Masami Hiramatsu, Mark Brown,
sandeepa.s.prabhu, David Miller, linux-arm-kernel
On Mon, Jun 29, 2015 at 02:16:08PM -0400, William Cohen wrote:
> On 06/29/2015 01:25 PM, Steve Capper wrote:
> > On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> >> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> >> index ff8a55f..bdcfa62 100644
> >> --- a/arch/arm64/kernel/kprobes-arm64.h
> >> +++ b/arch/arm64/kernel/kprobes-arm64.h
> >> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> >> enum kprobe_insn __kprobes
> >> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
> >>
> >> +#define SAVE_REGS_STRING\
> >> + " stp x0, x1, [sp, #16 * 0]\n" \
> >> + " stp x2, x3, [sp, #16 * 1]\n" \
> >> + " stp x4, x5, [sp, #16 * 2]\n" \
> >> + " stp x6, x7, [sp, #16 * 3]\n" \
> >> + " stp x8, x9, [sp, #16 * 4]\n" \
> >> + " stp x10, x11, [sp, #16 * 5]\n" \
> >> + " stp x12, x13, [sp, #16 * 6]\n" \
> >> + " stp x14, x15, [sp, #16 * 7]\n" \
> >> + " stp x16, x17, [sp, #16 * 8]\n" \
> >> + " stp x18, x19, [sp, #16 * 9]\n" \
> >> + " stp x20, x21, [sp, #16 * 10]\n" \
> >> + " stp x22, x23, [sp, #16 * 11]\n" \
> >> + " stp x24, x25, [sp, #16 * 12]\n" \
> >> + " stp x26, x27, [sp, #16 * 13]\n" \
> >> + " stp x28, x29, [sp, #16 * 14]\n" \
> >> + " str x30, [sp, #16 * 15]\n" \
> >> + " mrs x0, nzcv\n" \
> >> + " str x0, [sp, #8 * 33]\n"
> >> +
> >> +
> >> +#define RESTORE_REGS_STRING\
> >> + " ldr x0, [sp, #8 * 33]\n" \
> >> + " msr nzcv, x0\n" \
> >> + " ldp x0, x1, [sp, #16 * 0]\n" \
> >> + " ldp x2, x3, [sp, #16 * 1]\n" \
> >> + " ldp x4, x5, [sp, #16 * 2]\n" \
> >> + " ldp x6, x7, [sp, #16 * 3]\n" \
> >> + " ldp x8, x9, [sp, #16 * 4]\n" \
> >> + " ldp x10, x11, [sp, #16 * 5]\n" \
> >> + " ldp x12, x13, [sp, #16 * 6]\n" \
> >> + " ldp x14, x15, [sp, #16 * 7]\n" \
> >> + " ldp x16, x17, [sp, #16 * 8]\n" \
> >> + " ldp x18, x19, [sp, #16 * 9]\n" \
> >> + " ldp x20, x21, [sp, #16 * 10]\n" \
> >> + " ldp x22, x23, [sp, #16 * 11]\n" \
> >> + " ldp x24, x25, [sp, #16 * 12]\n" \
> >> + " ldp x26, x27, [sp, #16 * 13]\n" \
> >> + " ldp x28, x29, [sp, #16 * 14]\n" \
> >> + " ldr x30, [sp, #16 * 15]\n"
> >
> > Do we need to restore x19..x28 as they are callee-saved?
>
> The goal was to make the trampoline not affect the values in any of
> the registers, so if the calling conventions ever change the code will
> still work. Figured it was safer and clearer just to save everything
> rather than assuming that the compiler's code generated for
> trampoline_probe_handler is going to save certain registers.
If the PCS ever changes, we have other issues like cpu_switch_to(). So
it's safe to assume that x19..x29 are callee-saved.
--
Catalin
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH v7 5/7] arm64: Add trampoline code for kretprobes
@ 2015-07-31 14:15 ` Catalin Marinas
0 siblings, 0 replies; 52+ messages in thread
From: Catalin Marinas @ 2015-07-31 14:15 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 29, 2015 at 02:16:08PM -0400, William Cohen wrote:
> On 06/29/2015 01:25 PM, Steve Capper wrote:
> > On 15 June 2015 at 20:07, David Long <dave.long@linaro.org> wrote:
> >> diff --git a/arch/arm64/kernel/kprobes-arm64.h b/arch/arm64/kernel/kprobes-arm64.h
> >> index ff8a55f..bdcfa62 100644
> >> --- a/arch/arm64/kernel/kprobes-arm64.h
> >> +++ b/arch/arm64/kernel/kprobes-arm64.h
> >> @@ -27,4 +27,45 @@ extern kprobes_pstate_check_t * const kprobe_condition_checks[16];
> >> enum kprobe_insn __kprobes
> >> arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi);
> >>
> >> +#define SAVE_REGS_STRING\
> >> + " stp x0, x1, [sp, #16 * 0]\n" \
> >> + " stp x2, x3, [sp, #16 * 1]\n" \
> >> + " stp x4, x5, [sp, #16 * 2]\n" \
> >> + " stp x6, x7, [sp, #16 * 3]\n" \
> >> + " stp x8, x9, [sp, #16 * 4]\n" \
> >> + " stp x10, x11, [sp, #16 * 5]\n" \
> >> + " stp x12, x13, [sp, #16 * 6]\n" \
> >> + " stp x14, x15, [sp, #16 * 7]\n" \
> >> + " stp x16, x17, [sp, #16 * 8]\n" \
> >> + " stp x18, x19, [sp, #16 * 9]\n" \
> >> + " stp x20, x21, [sp, #16 * 10]\n" \
> >> + " stp x22, x23, [sp, #16 * 11]\n" \
> >> + " stp x24, x25, [sp, #16 * 12]\n" \
> >> + " stp x26, x27, [sp, #16 * 13]\n" \
> >> + " stp x28, x29, [sp, #16 * 14]\n" \
> >> + " str x30, [sp, #16 * 15]\n" \
> >> + " mrs x0, nzcv\n" \
> >> + " str x0, [sp, #8 * 33]\n"
> >> +
> >> +
> >> +#define RESTORE_REGS_STRING\
> >> + " ldr x0, [sp, #8 * 33]\n" \
> >> + " msr nzcv, x0\n" \
> >> + " ldp x0, x1, [sp, #16 * 0]\n" \
> >> + " ldp x2, x3, [sp, #16 * 1]\n" \
> >> + " ldp x4, x5, [sp, #16 * 2]\n" \
> >> + " ldp x6, x7, [sp, #16 * 3]\n" \
> >> + " ldp x8, x9, [sp, #16 * 4]\n" \
> >> + " ldp x10, x11, [sp, #16 * 5]\n" \
> >> + " ldp x12, x13, [sp, #16 * 6]\n" \
> >> + " ldp x14, x15, [sp, #16 * 7]\n" \
> >> + " ldp x16, x17, [sp, #16 * 8]\n" \
> >> + " ldp x18, x19, [sp, #16 * 9]\n" \
> >> + " ldp x20, x21, [sp, #16 * 10]\n" \
> >> + " ldp x22, x23, [sp, #16 * 11]\n" \
> >> + " ldp x24, x25, [sp, #16 * 12]\n" \
> >> + " ldp x26, x27, [sp, #16 * 13]\n" \
> >> + " ldp x28, x29, [sp, #16 * 14]\n" \
> >> + " ldr x30, [sp, #16 * 15]\n"
> >
> > Do we need to restore x19..x28 as they are callee-saved?
>
> The goal was to make the trampoline not affect the values in any of
> the registers, so if the calling conventions ever change the code will
> still work. Figured it was safer and clearer just to save everything
> rather than assuming that the compiler's code generated for
> trampoline_probe_handler is going to save certain registers.
If the PCS ever changes, we have other issues like cpu_switch_to(). So
it's safe to assume that x19..x29 are callee-saved.
--
Catalin
^ permalink raw reply [flat|nested] 52+ messages in thread
end of thread, other threads:[~2015-07-31 14:15 UTC | newest]
Thread overview: 52+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-15 19:07 [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support David Long
2015-06-15 19:07 ` David Long
2015-06-15 19:07 ` [PATCH v7 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature David Long
2015-06-15 19:07 ` David Long
2015-06-29 17:23 ` Steve Capper
2015-06-29 17:23 ` Steve Capper
2015-06-29 18:36 ` David Long
2015-06-29 18:36 ` David Long
2015-06-30 10:51 ` Steve Capper
2015-06-30 10:51 ` Steve Capper
2015-06-15 19:07 ` [PATCH v7 2/7] arm64: Add more test functions to insn.c David Long
2015-06-15 19:07 ` David Long
2015-06-29 17:23 ` Steve Capper
2015-06-29 17:23 ` Steve Capper
2015-06-30 0:06 ` David Long
2015-06-30 0:06 ` David Long
2015-06-15 19:07 ` [PATCH v7 3/7] arm64: Kprobes with single stepping support David Long
2015-06-15 19:07 ` David Long
2015-06-29 17:24 ` Steve Capper
2015-06-29 17:24 ` Steve Capper
2015-07-02 22:36 ` David Long
2015-07-02 22:36 ` David Long
2015-06-15 19:07 ` [PATCH v7 4/7] arm64: kprobes instruction simulation support David Long
2015-06-15 19:07 ` David Long
2015-06-29 17:25 ` Steve Capper
2015-06-29 17:25 ` Steve Capper
2015-06-15 19:07 ` [PATCH v7 5/7] arm64: Add trampoline code for kretprobes David Long
2015-06-15 19:07 ` David Long
2015-06-16 15:09 ` William Cohen
2015-06-16 15:09 ` William Cohen
2015-06-17 18:37 ` David Long
2015-06-17 18:37 ` David Long
2015-06-29 17:25 ` Steve Capper
2015-06-29 17:25 ` Steve Capper
2015-06-29 18:16 ` William Cohen
2015-06-29 18:16 ` William Cohen
2015-06-30 11:04 ` Steve Capper
2015-06-30 11:04 ` Steve Capper
2015-06-30 13:41 ` William Cohen
2015-06-30 13:41 ` William Cohen
2015-07-31 14:15 ` Catalin Marinas
2015-07-31 14:15 ` Catalin Marinas
2015-06-15 19:07 ` [PATCH v7 6/7] arm64: Add kernel return probes support (kretprobes) David Long
2015-06-15 19:07 ` David Long
2015-06-15 19:07 ` [PATCH v7 7/7] kprobes: Add arm64 case in kprobe example module David Long
2015-06-15 19:07 ` David Long
2015-06-17 14:18 ` [PATCH v7 0/7] arm64: Add kernel probes (kprobes) support Masami Hiramatsu
2015-06-17 14:18 ` Masami Hiramatsu
2015-06-17 18:51 ` David Long
2015-06-17 18:51 ` David Long
2015-06-29 17:23 ` Steve Capper
2015-06-29 17:23 ` Steve Capper
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