[PATCH 0/2] Some fixes on top of WA batch patches

[PATCH 0/2] Some fixes on top of WA batch patches

[Arun Siluvery]

Patch1 - Fix warnings in kerneldoc reported by 0-day
Patch2 - Tvrtko noticed a WARNING that WA batch is not initialized for Gen9
during boot (Gen9 changes not yet added). Current code destroys the wa ctx
page and he observed it triggered another warning complaining about sleeping
in atomic context but there is nothing indicating that. To keep things simple
we now perform Gen check before allocating the page and bail out earlier if
there no WA to be initialized.

Arun Siluvery (2):
  drm/i915: Fix warnings reported by 0-day
  drm/i915: Bail out early if WA batch is not available for given Gen

 drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 1/2] drm/i915: Fix warnings reported by 0-day

[Arun Siluvery]

Kernel 0-day framework reported warnings with WA batch patches, this patch
fixes those warnings and an additional warning reported in intel_lrc.c file.

Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e4ebe05..6bfa2f1 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -784,6 +784,7 @@ static int logical_ring_prepare(struct drm_i915_gem_request *req, int bytes)
  * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
  *
  * @request: The request to start some new work for
+ * @ctx: Logical ring context whose ringbuffer is being prepared.
  * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
  *
  * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
@@ -1132,7 +1133,7 @@ static inline int wa_ctx_end(struct i915_wa_ctx_bb *wa_ctx,
  *
  *  The number of WA applied are not known at the beginning; we use this field
  *  to return the no of DWORDS written.
-
+ *
  *  It is to be noted that this batch does not contain MI_BATCH_BUFFER_END
  *  so it adds NOOPs as padding to make it cacheline aligned.
  *  MI_BATCH_BUFFER_END will be added to perctx batch and both of them together
@@ -1209,6 +1210,7 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
  * @wa_ctx: structure representing wa_ctx
  *  offset: specifies start of the batch, should be cache-aligned.
  *  size: size of the batch in DWORDS but HW expects in terms of cachelines
+ * @batch: page in which WA are loaded
  * @offset: This field specifies the start of this batch.
  *   This batch is started immediately after indirect_ctx batch. Since we ensure
  *   that indirect_ctx ends on a cacheline this batch is aligned automatically.
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 2/2] drm/i915: Bail out early if WA batch is not available for given Gen

[Arun Siluvery]

To initialize WA batch, at the moment we first allocate batch and then check
whether we have any WA to be initialized for the given Gen; if we don't have
any WA then we WARN the user, destroy the batch and return but this is causing
another WARN in cleanup code complaining about sleeping in atomic context.
Till we understand this better and to keep things simpler, bail out early
if we don't have WA.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 6bfa2f1..5298103 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1275,6 +1275,12 @@ static int intel_init_workaround_bb(struct intel_engine_cs *ring)
 
 	WARN_ON(ring->id != RCS);
 
+	/* update this when WA for higher Gen are added */
+	if (WARN(INTEL_INFO(ring->dev)->gen > 8,
+		 "WA batch buffer is not initialized for Gen%d\n",
+		 INTEL_INFO(ring->dev)->gen))
+		return 0;
+
 	/* some WA perform writes to scratch page, ensure it is valid */
 	if (ring->scratch.obj == NULL) {
 		DRM_ERROR("scratch page not allocated for %s\n", ring->name);
@@ -1305,11 +1311,6 @@ static int intel_init_workaround_bb(struct intel_engine_cs *ring)
 					  &offset);
 		if (ret)
 			goto out;
-	} else {
-		WARN(INTEL_INFO(ring->dev)->gen >= 8,
-		     "WA batch buffer is not initialized for Gen%d\n",
-		     INTEL_INFO(ring->dev)->gen);
-		lrc_destroy_wa_ctx_obj(ring);
 	}
 
 out:
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 0/2] Some fixes on top of WA batch patches

[Chris Wilson]

On Tue, Jun 23, 2015 at 03:50:42PM +0100, Arun Siluvery wrote:
> Patch1 - Fix warnings in kerneldoc reported by 0-day
> Patch2 - Tvrtko noticed a WARNING that WA batch is not initialized for Gen9
> during boot (Gen9 changes not yet added). Current code destroys the wa ctx
> page and he observed it triggered another warning complaining about sleeping
> in atomic context but there is nothing indicating that. To keep things simple
> we now perform Gen check before allocating the page and bail out earlier if
> there no WA to be initialized.
> 
> Arun Siluvery (2):
>   drm/i915: Fix warnings reported by 0-day
>   drm/i915: Bail out early if WA batch is not available for given Gen

Both seem reasonable,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 0/2] Some fixes on top of WA batch patches

[Daniel Vetter]

On Tue, Jun 23, 2015 at 04:12:33PM +0100, Chris Wilson wrote:
> On Tue, Jun 23, 2015 at 03:50:42PM +0100, Arun Siluvery wrote:
> > Patch1 - Fix warnings in kerneldoc reported by 0-day
> > Patch2 - Tvrtko noticed a WARNING that WA batch is not initialized for Gen9
> > during boot (Gen9 changes not yet added). Current code destroys the wa ctx
> > page and he observed it triggered another warning complaining about sleeping
> > in atomic context but there is nothing indicating that. To keep things simple
> > we now perform Gen check before allocating the page and bail out earlier if
> > there no WA to be initialized.
> > 
> > Arun Siluvery (2):
> >   drm/i915: Fix warnings reported by 0-day
> >   drm/i915: Bail out early if WA batch is not available for given Gen
> 
> Both seem reasonable,
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Both applied to dinq, thanks for the speedy fixups.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx