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* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-06-26 19:12 ` Tirumalesh Chalamarla
  0 siblings, 0 replies; 15+ messages in thread
From: Tirumalesh Chalamarla @ 2015-06-26 19:12 UTC (permalink / raw)
  To: marc.zyngier, Catalin.Marinas, Will.Deacon
  Cc: linux-arm-kernel, linux-kernel, rrichter, devicetree,
	Tirumalesh Chalamarla

From: Tirumalesh Chalamarla <tchalamarla@cavium.com>

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
 		gic0: interrupt-controller@8010,00000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
 			interrupt-controller;
 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
 			interrupts = <1 9 0xf04>;
+
+			its: gic-its@8010,00020000 {
+				compatible = "arm,gic-v3-its";
+				msi-controller;
+				reg = <0x8010 0x20000 0x0 0x200000>;
+			};
 		};
 
 		uaa0: serial@87e0,24000000 {
-- 
2.1.0


^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-06-26 19:12 ` Tirumalesh Chalamarla
  0 siblings, 0 replies; 15+ messages in thread
From: Tirumalesh Chalamarla @ 2015-06-26 19:12 UTC (permalink / raw)
  To: marc.zyngier-5wv7dgnIgG8, Catalin.Marinas-5wv7dgnIgG8,
	Will.Deacon-5wv7dgnIgG8
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	rrichter-YGCgFSpz5w/QT0dZR+AlfA,
	devicetree-u79uwXL29TY76Z2rM5mHXA, Tirumalesh Chalamarla

From: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
Acked-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
---
 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
 		gic0: interrupt-controller@8010,00000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
 			interrupt-controller;
 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
 			interrupts = <1 9 0xf04>;
+
+			its: gic-its@8010,00020000 {
+				compatible = "arm,gic-v3-its";
+				msi-controller;
+				reg = <0x8010 0x20000 0x0 0x200000>;
+			};
 		};
 
 		uaa0: serial@87e0,24000000 {
-- 
2.1.0

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^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-06-26 19:12 ` Tirumalesh Chalamarla
  0 siblings, 0 replies; 15+ messages in thread
From: Tirumalesh Chalamarla @ 2015-06-26 19:12 UTC (permalink / raw)
  To: linux-arm-kernel

From: Tirumalesh Chalamarla <tchalamarla@cavium.com>

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
 		gic0: interrupt-controller at 8010,00000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
 			interrupt-controller;
 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
 			interrupts = <1 9 0xf04>;
+
+			its: gic-its at 8010,00020000 {
+				compatible = "arm,gic-v3-its";
+				msi-controller;
+				reg = <0x8010 0x20000 0x0 0x200000>;
+			};
 		};
 
 		uaa0: serial at 87e0,24000000 {
-- 
2.1.0

^ permalink raw reply related	[flat|nested] 15+ messages in thread
* Re: [PATCH] GICv3: Add ITS entry to THUNDER dts
  2015-06-26 19:12 ` Tirumalesh Chalamarla
  (?)
@ 2015-07-02 20:26   ` Chalamarla, Tirumalesh
  -1 siblings, 0 replies; 15+ messages in thread
From: Chalamarla, Tirumalesh @ 2015-07-02 20:26 UTC (permalink / raw)
  To: marc.zyngier, Catalin.Marinas, Will.Deacon
  Cc: linux-arm-kernel, linux-kernel, rrichter, devicetree,
	Tirumalesh Chalamarla

Hi Catalin,

is it possible to pull this for 4.2?

Thanks,
Tirumalesh.  
> On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
> 
> From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> 
> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> Thunder SoCs by adding an entry to DT.
> 
> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> index d8c0bdc..9cb7cf9 100644
> --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> @@ -376,10 +376,19 @@
> 		gic0: interrupt-controller@8010,00000000 {
> 			compatible = "arm,gic-v3";
> 			#interrupt-cells = <3>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> 			interrupt-controller;
> 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> 			interrupts = <1 9 0xf04>;
> +
> +			its: gic-its@8010,00020000 {
> +				compatible = "arm,gic-v3-its";
> +				msi-controller;
> +				reg = <0x8010 0x20000 0x0 0x200000>;
> +			};
> 		};
> 
> 		uaa0: serial@87e0,24000000 {
> -- 
> 2.1.0
> 


^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-02 20:26   ` Chalamarla, Tirumalesh
  0 siblings, 0 replies; 15+ messages in thread
From: Chalamarla, Tirumalesh @ 2015-07-02 20:26 UTC (permalink / raw)
  To: marc.zyngier, Catalin.Marinas, Will.Deacon
  Cc: rrichter, devicetree, Tirumalesh Chalamarla, linux-kernel,
	linux-arm-kernel

Hi Catalin,

is it possible to pull this for 4.2?

Thanks,
Tirumalesh.  
> On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
> 
> From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> 
> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> Thunder SoCs by adding an entry to DT.
> 
> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> index d8c0bdc..9cb7cf9 100644
> --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> @@ -376,10 +376,19 @@
> 		gic0: interrupt-controller@8010,00000000 {
> 			compatible = "arm,gic-v3";
> 			#interrupt-cells = <3>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> 			interrupt-controller;
> 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> 			interrupts = <1 9 0xf04>;
> +
> +			its: gic-its@8010,00020000 {
> +				compatible = "arm,gic-v3-its";
> +				msi-controller;
> +				reg = <0x8010 0x20000 0x0 0x200000>;
> +			};
> 		};
> 
> 		uaa0: serial@87e0,24000000 {
> -- 
> 2.1.0
> 

^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-02 20:26   ` Chalamarla, Tirumalesh
  0 siblings, 0 replies; 15+ messages in thread
From: Chalamarla, Tirumalesh @ 2015-07-02 20:26 UTC (permalink / raw)
  To: linux-arm-kernel

Hi Catalin,

is it possible to pull this for 4.2?

Thanks,
Tirumalesh.  
> On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
> 
> From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> 
> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> Thunder SoCs by adding an entry to DT.
> 
> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> index d8c0bdc..9cb7cf9 100644
> --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> @@ -376,10 +376,19 @@
> 		gic0: interrupt-controller at 8010,00000000 {
> 			compatible = "arm,gic-v3";
> 			#interrupt-cells = <3>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> 			interrupt-controller;
> 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> 			interrupts = <1 9 0xf04>;
> +
> +			its: gic-its at 8010,00020000 {
> +				compatible = "arm,gic-v3-its";
> +				msi-controller;
> +				reg = <0x8010 0x20000 0x0 0x200000>;
> +			};
> 		};
> 
> 		uaa0: serial at 87e0,24000000 {
> -- 
> 2.1.0
> 

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-03  9:57     ` Catalin Marinas
  0 siblings, 0 replies; 15+ messages in thread
From: Catalin Marinas @ 2015-07-03  9:57 UTC (permalink / raw)
  To: Chalamarla, Tirumalesh
  Cc: marc.zyngier, Will.Deacon, rrichter, devicetree,
	Tirumalesh Chalamarla, linux-kernel, linux-arm-kernel, arm

On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
> > 
> > From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> > 
> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> > Thunder SoCs by adding an entry to DT.
> > 
> > Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> > Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > index d8c0bdc..9cb7cf9 100644
> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > @@ -376,10 +376,19 @@
> > 		gic0: interrupt-controller@8010,00000000 {
> > 			compatible = "arm,gic-v3";
> > 			#interrupt-cells = <3>;
> > +			#address-cells = <2>;
> > +			#size-cells = <2>;
> > +			ranges;
> > 			interrupt-controller;
> > 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> > 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> > 			interrupts = <1 9 0xf04>;
> > +
> > +			its: gic-its@8010,00020000 {
> > +				compatible = "arm,gic-v3-its";
> > +				msi-controller;
> > +				reg = <0x8010 0x20000 0x0 0x200000>;
> > +			};
> > 		};
> > 
> > 		uaa0: serial@87e0,24000000 {
> 
> is it possible to pull this for 4.2?

The dts files go in via the arm-soc tree (cc'ing arm@kernel.org).

-- 
Catalin

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-03  9:57     ` Catalin Marinas
  0 siblings, 0 replies; 15+ messages in thread
From: Catalin Marinas @ 2015-07-03  9:57 UTC (permalink / raw)
  To: Chalamarla, Tirumalesh
  Cc: marc.zyngier-5wv7dgnIgG8, Will.Deacon-5wv7dgnIgG8,
	rrichter-YGCgFSpz5w/QT0dZR+AlfA,
	devicetree-u79uwXL29TY76Z2rM5mHXA, Tirumalesh Chalamarla,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	arm-DgEjT+Ai2ygdnm+yROfE0A

On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> > 
> > From: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
> > 
> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> > Thunder SoCs by adding an entry to DT.
> > 
> > Signed-off-by: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
> > Acked-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
> > ---
> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > index d8c0bdc..9cb7cf9 100644
> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > @@ -376,10 +376,19 @@
> > 		gic0: interrupt-controller@8010,00000000 {
> > 			compatible = "arm,gic-v3";
> > 			#interrupt-cells = <3>;
> > +			#address-cells = <2>;
> > +			#size-cells = <2>;
> > +			ranges;
> > 			interrupt-controller;
> > 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> > 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> > 			interrupts = <1 9 0xf04>;
> > +
> > +			its: gic-its@8010,00020000 {
> > +				compatible = "arm,gic-v3-its";
> > +				msi-controller;
> > +				reg = <0x8010 0x20000 0x0 0x200000>;
> > +			};
> > 		};
> > 
> > 		uaa0: serial@87e0,24000000 {
> 
> is it possible to pull this for 4.2?

The dts files go in via the arm-soc tree (cc'ing arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org).

-- 
Catalin
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-03  9:57     ` Catalin Marinas
  0 siblings, 0 replies; 15+ messages in thread
From: Catalin Marinas @ 2015-07-03  9:57 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
> > 
> > From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> > 
> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> > Thunder SoCs by adding an entry to DT.
> > 
> > Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
> > Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > index d8c0bdc..9cb7cf9 100644
> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > @@ -376,10 +376,19 @@
> > 		gic0: interrupt-controller at 8010,00000000 {
> > 			compatible = "arm,gic-v3";
> > 			#interrupt-cells = <3>;
> > +			#address-cells = <2>;
> > +			#size-cells = <2>;
> > +			ranges;
> > 			interrupt-controller;
> > 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
> > 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
> > 			interrupts = <1 9 0xf04>;
> > +
> > +			its: gic-its at 8010,00020000 {
> > +				compatible = "arm,gic-v3-its";
> > +				msi-controller;
> > +				reg = <0x8010 0x20000 0x0 0x200000>;
> > +			};
> > 		};
> > 
> > 		uaa0: serial at 87e0,24000000 {
> 
> is it possible to pull this for 4.2?

The dts files go in via the arm-soc tree (cc'ing arm at kernel.org).

-- 
Catalin

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-08 21:26       ` Kevin Hilman
  0 siblings, 0 replies; 15+ messages in thread
From: Kevin Hilman @ 2015-07-08 21:26 UTC (permalink / raw)
  To: Catalin Marinas
  Cc: Chalamarla, Tirumalesh, marc.zyngier, Will.Deacon, rrichter,
	devicetree, Tirumalesh Chalamarla, linux-kernel,
	linux-arm-kernel, arm

Catalin Marinas <catalin.marinas@arm.com> writes:

> On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
>> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
>> > 
>> > From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
>> > 
>> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
>> > Thunder SoCs by adding an entry to DT.
>> > 
>> > Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
>> > Acked-by: Marc Zyngier <marc.zyngier@arm.com>
>> > ---
>> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
>> > 1 file changed, 9 insertions(+)
>> > 
>> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > index d8c0bdc..9cb7cf9 100644
>> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > @@ -376,10 +376,19 @@
>> > 		gic0: interrupt-controller@8010,00000000 {
>> > 			compatible = "arm,gic-v3";
>> > 			#interrupt-cells = <3>;
>> > +			#address-cells = <2>;
>> > +			#size-cells = <2>;
>> > +			ranges;
>> > 			interrupt-controller;
>> > 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
>> > 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
>> > 			interrupts = <1 9 0xf04>;
>> > +
>> > +			its: gic-its@8010,00020000 {
>> > +				compatible = "arm,gic-v3-its";
>> > +				msi-controller;
>> > +				reg = <0x8010 0x20000 0x0 0x200000>;
>> > +			};
>> > 		};
>> > 
>> > 		uaa0: serial@87e0,24000000 {
>> 
>> is it possible to pull this for 4.2?
>
> The dts files go in via the arm-soc tree (cc'ing arm@kernel.org).

Picked this up for v4.2-rc,

Kevin

^ permalink raw reply	[flat|nested] 15+ messages in thread
* Re: [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-08 21:26       ` Kevin Hilman
  0 siblings, 0 replies; 15+ messages in thread
From: Kevin Hilman @ 2015-07-08 21:26 UTC (permalink / raw)
  To: Catalin Marinas
  Cc: Chalamarla, Tirumalesh, marc.zyngier@arm.com,
	Will.Deacon@arm.com, rrichter@cavium.com,
	devicetree@vger.kernel.org, Tirumalesh Chalamarla,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, arm-DgEjT+Ai2ygdnm+yROfE0A

Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> writes:

> On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
>> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
>> > 
>> > From: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
>> > 
>> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
>> > Thunder SoCs by adding an entry to DT.
>> > 
>> > Signed-off-by: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
>> > Acked-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
>> > ---
>> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
>> > 1 file changed, 9 insertions(+)
>> > 
>> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > index d8c0bdc..9cb7cf9 100644
>> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > @@ -376,10 +376,19 @@
>> > 		gic0: interrupt-controller@8010,00000000 {
>> > 			compatible = "arm,gic-v3";
>> > 			#interrupt-cells = <3>;
>> > +			#address-cells = <2>;
>> > +			#size-cells = <2>;
>> > +			ranges;
>> > 			interrupt-controller;
>> > 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
>> > 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
>> > 			interrupts = <1 9 0xf04>;
>> > +
>> > +			its: gic-its@8010,00020000 {
>> > +				compatible = "arm,gic-v3-its";
>> > +				msi-controller;
>> > +				reg = <0x8010 0x20000 0x0 0x200000>;
>> > +			};
>> > 		};
>> > 
>> > 		uaa0: serial@87e0,24000000 {
>> 
>> is it possible to pull this for 4.2?
>
> The dts files go in via the arm-soc tree (cc'ing arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org).

Picked this up for v4.2-rc,

Kevin
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^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-07-08 21:26       ` Kevin Hilman
  0 siblings, 0 replies; 15+ messages in thread
From: Kevin Hilman @ 2015-07-08 21:26 UTC (permalink / raw)
  To: linux-arm-kernel

Catalin Marinas <catalin.marinas@arm.com> writes:

> On Thu, Jul 02, 2015 at 08:26:02PM +0000, Chalamarla, Tirumalesh wrote:
>> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> wrote:
>> > 
>> > From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
>> > 
>> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
>> > Thunder SoCs by adding an entry to DT.
>> > 
>> > Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
>> > Acked-by: Marc Zyngier <marc.zyngier@arm.com>
>> > ---
>> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
>> > 1 file changed, 9 insertions(+)
>> > 
>> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > index d8c0bdc..9cb7cf9 100644
>> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
>> > @@ -376,10 +376,19 @@
>> > 		gic0: interrupt-controller at 8010,00000000 {
>> > 			compatible = "arm,gic-v3";
>> > 			#interrupt-cells = <3>;
>> > +			#address-cells = <2>;
>> > +			#size-cells = <2>;
>> > +			ranges;
>> > 			interrupt-controller;
>> > 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
>> > 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
>> > 			interrupts = <1 9 0xf04>;
>> > +
>> > +			its: gic-its at 8010,00020000 {
>> > +				compatible = "arm,gic-v3-its";
>> > +				msi-controller;
>> > +				reg = <0x8010 0x20000 0x0 0x200000>;
>> > +			};
>> > 		};
>> > 
>> > 		uaa0: serial at 87e0,24000000 {
>> 
>> is it possible to pull this for 4.2?
>
> The dts files go in via the arm-soc tree (cc'ing arm at kernel.org).

Picked this up for v4.2-rc,

Kevin

^ permalink raw reply	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-06-26 19:10 ` Tirumalesh Chalamarla
  0 siblings, 0 replies; 15+ messages in thread
From: Tirumalesh Chalamarla @ 2015-06-26 19:10 UTC (permalink / raw)
  To: marc.zyngier, Catalin.Marinas, Will.Deacon
  Cc: linux-arm-kernel, linux-kernel, rrichter, devicetree,
	Tirumalesh Chalamarla

From: Tirumalesh Chalamarla <tchalamarla@cavium.com>

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
---
 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
 		gic0: interrupt-controller@8010,00000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
 			interrupt-controller;
 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
 			interrupts = <1 9 0xf04>;
+
+			its: gic-its@8010,00020000 {
+				compatible = "arm,gic-v3-its";
+				msi-controller;
+				reg = <0x8010 0x20000 0x0 0x200000>;
+			};
 		};
 
 		uaa0: serial@87e0,24000000 {
-- 
2.1.0


^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-06-26 19:10 ` Tirumalesh Chalamarla
  0 siblings, 0 replies; 15+ messages in thread
From: Tirumalesh Chalamarla @ 2015-06-26 19:10 UTC (permalink / raw)
  To: marc.zyngier, Catalin.Marinas, Will.Deacon
  Cc: linux-arm-kernel, linux-kernel, rrichter, devicetree,
	Tirumalesh Chalamarla

From: Tirumalesh Chalamarla <tchalamarla@cavium.com>

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
---
 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
 		gic0: interrupt-controller@8010,00000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
 			interrupt-controller;
 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
 			interrupts = <1 9 0xf04>;
+
+			its: gic-its@8010,00020000 {
+				compatible = "arm,gic-v3-its";
+				msi-controller;
+				reg = <0x8010 0x20000 0x0 0x200000>;
+			};
 		};
 
 		uaa0: serial@87e0,24000000 {
-- 
2.1.0

^ permalink raw reply related	[flat|nested] 15+ messages in thread
* [PATCH] GICv3: Add ITS entry to THUNDER dts
@ 2015-06-26 19:10 ` Tirumalesh Chalamarla
  0 siblings, 0 replies; 15+ messages in thread
From: Tirumalesh Chalamarla @ 2015-06-26 19:10 UTC (permalink / raw)
  To: linux-arm-kernel

From: Tirumalesh Chalamarla <tchalamarla@cavium.com>

The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.

Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com>
---
 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc..9cb7cf9 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
 		gic0: interrupt-controller at 8010,00000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
 			interrupt-controller;
 			reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
 			      <0x8010 0x80000000 0x0 0x600000>; /* GICR */
 			interrupts = <1 9 0xf04>;
+
+			its: gic-its at 8010,00020000 {
+				compatible = "arm,gic-v3-its";
+				msi-controller;
+				reg = <0x8010 0x20000 0x0 0x200000>;
+			};
 		};
 
 		uaa0: serial at 87e0,24000000 {
-- 
2.1.0

^ permalink raw reply related	[flat|nested] 15+ messages in thread
end of thread, other threads:[~2015-07-08 21:26 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-26 19:12 [PATCH] GICv3: Add ITS entry to THUNDER dts Tirumalesh Chalamarla
2015-06-26 19:12 ` Tirumalesh Chalamarla
2015-06-26 19:12 ` Tirumalesh Chalamarla
2015-07-02 20:26 ` Chalamarla, Tirumalesh
2015-07-02 20:26   ` Chalamarla, Tirumalesh
2015-07-02 20:26   ` Chalamarla, Tirumalesh
2015-07-03  9:57   ` Catalin Marinas
2015-07-03  9:57     ` Catalin Marinas
2015-07-03  9:57     ` Catalin Marinas
2015-07-08 21:26     ` Kevin Hilman
2015-07-08 21:26       ` Kevin Hilman
2015-07-08 21:26       ` Kevin Hilman
  -- strict thread matches above, loose matches on Subject: below --
2015-06-26 19:10 Tirumalesh Chalamarla
2015-06-26 19:10 ` Tirumalesh Chalamarla
2015-06-26 19:10 ` Tirumalesh Chalamarla

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