[PATCH 0/3] arm/arm64: vexpress: DT updates for v4.2

[PATCH 0/3] arm/arm64: vexpress: DT updates for v4.2

[Sudeep Holla]

Hi ARM-SoC guys,

Here are couple of fixes for adding missing nodes(CCI and A7 PMUs) in
TC2 device tree. The third patch is addition of support for FPGA based
dual core A53 SMM  platform. All the patches are posted on the list
already, just putting them together. Let me know if you prefer a pull
request.

Regards,
Sudeep

Kristina Martsenko (1):
  arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express
    20MG

Mark Rutland (1):
  arm: dts: vexpress: describe all PMUs in TC2 dts

Sudeep Holla (1):
  arm: dts: vexpress: add missing CCI PMU device node to TC2

 MAINTAINERS                                        |   1 +
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts         |  25 ++-
 arch/arm64/boot/dts/arm/Makefile                   |   1 +
 .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts      | 191 +++++++++++++++++++++
 4 files changed, 216 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts

-- 
1.9.1

[PATCH 1/3] arm: dts: vexpress: describe all PMUs in TC2 dts

[Sudeep Holla]

From: Mark Rutland <mark.rutland@arm.com>

The dts for the CoreTile Express A15x2 A7x3 (TC2) only describes the
PMUs of the Cortex-A15 CPUs, and not the Cortex-A7 CPUs.

Now that we have a mechanism for describing disparate PMUs and their
interrupts in device tree, this patch makes use of these to describe the
PMUs for all CPUs in the system. For consistency, the existing A15 PMU
interrupt-affinity property is reflowed across two lines.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 107395c32d82..038e30e4332f 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -187,11 +187,22 @@
 			     <1 10 0xf08>;
 	};
 
-	pmu {
+	pmu_a15 {
 		compatible = "arm,cortex-a15-pmu";
 		interrupts = <0 68 4>,
 			     <0 69 4>;
-		interrupt-affinity = <&cpu0>, <&cpu1>;
+		interrupt-affinity = <&cpu0>,
+				     <&cpu1>;
+	};
+
+	pmu_a7 {
+		compatible = "arm,cortex-a7-pmu";
+		interrupts = <0 128 4>,
+			     <0 129 4>,
+			     <0 130 4>;
+		interrupt-affinity = <&cpu2>,
+				     <&cpu3>,
+				     <&cpu4>;
 	};
 
 	oscclk6a: oscclk6a {
-- 
1.9.1

[PATCH 2/3] arm: dts: vexpress: add missing CCI PMU device node to TC2

[Sudeep Holla]

The CCI device node was added to vexpress CA15_A7(i.e. TC2) much before
the CCI PMU support and binding was added. This patch adds the missing
PMU node so that CCI PMUs can be used on TC2.

Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
 arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 038e30e4332f..17f63f7dfd9e 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -150,6 +150,16 @@
 			interface-type = "ace";
 			reg = <0x5000 0x1000>;
 		};
+
+		pmu at 9000 {
+			 compatible = "arm,cci-400-pmu,r0";
+			 reg = <0x9000 0x5000>;
+			 interrupts = <0 105 4>,
+				      <0 101 4>,
+				      <0 102 4>,
+				      <0 103 4>,
+				      <0 104 4>;
+		};
 	};
 
 	memory-controller at 7ffd0000 {
-- 
1.9.1

[PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Sudeep Holla]

From: Kristina Martsenko <kristina.martsenko@arm.com>

Add a DTS file for the MP2 Cortex-A53 Soft Macrocell Model implemented
on a LogicTile Express 20MG (V2F-1XV7) daughterboard. This is based on
the version that's currently available from the ARM DTS repository [1].

[1] git://linux-arm.org/arm-dts.git

Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
---
 MAINTAINERS                                        |   1 +
 arch/arm64/boot/dts/arm/Makefile                   |   1 +
 .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts      | 191 +++++++++++++++++++++
 3 files changed, 193 insertions(+)
 create mode 100644 arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts

diff --git a/MAINTAINERS b/MAINTAINERS
index 0e6b09150aad..0556f03b829f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1614,6 +1614,7 @@ M:	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
 L:	linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 F:	arch/arm/boot/dts/vexpress*
+F:	arch/arm64/boot/dts/arm/vexpress*
 F:	arch/arm/mach-vexpress/
 F:	*/*/vexpress*
 F:	*/*/*/vexpress*
diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
index c5c98b91514e..bb3c07209676 100644
--- a/arch/arm64/boot/dts/arm/Makefile
+++ b/arch/arm64/boot/dts/arm/Makefile
@@ -1,6 +1,7 @@
 dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
+dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
new file mode 100644
index 000000000000..5b1d0181023b
--- /dev/null
+++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
@@ -0,0 +1,191 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ * LogicTile Express 20MG
+ * V2F-1XV7
+ *
+ * Cortex-A53 (2 cores) Soft Macrocell Model
+ *
+ * HBI-0247C
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	model = "V2F-1XV7 Cortex-A53x2 SMM";
+	arm,hbi = <0x247>;
+	arm,vexpress,site = <0xf>;
+	compatible = "arm,vexpress,v2f-1xv7,ca53x2", "arm,vexpress,v2f-1xv7", "arm,vexpress";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen {
+		stdout-path = "serial0:38400n8";
+	};
+
+	aliases {
+		serial0 = &v2m_serial0;
+		serial1 = &v2m_serial1;
+		serial2 = &v2m_serial2;
+		serial3 = &v2m_serial3;
+		i2c0 = &v2m_i2c_dvi;
+		i2c1 = &v2m_i2c_pcie;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0>;
+			next-level-cache = <&L2_0>;
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 1>;
+			next-level-cache = <&L2_0>;
+		};
+
+		L2_0: l2-cache0 {
+			compatible = "cache";
+		};
+	};
+
+	memory at 80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
+	};
+
+	gic: interrupt-controller at 2c001000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x2c001000 0 0x1000>,
+		      <0 0x2c002000 0 0x2000>,
+		      <0 0x2c004000 0 0x2000>,
+		      <0 0x2c006000 0 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	dcc {
+		compatible = "arm,vexpress,config-bus";
+		arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+		smbclk: osc at 4 {
+			/* SMC clock */
+			compatible = "arm,vexpress-osc";
+			arm,vexpress-sysreg,func = <1 4>;
+			freq-range = <40000000 40000000>;
+			#clock-cells = <0>;
+			clock-output-names = "smclk";
+		};
+
+		volt at 0 {
+			/* VIO to expansion board above */
+			compatible = "arm,vexpress-volt";
+			arm,vexpress-sysreg,func = <2 0>;
+			regulator-name = "VIO_UP";
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+		};
+
+		volt at 1 {
+			/* 12V from power connector J6 */
+			compatible = "arm,vexpress-volt";
+			arm,vexpress-sysreg,func = <2 1>;
+			regulator-name = "12";
+			regulator-always-on;
+		};
+
+		temp at 0 {
+			/* FPGA temperature */
+			compatible = "arm,vexpress-temp";
+			arm,vexpress-sysreg,func = <4 0>;
+			label = "FPGA";
+		};
+	};
+
+	smb {
+		compatible = "simple-bus";
+
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0x08000000 0x04000000>,
+			 <1 0 0 0x14000000 0x04000000>,
+			 <2 0 0 0x18000000 0x04000000>,
+			 <3 0 0 0x1c000000 0x04000000>,
+			 <4 0 0 0x0c000000 0x04000000>,
+			 <5 0 0 0x10000000 0x04000000>;
+
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0 0 63>;
+		interrupt-map = <0 0  0 &gic GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  1 &gic GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  2 &gic GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  3 &gic GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  4 &gic GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  5 &gic GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  6 &gic GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  7 &gic GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  8 &gic GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0  9 &gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+				<0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+
+		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"
+	};
+};
-- 
1.9.1

[PATCH 0/3] arm/arm64: vexpress: DT updates for v4.2

[Sudeep Holla]

Hi Kevin,

On 01/07/15 13:36, Sudeep Holla wrote:
> Hi ARM-SoC guys,
>
> Here are couple of fixes for adding missing nodes(CCI and A7 PMUs) in
> TC2 device tree. The third patch is addition of support for FPGA based
> dual core A53 SMM  platform. All the patches are posted on the list
> already, just putting them together. Let me know if you prefer a pull
> request.
>

I just realized that I copied this series to your Linaro email instead
of kernel.org. Sorry for that, do you want me to repost ?

Regards,
Sudeep

[PATCH 0/3] arm/arm64: vexpress: DT updates for v4.2

[Kevin Hilman]

Sudeep Holla <sudeep.holla@arm.com> writes:

> Hi Kevin,
>
> On 01/07/15 13:36, Sudeep Holla wrote:
>> Hi ARM-SoC guys,
>>
>> Here are couple of fixes for adding missing nodes(CCI and A7 PMUs) in
>> TC2 device tree. The third patch is addition of support for FPGA based
>> dual core A53 SMM  platform. All the patches are posted on the list
>> already, just putting them together. Let me know if you prefer a pull
>> request.
>>
>
> I just realized that I copied this series to your Linaro email instead
> of kernel.org. Sorry for that, do you want me to repost ?

Not necessary.

This just came too late for the v4.2 cycle.  I think the first two
patches we can take as fixes for v4.2, but the 3rd one will likely need
to wait for v4.3.

Kevin

[PATCH 0/3] arm/arm64: vexpress: DT updates for v4.2

[Kevin Hilman]

On Wed, Jul 8, 2015 at 3:33 PM, Kevin Hilman <khilman@kernel.org> wrote:
> Sudeep Holla <sudeep.holla@arm.com> writes:
>
>> Hi Kevin,
>>
>> On 01/07/15 13:36, Sudeep Holla wrote:
>>> Hi ARM-SoC guys,
>>>
>>> Here are couple of fixes for adding missing nodes(CCI and A7 PMUs) in
>>> TC2 device tree. The third patch is addition of support for FPGA based
>>> dual core A53 SMM  platform. All the patches are posted on the list
>>> already, just putting them together. Let me know if you prefer a pull
>>> request.
>>>
>>
>> I just realized that I copied this series to your Linaro email instead
>> of kernel.org. Sorry for that, do you want me to repost ?
>
> Not necessary.
>
> This just came too late for the v4.2 cycle.  I think the first two
> patches we can take as fixes for v4.2, but the 3rd one will likely need
> to wait for v4.3.

Having a closer look, I just picked up all 3 for v4.2-rc.

Thanks,

Kevin

[PATCH 0/3] arm/arm64: vexpress: DT updates for v4.2

[Sudeep Holla]

On 08/07/15 22:46, Kevin Hilman wrote:
> On Wed, Jul 8, 2015 at 3:33 PM, Kevin Hilman <khilman@kernel.org> wrote:
>> Sudeep Holla <sudeep.holla@arm.com> writes:
>>
>>> Hi Kevin,
>>>
>>> On 01/07/15 13:36, Sudeep Holla wrote:
>>>> Hi ARM-SoC guys,
>>>>
>>>> Here are couple of fixes for adding missing nodes(CCI and A7 PMUs) in
>>>> TC2 device tree. The third patch is addition of support for FPGA based
>>>> dual core A53 SMM  platform. All the patches are posted on the list
>>>> already, just putting them together. Let me know if you prefer a pull
>>>> request.
>>>>
>>>
>>> I just realized that I copied this series to your Linaro email instead
>>> of kernel.org. Sorry for that, do you want me to repost ?
>>
>> Not necessary.
>>
>> This just came too late for the v4.2 cycle.  I think the first two
>> patches we can take as fixes for v4.2, but the 3rd one will likely need
>> to wait for v4.3.

Agreed, will try my best not to repeat that again.

>
> Having a closer look, I just picked up all 3 for v4.2-rc.
>

Thanks.

Regards,
Sudeep

Re: [PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Ian Campbell]

On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:

> diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> new file mode 100644
> index 000000000000..5b1d0181023b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
[...]
> +		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"

Unfortunately this causes some issues for the split device tree
repository[0], since things get moved around there.

This new file ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
while the include is at src/arm/vexpress-v2m-rs1.dtsi.

Any ideas how best to deal with this?

I'm willing to try and work around in the conversion scripts but while
rewriting the paths to things on conversion is easy, rewriting the
contents of the files themselves is much less so (or at least would be
prohibitively expensive on input the size of Linux).

Cheers,
Ian.

[0]
https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/

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[PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Ian Campbell]

On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:

> diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> new file mode 100644
> index 000000000000..5b1d0181023b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
[...]
> +		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"

Unfortunately this causes some issues for the split device tree
repository[0], since things get moved around there.

This new file ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
while the include is at src/arm/vexpress-v2m-rs1.dtsi.

Any ideas how best to deal with this?

I'm willing to try and work around in the conversion scripts but while
rewriting the paths to things on conversion is easy, rewriting the
contents of the files themselves is much less so (or at least would be
prohibitively expensive on input the size of Linux).

Cheers,
Ian.

[0]
https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/

Re: [PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Sudeep Holla]

On 14/07/15 09:37, Ian Campbell wrote:
> On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:
>
>> diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
>> new file mode 100644
>> index 000000000000..5b1d0181023b
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> [...]
>> +		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"
>
> Unfortunately this causes some issues for the split device tree
> repository[0], since things get moved around there.
>
> This new file ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
> while the include is at src/arm/vexpress-v2m-rs1.dtsi.
>

Ah sorry, wasn't aware of such a effort to move DTS files out.

> Any ideas how best to deal with this?
>

Honestly no idea. We did discuss this internally with 2 options:

1. Specifying the relative path as done in this patch
2. Creating symlink, something like how kvm manages files today

I agree both are not elegant but (1) was chosen to be better of the two.
We are open for any suggestions.

Regards,
Sudeep
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[PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Sudeep Holla]

On 14/07/15 09:37, Ian Campbell wrote:
> On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:
>
>> diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
>> new file mode 100644
>> index 000000000000..5b1d0181023b
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> [...]
>> +		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"
>
> Unfortunately this causes some issues for the split device tree
> repository[0], since things get moved around there.
>
> This new file ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
> while the include is at src/arm/vexpress-v2m-rs1.dtsi.
>

Ah sorry, wasn't aware of such a effort to move DTS files out.

> Any ideas how best to deal with this?
>

Honestly no idea. We did discuss this internally with 2 options:

1. Specifying the relative path as done in this patch
2. Creating symlink, something like how kvm manages files today

I agree both are not elegant but (1) was chosen to be better of the two.
We are open for any suggestions.

Regards,
Sudeep

Re: [PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Ian Campbell]

On Tue, 2015-07-14 at 12:13 +0100, Sudeep Holla wrote:
> 
> On 14/07/15 09:37, Ian Campbell wrote:
> > On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:
> >
> >> diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> >> new file mode 100644
> >> index 000000000000..5b1d0181023b
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> > [...]
> >> +		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"
> >
> > Unfortunately this causes some issues for the split device tree
> > repository[0], since things get moved around there.
> >
> > This new file ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
> > while the include is at src/arm/vexpress-v2m-rs1.dtsi.
> >
> 
> Ah sorry, wasn't aware of such a effort to move DTS files out.
> 
> > Any ideas how best to deal with this?
> >
> 
> Honestly no idea. We did discuss this internally with 2 options:
> 
> 1. Specifying the relative path as done in this patch
> 2. Creating symlink, something like how kvm manages files today
> 
> I agree both are not elegant but (1) was chosen to be better of the two.
> We are open for any suggestions.

3. Some path for DTSI files which are not specific to a particular
architecture, picked up by dtc by default (via -I in default flags)?

4. DTC_FLAGS += -I../../../../arm/boot/dts in
arch/arm64/boot/dts/Makefile and using #include "vexpress....dtsi", with
the split repo using a different -I in its build system (essentially
codifying the relationship between arm64 and arm in the build system
instead of the code).

IMHO 4 is better than 1 or 3, although still not great. Not sure about 2
myself (from the PoV of working in both contexts).

Ian.

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[PATCH 3/3] arm64: dts: add device tree for ARM SMM-A53x2 on LogicTile Express 20MG

[Ian Campbell]

On Tue, 2015-07-14 at 12:13 +0100, Sudeep Holla wrote:
> 
> On 14/07/15 09:37, Ian Campbell wrote:
> > On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:
> >
> >> diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> >> new file mode 100644
> >> index 000000000000..5b1d0181023b
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
> > [...]
> >> +		/include/ "../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi"
> >
> > Unfortunately this causes some issues for the split device tree
> > repository[0], since things get moved around there.
> >
> > This new file ends up at src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
> > while the include is at src/arm/vexpress-v2m-rs1.dtsi.
> >
> 
> Ah sorry, wasn't aware of such a effort to move DTS files out.
> 
> > Any ideas how best to deal with this?
> >
> 
> Honestly no idea. We did discuss this internally with 2 options:
> 
> 1. Specifying the relative path as done in this patch
> 2. Creating symlink, something like how kvm manages files today
> 
> I agree both are not elegant but (1) was chosen to be better of the two.
> We are open for any suggestions.

3. Some path for DTSI files which are not specific to a particular
architecture, picked up by dtc by default (via -I in default flags)?

4. DTC_FLAGS += -I../../../../arm/boot/dts in
arch/arm64/boot/dts/Makefile and using #include "vexpress....dtsi", with
the split repo using a different -I in its build system (essentially
codifying the relationship between arm64 and arm in the build system
instead of the code).

IMHO 4 is better than 1 or 3, although still not great. Not sure about 2
myself (from the PoV of working in both contexts).

Ian.