[PATCH v2 0/6] ARM: AM437x: Add IO wake up support

[PATCH v2 0/6] ARM: AM437x: Add IO wake up support

[Keerthy]

The patch series adds IO wake up support for AM437x series
making use of the existing OMAP4 support. Adds the AM437x
specifics.

The series is boot tested on OMAP4 panda, DAR7 evm and AM437x evms.

Changes in v2:

Removed inefficient way of using arrays for irq ack and masks.

Keerthy (6):
  ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
  ARM: AM43xx: Add the PRM IRQ register offsets
  ARM: dts: AM4372: Add PRCM IRQ entry
  ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and
    IRQSTATUS_MPU_2 register offsets
  ARM: OMAP4+: PRM: Add AM437x specific data
  ARM: PRM: AM437x: Enable IO wakeup feature

 arch/arm/boot/dts/am4372.dtsi     |  1 +
 arch/arm/mach-omap2/prcm-common.h |  1 +
 arch/arm/mach-omap2/prcm43xx.h    |  5 ++++
 arch/arm/mach-omap2/prm44xx.c     | 58 +++++++++++++++++++++++----------------
 arch/arm/mach-omap2/prm_common.c  |  1 +
 5 files changed, 42 insertions(+), 24 deletions(-)

-- 
1.9.1

[PATCH v2 0/6] ARM: AM437x: Add IO wake up support

[Keerthy]

The patch series adds IO wake up support for AM437x series
making use of the existing OMAP4 support. Adds the AM437x
specifics.

The series is boot tested on OMAP4 panda, DAR7 evm and AM437x evms.

Changes in v2:

Removed inefficient way of using arrays for irq ack and masks.

Keerthy (6):
  ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
  ARM: AM43xx: Add the PRM IRQ register offsets
  ARM: dts: AM4372: Add PRCM IRQ entry
  ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and
    IRQSTATUS_MPU_2 register offsets
  ARM: OMAP4+: PRM: Add AM437x specific data
  ARM: PRM: AM437x: Enable IO wakeup feature

 arch/arm/boot/dts/am4372.dtsi     |  1 +
 arch/arm/mach-omap2/prcm-common.h |  1 +
 arch/arm/mach-omap2/prcm43xx.h    |  5 ++++
 arch/arm/mach-omap2/prm44xx.c     | 58 +++++++++++++++++++++++----------------
 arch/arm/mach-omap2/prm_common.c  |  1 +
 5 files changed, 42 insertions(+), 24 deletions(-)

-- 
1.9.1

[PATCH v2 1/6] ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register

[Keerthy]

PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
remove hardcoding and use the value provided by the omap_prcm_irq_setup
structure.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prcm-common.h |  1 +
 arch/arm/mach-omap2/prm44xx.c     | 11 ++++++-----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 6ae0b3a..2e60406 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -494,6 +494,7 @@ struct omap_prcm_irq {
 struct omap_prcm_irq_setup {
 	u16 ack;
 	u16 mask;
+	u16 pm_ctrl;
 	u8 nr_regs;
 	u8 nr_irqs;
 	const struct omap_prcm_irq *irqs;
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 4541700..8149e5a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
 	.ack			= OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
 	.mask			= OMAP4_PRM_IRQENABLE_MPU_OFFSET,
+	.pm_ctrl		= OMAP4_PRM_IO_PMCTRL_OFFSET,
 	.nr_regs		= 2,
 	.irqs			= omap4_prcm_irqs,
 	.nr_irqs		= ARRAY_SIZE(omap4_prcm_irqs),
@@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
 	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
 				    OMAP4430_WUCLK_CTRL_MASK,
 				    inst,
-				    OMAP4_PRM_IO_PMCTRL_OFFSET);
+				    omap4_prcm_irq_setup.pm_ctrl);
 	omap_test_timeout(
 		(((omap4_prm_read_inst_reg(inst,
-					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
+					   omap4_prcm_irq_setup.pm_ctrl) &
 		   OMAP4430_WUCLK_STATUS_MASK) >>
 		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
 		MAX_IOPAD_LATCH_TIME, i);
@@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
 	/* Trigger WUCLKIN disable */
 	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
 				    inst,
-				    OMAP4_PRM_IO_PMCTRL_OFFSET);
+				    omap4_prcm_irq_setup.pm_ctrl);
 	omap_test_timeout(
 		(((omap4_prm_read_inst_reg(inst,
-					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
+					   omap4_prcm_irq_setup.pm_ctrl) &
 		   OMAP4430_WUCLK_STATUS_MASK) >>
 		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
 		MAX_IOPAD_LATCH_TIME, i);
@@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
 	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
 				    OMAP4430_GLOBAL_WUEN_MASK,
 				    inst,
-				    OMAP4_PRM_IO_PMCTRL_OFFSET);
+				    omap4_prcm_irq_setup.pm_ctrl);
 }
 
 /**
-- 
1.9.1

[PATCH v2 1/6] ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register

[Keerthy]

PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
remove hardcoding and use the value provided by the omap_prcm_irq_setup
structure.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prcm-common.h |  1 +
 arch/arm/mach-omap2/prm44xx.c     | 11 ++++++-----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 6ae0b3a..2e60406 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -494,6 +494,7 @@ struct omap_prcm_irq {
 struct omap_prcm_irq_setup {
 	u16 ack;
 	u16 mask;
+	u16 pm_ctrl;
 	u8 nr_regs;
 	u8 nr_irqs;
 	const struct omap_prcm_irq *irqs;
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 4541700..8149e5a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
 	.ack			= OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
 	.mask			= OMAP4_PRM_IRQENABLE_MPU_OFFSET,
+	.pm_ctrl		= OMAP4_PRM_IO_PMCTRL_OFFSET,
 	.nr_regs		= 2,
 	.irqs			= omap4_prcm_irqs,
 	.nr_irqs		= ARRAY_SIZE(omap4_prcm_irqs),
@@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
 	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
 				    OMAP4430_WUCLK_CTRL_MASK,
 				    inst,
-				    OMAP4_PRM_IO_PMCTRL_OFFSET);
+				    omap4_prcm_irq_setup.pm_ctrl);
 	omap_test_timeout(
 		(((omap4_prm_read_inst_reg(inst,
-					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
+					   omap4_prcm_irq_setup.pm_ctrl) &
 		   OMAP4430_WUCLK_STATUS_MASK) >>
 		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
 		MAX_IOPAD_LATCH_TIME, i);
@@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
 	/* Trigger WUCLKIN disable */
 	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
 				    inst,
-				    OMAP4_PRM_IO_PMCTRL_OFFSET);
+				    omap4_prcm_irq_setup.pm_ctrl);
 	omap_test_timeout(
 		(((omap4_prm_read_inst_reg(inst,
-					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
+					   omap4_prcm_irq_setup.pm_ctrl) &
 		   OMAP4430_WUCLK_STATUS_MASK) >>
 		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
 		MAX_IOPAD_LATCH_TIME, i);
@@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
 	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
 				    OMAP4430_GLOBAL_WUEN_MASK,
 				    inst,
-				    OMAP4_PRM_IO_PMCTRL_OFFSET);
+				    omap4_prcm_irq_setup.pm_ctrl);
 }
 
 /**
-- 
1.9.1

[PATCH v2 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

[Keerthy]

Add the PRM IRQ register offsets.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prcm43xx.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index 7eebc27..d716d2e 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -25,6 +25,10 @@
 #define AM43XX_PRM_WKUP_INST				0x2000
 #define AM43XX_PRM_DEVICE_INST				0x4000
 
+/* PRM_IRQ offsets */
+#define AM43XX_PRM_IRQSTATUS_MPU_OFFSET			0x0004
+#define AM43XX_PRM_IRQENABLE_MPU_OFFSET			0x0008
+
 /* RM RSTCTRL offsets */
 #define AM43XX_RM_PER_RSTCTRL_OFFSET			0x0010
 #define AM43XX_RM_GFX_RSTCTRL_OFFSET			0x0010
@@ -146,6 +150,7 @@
 #define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET		0x04a0
 #define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET		0x0068
 #define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET		0x0070
+#define AM43XX_PRM_IO_PMCTRL_OFFSET			0x0024
 #define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET		0x0720
 
 #endif
-- 
1.9.1

[PATCH v2 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

[Keerthy]

Add the PRM IRQ register offsets.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prcm43xx.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index 7eebc27..d716d2e 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -25,6 +25,10 @@
 #define AM43XX_PRM_WKUP_INST				0x2000
 #define AM43XX_PRM_DEVICE_INST				0x4000
 
+/* PRM_IRQ offsets */
+#define AM43XX_PRM_IRQSTATUS_MPU_OFFSET			0x0004
+#define AM43XX_PRM_IRQENABLE_MPU_OFFSET			0x0008
+
 /* RM RSTCTRL offsets */
 #define AM43XX_RM_PER_RSTCTRL_OFFSET			0x0010
 #define AM43XX_RM_GFX_RSTCTRL_OFFSET			0x0010
@@ -146,6 +150,7 @@
 #define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET		0x04a0
 #define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET		0x0068
 #define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET		0x0070
+#define AM43XX_PRM_IO_PMCTRL_OFFSET			0x0024
 #define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET		0x0720
 
 #endif
-- 
1.9.1

[PATCH v2 3/6] ARM: dts: AM4372: Add PRCM IRQ entry

[Keerthy]

Add PRCM IRQ entry.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index c80a3e2..637133b 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -86,6 +86,7 @@
 			prcm: prcm@1f0000 {
 				compatible = "ti,am4-prcm";
 				reg = <0x1f0000 0x11000>;
+				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 
 				prcm_clocks: clocks {
 					#address-cells = <1>;
-- 
1.9.1

[PATCH v2 3/6] ARM: dts: AM4372: Add PRCM IRQ entry

[Keerthy]

Add PRCM IRQ entry.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index c80a3e2..637133b 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -86,6 +86,7 @@
 			prcm: prcm@1f0000 {
 				compatible = "ti,am4-prcm";
 				reg = <0x1f0000 0x11000>;
+				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 
 				prcm_clocks: clocks {
 					#address-cells = <1>;
-- 
1.9.1

[PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets

[Keerthy]

The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 8149e5a..f82d89a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -217,11 +217,11 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
  */
 static void omap44xx_prm_read_pending_irqs(unsigned long *events)
 {
-	events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
-					  OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
+	int i;
 
-	events[1] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_2_OFFSET,
-					  OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
+	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)
+		events[i] = _read_pending_irq_reg(omap4_prcm_irq_setup.mask +
+				i * 4, omap4_prcm_irq_setup.ack + i * 4);
 }
 
 /**
@@ -251,17 +251,15 @@ static void omap44xx_prm_ocp_barrier(void)
  */
 static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
-	saved_mask[0] =
-		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
-					OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-	saved_mask[1] =
-		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
-					OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
+	int i;
 
-	omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-	omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
+	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) {
+		saved_mask[i] =
+			omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
+					omap4_prcm_irq_setup.mask + i * 4);
+		omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
+					 omap4_prcm_irq_setup.mask + i * 4);
+	}
 
 	/* OCP barrier */
 	omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
@@ -280,10 +278,12 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
  */
 static void omap44xx_prm_restore_irqen(u32 *saved_mask)
 {
-	omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-	omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
+	int i;
+
+	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)
+		omap4_prm_write_inst_reg(saved_mask[i],
+				OMAP4430_PRM_OCP_SOCKET_INST,
+				omap4_prcm_irq_setup.mask + i * 4);
 }
 
 /**
-- 
1.9.1

[PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets

[Keerthy]

The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 8149e5a..f82d89a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -217,11 +217,11 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
  */
 static void omap44xx_prm_read_pending_irqs(unsigned long *events)
 {
-	events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
-					  OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
+	int i;
 
-	events[1] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_2_OFFSET,
-					  OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
+	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)
+		events[i] = _read_pending_irq_reg(omap4_prcm_irq_setup.mask +
+				i * 4, omap4_prcm_irq_setup.ack + i * 4);
 }
 
 /**
@@ -251,17 +251,15 @@ static void omap44xx_prm_ocp_barrier(void)
  */
 static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
-	saved_mask[0] =
-		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
-					OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-	saved_mask[1] =
-		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
-					OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
+	int i;
 
-	omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-	omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
+	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) {
+		saved_mask[i] =
+			omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
+					omap4_prcm_irq_setup.mask + i * 4);
+		omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
+					 omap4_prcm_irq_setup.mask + i * 4);
+	}
 
 	/* OCP barrier */
 	omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
@@ -280,10 +278,12 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
  */
 static void omap44xx_prm_restore_irqen(u32 *saved_mask)
 {
-	omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-	omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
-				 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
+	int i;
+
+	for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++)
+		omap4_prm_write_inst_reg(saved_mask[i],
+				OMAP4430_PRM_OCP_SOCKET_INST,
+				omap4_prcm_irq_setup.mask + i * 4);
 }
 
 /**
-- 
1.9.1

[PATCH v2 5/6] ARM: OMAP4+: PRM: Add AM437x specific data

[Keerthy]

The register offsets for some of the PRM Registers are different
hence populating the differing fields.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index f82d89a..311d717 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -18,13 +18,14 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/of_irq.h>
-
+#include <linux/of.h>
 
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
 #include "vp.h"
 #include "prm44xx.h"
+#include "prcm43xx.h"
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prminst44xx.h"
@@ -720,6 +721,14 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
 
 	omap4_prminst_set_prm_dev_inst(data->device_inst_offset);
 
+	/* Add AM437X specific differences */
+	if (of_device_is_compatible(data->np, "ti,am4-prcm")) {
+		omap4_prcm_irq_setup.nr_irqs = 1;
+		omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET;
+		omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET;
+		omap4_prcm_irq_setup.mask = AM43XX_PRM_IRQENABLE_MPU_OFFSET;
+	}
+
 	return prm_register(&omap44xx_prm_ll_data);
 }
 
-- 
1.9.1

[PATCH v2 5/6] ARM: OMAP4+: PRM: Add AM437x specific data

[Keerthy]

The register offsets for some of the PRM Registers are different
hence populating the differing fields.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index f82d89a..311d717 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -18,13 +18,14 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/of_irq.h>
-
+#include <linux/of.h>
 
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
 #include "vp.h"
 #include "prm44xx.h"
+#include "prcm43xx.h"
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prminst44xx.h"
@@ -720,6 +721,14 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)
 
 	omap4_prminst_set_prm_dev_inst(data->device_inst_offset);
 
+	/* Add AM437X specific differences */
+	if (of_device_is_compatible(data->np, "ti,am4-prcm")) {
+		omap4_prcm_irq_setup.nr_irqs = 1;
+		omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET;
+		omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET;
+		omap4_prcm_irq_setup.mask = AM43XX_PRM_IRQENABLE_MPU_OFFSET;
+	}
+
 	return prm_register(&omap44xx_prm_ll_data);
 }
 
-- 
1.9.1

[PATCH v2 6/6] ARM: PRM: AM437x: Enable IO wakeup feature

[Keerthy]

Enable IO wakeup feature.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prm_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 7add799..1730fc4 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -696,6 +696,7 @@ static struct omap_prcm_init_data am4_prm_data __initdata = {
 	.index = TI_CLKM_PRM,
 	.init = omap44xx_prm_init,
 	.device_inst_offset = AM43XX_PRM_DEVICE_INST,
+	.flags = PRM_HAS_IO_WAKEUP,
 };
 #endif
 
-- 
1.9.1

[PATCH v2 6/6] ARM: PRM: AM437x: Enable IO wakeup feature

[Keerthy]

Enable IO wakeup feature.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-omap2/prm_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 7add799..1730fc4 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -696,6 +696,7 @@ static struct omap_prcm_init_data am4_prm_data __initdata = {
 	.index = TI_CLKM_PRM,
 	.init = omap44xx_prm_init,
 	.device_inst_offset = AM43XX_PRM_DEVICE_INST,
+	.flags = PRM_HAS_IO_WAKEUP,
 };
 #endif
 
-- 
1.9.1

Re: [PATCH v2 1/6] ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register

[Paul Walmsley]

Hi

a few minor comments

On Wed, 8 Jul 2015, Keerthy wrote:

> PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
> remove hardcoding and use the value provided by the omap_prcm_irq_setup
> structure.

Please mention here that the reason why you're making this change is to 
support AM437x. 

> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>
> ---
>  arch/arm/mach-omap2/prcm-common.h |  1 +
>  arch/arm/mach-omap2/prm44xx.c     | 11 ++++++-----
>  2 files changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
> index 6ae0b3a..2e60406 100644
> --- a/arch/arm/mach-omap2/prcm-common.h
> +++ b/arch/arm/mach-omap2/prcm-common.h
> @@ -494,6 +494,7 @@ struct omap_prcm_irq {
>  struct omap_prcm_irq_setup {
>  	u16 ack;
>  	u16 mask;
> +	u16 pm_ctrl;

Please add a kerneldoc structure documentation line for this new field, to 
match the existing documentation here.

>  	u8 nr_regs;
>  	u8 nr_irqs;
>  	const struct omap_prcm_irq *irqs;
> diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
> index 4541700..8149e5a 100644
> --- a/arch/arm/mach-omap2/prm44xx.c
> +++ b/arch/arm/mach-omap2/prm44xx.c
> @@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
>  static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
>  	.ack			= OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
>  	.mask			= OMAP4_PRM_IRQENABLE_MPU_OFFSET,
> +	.pm_ctrl		= OMAP4_PRM_IO_PMCTRL_OFFSET,
>  	.nr_regs		= 2,
>  	.irqs			= omap4_prcm_irqs,
>  	.nr_irqs		= ARRAY_SIZE(omap4_prcm_irqs),
> @@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
>  	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
>  				    OMAP4430_WUCLK_CTRL_MASK,
>  				    inst,
> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
> +				    omap4_prcm_irq_setup.pm_ctrl);
>  	omap_test_timeout(
>  		(((omap4_prm_read_inst_reg(inst,
> -					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
> +					   omap4_prcm_irq_setup.pm_ctrl) &
>  		   OMAP4430_WUCLK_STATUS_MASK) >>
>  		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
>  		MAX_IOPAD_LATCH_TIME, i);
> @@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
>  	/* Trigger WUCLKIN disable */
>  	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
>  				    inst,
> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
> +				    omap4_prcm_irq_setup.pm_ctrl);
>  	omap_test_timeout(
>  		(((omap4_prm_read_inst_reg(inst,
> -					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
> +					   omap4_prcm_irq_setup.pm_ctrl) &
>  		   OMAP4430_WUCLK_STATUS_MASK) >>
>  		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
>  		MAX_IOPAD_LATCH_TIME, i);
> @@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
>  	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
>  				    OMAP4430_GLOBAL_WUEN_MASK,
>  				    inst,
> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
> +				    omap4_prcm_irq_setup.pm_ctrl);
>  }
>  
>  /**
> -- 
> 1.9.1
> 


- Paul

Re: [PATCH v2 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

[Paul Walmsley]

On Wed, 8 Jul 2015, Keerthy wrote:

> Add the PRM IRQ register offsets.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>

Please add more detail to your commit messages so they conform to 
Documentation/SubmittingPatches:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/SubmittingPatches#n109

For example, this commit message should read something like:

---

ARM: AM43xx: Add the PRM IRQ register offsets

Add the PRM IRQ register offsets.  This is needed to support PRM I/O 
wakeup on AM43xx.

--

Basically, your patches need to provide context as to _why_ the change is 
needed. 

I've fixed the message for this patch, and queued it for v4.3, but 
please take care with this issue in the future.


- Paul

Re: [PATCH v2 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

[Paul Walmsley]

On Thu, 16 Jul 2015, Paul Walmsley wrote:

> On Wed, 8 Jul 2015, Keerthy wrote:
> 
> > Add the PRM IRQ register offsets.
> > 
> > Signed-off-by: Keerthy <j-keerthy@ti.com>
> 
> Please add more detail to your commit messages so they conform to 
> Documentation/SubmittingPatches:
> 
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/SubmittingPatches#n109
> 
> For example, this commit message should read something like:
> 
> ---
> 
> ARM: AM43xx: Add the PRM IRQ register offsets
> 
> Add the PRM IRQ register offsets.  This is needed to support PRM I/O 
> wakeup on AM43xx.
> 
> --
> 
> Basically, your patches need to provide context as to _why_ the change is 
> needed. 
> 
> I've fixed the message for this patch, and queued it for v4.3, but 
> please take care with this issue in the future.

Also I've moved the AM43XX_PRM_IO_PMCTRL_OFFSET macro out of the AM43XX CM 
section, since it doesn't belong there.


- Paul

Re: [PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets

[Paul Walmsley]

On Wed, 8 Jul 2015, Keerthy wrote:

> The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
> This makes it difficult to reuse the code for SoCs like AM437x that have
> a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
> Hence handling the case using offset of 4 to accommodate single set of IRQ*
> registers generically.
> 
> Signed-off-by: Keerthy <j-keerthy@ti.com>

Thanks, queued for v4.3.


- Paul

Re: [PATCH v2 1/6] ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register

[Keerthy]

Paul,

Thanks for the review!

On Thursday 16 July 2015 07:24 AM, Paul Walmsley wrote:
> Hi
>
> a few minor comments
>
> On Wed, 8 Jul 2015, Keerthy wrote:
>
>> PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
>> remove hardcoding and use the value provided by the omap_prcm_irq_setup
>> structure.
>
> Please mention here that the reason why you're making this change is to
> support AM437x.

Sure. I will do that.

>
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   arch/arm/mach-omap2/prcm-common.h |  1 +
>>   arch/arm/mach-omap2/prm44xx.c     | 11 ++++++-----
>>   2 files changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
>> index 6ae0b3a..2e60406 100644
>> --- a/arch/arm/mach-omap2/prcm-common.h
>> +++ b/arch/arm/mach-omap2/prcm-common.h
>> @@ -494,6 +494,7 @@ struct omap_prcm_irq {
>>   struct omap_prcm_irq_setup {
>>   	u16 ack;
>>   	u16 mask;
>> +	u16 pm_ctrl;
>
> Please add a kerneldoc structure documentation line for this new field, to
> match the existing documentation here.

Okay.

>
>>   	u8 nr_regs;
>>   	u8 nr_irqs;
>>   	const struct omap_prcm_irq *irqs;
>> diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
>> index 4541700..8149e5a 100644
>> --- a/arch/arm/mach-omap2/prm44xx.c
>> +++ b/arch/arm/mach-omap2/prm44xx.c
>> @@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
>>   static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
>>   	.ack			= OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
>>   	.mask			= OMAP4_PRM_IRQENABLE_MPU_OFFSET,
>> +	.pm_ctrl		= OMAP4_PRM_IO_PMCTRL_OFFSET,
>>   	.nr_regs		= 2,
>>   	.irqs			= omap4_prcm_irqs,
>>   	.nr_irqs		= ARRAY_SIZE(omap4_prcm_irqs),
>> @@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
>>   	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
>>   				    OMAP4430_WUCLK_CTRL_MASK,
>>   				    inst,
>> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
>> +				    omap4_prcm_irq_setup.pm_ctrl);
>>   	omap_test_timeout(
>>   		(((omap4_prm_read_inst_reg(inst,
>> -					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
>> +					   omap4_prcm_irq_setup.pm_ctrl) &
>>   		   OMAP4430_WUCLK_STATUS_MASK) >>
>>   		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
>>   		MAX_IOPAD_LATCH_TIME, i);
>> @@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
>>   	/* Trigger WUCLKIN disable */
>>   	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
>>   				    inst,
>> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
>> +				    omap4_prcm_irq_setup.pm_ctrl);
>>   	omap_test_timeout(
>>   		(((omap4_prm_read_inst_reg(inst,
>> -					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
>> +					   omap4_prcm_irq_setup.pm_ctrl) &
>>   		   OMAP4430_WUCLK_STATUS_MASK) >>
>>   		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
>>   		MAX_IOPAD_LATCH_TIME, i);
>> @@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
>>   	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
>>   				    OMAP4430_GLOBAL_WUEN_MASK,
>>   				    inst,
>> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
>> +				    omap4_prcm_irq_setup.pm_ctrl);
>>   }
>>
>>   /**
>> --
>> 1.9.1
>>
>
>
> - Paul
>

Re: [PATCH v2 1/6] ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register

[Keerthy]

Paul,

Thanks for the review!

On Thursday 16 July 2015 07:24 AM, Paul Walmsley wrote:
> Hi
>
> a few minor comments
>
> On Wed, 8 Jul 2015, Keerthy wrote:
>
>> PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
>> remove hardcoding and use the value provided by the omap_prcm_irq_setup
>> structure.
>
> Please mention here that the reason why you're making this change is to
> support AM437x.

Sure. I will do that.

>
>>
>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>> ---
>>   arch/arm/mach-omap2/prcm-common.h |  1 +
>>   arch/arm/mach-omap2/prm44xx.c     | 11 ++++++-----
>>   2 files changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
>> index 6ae0b3a..2e60406 100644
>> --- a/arch/arm/mach-omap2/prcm-common.h
>> +++ b/arch/arm/mach-omap2/prcm-common.h
>> @@ -494,6 +494,7 @@ struct omap_prcm_irq {
>>   struct omap_prcm_irq_setup {
>>   	u16 ack;
>>   	u16 mask;
>> +	u16 pm_ctrl;
>
> Please add a kerneldoc structure documentation line for this new field, to
> match the existing documentation here.

Okay.

>
>>   	u8 nr_regs;
>>   	u8 nr_irqs;
>>   	const struct omap_prcm_irq *irqs;
>> diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
>> index 4541700..8149e5a 100644
>> --- a/arch/arm/mach-omap2/prm44xx.c
>> +++ b/arch/arm/mach-omap2/prm44xx.c
>> @@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
>>   static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
>>   	.ack			= OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
>>   	.mask			= OMAP4_PRM_IRQENABLE_MPU_OFFSET,
>> +	.pm_ctrl		= OMAP4_PRM_IO_PMCTRL_OFFSET,
>>   	.nr_regs		= 2,
>>   	.irqs			= omap4_prcm_irqs,
>>   	.nr_irqs		= ARRAY_SIZE(omap4_prcm_irqs),
>> @@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
>>   	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
>>   				    OMAP4430_WUCLK_CTRL_MASK,
>>   				    inst,
>> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
>> +				    omap4_prcm_irq_setup.pm_ctrl);
>>   	omap_test_timeout(
>>   		(((omap4_prm_read_inst_reg(inst,
>> -					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
>> +					   omap4_prcm_irq_setup.pm_ctrl) &
>>   		   OMAP4430_WUCLK_STATUS_MASK) >>
>>   		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
>>   		MAX_IOPAD_LATCH_TIME, i);
>> @@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
>>   	/* Trigger WUCLKIN disable */
>>   	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
>>   				    inst,
>> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
>> +				    omap4_prcm_irq_setup.pm_ctrl);
>>   	omap_test_timeout(
>>   		(((omap4_prm_read_inst_reg(inst,
>> -					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
>> +					   omap4_prcm_irq_setup.pm_ctrl) &
>>   		   OMAP4430_WUCLK_STATUS_MASK) >>
>>   		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
>>   		MAX_IOPAD_LATCH_TIME, i);
>> @@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
>>   	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
>>   				    OMAP4430_GLOBAL_WUEN_MASK,
>>   				    inst,
>> -				    OMAP4_PRM_IO_PMCTRL_OFFSET);
>> +				    omap4_prcm_irq_setup.pm_ctrl);
>>   }
>>
>>   /**
>> --
>> 1.9.1
>>
>
>
> - Paul
>

Re: [PATCH v2 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

[Keerthy]

On Thursday 16 July 2015 08:08 AM, Paul Walmsley wrote:
> On Thu, 16 Jul 2015, Paul Walmsley wrote:
>
>> On Wed, 8 Jul 2015, Keerthy wrote:
>>
>>> Add the PRM IRQ register offsets.
>>>
>>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>>
>> Please add more detail to your commit messages so they conform to
>> Documentation/SubmittingPatches:
>>
>> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/SubmittingPatches#n109
>>
>> For example, this commit message should read something like:
>>
>> ---
>>
>> ARM: AM43xx: Add the PRM IRQ register offsets
>>
>> Add the PRM IRQ register offsets.  This is needed to support PRM I/O
>> wakeup on AM43xx.
>>
>> --
>>
>> Basically, your patches need to provide context as to _why_ the change is
>> needed.
>>
>> I've fixed the message for this patch, and queued it for v4.3, but
>> please take care with this issue in the future.
>
> Also I've moved the AM43XX_PRM_IO_PMCTRL_OFFSET macro out of the AM43XX CM
> section, since it doesn't belong there.

Thanks Paul!

>
>
> - Paul
>

Re: [PATCH v2 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

[Keerthy]

On Thursday 16 July 2015 08:08 AM, Paul Walmsley wrote:
> On Thu, 16 Jul 2015, Paul Walmsley wrote:
>
>> On Wed, 8 Jul 2015, Keerthy wrote:
>>
>>> Add the PRM IRQ register offsets.
>>>
>>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>>
>> Please add more detail to your commit messages so they conform to
>> Documentation/SubmittingPatches:
>>
>> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/SubmittingPatches#n109
>>
>> For example, this commit message should read something like:
>>
>> ---
>>
>> ARM: AM43xx: Add the PRM IRQ register offsets
>>
>> Add the PRM IRQ register offsets.  This is needed to support PRM I/O
>> wakeup on AM43xx.
>>
>> --
>>
>> Basically, your patches need to provide context as to _why_ the change is
>> needed.
>>
>> I've fixed the message for this patch, and queued it for v4.3, but
>> please take care with this issue in the future.
>
> Also I've moved the AM43XX_PRM_IO_PMCTRL_OFFSET macro out of the AM43XX CM
> section, since it doesn't belong there.

Thanks Paul!

>
>
> - Paul
>