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From: James Hogan <james.hogan@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>,
	"Maciej W. Rozycki" <macro@linux-mips.org>,
	<linux-mips@linux-mips.org>
Cc: James Hogan <james.hogan@imgtec.com>, Joshua Kinard <kumba@gentoo.org>
Subject: [PATCH 5/6] MIPS: dump_tlb: Dump FrameMask register if exists
Date: Wed, 15 Jul 2015 16:17:46 +0100	[thread overview]
Message-ID: <1436973467-3877-6-git-send-email-james.hogan@imgtec.com> (raw)
In-Reply-To: <1436973467-3877-1-git-send-email-james.hogan@imgtec.com>

The FrameMask register is relevant to the TLB so it should be dumped by
dump_tlb_regs(), however it is only present in certain cores (r10000,
r12000, r14000, r16000). Add dumping of it, conditional upon
current_cpu_type().

Suggested-by: Joshua Kinard <kumba@gentoo.org>
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
---
 arch/mips/lib/dump_tlb.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 2ab83be14ffa..64f90f626681 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -23,6 +23,14 @@ void dump_tlb_regs(void)
 	pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
 	pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
 	pr_info("Wired    : %0x\n", read_c0_wired());
+	switch (current_cpu_type()) {
+	case CPU_R10000:
+	case CPU_R12000:
+	case CPU_R14000:
+	case CPU_R16000:
+		pr_info("FrameMask: %0x\n", read_c0_framemask());
+		break;
+	}
 	if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa)
 		pr_info("PageGrain: %0x\n", read_c0_pagegrain());
 	if (cpu_has_htw) {
-- 
2.3.6

WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: Ralf Baechle <ralf@linux-mips.org>,
	"Maciej W. Rozycki" <macro@linux-mips.org>,
	linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>, Joshua Kinard <kumba@gentoo.org>
Subject: [PATCH 5/6] MIPS: dump_tlb: Dump FrameMask register if exists
Date: Wed, 15 Jul 2015 16:17:46 +0100	[thread overview]
Message-ID: <1436973467-3877-6-git-send-email-james.hogan@imgtec.com> (raw)
Message-ID: <20150715151746.qzP-1teMZhKBao8w501wfjmiafvbRnJNf-ds8E7Shfc@z> (raw)
In-Reply-To: <1436973467-3877-1-git-send-email-james.hogan@imgtec.com>

The FrameMask register is relevant to the TLB so it should be dumped by
dump_tlb_regs(), however it is only present in certain cores (r10000,
r12000, r14000, r16000). Add dumping of it, conditional upon
current_cpu_type().

Suggested-by: Joshua Kinard <kumba@gentoo.org>
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
---
 arch/mips/lib/dump_tlb.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 2ab83be14ffa..64f90f626681 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -23,6 +23,14 @@ void dump_tlb_regs(void)
 	pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
 	pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
 	pr_info("Wired    : %0x\n", read_c0_wired());
+	switch (current_cpu_type()) {
+	case CPU_R10000:
+	case CPU_R12000:
+	case CPU_R14000:
+	case CPU_R16000:
+		pr_info("FrameMask: %0x\n", read_c0_framemask());
+		break;
+	}
 	if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa)
 		pr_info("PageGrain: %0x\n", read_c0_pagegrain());
 	if (cpu_has_htw) {
-- 
2.3.6

  parent reply	other threads:[~2015-07-15 15:19 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-15 15:17 [PATCH 0/6] MIPS: dump_tlb cleanups James Hogan
2015-07-15 15:17 ` James Hogan
2015-07-15 15:17 ` [PATCH 1/6] Documentation/sysrq.txt: Mention MIPS TLB dump (x) James Hogan
2015-07-15 15:17   ` James Hogan
2015-07-20  6:25   ` Ralf Baechle
2015-07-20  6:35     ` Jonathan Corbet
2015-07-15 15:17 ` [PATCH 2/6] MIPS: Refactor dumping of TLB registers for r3k/r4k James Hogan
2015-07-15 15:17   ` James Hogan
2015-07-15 15:17 ` [PATCH 3/6] MIPS: Probe for small (1KiB) page support James Hogan
2015-07-15 15:17   ` James Hogan
2015-07-15 15:17 ` [PATCH 4/6] MIPS: dump_tlb: Only dump PageGrain if interesting James Hogan
2015-07-15 15:17   ` James Hogan
2015-07-15 15:17 ` James Hogan [this message]
2015-07-15 15:17   ` [PATCH 5/6] MIPS: dump_tlb: Dump FrameMask register if exists James Hogan
2015-07-15 15:17 ` [PATCH 6/6] MIPS: Rearrange ENTRYLO field definitions James Hogan
2015-07-15 15:17   ` James Hogan

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