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* [Qemu-devel] [PATCH v6] pci : Add pba_offset PCI quirk for Chelsio T5 devices
@ 2015-07-15 21:56 Gabriel Laupre
  2015-07-15 22:08 ` Alex Williamson
  0 siblings, 1 reply; 2+ messages in thread
From: Gabriel Laupre @ 2015-07-15 21:56 UTC (permalink / raw)
  To: qemu-devel
  Cc: jb-gnumlists, leedom, mst, anish, mboksanyi, Gabriel Laupre,
	alex.williamson, bsd

Fix pba_offset initialization value for Chelsio T5 Virtual Function
device. The T5 hardware has a bug in it where it reports a Pending Interrupt
Bit Array Offset of 0x8000 for its SR-IOV Virtual Functions instead
of the 0x1000 that the hardware actually uses internally. As the hardware
doesn't return the correct pba_offset value, add a quirk to instead
return a hardcoded value of 0x1000 when a Chelsio T5 VF device is
detected.

This bug has been fixed in the Chelsio's next chip series T6 but there are
no plans to respin the T5 ASIC for this bug. It is just documented in the
T5 Errata and left it at that.

Signed-off-by: Gabriel Laupre <glaupre@chelsio.com>

v6: Move changelog to after signature

v5: Reduce the test to only control that the pba_offset doesn't extend beyond
  the specified BAR. The rare cases of potential other wrong offset variables
  extending beyond their specific BAR are left to the sanity check in the
  msix_init() function.

v4: Correct coding style and specify the comments.

v3: Test the correctness of MSIX data compare to the specified BAR and apply a
  quirk if it comes from a Chelsio T5 Virtual Function, otherwise raise a
  config error.

v2: Replace and PCI_DEVICE_ID_CHELSIO_T5_SERIES_VF macro definition with
  the Chelsio's T5 VF devices identifier schema of 0x58xx
---
 hw/vfio/pci.c            | 27 +++++++++++++++++++++++++++
 include/hw/pci/pci_ids.h |  2 ++
 2 files changed, 29 insertions(+)

diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index e0e339a..3257eed 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -2252,6 +2252,33 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev)
     vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
     vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
 
+    /*
+     * Test the size of the pba_offset variable and catch if it extends outside
+     * of the specified BAR. If it is the case, we need to apply a hardware
+     * specific quirk if the device is known or we have a broken configuration.
+     */
+    if (vdev->msix->pba_offset >=
+        vdev->bars[vdev->msix->pba_bar].region.size) {
+
+        PCIDevice *pdev = &vdev->pdev;
+        uint16_t vendor = pci_get_word(pdev->config + PCI_VENDOR_ID);
+        uint16_t device = pci_get_word(pdev->config + PCI_DEVICE_ID);
+
+        /*
+         * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
+         * adapters. The T5 hardware returns an incorrect value of 0x8000 for
+         * the VF PBA offset while the BAR itself is only 8k. The correct value
+         * is 0x1000, so we hard code that here.
+         */
+        if (vendor == PCI_VENDOR_ID_CHELSIO && (device & 0xff00) == 0x5800) {
+            vdev->msix->pba_offset = 0x1000;
+        } else {
+            error_report("vfio: Hardware reports invalid configuration, "
+                         "MSIX PBA outside of specified BAR");
+            return -EINVAL;
+        }
+    }
+
     trace_vfio_early_setup_msix(vdev->vbasedev.name, pos,
                                 vdev->msix->table_bar,
                                 vdev->msix->table_offset,
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
index 49c062b..d98e6c9 100644
--- a/include/hw/pci/pci_ids.h
+++ b/include/hw/pci/pci_ids.h
@@ -114,6 +114,8 @@
 #define PCI_VENDOR_ID_ENSONIQ            0x1274
 #define PCI_DEVICE_ID_ENSONIQ_ES1370     0x5000
 
+#define PCI_VENDOR_ID_CHELSIO            0x1425
+
 #define PCI_VENDOR_ID_FREESCALE          0x1957
 #define PCI_DEVICE_ID_MPC8533E           0x0030
 
-- 
1.8.3.1

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [Qemu-devel] [PATCH v6] pci : Add pba_offset PCI quirk for Chelsio T5 devices
  2015-07-15 21:56 [Qemu-devel] [PATCH v6] pci : Add pba_offset PCI quirk for Chelsio T5 devices Gabriel Laupre
@ 2015-07-15 22:08 ` Alex Williamson
  0 siblings, 0 replies; 2+ messages in thread
From: Alex Williamson @ 2015-07-15 22:08 UTC (permalink / raw)
  To: Gabriel Laupre
  Cc: jb-gnumlists, leedom, mst, qemu-devel, anish, mboksanyi, bsd

On Wed, 2015-07-15 at 14:56 -0700, Gabriel Laupre wrote:
> Fix pba_offset initialization value for Chelsio T5 Virtual Function
> device. The T5 hardware has a bug in it where it reports a Pending Interrupt
> Bit Array Offset of 0x8000 for its SR-IOV Virtual Functions instead
> of the 0x1000 that the hardware actually uses internally. As the hardware
> doesn't return the correct pba_offset value, add a quirk to instead
> return a hardcoded value of 0x1000 when a Chelsio T5 VF device is
> detected.
> 
> This bug has been fixed in the Chelsio's next chip series T6 but there are
> no plans to respin the T5 ASIC for this bug. It is just documented in the
> T5 Errata and left it at that.
> 
> Signed-off-by: Gabriel Laupre <glaupre@chelsio.com>

This patch has already been applied:

http://git.qemu.org/?p=qemu.git;a=commitdiff;h=43302969966bc3a95470bfc300289a83068ef5d9

I already took the liberty of pruning out the changelog from the commit
message.

> v6: Move changelog to after signature

For future reference, it really needs to be below that first "---"
divider above the diffstat.  Thanks,

Alex

> 
> v5: Reduce the test to only control that the pba_offset doesn't extend beyond
>   the specified BAR. The rare cases of potential other wrong offset variables
>   extending beyond their specific BAR are left to the sanity check in the
>   msix_init() function.
> 
> v4: Correct coding style and specify the comments.
> 
> v3: Test the correctness of MSIX data compare to the specified BAR and apply a
>   quirk if it comes from a Chelsio T5 Virtual Function, otherwise raise a
>   config error.
> 
> v2: Replace and PCI_DEVICE_ID_CHELSIO_T5_SERIES_VF macro definition with
>   the Chelsio's T5 VF devices identifier schema of 0x58xx
> ---
>  hw/vfio/pci.c            | 27 +++++++++++++++++++++++++++
>  include/hw/pci/pci_ids.h |  2 ++
>  2 files changed, 29 insertions(+)
> 
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index e0e339a..3257eed 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -2252,6 +2252,33 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev)
>      vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
>      vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
>  
> +    /*
> +     * Test the size of the pba_offset variable and catch if it extends outside
> +     * of the specified BAR. If it is the case, we need to apply a hardware
> +     * specific quirk if the device is known or we have a broken configuration.
> +     */
> +    if (vdev->msix->pba_offset >=
> +        vdev->bars[vdev->msix->pba_bar].region.size) {
> +
> +        PCIDevice *pdev = &vdev->pdev;
> +        uint16_t vendor = pci_get_word(pdev->config + PCI_VENDOR_ID);
> +        uint16_t device = pci_get_word(pdev->config + PCI_DEVICE_ID);
> +
> +        /*
> +         * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
> +         * adapters. The T5 hardware returns an incorrect value of 0x8000 for
> +         * the VF PBA offset while the BAR itself is only 8k. The correct value
> +         * is 0x1000, so we hard code that here.
> +         */
> +        if (vendor == PCI_VENDOR_ID_CHELSIO && (device & 0xff00) == 0x5800) {
> +            vdev->msix->pba_offset = 0x1000;
> +        } else {
> +            error_report("vfio: Hardware reports invalid configuration, "
> +                         "MSIX PBA outside of specified BAR");
> +            return -EINVAL;
> +        }
> +    }
> +
>      trace_vfio_early_setup_msix(vdev->vbasedev.name, pos,
>                                  vdev->msix->table_bar,
>                                  vdev->msix->table_offset,
> diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h
> index 49c062b..d98e6c9 100644
> --- a/include/hw/pci/pci_ids.h
> +++ b/include/hw/pci/pci_ids.h
> @@ -114,6 +114,8 @@
>  #define PCI_VENDOR_ID_ENSONIQ            0x1274
>  #define PCI_DEVICE_ID_ENSONIQ_ES1370     0x5000
>  
> +#define PCI_VENDOR_ID_CHELSIO            0x1425
> +
>  #define PCI_VENDOR_ID_FREESCALE          0x1957
>  #define PCI_DEVICE_ID_MPC8533E           0x0030
>  

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2015-07-15 21:56 [Qemu-devel] [PATCH v6] pci : Add pba_offset PCI quirk for Chelsio T5 devices Gabriel Laupre
2015-07-15 22:08 ` Alex Williamson

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