* [U-Boot] [PATCH v2 2/2] arm: socfpga: config: Remove hard-coded drvsel and smpsel
@ 2015-08-20 7:18 Chin Liang See
2015-08-21 0:54 ` Chin Liang See
0 siblings, 1 reply; 3+ messages in thread
From: Chin Liang See @ 2015-08-20 7:18 UTC (permalink / raw)
To: u-boot
Remove hard-coded SDMMC timing parameter drvsel and smplsel.
This setting now will come from SDMMC calibration
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
---
Changes for v2
- Update the CC list
---
include/configs/socfpga_common.h | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index c64c7ed..1a070fd 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -155,8 +155,6 @@
#define CONFIG_DWMMC
#define CONFIG_SOCFPGA_DWMMC
#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024
-#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3
-#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0
/* FIXME */
/* using smaller max blk cnt to avoid flooding the limited stack we have */
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */
--
1.7.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v2 2/2] arm: socfpga: config: Remove hard-coded drvsel and smpsel
2015-08-20 7:18 [U-Boot] [PATCH v2 2/2] arm: socfpga: config: Remove hard-coded drvsel and smpsel Chin Liang See
@ 2015-08-21 0:54 ` Chin Liang See
2015-08-21 0:59 ` Marek Vasut
0 siblings, 1 reply; 3+ messages in thread
From: Chin Liang See @ 2015-08-21 0:54 UTC (permalink / raw)
To: u-boot
Hi guys,
Any comment or ack for this patch?
Thanks
Chin Liang
On Thu, 2015-08-20 at 02:18 -0500, Chin Liang See wrote:
> Remove hard-coded SDMMC timing parameter drvsel and smplsel.
> This setting now will come from SDMMC calibration
>
> Signed-off-by: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> Changes for v2
> - Update the CC list
> ---
> include/configs/socfpga_common.h | 2 --
> 1 files changed, 0 insertions(+), 2 deletions(-)
>
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index c64c7ed..1a070fd 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -155,8 +155,6 @@
> #define CONFIG_DWMMC
> #define CONFIG_SOCFPGA_DWMMC
> #define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024
> -#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3
> -#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0
> /* FIXME */
> /* using smaller max blk cnt to avoid flooding the limited stack we have */
> #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v2 2/2] arm: socfpga: config: Remove hard-coded drvsel and smpsel
2015-08-21 0:54 ` Chin Liang See
@ 2015-08-21 0:59 ` Marek Vasut
0 siblings, 0 replies; 3+ messages in thread
From: Marek Vasut @ 2015-08-21 0:59 UTC (permalink / raw)
To: u-boot
On Friday, August 21, 2015 at 02:54:15 AM, Chin Liang See wrote:
> Hi guys,
>
> Any comment or ack for this patch?
> Thanks
Please stop top-posting ;-)
This one is all right ; it's 1/2 which is the problem.
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2015-08-21 0:59 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2015-08-20 7:18 [U-Boot] [PATCH v2 2/2] arm: socfpga: config: Remove hard-coded drvsel and smpsel Chin Liang See
2015-08-21 0:54 ` Chin Liang See
2015-08-21 0:59 ` Marek Vasut
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