* [PATCH 1/3] arm64: dts: r8a7795: add GPIO clocks
@ 2015-08-31 15:36 Ulrich Hecht
0 siblings, 0 replies; 2+ messages in thread
From: Ulrich Hecht @ 2015-08-31 15:36 UTC (permalink / raw)
To: linux-sh
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[horms: moved into clock node; removed non-clock nodes; updated changelog;
used R8A7795 as prefix for clock defines]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[uli: removed clock-output-names]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 24 ++++++++++++++++++++++++
include/dt-bindings/clock/r8a7795-clock.h | 8 ++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 0df0dea..ca1970d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -70,6 +70,14 @@
#clock-cells = <1>;
ranges;
+ cp_clk: cp_clk {
+ compatible = "fixed-factor-clock";
+ clocks = <&extal_clk>;
+ #clock-cells = <0>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ };
+
zt_clk: zt {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7795_CLK_PLL1>;
@@ -274,6 +282,22 @@
#clock-cells = <1>;
clock-indices = <R8A7795_CLK_SCIF2>;
};
+
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7795-mstp-clocks",
+ "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+ clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
+ <&cp_clk>, <&cp_clk>, <&cp_clk>,
+ <&cp_clk>, <&cp_clk>;
+ #clock-cells = <1>;
+ clock-indices = <
+ R8A7795_CLK_GPIO7 R8A7795_CLK_GPIO6
+ R8A7795_CLK_GPIO5 R8A7795_CLK_GPIO4
+ R8A7795_CLK_GPIO3 R8A7795_CLK_GPIO2
+ R8A7795_CLK_GPIO1 R8A7795_CLK_GPIO0
+ >;
+ };
};
};
diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h
index d661602..bf7fd98 100644
--- a/include/dt-bindings/clock/r8a7795-clock.h
+++ b/include/dt-bindings/clock/r8a7795-clock.h
@@ -38,6 +38,14 @@
/* MSTP8 */
/* MSTP9 */
+#define R8A7795_CLK_GPIO0 12
+#define R8A7795_CLK_GPIO1 11
+#define R8A7795_CLK_GPIO2 10
+#define R8A7795_CLK_GPIO3 9
+#define R8A7795_CLK_GPIO4 8
+#define R8A7795_CLK_GPIO5 7
+#define R8A7795_CLK_GPIO6 6
+#define R8A7795_CLK_GPIO7 5
/* MSTP10 */
--
2.4.6
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/3] arm64: dts: r8a7795: add GPIO clocks
@ 2015-09-01 7:29 Geert Uytterhoeven
0 siblings, 0 replies; 2+ messages in thread
From: Geert Uytterhoeven @ 2015-09-01 7:29 UTC (permalink / raw)
To: linux-sh
Hi Uli,
On Mon, Aug 31, 2015 at 5:36 PM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -70,6 +70,14 @@
> #clock-cells = <1>;
> ranges;
>
> + cp_clk: cp_clk {
In the absence of "clock-output-names", the node should be called "cp",
to avoid the clock name having a "_clk" suffix.
> + compatible = "fixed-factor-clock";
> + clocks = <&extal_clk>;
> + #clock-cells = <0>;
> + clock-div = <2>;
> + clock-mult = <1>;
> + };
> +
> zt_clk: zt {
> compatible = "fixed-factor-clock";
> clocks = <&cpg_clocks R8A7795_CLK_PLL1>;
> @@ -274,6 +282,22 @@
> #clock-cells = <1>;
> clock-indices = <R8A7795_CLK_SCIF2>;
> };
> +
> + mstp9_clks: mstp9_clks@e6150994 {
Likewise.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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