[PATCH RESEND 0/2] arm: berlin: add cpu hotplug support

[PATCH RESEND 0/2] arm: berlin: add cpu hotplug support

[Jisheng Zhang]

These patches try to add cpu hotplug support for Marvell BG2, BG2Q SoCs.
These SoCs can't power off cpu independently, but we still want cpu hotplug
support for them. However, we need to address "CPU still sat on kernel text"
as pointed out by Mark Rutland[1]. We achieved this by putting the dying CPU
in WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.

patch1 use non-self-cleared control register to reset cpu. This is to prepare
for the next cpu hotplug commit.

patch2 adds the cpu hotplug support finally.


[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/342642.html


Jisheng Zhang (2):
  arm: berlin: use non-self-cleared reset register to reset cpu
  arm: berlin: add CPU hotplug support

 arch/arm/mach-berlin/platsmp.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

-- 
2.5.1

[PATCH RESEND 0/2] arm: berlin: add cpu hotplug support

[Jisheng Zhang]

These patches try to add cpu hotplug support for Marvell BG2, BG2Q SoCs.
These SoCs can't power off cpu independently, but we still want cpu hotplug
support for them. However, we need to address "CPU still sat on kernel text"
as pointed out by Mark Rutland[1]. We achieved this by putting the dying CPU
in WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.

patch1 use non-self-cleared control register to reset cpu. This is to prepare
for the next cpu hotplug commit.

patch2 adds the cpu hotplug support finally.


[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-May/342642.html


Jisheng Zhang (2):
  arm: berlin: use non-self-cleared reset register to reset cpu
  arm: berlin: add CPU hotplug support

 arch/arm/mach-berlin/platsmp.c | 29 ++++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

-- 
2.5.1

[PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Jisheng Zhang]

In Berlin SoCs, there are two kinds of cpu reset control registers: the
first one's corresponding bits will be self-cleared after some cycles,
while the second one's bits won't. Previously the first kind of reset
control register is used, this patch uses the second kind one to prepare
for the next hotplug commit.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/mach-berlin/platsmp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
index 34a3753..bde327b 100644
--- a/arch/arm/mach-berlin/platsmp.c
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -17,7 +17,7 @@
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
-#define CPU_RESET		0x00
+#define CPU_RESET		0x20
 
 #define RESET_VECT		0x00
 #define SW_RESET_ADDR		0x94
@@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
 	u32 val;
 
 	val = readl(cpu_ctrl + CPU_RESET);
+	val &= ~BIT(cpu_logical_map(cpu));
+	writel(val, cpu_ctrl + CPU_RESET);
 	val |= BIT(cpu_logical_map(cpu));
 	writel(val, cpu_ctrl + CPU_RESET);
 }
-- 
2.5.1

[PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Jisheng Zhang]

In Berlin SoCs, there are two kinds of cpu reset control registers: the
first one's corresponding bits will be self-cleared after some cycles,
while the second one's bits won't. Previously the first kind of reset
control register is used, this patch uses the second kind one to prepare
for the next hotplug commit.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/mach-berlin/platsmp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
index 34a3753..bde327b 100644
--- a/arch/arm/mach-berlin/platsmp.c
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -17,7 +17,7 @@
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
-#define CPU_RESET		0x00
+#define CPU_RESET		0x20
 
 #define RESET_VECT		0x00
 #define SW_RESET_ADDR		0x94
@@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
 	u32 val;
 
 	val = readl(cpu_ctrl + CPU_RESET);
+	val &= ~BIT(cpu_logical_map(cpu));
+	writel(val, cpu_ctrl + CPU_RESET);
 	val |= BIT(cpu_logical_map(cpu));
 	writel(val, cpu_ctrl + CPU_RESET);
 }
-- 
2.5.1

[PATCH RESEND 2/2] arm: berlin: add CPU hotplug support

[Jisheng Zhang]

Add cpu hotplug support for berlin SoCs such as BG2 and BG2Q. These SoC
don't support power off cpu independently, but we also want cpu hotplug
support in these SoCs. We achieve this goal by putting the dying CPU in
WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/mach-berlin/platsmp.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
index bde327b..c1e0540 100644
--- a/arch/arm/mach-berlin/platsmp.c
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -14,6 +14,7 @@
 #include <linux/of_address.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
@@ -93,8 +94,32 @@ unmap_scu:
 	iounmap(scu_base);
 }
 
+#ifdef CONFIG_HOTPLUG_CPU
+static void berlin_cpu_die(unsigned int cpu)
+{
+	v7_exit_coherency_flush(louis);
+	while (1)
+		cpu_do_idle();
+}
+
+static int berlin_cpu_kill(unsigned int cpu)
+{
+	u32 val;
+
+	val = readl(cpu_ctrl + CPU_RESET);
+	val &= ~BIT(cpu_logical_map(cpu));
+	writel(val, cpu_ctrl + CPU_RESET);
+
+	return 1;
+}
+#endif
+
 static struct smp_operations berlin_smp_ops __initdata = {
 	.smp_prepare_cpus	= berlin_smp_prepare_cpus,
 	.smp_boot_secondary	= berlin_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_die		= berlin_cpu_die,
+	.cpu_kill		= berlin_cpu_kill,
+#endif
 };
 CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops);
-- 
2.5.1

[PATCH RESEND 2/2] arm: berlin: add CPU hotplug support

[Jisheng Zhang]

Add cpu hotplug support for berlin SoCs such as BG2 and BG2Q. These SoC
don't support power off cpu independently, but we also want cpu hotplug
support in these SoCs. We achieve this goal by putting the dying CPU in
WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/mach-berlin/platsmp.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
index bde327b..c1e0540 100644
--- a/arch/arm/mach-berlin/platsmp.c
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -14,6 +14,7 @@
 #include <linux/of_address.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
 
@@ -93,8 +94,32 @@ unmap_scu:
 	iounmap(scu_base);
 }
 
+#ifdef CONFIG_HOTPLUG_CPU
+static void berlin_cpu_die(unsigned int cpu)
+{
+	v7_exit_coherency_flush(louis);
+	while (1)
+		cpu_do_idle();
+}
+
+static int berlin_cpu_kill(unsigned int cpu)
+{
+	u32 val;
+
+	val = readl(cpu_ctrl + CPU_RESET);
+	val &= ~BIT(cpu_logical_map(cpu));
+	writel(val, cpu_ctrl + CPU_RESET);
+
+	return 1;
+}
+#endif
+
 static struct smp_operations berlin_smp_ops __initdata = {
 	.smp_prepare_cpus	= berlin_smp_prepare_cpus,
 	.smp_boot_secondary	= berlin_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_die		= berlin_cpu_die,
+	.cpu_kill		= berlin_cpu_kill,
+#endif
 };
 CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops);
-- 
2.5.1

Re: [PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Sebastian Hesselbarth]

On 14.09.2015 08:47, Jisheng Zhang wrote:
> In Berlin SoCs, there are two kinds of cpu reset control registers: the
> first one's corresponding bits will be self-cleared after some cycles,
> while the second one's bits won't. Previously the first kind of reset
> control register is used, this patch uses the second kind one to prepare
> for the next hotplug commit.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
>   arch/arm/mach-berlin/platsmp.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
> index 34a3753..bde327b 100644
> --- a/arch/arm/mach-berlin/platsmp.c
> +++ b/arch/arm/mach-berlin/platsmp.c
> @@ -17,7 +17,7 @@
>   #include <asm/smp_plat.h>
>   #include <asm/smp_scu.h>
>
> -#define CPU_RESET		0x00
> +#define CPU_RESET		0x20

Jisheng,

I am fine with the patch itself, except that I'd like to rather
rename the 0x00-register to CPU_RESET_SC with a comment about
the self-clearing nature. The 0x20-register would then be named
CPU_RESET_NON_SC and used the way you propose.

Are you fine with me naming the registers accordingly while
applying the patches?

Sebastian

>   #define RESET_VECT		0x00
>   #define SW_RESET_ADDR		0x94
> @@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
>   	u32 val;
>
>   	val = readl(cpu_ctrl + CPU_RESET);
> +	val &= ~BIT(cpu_logical_map(cpu));
> +	writel(val, cpu_ctrl + CPU_RESET);
>   	val |= BIT(cpu_logical_map(cpu));
>   	writel(val, cpu_ctrl + CPU_RESET);
>   }
>

[PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Sebastian Hesselbarth]

On 14.09.2015 08:47, Jisheng Zhang wrote:
> In Berlin SoCs, there are two kinds of cpu reset control registers: the
> first one's corresponding bits will be self-cleared after some cycles,
> while the second one's bits won't. Previously the first kind of reset
> control register is used, this patch uses the second kind one to prepare
> for the next hotplug commit.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
>   arch/arm/mach-berlin/platsmp.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
> index 34a3753..bde327b 100644
> --- a/arch/arm/mach-berlin/platsmp.c
> +++ b/arch/arm/mach-berlin/platsmp.c
> @@ -17,7 +17,7 @@
>   #include <asm/smp_plat.h>
>   #include <asm/smp_scu.h>
>
> -#define CPU_RESET		0x00
> +#define CPU_RESET		0x20

Jisheng,

I am fine with the patch itself, except that I'd like to rather
rename the 0x00-register to CPU_RESET_SC with a comment about
the self-clearing nature. The 0x20-register would then be named
CPU_RESET_NON_SC and used the way you propose.

Are you fine with me naming the registers accordingly while
applying the patches?

Sebastian

>   #define RESET_VECT		0x00
>   #define SW_RESET_ADDR		0x94
> @@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
>   	u32 val;
>
>   	val = readl(cpu_ctrl + CPU_RESET);
> +	val &= ~BIT(cpu_logical_map(cpu));
> +	writel(val, cpu_ctrl + CPU_RESET);
>   	val |= BIT(cpu_logical_map(cpu));
>   	writel(val, cpu_ctrl + CPU_RESET);
>   }
>

Re: [PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Jisheng Zhang]

Dear Sebastian,

On Sun, 20 Sep 2015 20:04:01 +0200
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 14.09.2015 08:47, Jisheng Zhang wrote:
> > In Berlin SoCs, there are two kinds of cpu reset control registers: the
> > first one's corresponding bits will be self-cleared after some cycles,
> > while the second one's bits won't. Previously the first kind of reset
> > control register is used, this patch uses the second kind one to prepare
> > for the next hotplug commit.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > ---
> >   arch/arm/mach-berlin/platsmp.c | 4 +++-
> >   1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
> > index 34a3753..bde327b 100644
> > --- a/arch/arm/mach-berlin/platsmp.c
> > +++ b/arch/arm/mach-berlin/platsmp.c
> > @@ -17,7 +17,7 @@
> >   #include <asm/smp_plat.h>
> >   #include <asm/smp_scu.h>
> >
> > -#define CPU_RESET		0x00
> > +#define CPU_RESET		0x20
> 
> Jisheng,
> 
> I am fine with the patch itself, except that I'd like to rather
> rename the 0x00-register to CPU_RESET_SC with a comment about
> the self-clearing nature. The 0x20-register would then be named
> CPU_RESET_NON_SC and used the way you propose.

Good idea. And such comment would let people understand why do we change
as that.

> 
> Are you fine with me naming the registers accordingly while
> applying the patches?

Sure, I'm fine. Thank you very much.

> 
> Sebastian
> 
> >   #define RESET_VECT		0x00
> >   #define SW_RESET_ADDR		0x94
> > @@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
> >   	u32 val;
> >
> >   	val = readl(cpu_ctrl + CPU_RESET);
> > +	val &= ~BIT(cpu_logical_map(cpu));
> > +	writel(val, cpu_ctrl + CPU_RESET);
> >   	val |= BIT(cpu_logical_map(cpu));
> >   	writel(val, cpu_ctrl + CPU_RESET);
> >   }
> >
> 

[PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Jisheng Zhang]

Dear Sebastian,

On Sun, 20 Sep 2015 20:04:01 +0200
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:

> On 14.09.2015 08:47, Jisheng Zhang wrote:
> > In Berlin SoCs, there are two kinds of cpu reset control registers: the
> > first one's corresponding bits will be self-cleared after some cycles,
> > while the second one's bits won't. Previously the first kind of reset
> > control register is used, this patch uses the second kind one to prepare
> > for the next hotplug commit.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > ---
> >   arch/arm/mach-berlin/platsmp.c | 4 +++-
> >   1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
> > index 34a3753..bde327b 100644
> > --- a/arch/arm/mach-berlin/platsmp.c
> > +++ b/arch/arm/mach-berlin/platsmp.c
> > @@ -17,7 +17,7 @@
> >   #include <asm/smp_plat.h>
> >   #include <asm/smp_scu.h>
> >
> > -#define CPU_RESET		0x00
> > +#define CPU_RESET		0x20
> 
> Jisheng,
> 
> I am fine with the patch itself, except that I'd like to rather
> rename the 0x00-register to CPU_RESET_SC with a comment about
> the self-clearing nature. The 0x20-register would then be named
> CPU_RESET_NON_SC and used the way you propose.

Good idea. And such comment would let people understand why do we change
as that.

> 
> Are you fine with me naming the registers accordingly while
> applying the patches?

Sure, I'm fine. Thank you very much.

> 
> Sebastian
> 
> >   #define RESET_VECT		0x00
> >   #define SW_RESET_ADDR		0x94
> > @@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
> >   	u32 val;
> >
> >   	val = readl(cpu_ctrl + CPU_RESET);
> > +	val &= ~BIT(cpu_logical_map(cpu));
> > +	writel(val, cpu_ctrl + CPU_RESET);
> >   	val |= BIT(cpu_logical_map(cpu));
> >   	writel(val, cpu_ctrl + CPU_RESET);
> >   }
> >
> 

Re: [PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Jisheng Zhang]

Dear Sebastian,

On Mon, 21 Sep 2015 10:18:25 +0800
Jisheng Zhang <jszhang@marvell.com> wrote:

> Dear Sebastian,
> 
> On Sun, 20 Sep 2015 20:04:01 +0200
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> 
> > On 14.09.2015 08:47, Jisheng Zhang wrote:
> > > In Berlin SoCs, there are two kinds of cpu reset control registers: the
> > > first one's corresponding bits will be self-cleared after some cycles,
> > > while the second one's bits won't. Previously the first kind of reset
> > > control register is used, this patch uses the second kind one to prepare
> > > for the next hotplug commit.
> > >
> > > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > > ---
> > >   arch/arm/mach-berlin/platsmp.c | 4 +++-
> > >   1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
> > > index 34a3753..bde327b 100644
> > > --- a/arch/arm/mach-berlin/platsmp.c
> > > +++ b/arch/arm/mach-berlin/platsmp.c
> > > @@ -17,7 +17,7 @@
> > >   #include <asm/smp_plat.h>
> > >   #include <asm/smp_scu.h>
> > >
> > > -#define CPU_RESET		0x00
> > > +#define CPU_RESET		0x20
> > 
> > Jisheng,
> > 
> > I am fine with the patch itself, except that I'd like to rather
> > rename the 0x00-register to CPU_RESET_SC with a comment about
> > the self-clearing nature. The 0x20-register would then be named
> > CPU_RESET_NON_SC and used the way you propose.
> 
> Good idea. And such comment would let people understand why do we change
> as that.
> 
> > 
> > Are you fine with me naming the registers accordingly while
> > applying the patches?
> 
> Sure, I'm fine. Thank you very much.

I found these two patches are missing in your round 1 berlin pull request. Do
you want me send v2 patches applying the above changes you suggested?

Thanks,
Jisheng

> 
> > 
> > Sebastian
> > 
> > >   #define RESET_VECT		0x00
> > >   #define SW_RESET_ADDR		0x94
> > > @@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
> > >   	u32 val;
> > >
> > >   	val = readl(cpu_ctrl + CPU_RESET);
> > > +	val &= ~BIT(cpu_logical_map(cpu));
> > > +	writel(val, cpu_ctrl + CPU_RESET);
> > >   	val |= BIT(cpu_logical_map(cpu));
> > >   	writel(val, cpu_ctrl + CPU_RESET);
> > >   }
> > >
> > 
> 

[PATCH RESEND 1/2] arm: berlin: use non-self-cleared reset register to reset cpu

[Jisheng Zhang]

Dear Sebastian,

On Mon, 21 Sep 2015 10:18:25 +0800
Jisheng Zhang <jszhang@marvell.com> wrote:

> Dear Sebastian,
> 
> On Sun, 20 Sep 2015 20:04:01 +0200
> Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> wrote:
> 
> > On 14.09.2015 08:47, Jisheng Zhang wrote:
> > > In Berlin SoCs, there are two kinds of cpu reset control registers: the
> > > first one's corresponding bits will be self-cleared after some cycles,
> > > while the second one's bits won't. Previously the first kind of reset
> > > control register is used, this patch uses the second kind one to prepare
> > > for the next hotplug commit.
> > >
> > > Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> > > ---
> > >   arch/arm/mach-berlin/platsmp.c | 4 +++-
> > >   1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
> > > index 34a3753..bde327b 100644
> > > --- a/arch/arm/mach-berlin/platsmp.c
> > > +++ b/arch/arm/mach-berlin/platsmp.c
> > > @@ -17,7 +17,7 @@
> > >   #include <asm/smp_plat.h>
> > >   #include <asm/smp_scu.h>
> > >
> > > -#define CPU_RESET		0x00
> > > +#define CPU_RESET		0x20
> > 
> > Jisheng,
> > 
> > I am fine with the patch itself, except that I'd like to rather
> > rename the 0x00-register to CPU_RESET_SC with a comment about
> > the self-clearing nature. The 0x20-register would then be named
> > CPU_RESET_NON_SC and used the way you propose.
> 
> Good idea. And such comment would let people understand why do we change
> as that.
> 
> > 
> > Are you fine with me naming the registers accordingly while
> > applying the patches?
> 
> Sure, I'm fine. Thank you very much.

I found these two patches are missing in your round 1 berlin pull request. Do
you want me send v2 patches applying the above changes you suggested?

Thanks,
Jisheng

> 
> > 
> > Sebastian
> > 
> > >   #define RESET_VECT		0x00
> > >   #define SW_RESET_ADDR		0x94
> > > @@ -31,6 +31,8 @@ static inline void berlin_perform_reset_cpu(unsigned int cpu)
> > >   	u32 val;
> > >
> > >   	val = readl(cpu_ctrl + CPU_RESET);
> > > +	val &= ~BIT(cpu_logical_map(cpu));
> > > +	writel(val, cpu_ctrl + CPU_RESET);
> > >   	val |= BIT(cpu_logical_map(cpu));
> > >   	writel(val, cpu_ctrl + CPU_RESET);
> > >   }
> > >
> > 
>