* [PATCH v9] Add Mediatek thermal support
@ 2015-09-23 13:37 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt
This series adds support for the thermal sensors included in the
MT8173 SoC. Currently only basic temperature reading is supported
without any interrupt support.
The cpufreq driver for MT8173 is currently under review, so there's no
real cooling device available in mainline. Until this is available the
thermal driver can be tested with the following dts snippet. It creates
a fake gpio fan and a fake trip point which is so low that it can easily
be reached with a "cat /dev/zero > /dev/null" on the command line.
Please review and let me know what's missing to be included in mainline.
changes since v8:
- Add commit description to binding patch
- rebase on v4.3-rc2
changes since v7:
- re-add some used defines removed in v5
- Use MT8173_THERMAL_ZONE_* defines as array indices in static initializers
changes since v6:
- remove dot in Hanyi Wus name
changes since v5:
- update copyright
- remove unused defines
Changes since v4:
- give calibration constants more meaningful names (offset, slope)
- Use define instead of 0x00c for register access.
Changes since v3:
- add include/dt-bindings/thermal/mt8173.h for to be able to use sensor names
in dts files
- fix disabling wrong clock in error path
- remove now unused reset-names property from binding document
- rename MT8173_NUM_BANKS -> MT8173_NUM_ZONES
- rename MT8173_NUM_SENSING_POINTS -> MT8173_NUM_SENSORS_PER_ZONE
- rename struct thermal_zone_device *tz -> struct thermal_zone_device *tzd
Changes since v2:
- sort #includes alphabetically
- Add prefix to register defines
- drop some members from struct mtk_thermal
- simplify raw_to_mcelsius()
- add and use more register bit defines
- use device_reset() instead of devm_reset_control_get()/reset_control_reset()
- misc other stuff
Changes since v1:
- Use "mediatek," prefix for custom properties
- Drop "thermal: consistently use int for temperatures" dependency
Sascha
fan: gpio_fan {
compatible = "gpio-fan";
gpios = <&pio 24 0>;
gpio-fan,speed-map = <0 0
4500 1>;
#cooling-cells = <2>;
};
thermal-zones {
cpu_thermal: cpu_thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&thermal 0>;
trips {
cpu_passive: cpu_passive {
temperature = <47000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
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commit de42d22304311e6d5d711b85e66a281fe1035ba2
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue May 12 09:22:29 2015 +0200
ARM64: dts: mt8173: Add thermal/auxadc device nodes
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..3b18f37 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -277,6 +277,11 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ auxadc: auxadc@11001000 {
+ compatible = "mediatek,mt8173-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8173-uart",
"mediatek,mt6577-uart";
@@ -487,6 +492,18 @@
clock-names = "source", "hclk";
status = "disabled";
};
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
};
};
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH v9] Add Mediatek thermal support
@ 2015-09-23 13:37 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-arm-kernel
This series adds support for the thermal sensors included in the
MT8173 SoC. Currently only basic temperature reading is supported
without any interrupt support.
The cpufreq driver for MT8173 is currently under review, so there's no
real cooling device available in mainline. Until this is available the
thermal driver can be tested with the following dts snippet. It creates
a fake gpio fan and a fake trip point which is so low that it can easily
be reached with a "cat /dev/zero > /dev/null" on the command line.
Please review and let me know what's missing to be included in mainline.
changes since v8:
- Add commit description to binding patch
- rebase on v4.3-rc2
changes since v7:
- re-add some used defines removed in v5
- Use MT8173_THERMAL_ZONE_* defines as array indices in static initializers
changes since v6:
- remove dot in Hanyi Wus name
changes since v5:
- update copyright
- remove unused defines
Changes since v4:
- give calibration constants more meaningful names (offset, slope)
- Use define instead of 0x00c for register access.
Changes since v3:
- add include/dt-bindings/thermal/mt8173.h for to be able to use sensor names
in dts files
- fix disabling wrong clock in error path
- remove now unused reset-names property from binding document
- rename MT8173_NUM_BANKS -> MT8173_NUM_ZONES
- rename MT8173_NUM_SENSING_POINTS -> MT8173_NUM_SENSORS_PER_ZONE
- rename struct thermal_zone_device *tz -> struct thermal_zone_device *tzd
Changes since v2:
- sort #includes alphabetically
- Add prefix to register defines
- drop some members from struct mtk_thermal
- simplify raw_to_mcelsius()
- add and use more register bit defines
- use device_reset() instead of devm_reset_control_get()/reset_control_reset()
- misc other stuff
Changes since v1:
- Use "mediatek," prefix for custom properties
- Drop "thermal: consistently use int for temperatures" dependency
Sascha
fan: gpio_fan {
compatible = "gpio-fan";
gpios = <&pio 24 0>;
gpio-fan,speed-map = <0 0
4500 1>;
#cooling-cells = <2>;
};
thermal-zones {
cpu_thermal: cpu_thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&thermal 0>;
trips {
cpu_passive: cpu_passive {
temperature = <47000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
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commit de42d22304311e6d5d711b85e66a281fe1035ba2
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Tue May 12 09:22:29 2015 +0200
ARM64: dts: mt8173: Add thermal/auxadc device nodes
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..3b18f37 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -277,6 +277,11 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ auxadc: auxadc at 11001000 {
+ compatible = "mediatek,mt8173-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ };
+
uart0: serial at 11002000 {
compatible = "mediatek,mt8173-uart",
"mediatek,mt6577-uart";
@@ -487,6 +492,18 @@
clock-names = "source", "hclk";
status = "disabled";
};
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
};
};
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-09-23 13:37 ` Sascha Hauer
@ 2015-09-23 13:37 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt,
Sascha Hauer
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-09-23 13:37 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
2015-09-23 13:37 ` Sascha Hauer
@ 2015-09-23 13:37 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt,
Sascha Hauer
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
drivers/thermal/Kconfig | 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
3 files changed, 546 insertions(+)
create mode 100644 drivers/thermal/mtk_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 0390044..dadd1eb 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
Thermal reporting device will provide temperature reading,
programmable trip points and other information.
+config MTK_THERMAL
+ tristate "Temperature sensor driver for mediatek SoCs"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ default y
+ help
+ Enable this option if you want to have support for thermal management
+ controller present in Mediatek SoCs
+
menu "Texas Instruments thermal drivers"
source "drivers/thermal/ti-soc-thermal/Kconfig"
endmenu
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 26f1608..5f979e7 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
+obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
new file mode 100644
index 0000000..6be1a6c
--- /dev/null
+++ b/drivers/thermal/mtk_thermal.c
@@ -0,0 +1,537 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Hanyi Wu <hanyi.wu@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/thermal.h>
+#include <linux/reset.h>
+#include <linux/time.h>
+#include <linux/types.h>
+#include <dt-bindings/thermal/mt8173.h>
+
+/* AUXADC Registers */
+#define AUXADC_CON0_V 0x000
+#define AUXADC_CON1_V 0x004
+#define AUXADC_CON1_SET_V 0x008
+#define AUXADC_CON1_CLR_V 0x00c
+#define AUXADC_CON2_V 0x010
+#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
+#define AUXADC_MISC_V 0x094
+
+#define AUXADC_CON1_CHANNEL(x) BIT(x)
+
+#define APMIXED_SYS_TS_CON1 0x604
+
+/* Thermal Controller Registers */
+#define TEMP_MONCTL0 0x000
+#define TEMP_MONCTL1 0x004
+#define TEMP_MONCTL2 0x008
+#define TEMP_MONIDET0 0x014
+#define TEMP_MONIDET1 0x018
+#define TEMP_MSRCTL0 0x038
+#define TEMP_AHBPOLL 0x040
+#define TEMP_AHBTO 0x044
+#define TEMP_ADCPNP0 0x048
+#define TEMP_ADCPNP1 0x04c
+#define TEMP_ADCPNP2 0x050
+#define TEMP_ADCPNP3 0x0b4
+
+#define TEMP_ADCMUX 0x054
+#define TEMP_ADCEN 0x060
+#define TEMP_PNPMUXADDR 0x064
+#define TEMP_ADCMUXADDR 0x068
+#define TEMP_ADCENADDR 0x074
+#define TEMP_ADCVALIDADDR 0x078
+#define TEMP_ADCVOLTADDR 0x07c
+#define TEMP_RDCTRL 0x080
+#define TEMP_ADCVALIDMASK 0x084
+#define TEMP_ADCVOLTAGESHIFT 0x088
+#define TEMP_ADCWRITECTRL 0x08c
+#define TEMP_MSR0 0x090
+#define TEMP_MSR1 0x094
+#define TEMP_MSR2 0x098
+#define TEMP_MSR3 0x0B8
+
+#define TEMP_SPARE0 0x0f0
+
+#define PTPCORESEL 0x400
+
+#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
+
+#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
+#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
+
+#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
+
+#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
+#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
+
+#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
+#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
+
+#define MT8173_TS1 0
+#define MT8173_TS2 1
+#define MT8173_TS3 2
+#define MT8173_TS4 3
+#define MT8173_TSABB 4
+
+/* AUXADC channel 11 is used for the temperature sensors */
+#define MT8173_TEMP_AUXADC_CHANNEL 11
+
+/* The total number of temperature sensors in the MT8173 */
+#define MT8173_NUM_SENSORS 5
+
+/* The number of banks in the MT8173 */
+#define MT8173_NUM_ZONES 4
+
+/* The number of sensing points per bank */
+#define MT8173_NUM_SENSORS_PER_ZONE 4
+
+#define THERMAL_NAME "mtk-thermal"
+
+struct mtk_thermal;
+
+struct mtk_thermal_bank {
+ struct mtk_thermal *mt;
+ struct thermal_zone_device *tzd;
+ int id;
+};
+
+struct mtk_thermal {
+ struct device *dev;
+ void __iomem *thermal_base;
+
+ struct clk *clk_peri_therm;
+ struct clk *clk_auxadc;
+
+ struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
+
+ struct mutex lock;
+
+ /* Calibration values */
+ int calib_slope;
+ int calib_offset;
+};
+
+struct mtk_thermal_bank_cfg {
+ unsigned int num_sensors;
+ unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
+};
+
+static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+
+/*
+ * The MT8173 thermal controller has four banks. Each bank can read up to
+ * four temperature sensors simultaneously. The MT8173 has a total of 5
+ * temperature sensors. We use each bank to measure a certain area of the
+ * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
+ * areas, hence is used in different banks.
+ */
+static const struct mtk_thermal_bank_cfg bank_data[] = {
+ [MT8173_THERMAL_ZONE_CA53] = {
+ .num_sensors = 2,
+ .sensors = { MT8173_TS2, MT8173_TS3 },
+ },
+
+ [MT8173_THERMAL_ZONE_CA57] = {
+ .num_sensors = 2,
+ .sensors = { MT8173_TS2, MT8173_TS4 },
+ },
+
+ [MT8173_THERMAL_ZONE_GPU] = {
+ .num_sensors = 3,
+ .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
+ },
+
+ [MT8173_THERMAL_ZONE_CORE] = {
+ .num_sensors = 1,
+ .sensors = { MT8173_TS2 },
+ },
+};
+
+struct mtk_thermal_sense_point {
+ int msr;
+ int adcpnp;
+};
+
+static const struct mtk_thermal_sense_point
+ sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
+ {
+ .msr = TEMP_MSR0,
+ .adcpnp = TEMP_ADCPNP0,
+ }, {
+ .msr = TEMP_MSR1,
+ .adcpnp = TEMP_ADCPNP1,
+ }, {
+ .msr = TEMP_MSR2,
+ .adcpnp = TEMP_ADCPNP2,
+ }, {
+ .msr = TEMP_MSR3,
+ .adcpnp = TEMP_ADCPNP3,
+ },
+};
+
+/**
+ * raw_to_mcelsius - convert a raw ADC value to mcelsius
+ * @mt: The thermal controller
+ * @raw: raw ADC value
+ *
+ * This converts the raw ADC value to mcelsius using the SoC specific
+ * calibration constants
+ */
+static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
+{
+ return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
+}
+
+/**
+ * mtk_thermal_get_bank - get bank
+ * @bank: The bank
+ *
+ * The bank registers are banked, we have to select a bank in the
+ * PTPCORESEL register to access it.
+ */
+static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
+{
+ struct mtk_thermal *mt = bank->mt;
+ u32 val;
+
+ mutex_lock(&mt->lock);
+
+ val = readl(mt->thermal_base + PTPCORESEL);
+ val &= ~0xf;
+ val |= bank->id;
+ writel(val, mt->thermal_base + PTPCORESEL);
+}
+
+/**
+ * mtk_thermal_put_bank - release bank
+ * @bank: The bank
+ *
+ * release a bank previously taken with mtk_thermal_get_bank,
+ */
+static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
+{
+ struct mtk_thermal *mt = bank->mt;
+
+ mutex_unlock(&mt->lock);
+}
+
+/**
+ * mtk_thermal_bank_temperature - get the temperature of a bank
+ * @bank: The bank
+ *
+ * The temperature of a bank is considered the maximum temperature of
+ * the sensors associated to the bank.
+ */
+static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
+{
+ struct mtk_thermal *mt = bank->mt;
+ int temp, i, max;
+ u32 raw;
+
+ temp = max = INT_MIN;
+
+ for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
+ raw = readl(mt->thermal_base + sensing_points[i].msr);
+
+ temp = raw_to_mcelsius(mt, raw);
+
+ /*
+ * The first read of a sensor often contains very high bogus
+ * temperature value. Filter these out so that the system does
+ * not immediately shut down.
+ */
+ if (temp > 200000)
+ temp = 0;
+
+ if (temp > max)
+ max = temp;
+ }
+
+ return max;
+}
+
+static int mtk_read_temp(void *data, int *temp)
+{
+ struct mtk_thermal_bank *bank = data;
+
+ mtk_thermal_get_bank(bank);
+
+ *temp = mtk_thermal_bank_temperature(bank);
+
+ mtk_thermal_put_bank(bank);
+
+ return 0;
+}
+
+static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
+ .get_temp = mtk_read_temp,
+};
+
+static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
+ u32 apmixed_phys_base, u32 auxadc_phys_base)
+{
+ struct mtk_thermal_bank *bank = &mt->banks[num];
+ const struct mtk_thermal_bank_cfg *cfg = &bank_data[num];
+ int i;
+
+ bank->id = num;
+ bank->mt = mt;
+
+ mtk_thermal_get_bank(bank);
+
+ /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
+ writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
+
+ /*
+ * filt interval is 1 * 46.540us = 46.54us,
+ * sen interval is 429 * 46.540us = 19.96ms
+ */
+ writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
+ TEMP_MONCTL2_SENSOR_INTERVAL(429),
+ mt->thermal_base + TEMP_MONCTL2);
+
+ /* poll is set to 10u */
+ writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
+ mt->thermal_base + TEMP_AHBPOLL);
+
+ /* temperature sampling control, 1 sample */
+ writel(0x00000000, mt->thermal_base + TEMP_MSRCTL0);
+
+ /* exceed this polling time, IRQ would be inserted */
+ writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
+
+ /* number of interrupts per event, 1 is enough */
+ writel(0x0, mt->thermal_base + TEMP_MONIDET0);
+ writel(0x0, mt->thermal_base + TEMP_MONIDET1);
+
+ /*
+ * The MT8173 thermal controller does not have its own ADC. Instead it
+ * uses AHB bus accesses to control the AUXADC. To do this the thermal
+ * controller has to be programmed with the physical addresses of the
+ * AUXADC registers and with the various bit positions in the AUXADC.
+ * Also the thermal controller controls a mux in the APMIXEDSYS register
+ * space.
+ */
+
+ /*
+ * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
+ * automatically by hw
+ */
+ writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCMUX);
+
+ /* AHB address for auxadc mux selection */
+ writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
+ mt->thermal_base + TEMP_ADCMUXADDR);
+
+ /* AHB address for pnp sensor mux selection */
+ writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
+ mt->thermal_base + TEMP_PNPMUXADDR);
+
+ /* AHB value for auxadc enable */
+ writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN);
+
+ /* AHB address for auxadc enable (channel 0 immediate mode selected) */
+ writel(auxadc_phys_base + AUXADC_CON1_SET_V,
+ mt->thermal_base + TEMP_ADCENADDR);
+
+ /* AHB address for auxadc valid bit */
+ writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
+ mt->thermal_base + TEMP_ADCVALIDADDR);
+
+ /* AHB address for auxadc voltage output */
+ writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
+ mt->thermal_base + TEMP_ADCVOLTADDR);
+
+ /* read valid & voltage are at the same register */
+ writel(0x0, mt->thermal_base + TEMP_RDCTRL);
+
+ /* indicate where the valid bit is */
+ writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
+ mt->thermal_base + TEMP_ADCVALIDMASK);
+
+ /* no shift */
+ writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
+
+ /* enable auxadc mux write transaction */
+ writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
+ mt->thermal_base + TEMP_ADCWRITECTRL);
+
+ for (i = 0; i < cfg->num_sensors; i++)
+ writel(sensor_mux_values[cfg->sensors[i]],
+ mt->thermal_base + sensing_points[i].adcpnp);
+
+ writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0);
+
+ writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
+ mt->thermal_base + TEMP_ADCWRITECTRL);
+
+ mtk_thermal_put_bank(bank);
+}
+
+static u64 of_get_phys_base(struct device_node *np)
+{
+ u64 size64;
+ const __be32 *regaddr_p;
+
+ regaddr_p = of_get_address(np, 0, &size64, NULL);
+ if (!regaddr_p)
+ return OF_BAD_ADDR;
+
+ return of_translate_address(np, regaddr_p);
+}
+
+static int mtk_thermal_probe(struct platform_device *pdev)
+{
+ int ret, i;
+ struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
+ struct mtk_thermal *mt;
+ struct resource *res;
+ u64 auxadc_phys_base, apmixed_phys_base;
+
+ mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
+ if (!mt)
+ return -ENOMEM;
+
+ mt->clk_peri_therm = devm_clk_get(&pdev->dev, "therm");
+ if (IS_ERR(mt->clk_peri_therm))
+ return PTR_ERR(mt->clk_peri_therm);
+
+ mt->clk_auxadc = devm_clk_get(&pdev->dev, "auxadc");
+ if (IS_ERR(mt->clk_auxadc))
+ return PTR_ERR(mt->clk_auxadc);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mt->thermal_base))
+ return PTR_ERR(mt->thermal_base);
+
+ mutex_init(&mt->lock);
+
+ mt->dev = &pdev->dev;
+
+ auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
+ if (!auxadc) {
+ dev_err(&pdev->dev, "missing auxadc node\n");
+ return -ENODEV;
+ }
+
+ auxadc_phys_base = of_get_phys_base(auxadc);
+ if (auxadc_phys_base == OF_BAD_ADDR) {
+ dev_err(&pdev->dev, "Can't get auxadc phys address\n");
+ return -EINVAL;
+ }
+
+ apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
+ if (!apmixedsys) {
+ dev_err(&pdev->dev, "missing apmixedsys node\n");
+ return -ENODEV;
+ }
+
+ apmixed_phys_base = of_get_phys_base(apmixedsys);
+ if (apmixed_phys_base == OF_BAD_ADDR) {
+ dev_err(&pdev->dev, "Can't get auxadc phys address\n");
+ return -EINVAL;
+ }
+
+ ret = clk_prepare_enable(mt->clk_auxadc);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = device_reset(&pdev->dev);
+ if (ret)
+ goto err_disable_clk_auxadc;
+
+ ret = clk_prepare_enable(mt->clk_peri_therm);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
+ goto err_disable_clk_auxadc;
+ }
+
+ /*
+ * These calibration values should finally be provided by the
+ * firmware or fuses. For now use default values.
+ */
+ mt->calib_slope = -123;
+ mt->calib_offset = 465124;
+
+ for (i = 0; i < MT8173_NUM_ZONES; i++)
+ mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
+
+ platform_set_drvdata(pdev, mt);
+
+ for (i = 0; i < MT8173_NUM_ZONES; i++) {
+ struct mtk_thermal_bank *bank = &mt->banks[i];
+
+ bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
+ &mtk_thermal_ops);
+ }
+
+ return 0;
+
+err_disable_clk_auxadc:
+ clk_disable_unprepare(mt->clk_auxadc);
+
+ return ret;
+}
+
+static int mtk_thermal_remove(struct platform_device *pdev)
+{
+ struct mtk_thermal *mt = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < MT8173_NUM_ZONES; i++) {
+ struct mtk_thermal_bank *bank = &mt->banks[i];
+
+ thermal_zone_of_sensor_unregister(&pdev->dev, bank->tzd);
+ }
+
+ clk_disable_unprepare(mt->clk_peri_therm);
+ clk_disable_unprepare(mt->clk_auxadc);
+
+ return 0;
+}
+
+static const struct of_device_id mtk_thermal_of_match[] = {
+ {
+ .compatible = "mediatek,mt8173-thermal",
+ }, {
+ },
+};
+
+static struct platform_driver mtk_thermal_driver = {
+ .probe = mtk_thermal_probe,
+ .remove = mtk_thermal_remove,
+ .driver = {
+ .name = THERMAL_NAME,
+ .of_match_table = mtk_thermal_of_match,
+ },
+};
+
+module_platform_driver(mtk_thermal_driver);
+
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
+MODULE_DESCRIPTION("Mediatek thermal driver");
+MODULE_LICENSE("GPL v2");
--
2.5.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-23 13:37 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-arm-kernel
This adds support for the Mediatek thermal controller found on MT8173
and likely other SoCs.
The controller is a bit special. It does not have its own ADC, instead
it controls the on-SoC AUXADC via AHB bus accesses. For this reason
we need the physical address of the AUXADC. Also it controls a mux
using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
drivers/thermal/Kconfig | 8 +
drivers/thermal/Makefile | 1 +
drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
3 files changed, 546 insertions(+)
create mode 100644 drivers/thermal/mtk_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 0390044..dadd1eb 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
Thermal reporting device will provide temperature reading,
programmable trip points and other information.
+config MTK_THERMAL
+ tristate "Temperature sensor driver for mediatek SoCs"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ default y
+ help
+ Enable this option if you want to have support for thermal management
+ controller present in Mediatek SoCs
+
menu "Texas Instruments thermal drivers"
source "drivers/thermal/ti-soc-thermal/Kconfig"
endmenu
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 26f1608..5f979e7 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
+obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
new file mode 100644
index 0000000..6be1a6c
--- /dev/null
+++ b/drivers/thermal/mtk_thermal.c
@@ -0,0 +1,537 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Hanyi Wu <hanyi.wu@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/thermal.h>
+#include <linux/reset.h>
+#include <linux/time.h>
+#include <linux/types.h>
+#include <dt-bindings/thermal/mt8173.h>
+
+/* AUXADC Registers */
+#define AUXADC_CON0_V 0x000
+#define AUXADC_CON1_V 0x004
+#define AUXADC_CON1_SET_V 0x008
+#define AUXADC_CON1_CLR_V 0x00c
+#define AUXADC_CON2_V 0x010
+#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
+#define AUXADC_MISC_V 0x094
+
+#define AUXADC_CON1_CHANNEL(x) BIT(x)
+
+#define APMIXED_SYS_TS_CON1 0x604
+
+/* Thermal Controller Registers */
+#define TEMP_MONCTL0 0x000
+#define TEMP_MONCTL1 0x004
+#define TEMP_MONCTL2 0x008
+#define TEMP_MONIDET0 0x014
+#define TEMP_MONIDET1 0x018
+#define TEMP_MSRCTL0 0x038
+#define TEMP_AHBPOLL 0x040
+#define TEMP_AHBTO 0x044
+#define TEMP_ADCPNP0 0x048
+#define TEMP_ADCPNP1 0x04c
+#define TEMP_ADCPNP2 0x050
+#define TEMP_ADCPNP3 0x0b4
+
+#define TEMP_ADCMUX 0x054
+#define TEMP_ADCEN 0x060
+#define TEMP_PNPMUXADDR 0x064
+#define TEMP_ADCMUXADDR 0x068
+#define TEMP_ADCENADDR 0x074
+#define TEMP_ADCVALIDADDR 0x078
+#define TEMP_ADCVOLTADDR 0x07c
+#define TEMP_RDCTRL 0x080
+#define TEMP_ADCVALIDMASK 0x084
+#define TEMP_ADCVOLTAGESHIFT 0x088
+#define TEMP_ADCWRITECTRL 0x08c
+#define TEMP_MSR0 0x090
+#define TEMP_MSR1 0x094
+#define TEMP_MSR2 0x098
+#define TEMP_MSR3 0x0B8
+
+#define TEMP_SPARE0 0x0f0
+
+#define PTPCORESEL 0x400
+
+#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
+
+#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
+#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
+
+#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
+
+#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
+#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
+
+#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
+#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
+
+#define MT8173_TS1 0
+#define MT8173_TS2 1
+#define MT8173_TS3 2
+#define MT8173_TS4 3
+#define MT8173_TSABB 4
+
+/* AUXADC channel 11 is used for the temperature sensors */
+#define MT8173_TEMP_AUXADC_CHANNEL 11
+
+/* The total number of temperature sensors in the MT8173 */
+#define MT8173_NUM_SENSORS 5
+
+/* The number of banks in the MT8173 */
+#define MT8173_NUM_ZONES 4
+
+/* The number of sensing points per bank */
+#define MT8173_NUM_SENSORS_PER_ZONE 4
+
+#define THERMAL_NAME "mtk-thermal"
+
+struct mtk_thermal;
+
+struct mtk_thermal_bank {
+ struct mtk_thermal *mt;
+ struct thermal_zone_device *tzd;
+ int id;
+};
+
+struct mtk_thermal {
+ struct device *dev;
+ void __iomem *thermal_base;
+
+ struct clk *clk_peri_therm;
+ struct clk *clk_auxadc;
+
+ struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
+
+ struct mutex lock;
+
+ /* Calibration values */
+ int calib_slope;
+ int calib_offset;
+};
+
+struct mtk_thermal_bank_cfg {
+ unsigned int num_sensors;
+ unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
+};
+
+static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+
+/*
+ * The MT8173 thermal controller has four banks. Each bank can read up to
+ * four temperature sensors simultaneously. The MT8173 has a total of 5
+ * temperature sensors. We use each bank to measure a certain area of the
+ * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
+ * areas, hence is used in different banks.
+ */
+static const struct mtk_thermal_bank_cfg bank_data[] = {
+ [MT8173_THERMAL_ZONE_CA53] = {
+ .num_sensors = 2,
+ .sensors = { MT8173_TS2, MT8173_TS3 },
+ },
+
+ [MT8173_THERMAL_ZONE_CA57] = {
+ .num_sensors = 2,
+ .sensors = { MT8173_TS2, MT8173_TS4 },
+ },
+
+ [MT8173_THERMAL_ZONE_GPU] = {
+ .num_sensors = 3,
+ .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
+ },
+
+ [MT8173_THERMAL_ZONE_CORE] = {
+ .num_sensors = 1,
+ .sensors = { MT8173_TS2 },
+ },
+};
+
+struct mtk_thermal_sense_point {
+ int msr;
+ int adcpnp;
+};
+
+static const struct mtk_thermal_sense_point
+ sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
+ {
+ .msr = TEMP_MSR0,
+ .adcpnp = TEMP_ADCPNP0,
+ }, {
+ .msr = TEMP_MSR1,
+ .adcpnp = TEMP_ADCPNP1,
+ }, {
+ .msr = TEMP_MSR2,
+ .adcpnp = TEMP_ADCPNP2,
+ }, {
+ .msr = TEMP_MSR3,
+ .adcpnp = TEMP_ADCPNP3,
+ },
+};
+
+/**
+ * raw_to_mcelsius - convert a raw ADC value to mcelsius
+ * @mt: The thermal controller
+ * @raw: raw ADC value
+ *
+ * This converts the raw ADC value to mcelsius using the SoC specific
+ * calibration constants
+ */
+static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
+{
+ return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
+}
+
+/**
+ * mtk_thermal_get_bank - get bank
+ * @bank: The bank
+ *
+ * The bank registers are banked, we have to select a bank in the
+ * PTPCORESEL register to access it.
+ */
+static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
+{
+ struct mtk_thermal *mt = bank->mt;
+ u32 val;
+
+ mutex_lock(&mt->lock);
+
+ val = readl(mt->thermal_base + PTPCORESEL);
+ val &= ~0xf;
+ val |= bank->id;
+ writel(val, mt->thermal_base + PTPCORESEL);
+}
+
+/**
+ * mtk_thermal_put_bank - release bank
+ * @bank: The bank
+ *
+ * release a bank previously taken with mtk_thermal_get_bank,
+ */
+static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
+{
+ struct mtk_thermal *mt = bank->mt;
+
+ mutex_unlock(&mt->lock);
+}
+
+/**
+ * mtk_thermal_bank_temperature - get the temperature of a bank
+ * @bank: The bank
+ *
+ * The temperature of a bank is considered the maximum temperature of
+ * the sensors associated to the bank.
+ */
+static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
+{
+ struct mtk_thermal *mt = bank->mt;
+ int temp, i, max;
+ u32 raw;
+
+ temp = max = INT_MIN;
+
+ for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
+ raw = readl(mt->thermal_base + sensing_points[i].msr);
+
+ temp = raw_to_mcelsius(mt, raw);
+
+ /*
+ * The first read of a sensor often contains very high bogus
+ * temperature value. Filter these out so that the system does
+ * not immediately shut down.
+ */
+ if (temp > 200000)
+ temp = 0;
+
+ if (temp > max)
+ max = temp;
+ }
+
+ return max;
+}
+
+static int mtk_read_temp(void *data, int *temp)
+{
+ struct mtk_thermal_bank *bank = data;
+
+ mtk_thermal_get_bank(bank);
+
+ *temp = mtk_thermal_bank_temperature(bank);
+
+ mtk_thermal_put_bank(bank);
+
+ return 0;
+}
+
+static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
+ .get_temp = mtk_read_temp,
+};
+
+static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
+ u32 apmixed_phys_base, u32 auxadc_phys_base)
+{
+ struct mtk_thermal_bank *bank = &mt->banks[num];
+ const struct mtk_thermal_bank_cfg *cfg = &bank_data[num];
+ int i;
+
+ bank->id = num;
+ bank->mt = mt;
+
+ mtk_thermal_get_bank(bank);
+
+ /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
+ writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
+
+ /*
+ * filt interval is 1 * 46.540us = 46.54us,
+ * sen interval is 429 * 46.540us = 19.96ms
+ */
+ writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
+ TEMP_MONCTL2_SENSOR_INTERVAL(429),
+ mt->thermal_base + TEMP_MONCTL2);
+
+ /* poll is set to 10u */
+ writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
+ mt->thermal_base + TEMP_AHBPOLL);
+
+ /* temperature sampling control, 1 sample */
+ writel(0x00000000, mt->thermal_base + TEMP_MSRCTL0);
+
+ /* exceed this polling time, IRQ would be inserted */
+ writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
+
+ /* number of interrupts per event, 1 is enough */
+ writel(0x0, mt->thermal_base + TEMP_MONIDET0);
+ writel(0x0, mt->thermal_base + TEMP_MONIDET1);
+
+ /*
+ * The MT8173 thermal controller does not have its own ADC. Instead it
+ * uses AHB bus accesses to control the AUXADC. To do this the thermal
+ * controller has to be programmed with the physical addresses of the
+ * AUXADC registers and with the various bit positions in the AUXADC.
+ * Also the thermal controller controls a mux in the APMIXEDSYS register
+ * space.
+ */
+
+ /*
+ * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
+ * automatically by hw
+ */
+ writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCMUX);
+
+ /* AHB address for auxadc mux selection */
+ writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
+ mt->thermal_base + TEMP_ADCMUXADDR);
+
+ /* AHB address for pnp sensor mux selection */
+ writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
+ mt->thermal_base + TEMP_PNPMUXADDR);
+
+ /* AHB value for auxadc enable */
+ writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN);
+
+ /* AHB address for auxadc enable (channel 0 immediate mode selected) */
+ writel(auxadc_phys_base + AUXADC_CON1_SET_V,
+ mt->thermal_base + TEMP_ADCENADDR);
+
+ /* AHB address for auxadc valid bit */
+ writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
+ mt->thermal_base + TEMP_ADCVALIDADDR);
+
+ /* AHB address for auxadc voltage output */
+ writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
+ mt->thermal_base + TEMP_ADCVOLTADDR);
+
+ /* read valid & voltage are at the same register */
+ writel(0x0, mt->thermal_base + TEMP_RDCTRL);
+
+ /* indicate where the valid bit is */
+ writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
+ mt->thermal_base + TEMP_ADCVALIDMASK);
+
+ /* no shift */
+ writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
+
+ /* enable auxadc mux write transaction */
+ writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
+ mt->thermal_base + TEMP_ADCWRITECTRL);
+
+ for (i = 0; i < cfg->num_sensors; i++)
+ writel(sensor_mux_values[cfg->sensors[i]],
+ mt->thermal_base + sensing_points[i].adcpnp);
+
+ writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0);
+
+ writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
+ mt->thermal_base + TEMP_ADCWRITECTRL);
+
+ mtk_thermal_put_bank(bank);
+}
+
+static u64 of_get_phys_base(struct device_node *np)
+{
+ u64 size64;
+ const __be32 *regaddr_p;
+
+ regaddr_p = of_get_address(np, 0, &size64, NULL);
+ if (!regaddr_p)
+ return OF_BAD_ADDR;
+
+ return of_translate_address(np, regaddr_p);
+}
+
+static int mtk_thermal_probe(struct platform_device *pdev)
+{
+ int ret, i;
+ struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
+ struct mtk_thermal *mt;
+ struct resource *res;
+ u64 auxadc_phys_base, apmixed_phys_base;
+
+ mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
+ if (!mt)
+ return -ENOMEM;
+
+ mt->clk_peri_therm = devm_clk_get(&pdev->dev, "therm");
+ if (IS_ERR(mt->clk_peri_therm))
+ return PTR_ERR(mt->clk_peri_therm);
+
+ mt->clk_auxadc = devm_clk_get(&pdev->dev, "auxadc");
+ if (IS_ERR(mt->clk_auxadc))
+ return PTR_ERR(mt->clk_auxadc);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mt->thermal_base))
+ return PTR_ERR(mt->thermal_base);
+
+ mutex_init(&mt->lock);
+
+ mt->dev = &pdev->dev;
+
+ auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
+ if (!auxadc) {
+ dev_err(&pdev->dev, "missing auxadc node\n");
+ return -ENODEV;
+ }
+
+ auxadc_phys_base = of_get_phys_base(auxadc);
+ if (auxadc_phys_base == OF_BAD_ADDR) {
+ dev_err(&pdev->dev, "Can't get auxadc phys address\n");
+ return -EINVAL;
+ }
+
+ apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
+ if (!apmixedsys) {
+ dev_err(&pdev->dev, "missing apmixedsys node\n");
+ return -ENODEV;
+ }
+
+ apmixed_phys_base = of_get_phys_base(apmixedsys);
+ if (apmixed_phys_base == OF_BAD_ADDR) {
+ dev_err(&pdev->dev, "Can't get auxadc phys address\n");
+ return -EINVAL;
+ }
+
+ ret = clk_prepare_enable(mt->clk_auxadc);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
+ return ret;
+ }
+
+ ret = device_reset(&pdev->dev);
+ if (ret)
+ goto err_disable_clk_auxadc;
+
+ ret = clk_prepare_enable(mt->clk_peri_therm);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
+ goto err_disable_clk_auxadc;
+ }
+
+ /*
+ * These calibration values should finally be provided by the
+ * firmware or fuses. For now use default values.
+ */
+ mt->calib_slope = -123;
+ mt->calib_offset = 465124;
+
+ for (i = 0; i < MT8173_NUM_ZONES; i++)
+ mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
+
+ platform_set_drvdata(pdev, mt);
+
+ for (i = 0; i < MT8173_NUM_ZONES; i++) {
+ struct mtk_thermal_bank *bank = &mt->banks[i];
+
+ bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
+ &mtk_thermal_ops);
+ }
+
+ return 0;
+
+err_disable_clk_auxadc:
+ clk_disable_unprepare(mt->clk_auxadc);
+
+ return ret;
+}
+
+static int mtk_thermal_remove(struct platform_device *pdev)
+{
+ struct mtk_thermal *mt = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < MT8173_NUM_ZONES; i++) {
+ struct mtk_thermal_bank *bank = &mt->banks[i];
+
+ thermal_zone_of_sensor_unregister(&pdev->dev, bank->tzd);
+ }
+
+ clk_disable_unprepare(mt->clk_peri_therm);
+ clk_disable_unprepare(mt->clk_auxadc);
+
+ return 0;
+}
+
+static const struct of_device_id mtk_thermal_of_match[] = {
+ {
+ .compatible = "mediatek,mt8173-thermal",
+ }, {
+ },
+};
+
+static struct platform_driver mtk_thermal_driver = {
+ .probe = mtk_thermal_probe,
+ .remove = mtk_thermal_remove,
+ .driver = {
+ .name = THERMAL_NAME,
+ .of_match_table = mtk_thermal_of_match,
+ },
+};
+
+module_platform_driver(mtk_thermal_driver);
+
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
+MODULE_DESCRIPTION("Mediatek thermal driver");
+MODULE_LICENSE("GPL v2");
--
2.5.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 3/3] ARM64: dts: mt8173: Add thermal/auxadc device nodes
2015-09-23 13:37 ` Sascha Hauer
@ 2015-09-23 13:37 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt,
Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..3b18f37 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -277,6 +277,11 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ auxadc: auxadc@11001000 {
+ compatible = "mediatek,mt8173-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt8173-uart",
"mediatek,mt6577-uart";
@@ -487,6 +492,18 @@
clock-names = "source", "hclk";
status = "disabled";
};
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
};
};
--
2.5.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 3/3] ARM64: dts: mt8173: Add thermal/auxadc device nodes
@ 2015-09-23 13:37 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-23 13:37 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..3b18f37 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -277,6 +277,11 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ auxadc: auxadc at 11001000 {
+ compatible = "mediatek,mt8173-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ };
+
uart0: serial at 11002000 {
compatible = "mediatek,mt8173-uart",
"mediatek,mt6577-uart";
@@ -487,6 +492,18 @@
clock-names = "source", "hclk";
status = "disabled";
};
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
};
};
--
2.5.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-23 18:31 ` Vladimir Zapolskiy
0 siblings, 0 replies; 81+ messages in thread
From: Vladimir Zapolskiy @ 2015-09-23 18:31 UTC (permalink / raw)
To: Sascha Hauer, Eduardo Valentin
Cc: linux-pm, Zhang Rui, linux-kernel, kernel, linux-mediatek,
linux-arm-kernel, Matthias Brugger, devicetree, mark.rutland,
robh+dt
Hi Sascha,
On 23.09.2015 16:37, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
[snip]
> +
> + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
> + if (!auxadc) {
> + dev_err(&pdev->dev, "missing auxadc node\n");
> + return -ENODEV;
> + }
> +
> + auxadc_phys_base = of_get_phys_base(auxadc);
in case of OF_DYNAMIC enabled of_parse_phandle() requires of_node_put(),
which is fine to place right here.
> + if (auxadc_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
[snip]
> +
> + /*
> + * These calibration values should finally be provided by the
> + * firmware or fuses. For now use default values.
> + */
> + mt->calib_slope = -123;
> + mt->calib_offset = 465124;
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> +
> + platform_set_drvdata(pdev, mt);
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> + &mtk_thermal_ops);
I would propose to add return value checks here, otherwise there might
be an oops in mtk_thermal_remove(), if something goes wrong.
--
With best wishes,
Vladimir
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-23 18:31 ` Vladimir Zapolskiy
0 siblings, 0 replies; 81+ messages in thread
From: Vladimir Zapolskiy @ 2015-09-23 18:31 UTC (permalink / raw)
To: Sascha Hauer, Eduardo Valentin
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ, Matthias Brugger, Zhang Rui,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi Sascha,
On 23.09.2015 16:37, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
[snip]
> +
> + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
> + if (!auxadc) {
> + dev_err(&pdev->dev, "missing auxadc node\n");
> + return -ENODEV;
> + }
> +
> + auxadc_phys_base = of_get_phys_base(auxadc);
in case of OF_DYNAMIC enabled of_parse_phandle() requires of_node_put(),
which is fine to place right here.
> + if (auxadc_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
[snip]
> +
> + /*
> + * These calibration values should finally be provided by the
> + * firmware or fuses. For now use default values.
> + */
> + mt->calib_slope = -123;
> + mt->calib_offset = 465124;
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> +
> + platform_set_drvdata(pdev, mt);
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> + &mtk_thermal_ops);
I would propose to add return value checks here, otherwise there might
be an oops in mtk_thermal_remove(), if something goes wrong.
--
With best wishes,
Vladimir
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-23 18:31 ` Vladimir Zapolskiy
0 siblings, 0 replies; 81+ messages in thread
From: Vladimir Zapolskiy @ 2015-09-23 18:31 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sascha,
On 23.09.2015 16:37, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
[snip]
> +
> + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
> + if (!auxadc) {
> + dev_err(&pdev->dev, "missing auxadc node\n");
> + return -ENODEV;
> + }
> +
> + auxadc_phys_base = of_get_phys_base(auxadc);
in case of OF_DYNAMIC enabled of_parse_phandle() requires of_node_put(),
which is fine to place right here.
> + if (auxadc_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
[snip]
> +
> + /*
> + * These calibration values should finally be provided by the
> + * firmware or fuses. For now use default values.
> + */
> + mt->calib_slope = -123;
> + mt->calib_offset = 465124;
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> +
> + platform_set_drvdata(pdev, mt);
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> + &mtk_thermal_ops);
I would propose to add return value checks here, otherwise there might
be an oops in mtk_thermal_remove(), if something goes wrong.
--
With best wishes,
Vladimir
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-29 23:04 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-09-29 23:04 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, linux-kernel, kernel, linux-mediatek,
linux-arm-kernel, Matthias Brugger, devicetree, mark.rutland,
robh+dt
On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 0390044..dadd1eb 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
> Thermal reporting device will provide temperature reading,
> programmable trip points and other information.
>
> +config MTK_THERMAL
> + tristate "Temperature sensor driver for mediatek SoCs"
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + default y
> + help
> + Enable this option if you want to have support for thermal management
> + controller present in Mediatek SoCs
> +
> menu "Texas Instruments thermal drivers"
> source "drivers/thermal/ti-soc-thermal/Kconfig"
> endmenu
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 26f1608..5f979e7 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> +obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> new file mode 100644
> index 0000000..6be1a6c
> --- /dev/null
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -0,0 +1,537 @@
> +/*
> + * Copyright (c) 2015 MediaTek Inc.
> + * Author: Hanyi Wu <hanyi.wu@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
You dont seam to be using this header. Can you please clean up to have
only the headers you need?
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/thermal.h>
> +#include <linux/reset.h>
> +#include <linux/time.h>
> +#include <linux/types.h>
> +#include <dt-bindings/thermal/mt8173.h>
> +
> +/* AUXADC Registers */
> +#define AUXADC_CON0_V 0x000
> +#define AUXADC_CON1_V 0x004
> +#define AUXADC_CON1_SET_V 0x008
> +#define AUXADC_CON1_CLR_V 0x00c
> +#define AUXADC_CON2_V 0x010
> +#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
> +#define AUXADC_MISC_V 0x094
> +
> +#define AUXADC_CON1_CHANNEL(x) BIT(x)
> +
> +#define APMIXED_SYS_TS_CON1 0x604
> +
> +/* Thermal Controller Registers */
> +#define TEMP_MONCTL0 0x000
> +#define TEMP_MONCTL1 0x004
> +#define TEMP_MONCTL2 0x008
> +#define TEMP_MONIDET0 0x014
> +#define TEMP_MONIDET1 0x018
> +#define TEMP_MSRCTL0 0x038
> +#define TEMP_AHBPOLL 0x040
> +#define TEMP_AHBTO 0x044
> +#define TEMP_ADCPNP0 0x048
> +#define TEMP_ADCPNP1 0x04c
> +#define TEMP_ADCPNP2 0x050
> +#define TEMP_ADCPNP3 0x0b4
> +
> +#define TEMP_ADCMUX 0x054
> +#define TEMP_ADCEN 0x060
> +#define TEMP_PNPMUXADDR 0x064
> +#define TEMP_ADCMUXADDR 0x068
> +#define TEMP_ADCENADDR 0x074
> +#define TEMP_ADCVALIDADDR 0x078
> +#define TEMP_ADCVOLTADDR 0x07c
> +#define TEMP_RDCTRL 0x080
> +#define TEMP_ADCVALIDMASK 0x084
> +#define TEMP_ADCVOLTAGESHIFT 0x088
> +#define TEMP_ADCWRITECTRL 0x08c
> +#define TEMP_MSR0 0x090
> +#define TEMP_MSR1 0x094
> +#define TEMP_MSR2 0x098
> +#define TEMP_MSR3 0x0B8
> +
> +#define TEMP_SPARE0 0x0f0
> +
> +#define PTPCORESEL 0x400
> +
> +#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
> +
> +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
> +#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
> +
> +#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
> +
> +#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
> +#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
> +
> +#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
> +#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
> +
> +#define MT8173_TS1 0
> +#define MT8173_TS2 1
> +#define MT8173_TS3 2
> +#define MT8173_TS4 3
> +#define MT8173_TSABB 4
> +
> +/* AUXADC channel 11 is used for the temperature sensors */
> +#define MT8173_TEMP_AUXADC_CHANNEL 11
> +
> +/* The total number of temperature sensors in the MT8173 */
> +#define MT8173_NUM_SENSORS 5
> +
> +/* The number of banks in the MT8173 */
> +#define MT8173_NUM_ZONES 4
> +
> +/* The number of sensing points per bank */
> +#define MT8173_NUM_SENSORS_PER_ZONE 4
> +
> +#define THERMAL_NAME "mtk-thermal"
> +
> +struct mtk_thermal;
> +
> +struct mtk_thermal_bank {
> + struct mtk_thermal *mt;
> + struct thermal_zone_device *tzd;
> + int id;
> +};
> +
> +struct mtk_thermal {
> + struct device *dev;
> + void __iomem *thermal_base;
> +
> + struct clk *clk_peri_therm;
> + struct clk *clk_auxadc;
> +
> + struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
> +
> + struct mutex lock;
> +
> + /* Calibration values */
> + int calib_slope;
> + int calib_offset;
> +};
> +
> +struct mtk_thermal_bank_cfg {
> + unsigned int num_sensors;
> + unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
> +};
> +
> +static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +
> +/*
> + * The MT8173 thermal controller has four banks. Each bank can read up to
> + * four temperature sensors simultaneously. The MT8173 has a total of 5
> + * temperature sensors. We use each bank to measure a certain area of the
> + * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
> + * areas, hence is used in different banks.
> + */
> +static const struct mtk_thermal_bank_cfg bank_data[] = {
> + [MT8173_THERMAL_ZONE_CA53] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS3 },
> + },
> +
> + [MT8173_THERMAL_ZONE_CA57] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS4 },
> + },
> +
> + [MT8173_THERMAL_ZONE_GPU] = {
> + .num_sensors = 3,
> + .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
> + },
> +
> + [MT8173_THERMAL_ZONE_CORE] = {
> + .num_sensors = 1,
> + .sensors = { MT8173_TS2 },
> + },
> +};
> +
> +struct mtk_thermal_sense_point {
> + int msr;
> + int adcpnp;
> +};
> +
> +static const struct mtk_thermal_sense_point
> + sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
> + {
> + .msr = TEMP_MSR0,
> + .adcpnp = TEMP_ADCPNP0,
> + }, {
> + .msr = TEMP_MSR1,
> + .adcpnp = TEMP_ADCPNP1,
> + }, {
> + .msr = TEMP_MSR2,
> + .adcpnp = TEMP_ADCPNP2,
> + }, {
> + .msr = TEMP_MSR3,
> + .adcpnp = TEMP_ADCPNP3,
> + },
> +};
> +
> +/**
> + * raw_to_mcelsius - convert a raw ADC value to mcelsius
> + * @mt: The thermal controller
> + * @raw: raw ADC value
> + *
> + * This converts the raw ADC value to mcelsius using the SoC specific
> + * calibration constants
> + */
> +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> +{
> + return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
> +}
> +
> +/**
> + * mtk_thermal_get_bank - get bank
> + * @bank: The bank
> + *
> + * The bank registers are banked, we have to select a bank in the
> + * PTPCORESEL register to access it.
> + */
> +static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + u32 val;
> +
> + mutex_lock(&mt->lock);
> +
> + val = readl(mt->thermal_base + PTPCORESEL);
> + val &= ~0xf;
> + val |= bank->id;
> + writel(val, mt->thermal_base + PTPCORESEL);
> +}
> +
> +/**
> + * mtk_thermal_put_bank - release bank
> + * @bank: The bank
> + *
> + * release a bank previously taken with mtk_thermal_get_bank,
> + */
> +static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> +
> + mutex_unlock(&mt->lock);
> +}
> +
> +/**
> + * mtk_thermal_bank_temperature - get the temperature of a bank
> + * @bank: The bank
> + *
> + * The temperature of a bank is considered the maximum temperature of
> + * the sensors associated to the bank.
> + */
> +static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + int temp, i, max;
> + u32 raw;
> +
> + temp = max = INT_MIN;
> +
> + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> + raw = readl(mt->thermal_base + sensing_points[i].msr);
> +
> + temp = raw_to_mcelsius(mt, raw);
> +
> + /*
> + * The first read of a sensor often contains very high bogus
> + * temperature value. Filter these out so that the system does
> + * not immediately shut down.
> + */
> + if (temp > 200000)
Ok... How about after the first read? is > 200000 a valid (supported) value range?
Just trying to understand if the cap can be kept on all cases.
> + temp = 0;
> +
> + if (temp > max)
> + max = temp;
> + }
> +
> + return max;
> +}
> +
> +static int mtk_read_temp(void *data, int *temp)
> +{
> + struct mtk_thermal_bank *bank = data;
> +
> + mtk_thermal_get_bank(bank);
> +
> + *temp = mtk_thermal_bank_temperature(bank);
> +
> + mtk_thermal_put_bank(bank);
> +
> + return 0;
> +}
> +
> +static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
> + .get_temp = mtk_read_temp,
> +};
> +
> +static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> + u32 apmixed_phys_base, u32 auxadc_phys_base)
> +{
> + struct mtk_thermal_bank *bank = &mt->banks[num];
> + const struct mtk_thermal_bank_cfg *cfg = &bank_data[num];
> + int i;
> +
> + bank->id = num;
> + bank->mt = mt;
> +
> + mtk_thermal_get_bank(bank);
> +
> + /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
> + writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
> +
> + /*
> + * filt interval is 1 * 46.540us = 46.54us,
> + * sen interval is 429 * 46.540us = 19.96ms
> + */
> + writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
> + TEMP_MONCTL2_SENSOR_INTERVAL(429),
> + mt->thermal_base + TEMP_MONCTL2);
> +
> + /* poll is set to 10u */
> + writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
> + mt->thermal_base + TEMP_AHBPOLL);
> +
> + /* temperature sampling control, 1 sample */
> + writel(0x00000000, mt->thermal_base + TEMP_MSRCTL0);
> +
> + /* exceed this polling time, IRQ would be inserted */
> + writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
> +
> + /* number of interrupts per event, 1 is enough */
> + writel(0x0, mt->thermal_base + TEMP_MONIDET0);
> + writel(0x0, mt->thermal_base + TEMP_MONIDET1);
> +
> + /*
> + * The MT8173 thermal controller does not have its own ADC. Instead it
> + * uses AHB bus accesses to control the AUXADC. To do this the thermal
> + * controller has to be programmed with the physical addresses of the
> + * AUXADC registers and with the various bit positions in the AUXADC.
> + * Also the thermal controller controls a mux in the APMIXEDSYS register
> + * space.
> + */
> +
> + /*
> + * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
> + * automatically by hw
> + */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCMUX);
> +
> + /* AHB address for auxadc mux selection */
> + writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
> + mt->thermal_base + TEMP_ADCMUXADDR);
> +
> + /* AHB address for pnp sensor mux selection */
> + writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
> + mt->thermal_base + TEMP_PNPMUXADDR);
> +
> + /* AHB value for auxadc enable */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN);
> +
> + /* AHB address for auxadc enable (channel 0 immediate mode selected) */
> + writel(auxadc_phys_base + AUXADC_CON1_SET_V,
> + mt->thermal_base + TEMP_ADCENADDR);
> +
> + /* AHB address for auxadc valid bit */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVALIDADDR);
> +
> + /* AHB address for auxadc voltage output */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVOLTADDR);
> +
> + /* read valid & voltage are at the same register */
> + writel(0x0, mt->thermal_base + TEMP_RDCTRL);
> +
> + /* indicate where the valid bit is */
> + writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
> + mt->thermal_base + TEMP_ADCVALIDMASK);
> +
> + /* no shift */
> + writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
> +
> + /* enable auxadc mux write transaction */
> + writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + for (i = 0; i < cfg->num_sensors; i++)
> + writel(sensor_mux_values[cfg->sensors[i]],
> + mt->thermal_base + sensing_points[i].adcpnp);
> +
> + writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0);
> +
> + writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + mtk_thermal_put_bank(bank);
> +}
> +
> +static u64 of_get_phys_base(struct device_node *np)
> +{
> + u64 size64;
> + const __be32 *regaddr_p;
> +
> + regaddr_p = of_get_address(np, 0, &size64, NULL);
> + if (!regaddr_p)
> + return OF_BAD_ADDR;
> +
> + return of_translate_address(np, regaddr_p);
> +}
> +
> +static int mtk_thermal_probe(struct platform_device *pdev)
> +{
> + int ret, i;
> + struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
> + struct mtk_thermal *mt;
> + struct resource *res;
> + u64 auxadc_phys_base, apmixed_phys_base;
> +
> + mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
> + if (!mt)
> + return -ENOMEM;
> +
> + mt->clk_peri_therm = devm_clk_get(&pdev->dev, "therm");
> + if (IS_ERR(mt->clk_peri_therm))
> + return PTR_ERR(mt->clk_peri_therm);
> +
> + mt->clk_auxadc = devm_clk_get(&pdev->dev, "auxadc");
> + if (IS_ERR(mt->clk_auxadc))
> + return PTR_ERR(mt->clk_auxadc);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(mt->thermal_base))
> + return PTR_ERR(mt->thermal_base);
> +
> + mutex_init(&mt->lock);
> +
> + mt->dev = &pdev->dev;
> +
> + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
of_put?
> + if (!auxadc) {
> + dev_err(&pdev->dev, "missing auxadc node\n");
> + return -ENODEV;
> + }
> +
> + auxadc_phys_base = of_get_phys_base(auxadc);
> + if (auxadc_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
> + apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
> + if (!apmixedsys) {
> + dev_err(&pdev->dev, "missing apmixedsys node\n");
> + return -ENODEV;
> + }
> +
> + apmixed_phys_base = of_get_phys_base(apmixedsys);
> + if (apmixed_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
> + ret = clk_prepare_enable(mt->clk_auxadc);
> + if (ret) {
> + dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
> + return ret;
> + }
> +
> + ret = device_reset(&pdev->dev);
> + if (ret)
> + goto err_disable_clk_auxadc;
> +
> + ret = clk_prepare_enable(mt->clk_peri_therm);
> + if (ret) {
> + dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
> + goto err_disable_clk_auxadc;
> + }
> +
> + /*
> + * These calibration values should finally be provided by the
> + * firmware or fuses. For now use default values.
> + */
> + mt->calib_slope = -123;
> + mt->calib_offset = 465124;
I would still prefer that this driver would not have these hardcoded
values. Specially considering the fact that we could map it in DT for
instance. What is the impact of using this? Does it work across all chip
distribution?
Should we wait until you have the code to read the fuses before merging
this?
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> +
> + platform_set_drvdata(pdev, mt);
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> + &mtk_thermal_ops);
You need to error handle this.
> + }
> +
> + return 0;
> +
> +err_disable_clk_auxadc:
> + clk_disable_unprepare(mt->clk_auxadc);
> +
> + return ret;
> +}
> +
> +static int mtk_thermal_remove(struct platform_device *pdev)
> +{
> + struct mtk_thermal *mt = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + thermal_zone_of_sensor_unregister(&pdev->dev, bank->tzd);
> + }
> +
> + clk_disable_unprepare(mt->clk_peri_therm);
> + clk_disable_unprepare(mt->clk_auxadc);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id mtk_thermal_of_match[] = {
> + {
> + .compatible = "mediatek,mt8173-thermal",
> + }, {
> + },
> +};
> +
> +static struct platform_driver mtk_thermal_driver = {
> + .probe = mtk_thermal_probe,
> + .remove = mtk_thermal_remove,
> + .driver = {
> + .name = THERMAL_NAME,
> + .of_match_table = mtk_thermal_of_match,
> + },
> +};
> +
> +module_platform_driver(mtk_thermal_driver);
> +
> +MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
> +MODULE_DESCRIPTION("Mediatek thermal driver");
> +MODULE_LICENSE("GPL v2");
> --
> 2.5.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-29 23:04 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-09-29 23:04 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA, Zhang Rui,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Matthias Brugger, devicetree-u79uwXL29TY76Z2rM5mHXA,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 0390044..dadd1eb 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
> Thermal reporting device will provide temperature reading,
> programmable trip points and other information.
>
> +config MTK_THERMAL
> + tristate "Temperature sensor driver for mediatek SoCs"
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + default y
> + help
> + Enable this option if you want to have support for thermal management
> + controller present in Mediatek SoCs
> +
> menu "Texas Instruments thermal drivers"
> source "drivers/thermal/ti-soc-thermal/Kconfig"
> endmenu
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 26f1608..5f979e7 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> +obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> new file mode 100644
> index 0000000..6be1a6c
> --- /dev/null
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -0,0 +1,537 @@
> +/*
> + * Copyright (c) 2015 MediaTek Inc.
> + * Author: Hanyi Wu <hanyi.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
You dont seam to be using this header. Can you please clean up to have
only the headers you need?
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/thermal.h>
> +#include <linux/reset.h>
> +#include <linux/time.h>
> +#include <linux/types.h>
> +#include <dt-bindings/thermal/mt8173.h>
> +
> +/* AUXADC Registers */
> +#define AUXADC_CON0_V 0x000
> +#define AUXADC_CON1_V 0x004
> +#define AUXADC_CON1_SET_V 0x008
> +#define AUXADC_CON1_CLR_V 0x00c
> +#define AUXADC_CON2_V 0x010
> +#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
> +#define AUXADC_MISC_V 0x094
> +
> +#define AUXADC_CON1_CHANNEL(x) BIT(x)
> +
> +#define APMIXED_SYS_TS_CON1 0x604
> +
> +/* Thermal Controller Registers */
> +#define TEMP_MONCTL0 0x000
> +#define TEMP_MONCTL1 0x004
> +#define TEMP_MONCTL2 0x008
> +#define TEMP_MONIDET0 0x014
> +#define TEMP_MONIDET1 0x018
> +#define TEMP_MSRCTL0 0x038
> +#define TEMP_AHBPOLL 0x040
> +#define TEMP_AHBTO 0x044
> +#define TEMP_ADCPNP0 0x048
> +#define TEMP_ADCPNP1 0x04c
> +#define TEMP_ADCPNP2 0x050
> +#define TEMP_ADCPNP3 0x0b4
> +
> +#define TEMP_ADCMUX 0x054
> +#define TEMP_ADCEN 0x060
> +#define TEMP_PNPMUXADDR 0x064
> +#define TEMP_ADCMUXADDR 0x068
> +#define TEMP_ADCENADDR 0x074
> +#define TEMP_ADCVALIDADDR 0x078
> +#define TEMP_ADCVOLTADDR 0x07c
> +#define TEMP_RDCTRL 0x080
> +#define TEMP_ADCVALIDMASK 0x084
> +#define TEMP_ADCVOLTAGESHIFT 0x088
> +#define TEMP_ADCWRITECTRL 0x08c
> +#define TEMP_MSR0 0x090
> +#define TEMP_MSR1 0x094
> +#define TEMP_MSR2 0x098
> +#define TEMP_MSR3 0x0B8
> +
> +#define TEMP_SPARE0 0x0f0
> +
> +#define PTPCORESEL 0x400
> +
> +#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
> +
> +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
> +#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
> +
> +#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
> +
> +#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
> +#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
> +
> +#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
> +#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
> +
> +#define MT8173_TS1 0
> +#define MT8173_TS2 1
> +#define MT8173_TS3 2
> +#define MT8173_TS4 3
> +#define MT8173_TSABB 4
> +
> +/* AUXADC channel 11 is used for the temperature sensors */
> +#define MT8173_TEMP_AUXADC_CHANNEL 11
> +
> +/* The total number of temperature sensors in the MT8173 */
> +#define MT8173_NUM_SENSORS 5
> +
> +/* The number of banks in the MT8173 */
> +#define MT8173_NUM_ZONES 4
> +
> +/* The number of sensing points per bank */
> +#define MT8173_NUM_SENSORS_PER_ZONE 4
> +
> +#define THERMAL_NAME "mtk-thermal"
> +
> +struct mtk_thermal;
> +
> +struct mtk_thermal_bank {
> + struct mtk_thermal *mt;
> + struct thermal_zone_device *tzd;
> + int id;
> +};
> +
> +struct mtk_thermal {
> + struct device *dev;
> + void __iomem *thermal_base;
> +
> + struct clk *clk_peri_therm;
> + struct clk *clk_auxadc;
> +
> + struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
> +
> + struct mutex lock;
> +
> + /* Calibration values */
> + int calib_slope;
> + int calib_offset;
> +};
> +
> +struct mtk_thermal_bank_cfg {
> + unsigned int num_sensors;
> + unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
> +};
> +
> +static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +
> +/*
> + * The MT8173 thermal controller has four banks. Each bank can read up to
> + * four temperature sensors simultaneously. The MT8173 has a total of 5
> + * temperature sensors. We use each bank to measure a certain area of the
> + * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
> + * areas, hence is used in different banks.
> + */
> +static const struct mtk_thermal_bank_cfg bank_data[] = {
> + [MT8173_THERMAL_ZONE_CA53] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS3 },
> + },
> +
> + [MT8173_THERMAL_ZONE_CA57] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS4 },
> + },
> +
> + [MT8173_THERMAL_ZONE_GPU] = {
> + .num_sensors = 3,
> + .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
> + },
> +
> + [MT8173_THERMAL_ZONE_CORE] = {
> + .num_sensors = 1,
> + .sensors = { MT8173_TS2 },
> + },
> +};
> +
> +struct mtk_thermal_sense_point {
> + int msr;
> + int adcpnp;
> +};
> +
> +static const struct mtk_thermal_sense_point
> + sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
> + {
> + .msr = TEMP_MSR0,
> + .adcpnp = TEMP_ADCPNP0,
> + }, {
> + .msr = TEMP_MSR1,
> + .adcpnp = TEMP_ADCPNP1,
> + }, {
> + .msr = TEMP_MSR2,
> + .adcpnp = TEMP_ADCPNP2,
> + }, {
> + .msr = TEMP_MSR3,
> + .adcpnp = TEMP_ADCPNP3,
> + },
> +};
> +
> +/**
> + * raw_to_mcelsius - convert a raw ADC value to mcelsius
> + * @mt: The thermal controller
> + * @raw: raw ADC value
> + *
> + * This converts the raw ADC value to mcelsius using the SoC specific
> + * calibration constants
> + */
> +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> +{
> + return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
> +}
> +
> +/**
> + * mtk_thermal_get_bank - get bank
> + * @bank: The bank
> + *
> + * The bank registers are banked, we have to select a bank in the
> + * PTPCORESEL register to access it.
> + */
> +static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + u32 val;
> +
> + mutex_lock(&mt->lock);
> +
> + val = readl(mt->thermal_base + PTPCORESEL);
> + val &= ~0xf;
> + val |= bank->id;
> + writel(val, mt->thermal_base + PTPCORESEL);
> +}
> +
> +/**
> + * mtk_thermal_put_bank - release bank
> + * @bank: The bank
> + *
> + * release a bank previously taken with mtk_thermal_get_bank,
> + */
> +static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> +
> + mutex_unlock(&mt->lock);
> +}
> +
> +/**
> + * mtk_thermal_bank_temperature - get the temperature of a bank
> + * @bank: The bank
> + *
> + * The temperature of a bank is considered the maximum temperature of
> + * the sensors associated to the bank.
> + */
> +static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + int temp, i, max;
> + u32 raw;
> +
> + temp = max = INT_MIN;
> +
> + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> + raw = readl(mt->thermal_base + sensing_points[i].msr);
> +
> + temp = raw_to_mcelsius(mt, raw);
> +
> + /*
> + * The first read of a sensor often contains very high bogus
> + * temperature value. Filter these out so that the system does
> + * not immediately shut down.
> + */
> + if (temp > 200000)
Ok... How about after the first read? is > 200000 a valid (supported) value range?
Just trying to understand if the cap can be kept on all cases.
> + temp = 0;
> +
> + if (temp > max)
> + max = temp;
> + }
> +
> + return max;
> +}
> +
> +static int mtk_read_temp(void *data, int *temp)
> +{
> + struct mtk_thermal_bank *bank = data;
> +
> + mtk_thermal_get_bank(bank);
> +
> + *temp = mtk_thermal_bank_temperature(bank);
> +
> + mtk_thermal_put_bank(bank);
> +
> + return 0;
> +}
> +
> +static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
> + .get_temp = mtk_read_temp,
> +};
> +
> +static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> + u32 apmixed_phys_base, u32 auxadc_phys_base)
> +{
> + struct mtk_thermal_bank *bank = &mt->banks[num];
> + const struct mtk_thermal_bank_cfg *cfg = &bank_data[num];
> + int i;
> +
> + bank->id = num;
> + bank->mt = mt;
> +
> + mtk_thermal_get_bank(bank);
> +
> + /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
> + writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
> +
> + /*
> + * filt interval is 1 * 46.540us = 46.54us,
> + * sen interval is 429 * 46.540us = 19.96ms
> + */
> + writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
> + TEMP_MONCTL2_SENSOR_INTERVAL(429),
> + mt->thermal_base + TEMP_MONCTL2);
> +
> + /* poll is set to 10u */
> + writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
> + mt->thermal_base + TEMP_AHBPOLL);
> +
> + /* temperature sampling control, 1 sample */
> + writel(0x00000000, mt->thermal_base + TEMP_MSRCTL0);
> +
> + /* exceed this polling time, IRQ would be inserted */
> + writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
> +
> + /* number of interrupts per event, 1 is enough */
> + writel(0x0, mt->thermal_base + TEMP_MONIDET0);
> + writel(0x0, mt->thermal_base + TEMP_MONIDET1);
> +
> + /*
> + * The MT8173 thermal controller does not have its own ADC. Instead it
> + * uses AHB bus accesses to control the AUXADC. To do this the thermal
> + * controller has to be programmed with the physical addresses of the
> + * AUXADC registers and with the various bit positions in the AUXADC.
> + * Also the thermal controller controls a mux in the APMIXEDSYS register
> + * space.
> + */
> +
> + /*
> + * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
> + * automatically by hw
> + */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCMUX);
> +
> + /* AHB address for auxadc mux selection */
> + writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
> + mt->thermal_base + TEMP_ADCMUXADDR);
> +
> + /* AHB address for pnp sensor mux selection */
> + writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
> + mt->thermal_base + TEMP_PNPMUXADDR);
> +
> + /* AHB value for auxadc enable */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN);
> +
> + /* AHB address for auxadc enable (channel 0 immediate mode selected) */
> + writel(auxadc_phys_base + AUXADC_CON1_SET_V,
> + mt->thermal_base + TEMP_ADCENADDR);
> +
> + /* AHB address for auxadc valid bit */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVALIDADDR);
> +
> + /* AHB address for auxadc voltage output */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVOLTADDR);
> +
> + /* read valid & voltage are at the same register */
> + writel(0x0, mt->thermal_base + TEMP_RDCTRL);
> +
> + /* indicate where the valid bit is */
> + writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
> + mt->thermal_base + TEMP_ADCVALIDMASK);
> +
> + /* no shift */
> + writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
> +
> + /* enable auxadc mux write transaction */
> + writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + for (i = 0; i < cfg->num_sensors; i++)
> + writel(sensor_mux_values[cfg->sensors[i]],
> + mt->thermal_base + sensing_points[i].adcpnp);
> +
> + writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0);
> +
> + writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + mtk_thermal_put_bank(bank);
> +}
> +
> +static u64 of_get_phys_base(struct device_node *np)
> +{
> + u64 size64;
> + const __be32 *regaddr_p;
> +
> + regaddr_p = of_get_address(np, 0, &size64, NULL);
> + if (!regaddr_p)
> + return OF_BAD_ADDR;
> +
> + return of_translate_address(np, regaddr_p);
> +}
> +
> +static int mtk_thermal_probe(struct platform_device *pdev)
> +{
> + int ret, i;
> + struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
> + struct mtk_thermal *mt;
> + struct resource *res;
> + u64 auxadc_phys_base, apmixed_phys_base;
> +
> + mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
> + if (!mt)
> + return -ENOMEM;
> +
> + mt->clk_peri_therm = devm_clk_get(&pdev->dev, "therm");
> + if (IS_ERR(mt->clk_peri_therm))
> + return PTR_ERR(mt->clk_peri_therm);
> +
> + mt->clk_auxadc = devm_clk_get(&pdev->dev, "auxadc");
> + if (IS_ERR(mt->clk_auxadc))
> + return PTR_ERR(mt->clk_auxadc);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(mt->thermal_base))
> + return PTR_ERR(mt->thermal_base);
> +
> + mutex_init(&mt->lock);
> +
> + mt->dev = &pdev->dev;
> +
> + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
of_put?
> + if (!auxadc) {
> + dev_err(&pdev->dev, "missing auxadc node\n");
> + return -ENODEV;
> + }
> +
> + auxadc_phys_base = of_get_phys_base(auxadc);
> + if (auxadc_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
> + apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
> + if (!apmixedsys) {
> + dev_err(&pdev->dev, "missing apmixedsys node\n");
> + return -ENODEV;
> + }
> +
> + apmixed_phys_base = of_get_phys_base(apmixedsys);
> + if (apmixed_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
> + ret = clk_prepare_enable(mt->clk_auxadc);
> + if (ret) {
> + dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
> + return ret;
> + }
> +
> + ret = device_reset(&pdev->dev);
> + if (ret)
> + goto err_disable_clk_auxadc;
> +
> + ret = clk_prepare_enable(mt->clk_peri_therm);
> + if (ret) {
> + dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
> + goto err_disable_clk_auxadc;
> + }
> +
> + /*
> + * These calibration values should finally be provided by the
> + * firmware or fuses. For now use default values.
> + */
> + mt->calib_slope = -123;
> + mt->calib_offset = 465124;
I would still prefer that this driver would not have these hardcoded
values. Specially considering the fact that we could map it in DT for
instance. What is the impact of using this? Does it work across all chip
distribution?
Should we wait until you have the code to read the fuses before merging
this?
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> +
> + platform_set_drvdata(pdev, mt);
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> + &mtk_thermal_ops);
You need to error handle this.
> + }
> +
> + return 0;
> +
> +err_disable_clk_auxadc:
> + clk_disable_unprepare(mt->clk_auxadc);
> +
> + return ret;
> +}
> +
> +static int mtk_thermal_remove(struct platform_device *pdev)
> +{
> + struct mtk_thermal *mt = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + thermal_zone_of_sensor_unregister(&pdev->dev, bank->tzd);
> + }
> +
> + clk_disable_unprepare(mt->clk_peri_therm);
> + clk_disable_unprepare(mt->clk_auxadc);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id mtk_thermal_of_match[] = {
> + {
> + .compatible = "mediatek,mt8173-thermal",
> + }, {
> + },
> +};
> +
> +static struct platform_driver mtk_thermal_driver = {
> + .probe = mtk_thermal_probe,
> + .remove = mtk_thermal_remove,
> + .driver = {
> + .name = THERMAL_NAME,
> + .of_match_table = mtk_thermal_of_match,
> + },
> +};
> +
> +module_platform_driver(mtk_thermal_driver);
> +
> +MODULE_AUTHOR("Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org");
> +MODULE_DESCRIPTION("Mediatek thermal driver");
> +MODULE_LICENSE("GPL v2");
> --
> 2.5.1
>
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^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-29 23:04 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-09-29 23:04 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 0390044..dadd1eb 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
> Thermal reporting device will provide temperature reading,
> programmable trip points and other information.
>
> +config MTK_THERMAL
> + tristate "Temperature sensor driver for mediatek SoCs"
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + default y
> + help
> + Enable this option if you want to have support for thermal management
> + controller present in Mediatek SoCs
> +
> menu "Texas Instruments thermal drivers"
> source "drivers/thermal/ti-soc-thermal/Kconfig"
> endmenu
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 26f1608..5f979e7 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> +obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> new file mode 100644
> index 0000000..6be1a6c
> --- /dev/null
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -0,0 +1,537 @@
> +/*
> + * Copyright (c) 2015 MediaTek Inc.
> + * Author: Hanyi Wu <hanyi.wu@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
You dont seam to be using this header. Can you please clean up to have
only the headers you need?
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/thermal.h>
> +#include <linux/reset.h>
> +#include <linux/time.h>
> +#include <linux/types.h>
> +#include <dt-bindings/thermal/mt8173.h>
> +
> +/* AUXADC Registers */
> +#define AUXADC_CON0_V 0x000
> +#define AUXADC_CON1_V 0x004
> +#define AUXADC_CON1_SET_V 0x008
> +#define AUXADC_CON1_CLR_V 0x00c
> +#define AUXADC_CON2_V 0x010
> +#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
> +#define AUXADC_MISC_V 0x094
> +
> +#define AUXADC_CON1_CHANNEL(x) BIT(x)
> +
> +#define APMIXED_SYS_TS_CON1 0x604
> +
> +/* Thermal Controller Registers */
> +#define TEMP_MONCTL0 0x000
> +#define TEMP_MONCTL1 0x004
> +#define TEMP_MONCTL2 0x008
> +#define TEMP_MONIDET0 0x014
> +#define TEMP_MONIDET1 0x018
> +#define TEMP_MSRCTL0 0x038
> +#define TEMP_AHBPOLL 0x040
> +#define TEMP_AHBTO 0x044
> +#define TEMP_ADCPNP0 0x048
> +#define TEMP_ADCPNP1 0x04c
> +#define TEMP_ADCPNP2 0x050
> +#define TEMP_ADCPNP3 0x0b4
> +
> +#define TEMP_ADCMUX 0x054
> +#define TEMP_ADCEN 0x060
> +#define TEMP_PNPMUXADDR 0x064
> +#define TEMP_ADCMUXADDR 0x068
> +#define TEMP_ADCENADDR 0x074
> +#define TEMP_ADCVALIDADDR 0x078
> +#define TEMP_ADCVOLTADDR 0x07c
> +#define TEMP_RDCTRL 0x080
> +#define TEMP_ADCVALIDMASK 0x084
> +#define TEMP_ADCVOLTAGESHIFT 0x088
> +#define TEMP_ADCWRITECTRL 0x08c
> +#define TEMP_MSR0 0x090
> +#define TEMP_MSR1 0x094
> +#define TEMP_MSR2 0x098
> +#define TEMP_MSR3 0x0B8
> +
> +#define TEMP_SPARE0 0x0f0
> +
> +#define PTPCORESEL 0x400
> +
> +#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
> +
> +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
> +#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
> +
> +#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
> +
> +#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
> +#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
> +
> +#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
> +#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
> +
> +#define MT8173_TS1 0
> +#define MT8173_TS2 1
> +#define MT8173_TS3 2
> +#define MT8173_TS4 3
> +#define MT8173_TSABB 4
> +
> +/* AUXADC channel 11 is used for the temperature sensors */
> +#define MT8173_TEMP_AUXADC_CHANNEL 11
> +
> +/* The total number of temperature sensors in the MT8173 */
> +#define MT8173_NUM_SENSORS 5
> +
> +/* The number of banks in the MT8173 */
> +#define MT8173_NUM_ZONES 4
> +
> +/* The number of sensing points per bank */
> +#define MT8173_NUM_SENSORS_PER_ZONE 4
> +
> +#define THERMAL_NAME "mtk-thermal"
> +
> +struct mtk_thermal;
> +
> +struct mtk_thermal_bank {
> + struct mtk_thermal *mt;
> + struct thermal_zone_device *tzd;
> + int id;
> +};
> +
> +struct mtk_thermal {
> + struct device *dev;
> + void __iomem *thermal_base;
> +
> + struct clk *clk_peri_therm;
> + struct clk *clk_auxadc;
> +
> + struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
> +
> + struct mutex lock;
> +
> + /* Calibration values */
> + int calib_slope;
> + int calib_offset;
> +};
> +
> +struct mtk_thermal_bank_cfg {
> + unsigned int num_sensors;
> + unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
> +};
> +
> +static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +
> +/*
> + * The MT8173 thermal controller has four banks. Each bank can read up to
> + * four temperature sensors simultaneously. The MT8173 has a total of 5
> + * temperature sensors. We use each bank to measure a certain area of the
> + * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
> + * areas, hence is used in different banks.
> + */
> +static const struct mtk_thermal_bank_cfg bank_data[] = {
> + [MT8173_THERMAL_ZONE_CA53] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS3 },
> + },
> +
> + [MT8173_THERMAL_ZONE_CA57] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS4 },
> + },
> +
> + [MT8173_THERMAL_ZONE_GPU] = {
> + .num_sensors = 3,
> + .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
> + },
> +
> + [MT8173_THERMAL_ZONE_CORE] = {
> + .num_sensors = 1,
> + .sensors = { MT8173_TS2 },
> + },
> +};
> +
> +struct mtk_thermal_sense_point {
> + int msr;
> + int adcpnp;
> +};
> +
> +static const struct mtk_thermal_sense_point
> + sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
> + {
> + .msr = TEMP_MSR0,
> + .adcpnp = TEMP_ADCPNP0,
> + }, {
> + .msr = TEMP_MSR1,
> + .adcpnp = TEMP_ADCPNP1,
> + }, {
> + .msr = TEMP_MSR2,
> + .adcpnp = TEMP_ADCPNP2,
> + }, {
> + .msr = TEMP_MSR3,
> + .adcpnp = TEMP_ADCPNP3,
> + },
> +};
> +
> +/**
> + * raw_to_mcelsius - convert a raw ADC value to mcelsius
> + * @mt: The thermal controller
> + * @raw: raw ADC value
> + *
> + * This converts the raw ADC value to mcelsius using the SoC specific
> + * calibration constants
> + */
> +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> +{
> + return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
> +}
> +
> +/**
> + * mtk_thermal_get_bank - get bank
> + * @bank: The bank
> + *
> + * The bank registers are banked, we have to select a bank in the
> + * PTPCORESEL register to access it.
> + */
> +static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + u32 val;
> +
> + mutex_lock(&mt->lock);
> +
> + val = readl(mt->thermal_base + PTPCORESEL);
> + val &= ~0xf;
> + val |= bank->id;
> + writel(val, mt->thermal_base + PTPCORESEL);
> +}
> +
> +/**
> + * mtk_thermal_put_bank - release bank
> + * @bank: The bank
> + *
> + * release a bank previously taken with mtk_thermal_get_bank,
> + */
> +static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> +
> + mutex_unlock(&mt->lock);
> +}
> +
> +/**
> + * mtk_thermal_bank_temperature - get the temperature of a bank
> + * @bank: The bank
> + *
> + * The temperature of a bank is considered the maximum temperature of
> + * the sensors associated to the bank.
> + */
> +static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + int temp, i, max;
> + u32 raw;
> +
> + temp = max = INT_MIN;
> +
> + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> + raw = readl(mt->thermal_base + sensing_points[i].msr);
> +
> + temp = raw_to_mcelsius(mt, raw);
> +
> + /*
> + * The first read of a sensor often contains very high bogus
> + * temperature value. Filter these out so that the system does
> + * not immediately shut down.
> + */
> + if (temp > 200000)
Ok... How about after the first read? is > 200000 a valid (supported) value range?
Just trying to understand if the cap can be kept on all cases.
> + temp = 0;
> +
> + if (temp > max)
> + max = temp;
> + }
> +
> + return max;
> +}
> +
> +static int mtk_read_temp(void *data, int *temp)
> +{
> + struct mtk_thermal_bank *bank = data;
> +
> + mtk_thermal_get_bank(bank);
> +
> + *temp = mtk_thermal_bank_temperature(bank);
> +
> + mtk_thermal_put_bank(bank);
> +
> + return 0;
> +}
> +
> +static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
> + .get_temp = mtk_read_temp,
> +};
> +
> +static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> + u32 apmixed_phys_base, u32 auxadc_phys_base)
> +{
> + struct mtk_thermal_bank *bank = &mt->banks[num];
> + const struct mtk_thermal_bank_cfg *cfg = &bank_data[num];
> + int i;
> +
> + bank->id = num;
> + bank->mt = mt;
> +
> + mtk_thermal_get_bank(bank);
> +
> + /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
> + writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
> +
> + /*
> + * filt interval is 1 * 46.540us = 46.54us,
> + * sen interval is 429 * 46.540us = 19.96ms
> + */
> + writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
> + TEMP_MONCTL2_SENSOR_INTERVAL(429),
> + mt->thermal_base + TEMP_MONCTL2);
> +
> + /* poll is set to 10u */
> + writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
> + mt->thermal_base + TEMP_AHBPOLL);
> +
> + /* temperature sampling control, 1 sample */
> + writel(0x00000000, mt->thermal_base + TEMP_MSRCTL0);
> +
> + /* exceed this polling time, IRQ would be inserted */
> + writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
> +
> + /* number of interrupts per event, 1 is enough */
> + writel(0x0, mt->thermal_base + TEMP_MONIDET0);
> + writel(0x0, mt->thermal_base + TEMP_MONIDET1);
> +
> + /*
> + * The MT8173 thermal controller does not have its own ADC. Instead it
> + * uses AHB bus accesses to control the AUXADC. To do this the thermal
> + * controller has to be programmed with the physical addresses of the
> + * AUXADC registers and with the various bit positions in the AUXADC.
> + * Also the thermal controller controls a mux in the APMIXEDSYS register
> + * space.
> + */
> +
> + /*
> + * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
> + * automatically by hw
> + */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCMUX);
> +
> + /* AHB address for auxadc mux selection */
> + writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
> + mt->thermal_base + TEMP_ADCMUXADDR);
> +
> + /* AHB address for pnp sensor mux selection */
> + writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
> + mt->thermal_base + TEMP_PNPMUXADDR);
> +
> + /* AHB value for auxadc enable */
> + writel(BIT(MT8173_TEMP_AUXADC_CHANNEL), mt->thermal_base + TEMP_ADCEN);
> +
> + /* AHB address for auxadc enable (channel 0 immediate mode selected) */
> + writel(auxadc_phys_base + AUXADC_CON1_SET_V,
> + mt->thermal_base + TEMP_ADCENADDR);
> +
> + /* AHB address for auxadc valid bit */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVALIDADDR);
> +
> + /* AHB address for auxadc voltage output */
> + writel(auxadc_phys_base + AUXADC_DATA(MT8173_TEMP_AUXADC_CHANNEL),
> + mt->thermal_base + TEMP_ADCVOLTADDR);
> +
> + /* read valid & voltage are at the same register */
> + writel(0x0, mt->thermal_base + TEMP_RDCTRL);
> +
> + /* indicate where the valid bit is */
> + writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
> + mt->thermal_base + TEMP_ADCVALIDMASK);
> +
> + /* no shift */
> + writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
> +
> + /* enable auxadc mux write transaction */
> + writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + for (i = 0; i < cfg->num_sensors; i++)
> + writel(sensor_mux_values[cfg->sensors[i]],
> + mt->thermal_base + sensing_points[i].adcpnp);
> +
> + writel((1 << cfg->num_sensors) - 1, mt->thermal_base + TEMP_MONCTL0);
> +
> + writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE | TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> + mt->thermal_base + TEMP_ADCWRITECTRL);
> +
> + mtk_thermal_put_bank(bank);
> +}
> +
> +static u64 of_get_phys_base(struct device_node *np)
> +{
> + u64 size64;
> + const __be32 *regaddr_p;
> +
> + regaddr_p = of_get_address(np, 0, &size64, NULL);
> + if (!regaddr_p)
> + return OF_BAD_ADDR;
> +
> + return of_translate_address(np, regaddr_p);
> +}
> +
> +static int mtk_thermal_probe(struct platform_device *pdev)
> +{
> + int ret, i;
> + struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
> + struct mtk_thermal *mt;
> + struct resource *res;
> + u64 auxadc_phys_base, apmixed_phys_base;
> +
> + mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
> + if (!mt)
> + return -ENOMEM;
> +
> + mt->clk_peri_therm = devm_clk_get(&pdev->dev, "therm");
> + if (IS_ERR(mt->clk_peri_therm))
> + return PTR_ERR(mt->clk_peri_therm);
> +
> + mt->clk_auxadc = devm_clk_get(&pdev->dev, "auxadc");
> + if (IS_ERR(mt->clk_auxadc))
> + return PTR_ERR(mt->clk_auxadc);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(mt->thermal_base))
> + return PTR_ERR(mt->thermal_base);
> +
> + mutex_init(&mt->lock);
> +
> + mt->dev = &pdev->dev;
> +
> + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
of_put?
> + if (!auxadc) {
> + dev_err(&pdev->dev, "missing auxadc node\n");
> + return -ENODEV;
> + }
> +
> + auxadc_phys_base = of_get_phys_base(auxadc);
> + if (auxadc_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
> + apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
> + if (!apmixedsys) {
> + dev_err(&pdev->dev, "missing apmixedsys node\n");
> + return -ENODEV;
> + }
> +
> + apmixed_phys_base = of_get_phys_base(apmixedsys);
> + if (apmixed_phys_base == OF_BAD_ADDR) {
> + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> + return -EINVAL;
> + }
> +
> + ret = clk_prepare_enable(mt->clk_auxadc);
> + if (ret) {
> + dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
> + return ret;
> + }
> +
> + ret = device_reset(&pdev->dev);
> + if (ret)
> + goto err_disable_clk_auxadc;
> +
> + ret = clk_prepare_enable(mt->clk_peri_therm);
> + if (ret) {
> + dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret);
> + goto err_disable_clk_auxadc;
> + }
> +
> + /*
> + * These calibration values should finally be provided by the
> + * firmware or fuses. For now use default values.
> + */
> + mt->calib_slope = -123;
> + mt->calib_offset = 465124;
I would still prefer that this driver would not have these hardcoded
values. Specially considering the fact that we could map it in DT for
instance. What is the impact of using this? Does it work across all chip
distribution?
Should we wait until you have the code to read the fuses before merging
this?
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> +
> + platform_set_drvdata(pdev, mt);
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> + &mtk_thermal_ops);
You need to error handle this.
> + }
> +
> + return 0;
> +
> +err_disable_clk_auxadc:
> + clk_disable_unprepare(mt->clk_auxadc);
> +
> + return ret;
> +}
> +
> +static int mtk_thermal_remove(struct platform_device *pdev)
> +{
> + struct mtk_thermal *mt = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> + struct mtk_thermal_bank *bank = &mt->banks[i];
> +
> + thermal_zone_of_sensor_unregister(&pdev->dev, bank->tzd);
> + }
> +
> + clk_disable_unprepare(mt->clk_peri_therm);
> + clk_disable_unprepare(mt->clk_auxadc);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id mtk_thermal_of_match[] = {
> + {
> + .compatible = "mediatek,mt8173-thermal",
> + }, {
> + },
> +};
> +
> +static struct platform_driver mtk_thermal_driver = {
> + .probe = mtk_thermal_probe,
> + .remove = mtk_thermal_remove,
> + .driver = {
> + .name = THERMAL_NAME,
> + .of_match_table = mtk_thermal_of_match,
> + },
> +};
> +
> +module_platform_driver(mtk_thermal_driver);
> +
> +MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
> +MODULE_DESCRIPTION("Mediatek thermal driver");
> +MODULE_LICENSE("GPL v2");
> --
> 2.5.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
2015-09-29 23:04 ` Eduardo Valentin
@ 2015-09-30 6:13 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-30 6:13 UTC (permalink / raw)
To: Eduardo Valentin
Cc: linux-pm, Zhang Rui, linux-kernel, kernel, linux-mediatek,
linux-arm-kernel, Matthias Brugger, devicetree, mark.rutland,
robh+dt
Hi Eduardo,
On Tue, Sep 29, 2015 at 04:04:40PM -0700, Eduardo Valentin wrote:
> On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> > +#include <linux/clk.h>
> > +#include <linux/delay.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_irq.h>
>
> You dont seam to be using this header. Can you please clean up to have
> only the headers you need?
Ok, did that.
> > + struct mtk_thermal *mt = bank->mt;
> > + int temp, i, max;
> > + u32 raw;
> > +
> > + temp = max = INT_MIN;
> > +
> > + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> > + raw = readl(mt->thermal_base + sensing_points[i].msr);
> > +
> > + temp = raw_to_mcelsius(mt, raw);
> > +
> > + /*
> > + * The first read of a sensor often contains very high bogus
> > + * temperature value. Filter these out so that the system does
> > + * not immediately shut down.
> > + */
> > + if (temp > 200000)
>
> Ok... How about after the first read? is > 200000 a valid (supported) value range?
No, temperatures over 200°C are not supported for this SoC.
> > +
> > + mt->dev = &pdev->dev;
> > +
> > + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
> of_put?
added
> > + if (!auxadc) {
> > + dev_err(&pdev->dev, "missing auxadc node\n");
> > + return -ENODEV;
> > + }
> > +
> > + auxadc_phys_base = of_get_phys_base(auxadc);
> > + if (auxadc_phys_base == OF_BAD_ADDR) {
> > + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> > + return -EINVAL;
> > + }
> > +
> > + apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
> > + if (!apmixedsys) {
> > + dev_err(&pdev->dev, "missing apmixedsys node\n");
> > + return -ENODEV;
> > + }
For this one aswell.
> > + /*
> > + * These calibration values should finally be provided by the
> > + * firmware or fuses. For now use default values.
> > + */
> > + mt->calib_slope = -123;
> > + mt->calib_offset = 465124;
>
> I would still prefer that this driver would not have these hardcoded
> values. Specially considering the fact that we could map it in DT for
> instance. What is the impact of using this? Does it work across all chip
> distribution?
I think yes, but not that accurate.
>
> Should we wait until you have the code to read the fuses before merging
> this?
I'd say we should merge this. It makes the life easier for the guys
writing the cpufreq driver. Adding a dependency on a not yet written
driver IMO only adds unnecessary delays.
>
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++)
> > + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> > +
> > + platform_set_drvdata(pdev, mt);
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> > + struct mtk_thermal_bank *bank = &mt->banks[i];
> > +
> > + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> > + &mtk_thermal_ops);
>
> You need to error handle this.
Errors here are pretty much expected. This is due to the behaviour of
thermal_zone_of_sensor_register which errors out when no user for a
sensor is found. Normally I would expect that I can register a sensor
regardless if it is used or not, but that's not how
thermal_zone_of_sensor_register is written.
I could catch -EPROBE_DEFER here, but currently I see no case where this
can actually be returned from thermal_zone_of_sensor_register.
What I can and should do though is to call
thermal_zone_of_sensor_unregister only for sensors that are successfully
registered.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 6:13 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-30 6:13 UTC (permalink / raw)
To: linux-arm-kernel
Hi Eduardo,
On Tue, Sep 29, 2015 at 04:04:40PM -0700, Eduardo Valentin wrote:
> On Wed, Sep 23, 2015 at 03:37:42PM +0200, Sascha Hauer wrote:
> > +#include <linux/clk.h>
> > +#include <linux/delay.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_irq.h>
>
> You dont seam to be using this header. Can you please clean up to have
> only the headers you need?
Ok, did that.
> > + struct mtk_thermal *mt = bank->mt;
> > + int temp, i, max;
> > + u32 raw;
> > +
> > + temp = max = INT_MIN;
> > +
> > + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> > + raw = readl(mt->thermal_base + sensing_points[i].msr);
> > +
> > + temp = raw_to_mcelsius(mt, raw);
> > +
> > + /*
> > + * The first read of a sensor often contains very high bogus
> > + * temperature value. Filter these out so that the system does
> > + * not immediately shut down.
> > + */
> > + if (temp > 200000)
>
> Ok... How about after the first read? is > 200000 a valid (supported) value range?
No, temperatures over 200?C are not supported for this SoC.
> > +
> > + mt->dev = &pdev->dev;
> > +
> > + auxadc = of_parse_phandle(np, "mediatek,auxadc", 0);
> of_put?
added
> > + if (!auxadc) {
> > + dev_err(&pdev->dev, "missing auxadc node\n");
> > + return -ENODEV;
> > + }
> > +
> > + auxadc_phys_base = of_get_phys_base(auxadc);
> > + if (auxadc_phys_base == OF_BAD_ADDR) {
> > + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> > + return -EINVAL;
> > + }
> > +
> > + apmixedsys = of_parse_phandle(np, "mediatek,apmixedsys", 0);
> > + if (!apmixedsys) {
> > + dev_err(&pdev->dev, "missing apmixedsys node\n");
> > + return -ENODEV;
> > + }
For this one aswell.
> > + /*
> > + * These calibration values should finally be provided by the
> > + * firmware or fuses. For now use default values.
> > + */
> > + mt->calib_slope = -123;
> > + mt->calib_offset = 465124;
>
> I would still prefer that this driver would not have these hardcoded
> values. Specially considering the fact that we could map it in DT for
> instance. What is the impact of using this? Does it work across all chip
> distribution?
I think yes, but not that accurate.
>
> Should we wait until you have the code to read the fuses before merging
> this?
I'd say we should merge this. It makes the life easier for the guys
writing the cpufreq driver. Adding a dependency on a not yet written
driver IMO only adds unnecessary delays.
>
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++)
> > + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> > +
> > + platform_set_drvdata(pdev, mt);
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> > + struct mtk_thermal_bank *bank = &mt->banks[i];
> > +
> > + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> > + &mtk_thermal_ops);
>
> You need to error handle this.
Errors here are pretty much expected. This is due to the behaviour of
thermal_zone_of_sensor_register which errors out when no user for a
sensor is found. Normally I would expect that I can register a sensor
regardless if it is used or not, but that's not how
thermal_zone_of_sensor_register is written.
I could catch -EPROBE_DEFER here, but currently I see no case where this
can actually be returned from thermal_zone_of_sensor_register.
What I can and should do though is to call
thermal_zone_of_sensor_unregister only for sensors that are successfully
registered.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
2015-09-23 18:31 ` Vladimir Zapolskiy
@ 2015-09-30 6:14 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-30 6:14 UTC (permalink / raw)
To: Vladimir Zapolskiy
Cc: Eduardo Valentin, linux-pm, Zhang Rui, linux-kernel, kernel,
linux-mediatek, linux-arm-kernel, Matthias Brugger, devicetree,
mark.rutland, robh+dt
Hi Vladimir,
On Wed, Sep 23, 2015 at 09:31:12PM +0300, Vladimir Zapolskiy wrote:
> Hi Sascha,
>
> in case of OF_DYNAMIC enabled of_parse_phandle() requires of_node_put(),
> which is fine to place right here.
>
> > + if (auxadc_phys_base == OF_BAD_ADDR) {
> > + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> > + return -EINVAL;
> > + }
> > +
>
> [snip]
>
> > +
> > + /*
> > + * These calibration values should finally be provided by the
> > + * firmware or fuses. For now use default values.
> > + */
> > + mt->calib_slope = -123;
> > + mt->calib_offset = 465124;
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++)
> > + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> > +
> > + platform_set_drvdata(pdev, mt);
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> > + struct mtk_thermal_bank *bank = &mt->banks[i];
> > +
> > + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> > + &mtk_thermal_ops);
>
> I would propose to add return value checks here, otherwise there might
> be an oops in mtk_thermal_remove(), if something goes wrong.
Thanks for the input. I'll fix that in the next round.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 6:14 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-30 6:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Vladimir,
On Wed, Sep 23, 2015 at 09:31:12PM +0300, Vladimir Zapolskiy wrote:
> Hi Sascha,
>
> in case of OF_DYNAMIC enabled of_parse_phandle() requires of_node_put(),
> which is fine to place right here.
>
> > + if (auxadc_phys_base == OF_BAD_ADDR) {
> > + dev_err(&pdev->dev, "Can't get auxadc phys address\n");
> > + return -EINVAL;
> > + }
> > +
>
> [snip]
>
> > +
> > + /*
> > + * These calibration values should finally be provided by the
> > + * firmware or fuses. For now use default values.
> > + */
> > + mt->calib_slope = -123;
> > + mt->calib_offset = 465124;
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++)
> > + mtk_thermal_init_bank(mt, i, apmixed_phys_base, auxadc_phys_base);
> > +
> > + platform_set_drvdata(pdev, mt);
> > +
> > + for (i = 0; i < MT8173_NUM_ZONES; i++) {
> > + struct mtk_thermal_bank *bank = &mt->banks[i];
> > +
> > + bank->tzd = thermal_zone_of_sensor_register(&pdev->dev, i, bank,
> > + &mtk_thermal_ops);
>
> I would propose to add return value checks here, otherwise there might
> be an oops in mtk_thermal_remove(), if something goes wrong.
Thanks for the input. I'll fix that in the next round.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 9:36 ` Punit Agrawal
0 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-09-30 9:36 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel, kernel,
linux-mediatek, linux-arm-kernel, Matthias Brugger, devicetree,
mark.rutland, robh+dt
Hi Sascha,
Re-posting a comment from v7. Perhaps you missed it...
Sascha Hauer <s.hauer@pengutronix.de> writes:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 0390044..dadd1eb 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
> Thermal reporting device will provide temperature reading,
> programmable trip points and other information.
>
> +config MTK_THERMAL
> + tristate "Temperature sensor driver for mediatek SoCs"
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + default y
> + help
> + Enable this option if you want to have support for thermal management
> + controller present in Mediatek SoCs
> +
> menu "Texas Instruments thermal drivers"
> source "drivers/thermal/ti-soc-thermal/Kconfig"
> endmenu
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 26f1608..5f979e7 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> +obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> new file mode 100644
> index 0000000..6be1a6c
> --- /dev/null
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -0,0 +1,537 @@
> +/*
> + * Copyright (c) 2015 MediaTek Inc.
> + * Author: Hanyi Wu <hanyi.wu@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/thermal.h>
> +#include <linux/reset.h>
> +#include <linux/time.h>
> +#include <linux/types.h>
> +#include <dt-bindings/thermal/mt8173.h>
> +
> +/* AUXADC Registers */
> +#define AUXADC_CON0_V 0x000
> +#define AUXADC_CON1_V 0x004
> +#define AUXADC_CON1_SET_V 0x008
> +#define AUXADC_CON1_CLR_V 0x00c
> +#define AUXADC_CON2_V 0x010
> +#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
> +#define AUXADC_MISC_V 0x094
> +
> +#define AUXADC_CON1_CHANNEL(x) BIT(x)
> +
> +#define APMIXED_SYS_TS_CON1 0x604
> +
> +/* Thermal Controller Registers */
> +#define TEMP_MONCTL0 0x000
> +#define TEMP_MONCTL1 0x004
> +#define TEMP_MONCTL2 0x008
> +#define TEMP_MONIDET0 0x014
> +#define TEMP_MONIDET1 0x018
> +#define TEMP_MSRCTL0 0x038
> +#define TEMP_AHBPOLL 0x040
> +#define TEMP_AHBTO 0x044
> +#define TEMP_ADCPNP0 0x048
> +#define TEMP_ADCPNP1 0x04c
> +#define TEMP_ADCPNP2 0x050
> +#define TEMP_ADCPNP3 0x0b4
> +
> +#define TEMP_ADCMUX 0x054
> +#define TEMP_ADCEN 0x060
> +#define TEMP_PNPMUXADDR 0x064
> +#define TEMP_ADCMUXADDR 0x068
> +#define TEMP_ADCENADDR 0x074
> +#define TEMP_ADCVALIDADDR 0x078
> +#define TEMP_ADCVOLTADDR 0x07c
> +#define TEMP_RDCTRL 0x080
> +#define TEMP_ADCVALIDMASK 0x084
> +#define TEMP_ADCVOLTAGESHIFT 0x088
> +#define TEMP_ADCWRITECTRL 0x08c
> +#define TEMP_MSR0 0x090
> +#define TEMP_MSR1 0x094
> +#define TEMP_MSR2 0x098
> +#define TEMP_MSR3 0x0B8
> +
> +#define TEMP_SPARE0 0x0f0
> +
> +#define PTPCORESEL 0x400
> +
> +#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
> +
> +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
> +#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
> +
> +#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
> +
> +#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
> +#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
> +
> +#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
> +#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
> +
> +#define MT8173_TS1 0
> +#define MT8173_TS2 1
> +#define MT8173_TS3 2
> +#define MT8173_TS4 3
> +#define MT8173_TSABB 4
> +
> +/* AUXADC channel 11 is used for the temperature sensors */
> +#define MT8173_TEMP_AUXADC_CHANNEL 11
> +
> +/* The total number of temperature sensors in the MT8173 */
> +#define MT8173_NUM_SENSORS 5
> +
> +/* The number of banks in the MT8173 */
> +#define MT8173_NUM_ZONES 4
> +
> +/* The number of sensing points per bank */
> +#define MT8173_NUM_SENSORS_PER_ZONE 4
> +
> +#define THERMAL_NAME "mtk-thermal"
> +
> +struct mtk_thermal;
> +
> +struct mtk_thermal_bank {
> + struct mtk_thermal *mt;
> + struct thermal_zone_device *tzd;
> + int id;
> +};
> +
> +struct mtk_thermal {
> + struct device *dev;
> + void __iomem *thermal_base;
> +
> + struct clk *clk_peri_therm;
> + struct clk *clk_auxadc;
> +
> + struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
> +
> + struct mutex lock;
> +
> + /* Calibration values */
> + int calib_slope;
> + int calib_offset;
> +};
> +
> +struct mtk_thermal_bank_cfg {
> + unsigned int num_sensors;
> + unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
> +};
> +
> +static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +
> +/*
> + * The MT8173 thermal controller has four banks. Each bank can read up to
> + * four temperature sensors simultaneously. The MT8173 has a total of 5
> + * temperature sensors. We use each bank to measure a certain area of the
> + * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
> + * areas, hence is used in different banks.
> + */
> +static const struct mtk_thermal_bank_cfg bank_data[] = {
> + [MT8173_THERMAL_ZONE_CA53] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS3 },
> + },
> +
> + [MT8173_THERMAL_ZONE_CA57] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS4 },
> + },
> +
> + [MT8173_THERMAL_ZONE_GPU] = {
> + .num_sensors = 3,
> + .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
> + },
> +
> + [MT8173_THERMAL_ZONE_CORE] = {
> + .num_sensors = 1,
> + .sensors = { MT8173_TS2 },
> + },
> +};
> +
> +struct mtk_thermal_sense_point {
> + int msr;
> + int adcpnp;
> +};
> +
> +static const struct mtk_thermal_sense_point
> + sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
> + {
> + .msr = TEMP_MSR0,
> + .adcpnp = TEMP_ADCPNP0,
> + }, {
> + .msr = TEMP_MSR1,
> + .adcpnp = TEMP_ADCPNP1,
> + }, {
> + .msr = TEMP_MSR2,
> + .adcpnp = TEMP_ADCPNP2,
> + }, {
> + .msr = TEMP_MSR3,
> + .adcpnp = TEMP_ADCPNP3,
> + },
> +};
> +
> +/**
> + * raw_to_mcelsius - convert a raw ADC value to mcelsius
> + * @mt: The thermal controller
> + * @raw: raw ADC value
> + *
> + * This converts the raw ADC value to mcelsius using the SoC specific
> + * calibration constants
> + */
> +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> +{
> + return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
> +}
> +
> +/**
> + * mtk_thermal_get_bank - get bank
> + * @bank: The bank
> + *
> + * The bank registers are banked, we have to select a bank in the
> + * PTPCORESEL register to access it.
> + */
> +static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + u32 val;
> +
> + mutex_lock(&mt->lock);
> +
> + val = readl(mt->thermal_base + PTPCORESEL);
> + val &= ~0xf;
> + val |= bank->id;
> + writel(val, mt->thermal_base + PTPCORESEL);
> +}
> +
> +/**
> + * mtk_thermal_put_bank - release bank
> + * @bank: The bank
> + *
> + * release a bank previously taken with mtk_thermal_get_bank,
> + */
> +static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> +
> + mutex_unlock(&mt->lock);
> +}
> +
> +/**
> + * mtk_thermal_bank_temperature - get the temperature of a bank
> + * @bank: The bank
> + *
> + * The temperature of a bank is considered the maximum temperature of
> + * the sensors associated to the bank.
> + */
> +static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + int temp, i, max;
> + u32 raw;
> +
> + temp = max = INT_MIN;
> +
> + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> + raw = readl(mt->thermal_base + sensing_points[i].msr);
> +
> + temp = raw_to_mcelsius(mt, raw);
> +
> + /*
> + * The first read of a sensor often contains very high bogus
> + * temperature value. Filter these out so that the system does
> + * not immediately shut down.
> + */
> + if (temp > 200000)
> + temp = 0;
> +
If the bogus value is only the first time the sensor is read, instead of
filtering here, you could call mtk_thermal_bank_temperature at probe
time when you are initialising the banks and ignore the returned value.
Thanks,
Punit
> + if (temp > max)
> + max = temp;
> + }
> +
> + return max;
> +}
> +
[...]
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 9:36 ` Punit Agrawal
0 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-09-30 9:36 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA, Zhang Rui, Eduardo Valentin,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Matthias Brugger, devicetree-u79uwXL29TY76Z2rM5mHXA,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Hi Sascha,
Re-posting a comment from v7. Perhaps you missed it...
Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> writes:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 0390044..dadd1eb 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
> Thermal reporting device will provide temperature reading,
> programmable trip points and other information.
>
> +config MTK_THERMAL
> + tristate "Temperature sensor driver for mediatek SoCs"
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + default y
> + help
> + Enable this option if you want to have support for thermal management
> + controller present in Mediatek SoCs
> +
> menu "Texas Instruments thermal drivers"
> source "drivers/thermal/ti-soc-thermal/Kconfig"
> endmenu
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 26f1608..5f979e7 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> +obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> new file mode 100644
> index 0000000..6be1a6c
> --- /dev/null
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -0,0 +1,537 @@
> +/*
> + * Copyright (c) 2015 MediaTek Inc.
> + * Author: Hanyi Wu <hanyi.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/thermal.h>
> +#include <linux/reset.h>
> +#include <linux/time.h>
> +#include <linux/types.h>
> +#include <dt-bindings/thermal/mt8173.h>
> +
> +/* AUXADC Registers */
> +#define AUXADC_CON0_V 0x000
> +#define AUXADC_CON1_V 0x004
> +#define AUXADC_CON1_SET_V 0x008
> +#define AUXADC_CON1_CLR_V 0x00c
> +#define AUXADC_CON2_V 0x010
> +#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
> +#define AUXADC_MISC_V 0x094
> +
> +#define AUXADC_CON1_CHANNEL(x) BIT(x)
> +
> +#define APMIXED_SYS_TS_CON1 0x604
> +
> +/* Thermal Controller Registers */
> +#define TEMP_MONCTL0 0x000
> +#define TEMP_MONCTL1 0x004
> +#define TEMP_MONCTL2 0x008
> +#define TEMP_MONIDET0 0x014
> +#define TEMP_MONIDET1 0x018
> +#define TEMP_MSRCTL0 0x038
> +#define TEMP_AHBPOLL 0x040
> +#define TEMP_AHBTO 0x044
> +#define TEMP_ADCPNP0 0x048
> +#define TEMP_ADCPNP1 0x04c
> +#define TEMP_ADCPNP2 0x050
> +#define TEMP_ADCPNP3 0x0b4
> +
> +#define TEMP_ADCMUX 0x054
> +#define TEMP_ADCEN 0x060
> +#define TEMP_PNPMUXADDR 0x064
> +#define TEMP_ADCMUXADDR 0x068
> +#define TEMP_ADCENADDR 0x074
> +#define TEMP_ADCVALIDADDR 0x078
> +#define TEMP_ADCVOLTADDR 0x07c
> +#define TEMP_RDCTRL 0x080
> +#define TEMP_ADCVALIDMASK 0x084
> +#define TEMP_ADCVOLTAGESHIFT 0x088
> +#define TEMP_ADCWRITECTRL 0x08c
> +#define TEMP_MSR0 0x090
> +#define TEMP_MSR1 0x094
> +#define TEMP_MSR2 0x098
> +#define TEMP_MSR3 0x0B8
> +
> +#define TEMP_SPARE0 0x0f0
> +
> +#define PTPCORESEL 0x400
> +
> +#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
> +
> +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
> +#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
> +
> +#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
> +
> +#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
> +#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
> +
> +#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
> +#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
> +
> +#define MT8173_TS1 0
> +#define MT8173_TS2 1
> +#define MT8173_TS3 2
> +#define MT8173_TS4 3
> +#define MT8173_TSABB 4
> +
> +/* AUXADC channel 11 is used for the temperature sensors */
> +#define MT8173_TEMP_AUXADC_CHANNEL 11
> +
> +/* The total number of temperature sensors in the MT8173 */
> +#define MT8173_NUM_SENSORS 5
> +
> +/* The number of banks in the MT8173 */
> +#define MT8173_NUM_ZONES 4
> +
> +/* The number of sensing points per bank */
> +#define MT8173_NUM_SENSORS_PER_ZONE 4
> +
> +#define THERMAL_NAME "mtk-thermal"
> +
> +struct mtk_thermal;
> +
> +struct mtk_thermal_bank {
> + struct mtk_thermal *mt;
> + struct thermal_zone_device *tzd;
> + int id;
> +};
> +
> +struct mtk_thermal {
> + struct device *dev;
> + void __iomem *thermal_base;
> +
> + struct clk *clk_peri_therm;
> + struct clk *clk_auxadc;
> +
> + struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
> +
> + struct mutex lock;
> +
> + /* Calibration values */
> + int calib_slope;
> + int calib_offset;
> +};
> +
> +struct mtk_thermal_bank_cfg {
> + unsigned int num_sensors;
> + unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
> +};
> +
> +static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +
> +/*
> + * The MT8173 thermal controller has four banks. Each bank can read up to
> + * four temperature sensors simultaneously. The MT8173 has a total of 5
> + * temperature sensors. We use each bank to measure a certain area of the
> + * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
> + * areas, hence is used in different banks.
> + */
> +static const struct mtk_thermal_bank_cfg bank_data[] = {
> + [MT8173_THERMAL_ZONE_CA53] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS3 },
> + },
> +
> + [MT8173_THERMAL_ZONE_CA57] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS4 },
> + },
> +
> + [MT8173_THERMAL_ZONE_GPU] = {
> + .num_sensors = 3,
> + .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
> + },
> +
> + [MT8173_THERMAL_ZONE_CORE] = {
> + .num_sensors = 1,
> + .sensors = { MT8173_TS2 },
> + },
> +};
> +
> +struct mtk_thermal_sense_point {
> + int msr;
> + int adcpnp;
> +};
> +
> +static const struct mtk_thermal_sense_point
> + sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
> + {
> + .msr = TEMP_MSR0,
> + .adcpnp = TEMP_ADCPNP0,
> + }, {
> + .msr = TEMP_MSR1,
> + .adcpnp = TEMP_ADCPNP1,
> + }, {
> + .msr = TEMP_MSR2,
> + .adcpnp = TEMP_ADCPNP2,
> + }, {
> + .msr = TEMP_MSR3,
> + .adcpnp = TEMP_ADCPNP3,
> + },
> +};
> +
> +/**
> + * raw_to_mcelsius - convert a raw ADC value to mcelsius
> + * @mt: The thermal controller
> + * @raw: raw ADC value
> + *
> + * This converts the raw ADC value to mcelsius using the SoC specific
> + * calibration constants
> + */
> +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> +{
> + return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
> +}
> +
> +/**
> + * mtk_thermal_get_bank - get bank
> + * @bank: The bank
> + *
> + * The bank registers are banked, we have to select a bank in the
> + * PTPCORESEL register to access it.
> + */
> +static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + u32 val;
> +
> + mutex_lock(&mt->lock);
> +
> + val = readl(mt->thermal_base + PTPCORESEL);
> + val &= ~0xf;
> + val |= bank->id;
> + writel(val, mt->thermal_base + PTPCORESEL);
> +}
> +
> +/**
> + * mtk_thermal_put_bank - release bank
> + * @bank: The bank
> + *
> + * release a bank previously taken with mtk_thermal_get_bank,
> + */
> +static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> +
> + mutex_unlock(&mt->lock);
> +}
> +
> +/**
> + * mtk_thermal_bank_temperature - get the temperature of a bank
> + * @bank: The bank
> + *
> + * The temperature of a bank is considered the maximum temperature of
> + * the sensors associated to the bank.
> + */
> +static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + int temp, i, max;
> + u32 raw;
> +
> + temp = max = INT_MIN;
> +
> + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> + raw = readl(mt->thermal_base + sensing_points[i].msr);
> +
> + temp = raw_to_mcelsius(mt, raw);
> +
> + /*
> + * The first read of a sensor often contains very high bogus
> + * temperature value. Filter these out so that the system does
> + * not immediately shut down.
> + */
> + if (temp > 200000)
> + temp = 0;
> +
If the bogus value is only the first time the sensor is read, instead of
filtering here, you could call mtk_thermal_bank_temperature at probe
time when you are initialising the banks and ignore the returned value.
Thanks,
Punit
> + if (temp > max)
> + max = temp;
> + }
> +
> + return max;
> +}
> +
[...]
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^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 9:36 ` Punit Agrawal
0 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-09-30 9:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sascha,
Re-posting a comment from v7. Perhaps you missed it...
Sascha Hauer <s.hauer@pengutronix.de> writes:
> This adds support for the Mediatek thermal controller found on MT8173
> and likely other SoCs.
> The controller is a bit special. It does not have its own ADC, instead
> it controls the on-SoC AUXADC via AHB bus accesses. For this reason
> we need the physical address of the AUXADC. Also it controls a mux
> using AHB bus accesses, so we need the APMIXEDSYS physical address aswell.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
> drivers/thermal/Kconfig | 8 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/mtk_thermal.c | 537 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 546 insertions(+)
> create mode 100644 drivers/thermal/mtk_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 0390044..dadd1eb 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -348,6 +348,14 @@ config INTEL_PCH_THERMAL
> Thermal reporting device will provide temperature reading,
> programmable trip points and other information.
>
> +config MTK_THERMAL
> + tristate "Temperature sensor driver for mediatek SoCs"
> + depends on ARCH_MEDIATEK || COMPILE_TEST
> + default y
> + help
> + Enable this option if you want to have support for thermal management
> + controller present in Mediatek SoCs
> +
> menu "Texas Instruments thermal drivers"
> source "drivers/thermal/ti-soc-thermal/Kconfig"
> endmenu
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 26f1608..5f979e7 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -45,3 +45,4 @@ obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
> obj-$(CONFIG_ST_THERMAL) += st/
> obj-$(CONFIG_TEGRA_SOCTHERM) += tegra_soctherm.o
> obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
> +obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> new file mode 100644
> index 0000000..6be1a6c
> --- /dev/null
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -0,0 +1,537 @@
> +/*
> + * Copyright (c) 2015 MediaTek Inc.
> + * Author: Hanyi Wu <hanyi.wu@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/thermal.h>
> +#include <linux/reset.h>
> +#include <linux/time.h>
> +#include <linux/types.h>
> +#include <dt-bindings/thermal/mt8173.h>
> +
> +/* AUXADC Registers */
> +#define AUXADC_CON0_V 0x000
> +#define AUXADC_CON1_V 0x004
> +#define AUXADC_CON1_SET_V 0x008
> +#define AUXADC_CON1_CLR_V 0x00c
> +#define AUXADC_CON2_V 0x010
> +#define AUXADC_DATA(channel) (0x14 + (channel) * 4)
> +#define AUXADC_MISC_V 0x094
> +
> +#define AUXADC_CON1_CHANNEL(x) BIT(x)
> +
> +#define APMIXED_SYS_TS_CON1 0x604
> +
> +/* Thermal Controller Registers */
> +#define TEMP_MONCTL0 0x000
> +#define TEMP_MONCTL1 0x004
> +#define TEMP_MONCTL2 0x008
> +#define TEMP_MONIDET0 0x014
> +#define TEMP_MONIDET1 0x018
> +#define TEMP_MSRCTL0 0x038
> +#define TEMP_AHBPOLL 0x040
> +#define TEMP_AHBTO 0x044
> +#define TEMP_ADCPNP0 0x048
> +#define TEMP_ADCPNP1 0x04c
> +#define TEMP_ADCPNP2 0x050
> +#define TEMP_ADCPNP3 0x0b4
> +
> +#define TEMP_ADCMUX 0x054
> +#define TEMP_ADCEN 0x060
> +#define TEMP_PNPMUXADDR 0x064
> +#define TEMP_ADCMUXADDR 0x068
> +#define TEMP_ADCENADDR 0x074
> +#define TEMP_ADCVALIDADDR 0x078
> +#define TEMP_ADCVOLTADDR 0x07c
> +#define TEMP_RDCTRL 0x080
> +#define TEMP_ADCVALIDMASK 0x084
> +#define TEMP_ADCVOLTAGESHIFT 0x088
> +#define TEMP_ADCWRITECTRL 0x08c
> +#define TEMP_MSR0 0x090
> +#define TEMP_MSR1 0x094
> +#define TEMP_MSR2 0x098
> +#define TEMP_MSR3 0x0B8
> +
> +#define TEMP_SPARE0 0x0f0
> +
> +#define PTPCORESEL 0x400
> +
> +#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
> +
> +#define TEMP_MONCTL2_FILTER_INTERVAL(x) (((x) & 0x3ff)) << 16
> +#define TEMP_MONCTL2_SENSOR_INTERVAL(x) ((x) & 0x3ff)
> +
> +#define TEMP_AHBPOLL_ADC_POLL_INTERVAL(x) (x)
> +
> +#define TEMP_ADCWRITECTRL_ADC_PNP_WRITE BIT(0)
> +#define TEMP_ADCWRITECTRL_ADC_MUX_WRITE BIT(1)
> +
> +#define TEMP_ADCVALIDMASK_VALID_HIGH BIT(5)
> +#define TEMP_ADCVALIDMASK_VALID_POS(bit) (bit)
> +
> +#define MT8173_TS1 0
> +#define MT8173_TS2 1
> +#define MT8173_TS3 2
> +#define MT8173_TS4 3
> +#define MT8173_TSABB 4
> +
> +/* AUXADC channel 11 is used for the temperature sensors */
> +#define MT8173_TEMP_AUXADC_CHANNEL 11
> +
> +/* The total number of temperature sensors in the MT8173 */
> +#define MT8173_NUM_SENSORS 5
> +
> +/* The number of banks in the MT8173 */
> +#define MT8173_NUM_ZONES 4
> +
> +/* The number of sensing points per bank */
> +#define MT8173_NUM_SENSORS_PER_ZONE 4
> +
> +#define THERMAL_NAME "mtk-thermal"
> +
> +struct mtk_thermal;
> +
> +struct mtk_thermal_bank {
> + struct mtk_thermal *mt;
> + struct thermal_zone_device *tzd;
> + int id;
> +};
> +
> +struct mtk_thermal {
> + struct device *dev;
> + void __iomem *thermal_base;
> +
> + struct clk *clk_peri_therm;
> + struct clk *clk_auxadc;
> +
> + struct mtk_thermal_bank banks[MT8173_NUM_ZONES];
> +
> + struct mutex lock;
> +
> + /* Calibration values */
> + int calib_slope;
> + int calib_offset;
> +};
> +
> +struct mtk_thermal_bank_cfg {
> + unsigned int num_sensors;
> + unsigned int sensors[MT8173_NUM_SENSORS_PER_ZONE];
> +};
> +
> +static const int sensor_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +
> +/*
> + * The MT8173 thermal controller has four banks. Each bank can read up to
> + * four temperature sensors simultaneously. The MT8173 has a total of 5
> + * temperature sensors. We use each bank to measure a certain area of the
> + * SoC. Since TS2 is located centrally in the SoC it is influenced by multiple
> + * areas, hence is used in different banks.
> + */
> +static const struct mtk_thermal_bank_cfg bank_data[] = {
> + [MT8173_THERMAL_ZONE_CA53] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS3 },
> + },
> +
> + [MT8173_THERMAL_ZONE_CA57] = {
> + .num_sensors = 2,
> + .sensors = { MT8173_TS2, MT8173_TS4 },
> + },
> +
> + [MT8173_THERMAL_ZONE_GPU] = {
> + .num_sensors = 3,
> + .sensors = { MT8173_TS1, MT8173_TS2, MT8173_TSABB },
> + },
> +
> + [MT8173_THERMAL_ZONE_CORE] = {
> + .num_sensors = 1,
> + .sensors = { MT8173_TS2 },
> + },
> +};
> +
> +struct mtk_thermal_sense_point {
> + int msr;
> + int adcpnp;
> +};
> +
> +static const struct mtk_thermal_sense_point
> + sensing_points[MT8173_NUM_SENSORS_PER_ZONE] = {
> + {
> + .msr = TEMP_MSR0,
> + .adcpnp = TEMP_ADCPNP0,
> + }, {
> + .msr = TEMP_MSR1,
> + .adcpnp = TEMP_ADCPNP1,
> + }, {
> + .msr = TEMP_MSR2,
> + .adcpnp = TEMP_ADCPNP2,
> + }, {
> + .msr = TEMP_MSR3,
> + .adcpnp = TEMP_ADCPNP3,
> + },
> +};
> +
> +/**
> + * raw_to_mcelsius - convert a raw ADC value to mcelsius
> + * @mt: The thermal controller
> + * @raw: raw ADC value
> + *
> + * This converts the raw ADC value to mcelsius using the SoC specific
> + * calibration constants
> + */
> +static int raw_to_mcelsius(struct mtk_thermal *mt, u32 raw)
> +{
> + return mt->calib_offset + mt->calib_slope * (raw & 0xfff);
> +}
> +
> +/**
> + * mtk_thermal_get_bank - get bank
> + * @bank: The bank
> + *
> + * The bank registers are banked, we have to select a bank in the
> + * PTPCORESEL register to access it.
> + */
> +static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + u32 val;
> +
> + mutex_lock(&mt->lock);
> +
> + val = readl(mt->thermal_base + PTPCORESEL);
> + val &= ~0xf;
> + val |= bank->id;
> + writel(val, mt->thermal_base + PTPCORESEL);
> +}
> +
> +/**
> + * mtk_thermal_put_bank - release bank
> + * @bank: The bank
> + *
> + * release a bank previously taken with mtk_thermal_get_bank,
> + */
> +static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> +
> + mutex_unlock(&mt->lock);
> +}
> +
> +/**
> + * mtk_thermal_bank_temperature - get the temperature of a bank
> + * @bank: The bank
> + *
> + * The temperature of a bank is considered the maximum temperature of
> + * the sensors associated to the bank.
> + */
> +static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> +{
> + struct mtk_thermal *mt = bank->mt;
> + int temp, i, max;
> + u32 raw;
> +
> + temp = max = INT_MIN;
> +
> + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> + raw = readl(mt->thermal_base + sensing_points[i].msr);
> +
> + temp = raw_to_mcelsius(mt, raw);
> +
> + /*
> + * The first read of a sensor often contains very high bogus
> + * temperature value. Filter these out so that the system does
> + * not immediately shut down.
> + */
> + if (temp > 200000)
> + temp = 0;
> +
If the bogus value is only the first time the sensor is read, instead of
filtering here, you could call mtk_thermal_bank_temperature at probe
time when you are initialising the banks and ignore the returned value.
Thanks,
Punit
> + if (temp > max)
> + max = temp;
> + }
> +
> + return max;
> +}
> +
[...]
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
2015-09-30 9:36 ` Punit Agrawal
@ 2015-09-30 10:37 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-30 10:37 UTC (permalink / raw)
To: Punit Agrawal
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel, kernel,
linux-mediatek, linux-arm-kernel, Matthias Brugger, devicetree,
mark.rutland, robh+dt
Hi Punit,
On Wed, Sep 30, 2015 at 10:36:14AM +0100, Punit Agrawal wrote:
> Hi Sascha,
>
> Re-posting a comment from v7. Perhaps you missed it...
Uh, sorry. In fact I didn't miss it and I thought I have answered it.
Appearantly I haven't.
> > + struct mtk_thermal *mt = bank->mt;
> > + int temp, i, max;
> > + u32 raw;
> > +
> > + temp = max = INT_MIN;
> > +
> > + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> > + raw = readl(mt->thermal_base + sensing_points[i].msr);
> > +
> > + temp = raw_to_mcelsius(mt, raw);
> > +
> > + /*
> > + * The first read of a sensor often contains very high bogus
> > + * temperature value. Filter these out so that the system does
> > + * not immediately shut down.
> > + */
> > + if (temp > 200000)
> > + temp = 0;
> > +
>
> If the bogus value is only the first time the sensor is read, instead of
> filtering here, you could call mtk_thermal_bank_temperature at probe
> time when you are initialising the banks and ignore the returned value.
It seems that after initialization the hardware needs some time to
settle before correct values can be read. Doing what you suggest would
mean we have to delay the boot by several 100ms. I'd rather not do that.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 10:37 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-30 10:37 UTC (permalink / raw)
To: linux-arm-kernel
Hi Punit,
On Wed, Sep 30, 2015 at 10:36:14AM +0100, Punit Agrawal wrote:
> Hi Sascha,
>
> Re-posting a comment from v7. Perhaps you missed it...
Uh, sorry. In fact I didn't miss it and I thought I have answered it.
Appearantly I haven't.
> > + struct mtk_thermal *mt = bank->mt;
> > + int temp, i, max;
> > + u32 raw;
> > +
> > + temp = max = INT_MIN;
> > +
> > + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
> > + raw = readl(mt->thermal_base + sensing_points[i].msr);
> > +
> > + temp = raw_to_mcelsius(mt, raw);
> > +
> > + /*
> > + * The first read of a sensor often contains very high bogus
> > + * temperature value. Filter these out so that the system does
> > + * not immediately shut down.
> > + */
> > + if (temp > 200000)
> > + temp = 0;
> > +
>
> If the bogus value is only the first time the sensor is read, instead of
> filtering here, you could call mtk_thermal_bank_temperature at probe
> time when you are initialising the banks and ignore the returned value.
It seems that after initialization the hardware needs some time to
settle before correct values can be read. Doing what you suggest would
mean we have to delay the boot by several 100ms. I'd rather not do that.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 2/3] thermal: Add Mediatek thermal controller support
2015-09-30 10:37 ` Sascha Hauer
@ 2015-09-30 11:07 ` Punit Agrawal
-1 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-09-30 11:07 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel, kernel,
linux-mediatek, linux-arm-kernel, Matthias Brugger, devicetree,
mark.rutland, robh+dt
Sascha Hauer <s.hauer@pengutronix.de> writes:
> Hi Punit,
>
> On Wed, Sep 30, 2015 at 10:36:14AM +0100, Punit Agrawal wrote:
>> Hi Sascha,
>>
>> Re-posting a comment from v7. Perhaps you missed it...
>
> Uh, sorry. In fact I didn't miss it and I thought I have answered it.
> Appearantly I haven't.
>
>> > + struct mtk_thermal *mt = bank->mt;
>> > + int temp, i, max;
>> > + u32 raw;
>> > +
>> > + temp = max = INT_MIN;
>> > +
>> > + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
>> > + raw = readl(mt->thermal_base + sensing_points[i].msr);
>> > +
>> > + temp = raw_to_mcelsius(mt, raw);
>> > +
>> > + /*
>> > + * The first read of a sensor often contains very high bogus
>> > + * temperature value. Filter these out so that the system does
>> > + * not immediately shut down.
>> > + */
>> > + if (temp > 200000)
>> > + temp = 0;
>> > +
>>
>> If the bogus value is only the first time the sensor is read, instead of
>> filtering here, you could call mtk_thermal_bank_temperature at probe
>> time when you are initialising the banks and ignore the returned value.
>
> It seems that after initialization the hardware needs some time to
> settle before correct values can be read. Doing what you suggest would
> mean we have to delay the boot by several 100ms. I'd rather not do that.
Fair enough. Thanks for clarifying.
>
> Sascha
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 2/3] thermal: Add Mediatek thermal controller support
@ 2015-09-30 11:07 ` Punit Agrawal
0 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-09-30 11:07 UTC (permalink / raw)
To: linux-arm-kernel
Sascha Hauer <s.hauer@pengutronix.de> writes:
> Hi Punit,
>
> On Wed, Sep 30, 2015 at 10:36:14AM +0100, Punit Agrawal wrote:
>> Hi Sascha,
>>
>> Re-posting a comment from v7. Perhaps you missed it...
>
> Uh, sorry. In fact I didn't miss it and I thought I have answered it.
> Appearantly I haven't.
>
>> > + struct mtk_thermal *mt = bank->mt;
>> > + int temp, i, max;
>> > + u32 raw;
>> > +
>> > + temp = max = INT_MIN;
>> > +
>> > + for (i = 0; i < bank_data[bank->id].num_sensors; i++) {
>> > + raw = readl(mt->thermal_base + sensing_points[i].msr);
>> > +
>> > + temp = raw_to_mcelsius(mt, raw);
>> > +
>> > + /*
>> > + * The first read of a sensor often contains very high bogus
>> > + * temperature value. Filter these out so that the system does
>> > + * not immediately shut down.
>> > + */
>> > + if (temp > 200000)
>> > + temp = 0;
>> > +
>>
>> If the bogus value is only the first time the sensor is read, instead of
>> filtering here, you could call mtk_thermal_bank_temperature at probe
>> time when you are initialising the banks and ignore the returned value.
>
> It seems that after initialization the hardware needs some time to
> settle before correct values can be read. Doing what you suggest would
> mean we have to delay the boot by several 100ms. I'd rather not do that.
Fair enough. Thanks for clarifying.
>
> Sascha
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2016-08-11 15:48 ` Matthias Brugger
(?)
@ 2016-08-15 7:07 ` dawei chien
-1 siblings, 0 replies; 81+ messages in thread
From: dawei chien @ 2016-08-15 7:07 UTC (permalink / raw)
To: Matthias Brugger
Cc: Keerthy, Zhang Rui, Eduardo Valentin, Rob Herring, Pawel Moll,
Mark Rutland, Ian Campbell, Kumar Gala, Russell King, linux-pm,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Sascha Hauer, Fan Chen, Eddie Huang,
Yingjoe Chen, Erin Lo
Hi Matthias,
On Thu, 2016-08-11 at 17:48 +0200, Matthias Brugger wrote:
>
> On 11/07/16 10:52, dawei chien wrote:
> > Dear Keerthy,
> >
> > On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
> >>
> >> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> >>> This adds the device tree binding documentation for the mediatek thermal
> >>> controller found on Mediatek MT2701.
> >>>
> >>> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> >>> ---
> >>> .../bindings/thermal/mediatek-thermal.txt | 2 +-
> >>> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> index 81f9a51..bb55e79 100644
> >>> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> >>> is also needed.
> >>>
> >>> Required properties:
> >>> -- compatible: "mediatek,mt8173-thermal"
> >>> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
> >>
> >> - compatible :
> >> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> >> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> >
> > Thank you, I will update it on next version.
> >
>
> Do you know about the compability to older SoCs (e.g. mt6589)?
> It might make sense to add mediatek,mtk-thermal if they are compatible
> or nearly compatible.
I agree with you that we should add mediatek,mtk-thermal for compatible
or nearly compatible SoC.
However, there is no more compatible SoC so far. Once we have such new
nearly compatible SoC, we would update it on this binding document soon,
thank you.
BR,
Dawei
> >>
> >>> - reg: Address range of the thermal controller
> >>> - interrupts: IRQ for the thermal controller
> >>> - clocks, clock-names: Clocks needed for the thermal controller. required
> >>>
> >
> >
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-08-15 7:07 ` dawei chien
0 siblings, 0 replies; 81+ messages in thread
From: dawei chien @ 2016-08-15 7:07 UTC (permalink / raw)
To: Matthias Brugger
Cc: Keerthy, Zhang Rui, Eduardo Valentin, Rob Herring, Pawel Moll,
Mark Rutland, Ian Campbell, Kumar Gala, Russell King, linux-pm,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Sascha Hauer, Fan Chen, Eddie Huang,
Yingjoe Chen, Erin Lo
Hi Matthias,
On Thu, 2016-08-11 at 17:48 +0200, Matthias Brugger wrote:
>
> On 11/07/16 10:52, dawei chien wrote:
> > Dear Keerthy,
> >
> > On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
> >>
> >> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> >>> This adds the device tree binding documentation for the mediatek thermal
> >>> controller found on Mediatek MT2701.
> >>>
> >>> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> >>> ---
> >>> .../bindings/thermal/mediatek-thermal.txt | 2 +-
> >>> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> index 81f9a51..bb55e79 100644
> >>> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> >>> is also needed.
> >>>
> >>> Required properties:
> >>> -- compatible: "mediatek,mt8173-thermal"
> >>> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
> >>
> >> - compatible :
> >> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> >> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> >
> > Thank you, I will update it on next version.
> >
>
> Do you know about the compability to older SoCs (e.g. mt6589)?
> It might make sense to add mediatek,mtk-thermal if they are compatible
> or nearly compatible.
I agree with you that we should add mediatek,mtk-thermal for compatible
or nearly compatible SoC.
However, there is no more compatible SoC so far. Once we have such new
nearly compatible SoC, we would update it on this binding document soon,
thank you.
BR,
Dawei
> >>
> >>> - reg: Address range of the thermal controller
> >>> - interrupts: IRQ for the thermal controller
> >>> - clocks, clock-names: Clocks needed for the thermal controller. required
> >>>
> >
> >
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-08-15 7:07 ` dawei chien
0 siblings, 0 replies; 81+ messages in thread
From: dawei chien @ 2016-08-15 7:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Matthias,
On Thu, 2016-08-11 at 17:48 +0200, Matthias Brugger wrote:
>
> On 11/07/16 10:52, dawei chien wrote:
> > Dear Keerthy,
> >
> > On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
> >>
> >> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> >>> This adds the device tree binding documentation for the mediatek thermal
> >>> controller found on Mediatek MT2701.
> >>>
> >>> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> >>> ---
> >>> .../bindings/thermal/mediatek-thermal.txt | 2 +-
> >>> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> index 81f9a51..bb55e79 100644
> >>> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >>> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> >>> is also needed.
> >>>
> >>> Required properties:
> >>> -- compatible: "mediatek,mt8173-thermal"
> >>> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
> >>
> >> - compatible :
> >> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> >> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> >
> > Thank you, I will update it on next version.
> >
>
> Do you know about the compability to older SoCs (e.g. mt6589)?
> It might make sense to add mediatek,mtk-thermal if they are compatible
> or nearly compatible.
I agree with you that we should add mediatek,mtk-thermal for compatible
or nearly compatible SoC.
However, there is no more compatible SoC so far. Once we have such new
nearly compatible SoC, we would update it on this binding document soon,
thank you.
BR,
Dawei
> >>
> >>> - reg: Address range of the thermal controller
> >>> - interrupts: IRQ for the thermal controller
> >>> - clocks, clock-names: Clocks needed for the thermal controller. required
> >>>
> >
> >
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2016-07-11 8:52 ` dawei chien
@ 2016-08-11 15:48 ` Matthias Brugger
-1 siblings, 0 replies; 81+ messages in thread
From: Matthias Brugger @ 2016-08-11 15:48 UTC (permalink / raw)
To: dawei chien, Keerthy
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Pawel Moll,
Mark Rutland, Ian Campbell, Kumar Gala, Russell King, linux-pm,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Sascha Hauer, Fan Chen, Eddie Huang,
Yingjoe Chen, Erin Lo
On 11/07/16 10:52, dawei chien wrote:
> Dear Keerthy,
>
> On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
>>
>> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
>>> This adds the device tree binding documentation for the mediatek thermal
>>> controller found on Mediatek MT2701.
>>>
>>> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
>>> ---
>>> .../bindings/thermal/mediatek-thermal.txt | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>>> index 81f9a51..bb55e79 100644
>>> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>>> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
>>> is also needed.
>>>
>>> Required properties:
>>> -- compatible: "mediatek,mt8173-thermal"
>>> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
>>
>> - compatible :
>> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
>> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
>
> Thank you, I will update it on next version.
>
Do you know about the compability to older SoCs (e.g. mt6589)?
It might make sense to add mediatek,mtk-thermal if they are compatible
or nearly compatible.
>>
>>> - reg: Address range of the thermal controller
>>> - interrupts: IRQ for the thermal controller
>>> - clocks, clock-names: Clocks needed for the thermal controller. required
>>>
>
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-08-11 15:48 ` Matthias Brugger
0 siblings, 0 replies; 81+ messages in thread
From: Matthias Brugger @ 2016-08-11 15:48 UTC (permalink / raw)
To: linux-arm-kernel
On 11/07/16 10:52, dawei chien wrote:
> Dear Keerthy,
>
> On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
>>
>> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
>>> This adds the device tree binding documentation for the mediatek thermal
>>> controller found on Mediatek MT2701.
>>>
>>> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
>>> ---
>>> .../bindings/thermal/mediatek-thermal.txt | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>>> index 81f9a51..bb55e79 100644
>>> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>>> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
>>> is also needed.
>>>
>>> Required properties:
>>> -- compatible: "mediatek,mt8173-thermal"
>>> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
>>
>> - compatible :
>> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
>> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
>
> Thank you, I will update it on next version.
>
Do you know about the compability to older SoCs (e.g. mt6589)?
It might make sense to add mediatek,mtk-thermal if they are compatible
or nearly compatible.
>>
>>> - reg: Address range of the thermal controller
>>> - interrupts: IRQ for the thermal controller
>>> - clocks, clock-names: Clocks needed for the thermal controller. required
>>>
>
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2016-07-07 11:09 ` Keerthy
(?)
@ 2016-07-11 8:52 ` dawei chien
-1 siblings, 0 replies; 81+ messages in thread
From: dawei chien @ 2016-07-11 8:52 UTC (permalink / raw)
To: Keerthy
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Pawel Moll,
Mark Rutland, Ian Campbell, Kumar Gala, Russell King,
Matthias Brugger, linux-pm, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, srv_heupstream, Sascha Hauer,
Fan Chen, Eddie Huang, Yingjoe Chen, Erin Lo
Dear Keerthy,
On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
>
> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT2701.
> >
> > Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> > ---
> > .../bindings/thermal/mediatek-thermal.txt | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > index 81f9a51..bb55e79 100644
> > --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > is also needed.
> >
> > Required properties:
> > -- compatible: "mediatek,mt8173-thermal"
> > +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
>
> - compatible :
> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
Thank you, I will update it on next version.
>
> > - reg: Address range of the thermal controller
> > - interrupts: IRQ for the thermal controller
> > - clocks, clock-names: Clocks needed for the thermal controller. required
> >
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-11 8:52 ` dawei chien
0 siblings, 0 replies; 81+ messages in thread
From: dawei chien @ 2016-07-11 8:52 UTC (permalink / raw)
To: Keerthy
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Pawel Moll,
Mark Rutland, Ian Campbell, Kumar Gala, Russell King,
Matthias Brugger, linux-pm, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, srv_heupstream, Sascha Hauer,
Fan Chen, Eddie Huang, Yingjoe Chen, Erin Lo
Dear Keerthy,
On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
>
> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT2701.
> >
> > Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> > ---
> > .../bindings/thermal/mediatek-thermal.txt | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > index 81f9a51..bb55e79 100644
> > --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > is also needed.
> >
> > Required properties:
> > -- compatible: "mediatek,mt8173-thermal"
> > +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
>
> - compatible :
> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
Thank you, I will update it on next version.
>
> > - reg: Address range of the thermal controller
> > - interrupts: IRQ for the thermal controller
> > - clocks, clock-names: Clocks needed for the thermal controller. required
> >
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-11 8:52 ` dawei chien
0 siblings, 0 replies; 81+ messages in thread
From: dawei chien @ 2016-07-11 8:52 UTC (permalink / raw)
To: linux-arm-kernel
Dear Keerthy,
On Thu, 2016-07-07 at 16:39 +0530, Keerthy wrote:
>
> On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT2701.
> >
> > Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> > ---
> > .../bindings/thermal/mediatek-thermal.txt | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > index 81f9a51..bb55e79 100644
> > --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > is also needed.
> >
> > Required properties:
> > -- compatible: "mediatek,mt8173-thermal"
> > +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
>
> - compatible :
> - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
> - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
Thank you, I will update it on next version.
>
> > - reg: Address range of the thermal controller
> > - interrupts: IRQ for the thermal controller
> > - clocks, clock-names: Clocks needed for the thermal controller. required
> >
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-07 11:09 ` Keerthy
0 siblings, 0 replies; 81+ messages in thread
From: Keerthy @ 2016-07-07 11:09 UTC (permalink / raw)
To: Dawei Chien, Zhang Rui, Eduardo Valentin
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Matthias Brugger, linux-pm, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek, srv_heupstream,
Sascha Hauer, Fan Chen, Eddie Huang, Yingjoe Chen, Erin Lo
On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT2701.
>
> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> index 81f9a51..bb55e79 100644
> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> is also needed.
>
> Required properties:
> -- compatible: "mediatek,mt8173-thermal"
> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
- compatible :
- "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> - reg: Address range of the thermal controller
> - interrupts: IRQ for the thermal controller
> - clocks, clock-names: Clocks needed for the thermal controller. required
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-07 11:09 ` Keerthy
0 siblings, 0 replies; 81+ messages in thread
From: Keerthy @ 2016-07-07 11:09 UTC (permalink / raw)
To: Dawei Chien, Zhang Rui, Eduardo Valentin
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w, Pawel Moll, Ian Campbell,
Erin Lo, linux-pm-u79uwXL29TY76Z2rM5mHXA, Russell King,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Fan Chen, Rob Herring,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Sascha Hauer,
Kumar Gala, Matthias Brugger, Yingjoe Chen, Eddie Huang,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT2701.
>
> Signed-off-by: Dawei Chien <dawei.chien-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> index 81f9a51..bb55e79 100644
> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> is also needed.
>
> Required properties:
> -- compatible: "mediatek,mt8173-thermal"
> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
- compatible :
- "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> - reg: Address range of the thermal controller
> - interrupts: IRQ for the thermal controller
> - clocks, clock-names: Clocks needed for the thermal controller. required
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-07 11:09 ` Keerthy
0 siblings, 0 replies; 81+ messages in thread
From: Keerthy @ 2016-07-07 11:09 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 07 July 2016 02:36 PM, Dawei Chien wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT2701.
>
> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> index 81f9a51..bb55e79 100644
> --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> is also needed.
>
> Required properties:
> -- compatible: "mediatek,mt8173-thermal"
> +- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
- compatible :
- "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
> - reg: Address range of the thermal controller
> - interrupts: IRQ for the thermal controller
> - clocks, clock-names: Clocks needed for the thermal controller. required
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-07 9:06 ` Dawei Chien
0 siblings, 0 replies; 81+ messages in thread
From: Dawei Chien @ 2016-07-07 9:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Matthias Brugger, linux-pm, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek, srv_heupstream,
Sascha Hauer, Fan Chen, Eddie Huang, Yingjoe Chen, Erin Lo,
Dawei Chien
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT2701.
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
---
.../bindings/thermal/mediatek-thermal.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
index 81f9a51..bb55e79 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
is also needed.
Required properties:
-- compatible: "mediatek,mt8173-thermal"
+- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required
--
1.7.9.5
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-07 9:06 ` Dawei Chien
0 siblings, 0 replies; 81+ messages in thread
From: Dawei Chien @ 2016-07-07 9:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w, Pawel Moll, Ian Campbell,
Erin Lo, linux-pm-u79uwXL29TY76Z2rM5mHXA, Dawei Chien,
Russell King, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Fan Chen,
Rob Herring, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Sascha Hauer, Kumar Gala, Matthias Brugger, Yingjoe Chen,
Eddie Huang, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT2701.
Signed-off-by: Dawei Chien <dawei.chien-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
.../bindings/thermal/mediatek-thermal.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
index 81f9a51..bb55e79 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
is also needed.
Required properties:
-- compatible: "mediatek,mt8173-thermal"
+- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required
--
1.7.9.5
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2016-07-07 9:06 ` Dawei Chien
0 siblings, 0 replies; 81+ messages in thread
From: Dawei Chien @ 2016-07-07 9:06 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT2701.
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
---
.../bindings/thermal/mediatek-thermal.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
index 81f9a51..bb55e79 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -8,7 +8,7 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
is also needed.
Required properties:
-- compatible: "mediatek,mt8173-thermal"
+- compatible: "mediatek,mt8173-thermal" or "mediatek,mt2701-thermal"
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required
--
1.7.9.5
^ permalink raw reply related [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-20 2:12 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-12-20 2:12 UTC (permalink / raw)
To: Sascha Hauer
Cc: Daniel Kurtz, linux-pm, Zhang Rui, linux-kernel, linux-mediatek,
Sasha Hauer, Matthias Brugger, linux-arm-kernel
Hello Sascha,
On Fri, Dec 18, 2015 at 08:16:33AM +0100, Sascha Hauer wrote:
> On Thu, Dec 17, 2015 at 11:23:31AM -0800, Eduardo Valentin wrote:
> > On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> > > On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > > > +Example:
<cut>
> > > > +
> > > > + thermal: thermal@1100b000 {
> > > > + #thermal-sensor-cells = <1>;
> > >
> > > Tiny nit: this should now be:
> > >
> > > #thermal-sensor-cells = <0>;
> >
> >
> > This is actually not so tiny'shy. Why does this driver masks out all
> > sensors available? Why don't we expose all of them and use id property
> > to expose and identify each of them?
>
> This has been the case until v9 of this series. It was requested by
> Mediatek that the CPU frequency regulation works better when the maximum
> of all sensors is taken instead of only single sensors. We decided to
> expose the maximum of all sensors in the device tree. IN the end it will
> be easier to add additional sensors should we need them later than it is
> to get rid of sensors we don't need.
Apologize as I completely missed this transition from v9 to v10. In
fact, I really cannot understand the benefit of having such constraint
implemented in the driver. In device tree you can mark a thermal zone as
status disabled and it won't appear in your system.
One can select which sensors / thermal zones are required. And even
reuse same dtsi, and change status on dts per board.
The combination of the above, with the possibility to select the maximum
from thermal core / sysfs, would be bring much more flexibility for a
system engineer, than having the maximum coded in the driver, because,
well, changing that relation would require changing the code. If you
keep the driver as simple as possible, changing the this setup later
would be as simple as changing the dts(i).
What do you think?
BR,
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-20 2:12 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-12-20 2:12 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Sasha Hauer,
Matthias Brugger, Zhang Rui,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hello Sascha,
On Fri, Dec 18, 2015 at 08:16:33AM +0100, Sascha Hauer wrote:
> On Thu, Dec 17, 2015 at 11:23:31AM -0800, Eduardo Valentin wrote:
> > On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> > > On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> wrote:
> > > > +Example:
<cut>
> > > > +
> > > > + thermal: thermal@1100b000 {
> > > > + #thermal-sensor-cells = <1>;
> > >
> > > Tiny nit: this should now be:
> > >
> > > #thermal-sensor-cells = <0>;
> >
> >
> > This is actually not so tiny'shy. Why does this driver masks out all
> > sensors available? Why don't we expose all of them and use id property
> > to expose and identify each of them?
>
> This has been the case until v9 of this series. It was requested by
> Mediatek that the CPU frequency regulation works better when the maximum
> of all sensors is taken instead of only single sensors. We decided to
> expose the maximum of all sensors in the device tree. IN the end it will
> be easier to add additional sensors should we need them later than it is
> to get rid of sensors we don't need.
Apologize as I completely missed this transition from v9 to v10. In
fact, I really cannot understand the benefit of having such constraint
implemented in the driver. In device tree you can mark a thermal zone as
status disabled and it won't appear in your system.
One can select which sensors / thermal zones are required. And even
reuse same dtsi, and change status on dts per board.
The combination of the above, with the possibility to select the maximum
from thermal core / sysfs, would be bring much more flexibility for a
system engineer, than having the maximum coded in the driver, because,
well, changing that relation would require changing the code. If you
keep the driver as simple as possible, changing the this setup later
would be as simple as changing the dts(i).
What do you think?
BR,
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-20 2:12 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-12-20 2:12 UTC (permalink / raw)
To: linux-arm-kernel
Hello Sascha,
On Fri, Dec 18, 2015 at 08:16:33AM +0100, Sascha Hauer wrote:
> On Thu, Dec 17, 2015 at 11:23:31AM -0800, Eduardo Valentin wrote:
> > On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> > > On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > > > +Example:
<cut>
> > > > +
> > > > + thermal: thermal at 1100b000 {
> > > > + #thermal-sensor-cells = <1>;
> > >
> > > Tiny nit: this should now be:
> > >
> > > #thermal-sensor-cells = <0>;
> >
> >
> > This is actually not so tiny'shy. Why does this driver masks out all
> > sensors available? Why don't we expose all of them and use id property
> > to expose and identify each of them?
>
> This has been the case until v9 of this series. It was requested by
> Mediatek that the CPU frequency regulation works better when the maximum
> of all sensors is taken instead of only single sensors. We decided to
> expose the maximum of all sensors in the device tree. IN the end it will
> be easier to add additional sensors should we need them later than it is
> to get rid of sensors we don't need.
Apologize as I completely missed this transition from v9 to v10. In
fact, I really cannot understand the benefit of having such constraint
implemented in the driver. In device tree you can mark a thermal zone as
status disabled and it won't appear in your system.
One can select which sensors / thermal zones are required. And even
reuse same dtsi, and change status on dts per board.
The combination of the above, with the possibility to select the maximum
from thermal core / sysfs, would be bring much more flexibility for a
system engineer, than having the maximum coded in the driver, because,
well, changing that relation would require changing the code. If you
keep the driver as simple as possible, changing the this setup later
would be as simple as changing the dts(i).
What do you think?
BR,
>
> Sascha
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-12-17 19:23 ` Eduardo Valentin
(?)
@ 2015-12-18 7:16 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-12-18 7:16 UTC (permalink / raw)
To: Eduardo Valentin
Cc: Daniel Kurtz, linux-pm, Zhang Rui, linux-kernel, linux-mediatek,
Sasha Hauer, Matthias Brugger, linux-arm-kernel
On Thu, Dec 17, 2015 at 11:23:31AM -0800, Eduardo Valentin wrote:
> On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> > On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > > This adds the device tree binding documentation for the mediatek thermal
> > > controller found on Mediatek MT8173 and other SoCs.
> > >
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> > > Acked-by: Rob Herring <robh@kernel.org>
> > > ---
> > > .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> > > 1 file changed, 43 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > > new file mode 100644
> > > index 0000000..81f9a51
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > > @@ -0,0 +1,43 @@
> > > +* Mediatek Thermal
> > > +
> > > +This describes the device tree binding for the Mediatek thermal controller
> > > +which measures the on-SoC temperatures. This device does not have its own ADC,
> > > +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> > > +this device needs phandles to the AUXADC. Also it controls a mux in the
> > > +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > > +is also needed.
> > > +
> > > +Required properties:
> > > +- compatible: "mediatek,mt8173-thermal"
> > > +- reg: Address range of the thermal controller
> > > +- interrupts: IRQ for the thermal controller
> > > +- clocks, clock-names: Clocks needed for the thermal controller. required
> > > + clocks are:
> > > + "therm": Main clock needed for register access
> > > + "auxadc": The AUXADC clock
> > > +- resets: Reference to the reset controller controlling the thermal controller.
> > > +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> > > +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> > > +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> > > +
> > > +Optional properties:
> > > +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > > + unspecified default values shall be used.
> > > +- nvmem-cell-names: Should be "calibration-data"
> > > +
> > > +Example:
> > > +
> > > + thermal: thermal@1100b000 {
> > > + #thermal-sensor-cells = <1>;
> >
> > Tiny nit: this should now be:
> >
> > #thermal-sensor-cells = <0>;
>
>
> This is actually not so tiny'shy. Why does this driver masks out all
> sensors available? Why don't we expose all of them and use id property
> to expose and identify each of them?
This has been the case until v9 of this series. It was requested by
Mediatek that the CPU frequency regulation works better when the maximum
of all sensors is taken instead of only single sensors. We decided to
expose the maximum of all sensors in the device tree. IN the end it will
be easier to add additional sensors should we need them later than it is
to get rid of sensors we don't need.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-18 7:16 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-12-18 7:16 UTC (permalink / raw)
To: Eduardo Valentin
Cc: Daniel Kurtz, linux-pm, Zhang Rui, linux-kernel, linux-mediatek,
Sasha Hauer, Matthias Brugger, linux-arm-kernel
On Thu, Dec 17, 2015 at 11:23:31AM -0800, Eduardo Valentin wrote:
> On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> > On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > > This adds the device tree binding documentation for the mediatek thermal
> > > controller found on Mediatek MT8173 and other SoCs.
> > >
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> > > Acked-by: Rob Herring <robh@kernel.org>
> > > ---
> > > .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> > > 1 file changed, 43 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > > new file mode 100644
> > > index 0000000..81f9a51
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > > @@ -0,0 +1,43 @@
> > > +* Mediatek Thermal
> > > +
> > > +This describes the device tree binding for the Mediatek thermal controller
> > > +which measures the on-SoC temperatures. This device does not have its own ADC,
> > > +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> > > +this device needs phandles to the AUXADC. Also it controls a mux in the
> > > +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > > +is also needed.
> > > +
> > > +Required properties:
> > > +- compatible: "mediatek,mt8173-thermal"
> > > +- reg: Address range of the thermal controller
> > > +- interrupts: IRQ for the thermal controller
> > > +- clocks, clock-names: Clocks needed for the thermal controller. required
> > > + clocks are:
> > > + "therm": Main clock needed for register access
> > > + "auxadc": The AUXADC clock
> > > +- resets: Reference to the reset controller controlling the thermal controller.
> > > +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> > > +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> > > +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> > > +
> > > +Optional properties:
> > > +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > > + unspecified default values shall be used.
> > > +- nvmem-cell-names: Should be "calibration-data"
> > > +
> > > +Example:
> > > +
> > > + thermal: thermal@1100b000 {
> > > + #thermal-sensor-cells = <1>;
> >
> > Tiny nit: this should now be:
> >
> > #thermal-sensor-cells = <0>;
>
>
> This is actually not so tiny'shy. Why does this driver masks out all
> sensors available? Why don't we expose all of them and use id property
> to expose and identify each of them?
This has been the case until v9 of this series. It was requested by
Mediatek that the CPU frequency regulation works better when the maximum
of all sensors is taken instead of only single sensors. We decided to
expose the maximum of all sensors in the device tree. IN the end it will
be easier to add additional sensors should we need them later than it is
to get rid of sensors we don't need.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-18 7:16 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-12-18 7:16 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 17, 2015 at 11:23:31AM -0800, Eduardo Valentin wrote:
> On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> > On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > > This adds the device tree binding documentation for the mediatek thermal
> > > controller found on Mediatek MT8173 and other SoCs.
> > >
> > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > > Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> > > Acked-by: Rob Herring <robh@kernel.org>
> > > ---
> > > .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> > > 1 file changed, 43 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > > new file mode 100644
> > > index 0000000..81f9a51
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > > @@ -0,0 +1,43 @@
> > > +* Mediatek Thermal
> > > +
> > > +This describes the device tree binding for the Mediatek thermal controller
> > > +which measures the on-SoC temperatures. This device does not have its own ADC,
> > > +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> > > +this device needs phandles to the AUXADC. Also it controls a mux in the
> > > +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > > +is also needed.
> > > +
> > > +Required properties:
> > > +- compatible: "mediatek,mt8173-thermal"
> > > +- reg: Address range of the thermal controller
> > > +- interrupts: IRQ for the thermal controller
> > > +- clocks, clock-names: Clocks needed for the thermal controller. required
> > > + clocks are:
> > > + "therm": Main clock needed for register access
> > > + "auxadc": The AUXADC clock
> > > +- resets: Reference to the reset controller controlling the thermal controller.
> > > +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> > > +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> > > +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> > > +
> > > +Optional properties:
> > > +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > > + unspecified default values shall be used.
> > > +- nvmem-cell-names: Should be "calibration-data"
> > > +
> > > +Example:
> > > +
> > > + thermal: thermal at 1100b000 {
> > > + #thermal-sensor-cells = <1>;
> >
> > Tiny nit: this should now be:
> >
> > #thermal-sensor-cells = <0>;
>
>
> This is actually not so tiny'shy. Why does this driver masks out all
> sensors available? Why don't we expose all of them and use id property
> to expose and identify each of them?
This has been the case until v9 of this series. It was requested by
Mediatek that the CPU frequency regulation works better when the maximum
of all sensors is taken instead of only single sensors. We decided to
expose the maximum of all sensors in the device tree. IN the end it will
be easier to add additional sensors should we need them later than it is
to get rid of sensors we don't need.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-12-16 11:23 ` Daniel Kurtz
(?)
@ 2015-12-17 19:23 ` Eduardo Valentin
-1 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-12-17 19:23 UTC (permalink / raw)
To: Daniel Kurtz
Cc: Sascha Hauer, linux-pm, Zhang Rui, linux-kernel, linux-mediatek,
Sasha Hauer, Matthias Brugger, linux-arm-kernel
On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT8173 and other SoCs.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> > Acked-by: Rob Herring <robh@kernel.org>
> > ---
> > .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> > 1 file changed, 43 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > new file mode 100644
> > index 0000000..81f9a51
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -0,0 +1,43 @@
> > +* Mediatek Thermal
> > +
> > +This describes the device tree binding for the Mediatek thermal controller
> > +which measures the on-SoC temperatures. This device does not have its own ADC,
> > +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> > +this device needs phandles to the AUXADC. Also it controls a mux in the
> > +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > +is also needed.
> > +
> > +Required properties:
> > +- compatible: "mediatek,mt8173-thermal"
> > +- reg: Address range of the thermal controller
> > +- interrupts: IRQ for the thermal controller
> > +- clocks, clock-names: Clocks needed for the thermal controller. required
> > + clocks are:
> > + "therm": Main clock needed for register access
> > + "auxadc": The AUXADC clock
> > +- resets: Reference to the reset controller controlling the thermal controller.
> > +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> > +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> > +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> > +
> > +Optional properties:
> > +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > + unspecified default values shall be used.
> > +- nvmem-cell-names: Should be "calibration-data"
> > +
> > +Example:
> > +
> > + thermal: thermal@1100b000 {
> > + #thermal-sensor-cells = <1>;
>
> Tiny nit: this should now be:
>
> #thermal-sensor-cells = <0>;
This is actually not so tiny'shy. Why does this driver masks out all
sensors available? Why don't we expose all of them and use id property
to expose and identify each of them?
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-17 19:23 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-12-17 19:23 UTC (permalink / raw)
To: Daniel Kurtz
Cc: Sascha Hauer, linux-pm, Zhang Rui, linux-kernel, linux-mediatek,
Sasha Hauer, Matthias Brugger, linux-arm-kernel
On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT8173 and other SoCs.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> > Acked-by: Rob Herring <robh@kernel.org>
> > ---
> > .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> > 1 file changed, 43 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > new file mode 100644
> > index 0000000..81f9a51
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -0,0 +1,43 @@
> > +* Mediatek Thermal
> > +
> > +This describes the device tree binding for the Mediatek thermal controller
> > +which measures the on-SoC temperatures. This device does not have its own ADC,
> > +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> > +this device needs phandles to the AUXADC. Also it controls a mux in the
> > +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > +is also needed.
> > +
> > +Required properties:
> > +- compatible: "mediatek,mt8173-thermal"
> > +- reg: Address range of the thermal controller
> > +- interrupts: IRQ for the thermal controller
> > +- clocks, clock-names: Clocks needed for the thermal controller. required
> > + clocks are:
> > + "therm": Main clock needed for register access
> > + "auxadc": The AUXADC clock
> > +- resets: Reference to the reset controller controlling the thermal controller.
> > +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> > +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> > +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> > +
> > +Optional properties:
> > +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > + unspecified default values shall be used.
> > +- nvmem-cell-names: Should be "calibration-data"
> > +
> > +Example:
> > +
> > + thermal: thermal@1100b000 {
> > + #thermal-sensor-cells = <1>;
>
> Tiny nit: this should now be:
>
> #thermal-sensor-cells = <0>;
This is actually not so tiny'shy. Why does this driver masks out all
sensors available? Why don't we expose all of them and use id property
to expose and identify each of them?
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-17 19:23 ` Eduardo Valentin
0 siblings, 0 replies; 81+ messages in thread
From: Eduardo Valentin @ 2015-12-17 19:23 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 16, 2015 at 07:23:22PM +0800, Daniel Kurtz wrote:
> On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > This adds the device tree binding documentation for the mediatek thermal
> > controller found on Mediatek MT8173 and other SoCs.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> > Acked-by: Rob Herring <robh@kernel.org>
> > ---
> > .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> > 1 file changed, 43 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > new file mode 100644
> > index 0000000..81f9a51
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> > @@ -0,0 +1,43 @@
> > +* Mediatek Thermal
> > +
> > +This describes the device tree binding for the Mediatek thermal controller
> > +which measures the on-SoC temperatures. This device does not have its own ADC,
> > +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> > +this device needs phandles to the AUXADC. Also it controls a mux in the
> > +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> > +is also needed.
> > +
> > +Required properties:
> > +- compatible: "mediatek,mt8173-thermal"
> > +- reg: Address range of the thermal controller
> > +- interrupts: IRQ for the thermal controller
> > +- clocks, clock-names: Clocks needed for the thermal controller. required
> > + clocks are:
> > + "therm": Main clock needed for register access
> > + "auxadc": The AUXADC clock
> > +- resets: Reference to the reset controller controlling the thermal controller.
> > +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> > +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> > +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> > +
> > +Optional properties:
> > +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> > + unspecified default values shall be used.
> > +- nvmem-cell-names: Should be "calibration-data"
> > +
> > +Example:
> > +
> > + thermal: thermal at 1100b000 {
> > + #thermal-sensor-cells = <1>;
>
> Tiny nit: this should now be:
>
> #thermal-sensor-cells = <0>;
This is actually not so tiny'shy. Why does this driver masks out all
sensors available? Why don't we expose all of them and use id property
to expose and identify each of them?
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-11-30 11:42 ` Sascha Hauer
(?)
@ 2015-12-16 11:23 ` Daniel Kurtz
-1 siblings, 0 replies; 81+ messages in thread
From: Daniel Kurtz @ 2015-12-16 11:23 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel,
linux-mediatek, Sasha Hauer, Matthias Brugger, linux-arm-kernel
On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT8173 and other SoCs.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..81f9a51
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,43 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> +
> +Optional properties:
> +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> + unspecified default values shall be used.
> +- nvmem-cell-names: Should be "calibration-data"
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
Tiny nit: this should now be:
#thermal-sensor-cells = <0>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + nvmem-cells = <&thermal_calibration_data>;
> + nvmem-cell-names = "calibration-data";
> + };
> --
> 2.6.2
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-16 11:23 ` Daniel Kurtz
0 siblings, 0 replies; 81+ messages in thread
From: Daniel Kurtz @ 2015-12-16 11:23 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel,
linux-mediatek, Sasha Hauer, Matthias Brugger, linux-arm-kernel
On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT8173 and other SoCs.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..81f9a51
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,43 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> +
> +Optional properties:
> +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> + unspecified default values shall be used.
> +- nvmem-cell-names: Should be "calibration-data"
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
Tiny nit: this should now be:
#thermal-sensor-cells = <0>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + nvmem-cells = <&thermal_calibration_data>;
> + nvmem-cell-names = "calibration-data";
> + };
> --
> 2.6.2
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-12-16 11:23 ` Daniel Kurtz
0 siblings, 0 replies; 81+ messages in thread
From: Daniel Kurtz @ 2015-12-16 11:23 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Nov 30, 2015 at 7:42 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT8173 and other SoCs.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..81f9a51
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,43 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> +
> +Optional properties:
> +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> + unspecified default values shall be used.
> +- nvmem-cell-names: Should be "calibration-data"
> +
> +Example:
> +
> + thermal: thermal at 1100b000 {
> + #thermal-sensor-cells = <1>;
Tiny nit: this should now be:
#thermal-sensor-cells = <0>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + nvmem-cells = <&thermal_calibration_data>;
> + nvmem-cell-names = "calibration-data";
> + };
> --
> 2.6.2
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-11-30 11:42 [PATCH v12] Add Mediatek thermal support Sascha Hauer
@ 2015-11-30 11:42 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-30 11:42 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, Sascha Hauer
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.2
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-11-30 11:42 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-30 11:42 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.2
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-11-18 8:24 [PATCH v11] Add Mediatek thermal support Sascha Hauer
@ 2015-11-18 8:24 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-18 8:24 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, Sascha Hauer
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.2
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-11-18 8:24 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-18 8:24 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.2
^ permalink raw reply related [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-11-09 10:13 ` Sascha Hauer
@ 2015-11-09 15:59 ` Rob Herring
-1 siblings, 0 replies; 81+ messages in thread
From: Rob Herring @ 2015-11-09 15:59 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel, kernel,
linux-mediatek, linux-arm-kernel, Matthias Brugger, devicetree,
mark.rutland
On Mon, Nov 09, 2015 at 11:13:31AM +0100, Sascha Hauer wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT8173 and other SoCs.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..81f9a51
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,43 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> +
> +Optional properties:
> +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> + unspecified default values shall be used.
> +- nvmem-cell-names: Should be "calibration-data"
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + nvmem-cells = <&thermal_calibration_data>;
> + nvmem-cell-names = "calibration-data";
> + };
> --
> 2.6.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-11-09 15:59 ` Rob Herring
0 siblings, 0 replies; 81+ messages in thread
From: Rob Herring @ 2015-11-09 15:59 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Nov 09, 2015 at 11:13:31AM +0100, Sascha Hauer wrote:
> This adds the device tree binding documentation for the mediatek thermal
> controller found on Mediatek MT8173 and other SoCs.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..81f9a51
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,43 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
> +
> +Optional properties:
> +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
> + unspecified default values shall be used.
> +- nvmem-cell-names: Should be "calibration-data"
> +
> +Example:
> +
> + thermal: thermal at 1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + nvmem-cells = <&thermal_calibration_data>;
> + nvmem-cell-names = "calibration-data";
> + };
> --
> 2.6.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-11-09 10:13 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-09 10:13 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt,
Sascha Hauer
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-11-09 10:13 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-09 10:13 UTC (permalink / raw)
To: linux-pm-u79uwXL29TY76Z2rM5mHXA, Zhang Rui, Eduardo Valentin
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
Sascha Hauer, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ, Matthias Brugger,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-11-09 10:13 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-11-09 10:13 UTC (permalink / raw)
To: linux-arm-kernel
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..81f9a51
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,43 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
+
+Optional properties:
+- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
+ unspecified default values shall be used.
+- nvmem-cell-names: Should be "calibration-data"
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
--
2.6.1
^ permalink raw reply related [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-31 7:34 ` Sascha Hauer
@ 2015-09-01 5:26 ` Sascha Hauer
-1 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-01 5:26 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt
On Mon, Aug 31, 2015 at 09:34:04AM +0200, Sascha Hauer wrote:
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Uh, still forgot the commit log. Will add something like:
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Sascha
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> include/dt-bindings/thermal/mt8173.h | 13 ++++++++
> 2 files changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> create mode 100644 include/dt-bindings/thermal/mt8173.h
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..1697375
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
> + include/dt-bindings/thermal/mt8173.h for valid sensor
> + numbers.
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + };
> diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
> new file mode 100644
> index 0000000..692e74c
> --- /dev/null
> +++ b/include/dt-bindings/thermal/mt8173.h
> @@ -0,0 +1,13 @@
> +/*
> + * This header provides constants for mediatek,mt8173-thermal
> + */
> +
> +#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +
> +#define MT8173_THERMAL_ZONE_CA53 0
> +#define MT8173_THERMAL_ZONE_CA57 1
> +#define MT8173_THERMAL_ZONE_GPU 2
> +#define MT8173_THERMAL_ZONE_CORE 3
> +
> +#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
> --
> 2.5.0
>
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-09-01 5:26 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-09-01 5:26 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Aug 31, 2015 at 09:34:04AM +0200, Sascha Hauer wrote:
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Uh, still forgot the commit log. Will add something like:
This adds the device tree binding documentation for the mediatek thermal
controller found on Mediatek MT8173 and other SoCs.
Sascha
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> include/dt-bindings/thermal/mt8173.h | 13 ++++++++
> 2 files changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> create mode 100644 include/dt-bindings/thermal/mt8173.h
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..1697375
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
> + include/dt-bindings/thermal/mt8173.h for valid sensor
> + numbers.
> +
> +Example:
> +
> + thermal: thermal at 1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + };
> diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
> new file mode 100644
> index 0000000..692e74c
> --- /dev/null
> +++ b/include/dt-bindings/thermal/mt8173.h
> @@ -0,0 +1,13 @@
> +/*
> + * This header provides constants for mediatek,mt8173-thermal
> + */
> +
> +#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +
> +#define MT8173_THERMAL_ZONE_CA53 0
> +#define MT8173_THERMAL_ZONE_CA57 1
> +#define MT8173_THERMAL_ZONE_GPU 2
> +#define MT8173_THERMAL_ZONE_CORE 3
> +
> +#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
> --
> 2.5.0
>
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-08-31 7:34 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-31 7:34 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, devicetree, mark.rutland, robh+dt,
Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-08-31 7:34 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-31 7:34 UTC (permalink / raw)
To: linux-pm-u79uwXL29TY76Z2rM5mHXA, Zhang Rui, Eduardo Valentin
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
Sascha Hauer, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ, Matthias Brugger,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-08-31 7:34 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-31 7:34 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-28 2:23 ` Daniel Kurtz
@ 2015-08-31 7:25 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-31 7:25 UTC (permalink / raw)
To: Daniel Kurtz
Cc: Punit Agrawal, linux-pm, Zhang Rui, Eduardo Valentin,
linux-kernel, linux-mediatek, Sasha Hauer, Matthias Brugger,
open list:OPEN FIRMWARE AND...,
Mark Rutland, Rob Herring
On Fri, Aug 28, 2015 at 10:23:15AM +0800, Daniel Kurtz wrote:
> On Thu, Aug 27, 2015 at 7:49 PM, Punit Agrawal <punit.agrawal@arm.com> wrote:
> > [ + device tree folks ]
> >
> > Hi Sascha,
> >
> > When introducing a new binding, it is a good idea to get reviews from
> > the device tree maintainers. I've added a few folks here. Please keep
> > them in the loop for future postings.
> >
> > Sascha Hauer <s.hauer@pengutronix.de> writes:
> >
> >> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> >> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> >
> > Please add a commit log.
> >
> >> ---
> >> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> >> include/dt-bindings/thermal/mt8173.h | 13 ++++++++
> >> 2 files changed, 51 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >> create mode 100644 include/dt-bindings/thermal/mt8173.h
> >>
> >> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >> new file mode 100644
> >> index 0000000..1697375
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> >> @@ -0,0 +1,38 @@
> >> +* Mediatek Thermal
> >> +
> >> +This describes the device tree binding for the Mediatek thermal controller
> >> +which measures the on-SoC temperatures. This device does not have its own ADC,
> >> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> >> +this device needs phandles to the AUXADC. Also it controls a mux in the
> >> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> >> +is also needed.
> >> +
> >> +Required properties:
> >> +- compatible: "mediatek,mt8173-thermal"
> >> +- reg: Address range of the thermal controller
> >> +- interrupts: IRQ for the thermal controller
> >> +- clocks, clock-names: Clocks needed for the thermal controller. required
> >> + clocks are:
> >> + "therm": Main clock needed for register access
> >> + "auxadc": The AUXADC clock
> >> +- resets: Reference to the reset controller controlling the thermal controller.
> >> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> >> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> >> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
> >> + include/dt-bindings/thermal/mt8173.h for valid sensor
> >> + numbers.
> >> +
> >> +Example:
> >> +
> >> + thermal: thermal@1100b000 {
> >> + #thermal-sensor-cells = <1>;
> >> + compatible = "mediatek,mt8173-thermal";
> >> + reg = <0 0x1100b000 0 0x1000>;
> >> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> >> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> >> + clock-names = "therm", "auxadc";
> >> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> >> + reset-names = "therm";
> >> + mediatek,auxadc = <&auxadc>;
> >> + mediatek,apmixedsys = <&apmixedsys>;
> >> + };
> >> diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
> >> new file mode 100644
> >> index 0000000..692e74c
> >> --- /dev/null
> >> +++ b/include/dt-bindings/thermal/mt8173.h
> >> @@ -0,0 +1,13 @@
> >> +/*
> >> + * This header provides constants for mediatek,mt8173-thermal
> >> + */
> >> +
> >> +#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> >> +#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> >> +
> >> +#define MT8173_THERMAL_ZONE_CA53 0
> >> +#define MT8173_THERMAL_ZONE_CA57 1
> >> +#define MT8173_THERMAL_ZONE_GPU 2
> >> +#define MT8173_THERMAL_ZONE_CORE 3
> >> +
> >> +#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
> >
> > The constants in this include are not used in the patchset. Please drop
> > this hunk and introduce it when you use it.
>
> These constants are part of the devicetree ABI, and I believe they
> should be included with the binding.
Yes, that's what I was told for other series.
> To make this more concrete, I think these constants could be used as
> array indices when initializing the corresponding banks of "bank_data"
> in patch 2 (like you do when initializing scp_domain_data in the
> scpsys driver).
Good idea, will do that in the next round.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-27 11:49 ` Punit Agrawal
(?)
@ 2015-08-28 2:23 ` Daniel Kurtz
2015-08-31 7:25 ` Sascha Hauer
-1 siblings, 1 reply; 81+ messages in thread
From: Daniel Kurtz @ 2015-08-28 2:23 UTC (permalink / raw)
To: Punit Agrawal
Cc: Sascha Hauer, linux-pm, Zhang Rui, Eduardo Valentin,
linux-kernel, linux-mediatek, Sasha Hauer, Matthias Brugger,
open list:OPEN FIRMWARE AND...,
Mark Rutland, Rob Herring
On Thu, Aug 27, 2015 at 7:49 PM, Punit Agrawal <punit.agrawal@arm.com> wrote:
> [ + device tree folks ]
>
> Hi Sascha,
>
> When introducing a new binding, it is a good idea to get reviews from
> the device tree maintainers. I've added a few folks here. Please keep
> them in the loop for future postings.
>
> Sascha Hauer <s.hauer@pengutronix.de> writes:
>
>> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
>> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
>
> Please add a commit log.
>
>> ---
>> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
>> include/dt-bindings/thermal/mt8173.h | 13 ++++++++
>> 2 files changed, 51 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>> create mode 100644 include/dt-bindings/thermal/mt8173.h
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>> new file mode 100644
>> index 0000000..1697375
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>> @@ -0,0 +1,38 @@
>> +* Mediatek Thermal
>> +
>> +This describes the device tree binding for the Mediatek thermal controller
>> +which measures the on-SoC temperatures. This device does not have its own ADC,
>> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
>> +this device needs phandles to the AUXADC. Also it controls a mux in the
>> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
>> +is also needed.
>> +
>> +Required properties:
>> +- compatible: "mediatek,mt8173-thermal"
>> +- reg: Address range of the thermal controller
>> +- interrupts: IRQ for the thermal controller
>> +- clocks, clock-names: Clocks needed for the thermal controller. required
>> + clocks are:
>> + "therm": Main clock needed for register access
>> + "auxadc": The AUXADC clock
>> +- resets: Reference to the reset controller controlling the thermal controller.
>> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
>> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
>> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
>> + include/dt-bindings/thermal/mt8173.h for valid sensor
>> + numbers.
>> +
>> +Example:
>> +
>> + thermal: thermal@1100b000 {
>> + #thermal-sensor-cells = <1>;
>> + compatible = "mediatek,mt8173-thermal";
>> + reg = <0 0x1100b000 0 0x1000>;
>> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
>> + clock-names = "therm", "auxadc";
>> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
>> + reset-names = "therm";
>> + mediatek,auxadc = <&auxadc>;
>> + mediatek,apmixedsys = <&apmixedsys>;
>> + };
>> diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
>> new file mode 100644
>> index 0000000..692e74c
>> --- /dev/null
>> +++ b/include/dt-bindings/thermal/mt8173.h
>> @@ -0,0 +1,13 @@
>> +/*
>> + * This header provides constants for mediatek,mt8173-thermal
>> + */
>> +
>> +#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
>> +#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
>> +
>> +#define MT8173_THERMAL_ZONE_CA53 0
>> +#define MT8173_THERMAL_ZONE_CA57 1
>> +#define MT8173_THERMAL_ZONE_GPU 2
>> +#define MT8173_THERMAL_ZONE_CORE 3
>> +
>> +#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
>
> The constants in this include are not used in the patchset. Please drop
> this hunk and introduce it when you use it.
These constants are part of the devicetree ABI, and I believe they
should be included with the binding.
To make this more concrete, I think these constants could be used as
array indices when initializing the corresponding banks of "bank_data"
in patch 2 (like you do when initializing scp_domain_data in the
scpsys driver).
-Dan
>
> Thanks,
> Punit
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-08-27 11:49 ` Punit Agrawal
0 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-08-27 11:49 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel,
linux-mediatek, Daniel Kurtz, kernel, Matthias Brugger,
devicetree, mark.rutland, robh+dt
[ + device tree folks ]
Hi Sascha,
When introducing a new binding, it is a good idea to get reviews from
the device tree maintainers. I've added a few folks here. Please keep
them in the loop for future postings.
Sascha Hauer <s.hauer@pengutronix.de> writes:
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Please add a commit log.
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> include/dt-bindings/thermal/mt8173.h | 13 ++++++++
> 2 files changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> create mode 100644 include/dt-bindings/thermal/mt8173.h
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..1697375
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
> + include/dt-bindings/thermal/mt8173.h for valid sensor
> + numbers.
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + };
> diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
> new file mode 100644
> index 0000000..692e74c
> --- /dev/null
> +++ b/include/dt-bindings/thermal/mt8173.h
> @@ -0,0 +1,13 @@
> +/*
> + * This header provides constants for mediatek,mt8173-thermal
> + */
> +
> +#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +
> +#define MT8173_THERMAL_ZONE_CA53 0
> +#define MT8173_THERMAL_ZONE_CA57 1
> +#define MT8173_THERMAL_ZONE_GPU 2
> +#define MT8173_THERMAL_ZONE_CORE 3
> +
> +#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
The constants in this include are not used in the patchset. Please drop
this hunk and introduce it when you use it.
Thanks,
Punit
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-08-27 11:49 ` Punit Agrawal
0 siblings, 0 replies; 81+ messages in thread
From: Punit Agrawal @ 2015-08-27 11:49 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA, Zhang Rui, Eduardo Valentin,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Daniel Kurtz,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ, Matthias Brugger,
devicetree-u79uwXL29TY76Z2rM5mHXA, mark.rutland-5wv7dgnIgG8,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
[ + device tree folks ]
Hi Sascha,
When introducing a new binding, it is a good idea to get reviews from
the device tree maintainers. I've added a few folks here. Please keep
them in the loop for future postings.
Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> writes:
> Signed-off-by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Reviewed-by: Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Please add a commit log.
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> include/dt-bindings/thermal/mt8173.h | 13 ++++++++
> 2 files changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> create mode 100644 include/dt-bindings/thermal/mt8173.h
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..1697375
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets: Reference to the reset controller controlling the thermal controller.
> +- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
> +- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
> + include/dt-bindings/thermal/mt8173.h for valid sensor
> + numbers.
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + mediatek,auxadc = <&auxadc>;
> + mediatek,apmixedsys = <&apmixedsys>;
> + };
> diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
> new file mode 100644
> index 0000000..692e74c
> --- /dev/null
> +++ b/include/dt-bindings/thermal/mt8173.h
> @@ -0,0 +1,13 @@
> +/*
> + * This header provides constants for mediatek,mt8173-thermal
> + */
> +
> +#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
> +
> +#define MT8173_THERMAL_ZONE_CA53 0
> +#define MT8173_THERMAL_ZONE_CA57 1
> +#define MT8173_THERMAL_ZONE_GPU 2
> +#define MT8173_THERMAL_ZONE_CORE 3
> +
> +#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
The constants in this include are not used in the patchset. Please drop
this hunk and introduce it when you use it.
Thanks,
Punit
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-27 6:41 [PATCH v7] Add Mediatek thermal support Sascha Hauer
@ 2015-08-27 6:41 ` Sascha Hauer
2015-08-27 11:49 ` Punit Agrawal
0 siblings, 1 reply; 81+ messages in thread
From: Sascha Hauer @ 2015-08-27 6:41 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, linux-mediatek, Daniel Kurtz, kernel,
Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-26 13:58 [PATCH v6] Add Mediatek thermal support Sascha Hauer
@ 2015-08-26 13:58 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-26 13:58 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, linux-mediatek, Daniel Kurtz, kernel,
Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.5.0
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-20 8:05 [PATCH v5] Add Mediatek thermal support Sascha Hauer
@ 2015-08-20 8:06 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-20 8:06 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, linux-mediatek, Daniel Kurtz, kernel,
Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.4.6
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-07 13:55 [PATCH v4] Add Mediatek thermal support Sascha Hauer
@ 2015-08-07 13:55 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-07 13:55 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, linux-mediatek, Daniel Kurtz, kernel,
Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
include/dt-bindings/thermal/mt8173.h | 13 ++++++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
create mode 100644 include/dt-bindings/thermal/mt8173.h
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..1697375
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets: Reference to the reset controller controlling the thermal controller.
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. See
+ include/dt-bindings/thermal/mt8173.h for valid sensor
+ numbers.
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
diff --git a/include/dt-bindings/thermal/mt8173.h b/include/dt-bindings/thermal/mt8173.h
new file mode 100644
index 0000000..692e74c
--- /dev/null
+++ b/include/dt-bindings/thermal/mt8173.h
@@ -0,0 +1,13 @@
+/*
+ * This header provides constants for mediatek,mt8173-thermal
+ */
+
+#ifndef _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+#define _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H
+
+#define MT8173_THERMAL_ZONE_CA53 0
+#define MT8173_THERMAL_ZONE_CA57 1
+#define MT8173_THERMAL_ZONE_GPU 2
+#define MT8173_THERMAL_ZONE_CORE 3
+
+#endif /* _DT_BINDINGS_THERMAL_MEDIATEK_MT8173_H */
--
2.4.6
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-08-05 12:25 [PATCH v3] Add Mediatek thermal support Sascha Hauer
@ 2015-08-05 12:25 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-08-05 12:25 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, linux-mediatek, Daniel Kurtz, kernel,
Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..c425a0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets, reset-names: Reference to the reset controller controlling the thermal
+ controller. Required reset-names:
+ "therm": The main reset line
+- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
+- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ };
--
2.4.6
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-07-21 7:59 [PATCH v2] Add Mediatek thermal support Sascha Hauer
@ 2015-07-21 7:59 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-07-21 7:59 UTC (permalink / raw)
To: linux-pm, Zhang Rui, Eduardo Valentin
Cc: linux-kernel, kernel, linux-mediatek, linux-arm-kernel,
Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..d90e4dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets, reset-names: Reference to the reset controller controlling the thermal
+ controller. Required reset-names:
+ "therm": The main reset line
+- auxadc: A phandle to the AUXADC which the thermal controller uses
+- apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ auxadc = <&auxadc>;
+ apmixedsys = <&apmixedsys>;
+ };
--
2.1.4
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-07-21 7:59 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-07-21 7:59 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..d90e4dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets, reset-names: Reference to the reset controller controlling the thermal
+ controller. Required reset-names:
+ "therm": The main reset line
+- auxadc: A phandle to the AUXADC which the thermal controller uses
+- apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ auxadc = <&auxadc>;
+ apmixedsys = <&apmixedsys>;
+ };
--
2.1.4
^ permalink raw reply related [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-07-13 10:34 ` Sascha Hauer
(?)
@ 2015-07-15 17:41 ` Daniel Kurtz
-1 siblings, 0 replies; 81+ messages in thread
From: Daniel Kurtz @ 2015-07-15 17:41 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel, Sasha Hauer,
linux-mediatek, linux-arm-kernel, Matthias Brugger
On Mon, Jul 13, 2015 at 6:34 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..d90e4dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets, reset-names: Reference to the reset controller controlling the thermal
> + controller. Required reset-names:
> + "therm": The main reset line
> +- auxadc: A phandle to the AUXADC which the thermal controller uses
> +- apmixedsys: A phandle to the APMIXEDSYS controller.
Hmm, shouldn't these custom properties be prefixed with:
"mediatek,..."
-Dan
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + auxadc = <&auxadc>;
> + apmixedsys = <&apmixedsys>;
> + };
> --
> 2.1.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 81+ messages in thread
* Re: [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-07-15 17:41 ` Daniel Kurtz
0 siblings, 0 replies; 81+ messages in thread
From: Daniel Kurtz @ 2015-07-15 17:41 UTC (permalink / raw)
To: Sascha Hauer
Cc: linux-pm, Zhang Rui, Eduardo Valentin, linux-kernel, Sasha Hauer,
linux-mediatek, linux-arm-kernel, Matthias Brugger
On Mon, Jul 13, 2015 at 6:34 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..d90e4dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets, reset-names: Reference to the reset controller controlling the thermal
> + controller. Required reset-names:
> + "therm": The main reset line
> +- auxadc: A phandle to the AUXADC which the thermal controller uses
> +- apmixedsys: A phandle to the APMIXEDSYS controller.
Hmm, shouldn't these custom properties be prefixed with:
"mediatek,..."
-Dan
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
> +
> +Example:
> +
> + thermal: thermal@1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + auxadc = <&auxadc>;
> + apmixedsys = <&apmixedsys>;
> + };
> --
> 2.1.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-07-15 17:41 ` Daniel Kurtz
0 siblings, 0 replies; 81+ messages in thread
From: Daniel Kurtz @ 2015-07-15 17:41 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jul 13, 2015 at 6:34 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> new file mode 100644
> index 0000000..d90e4dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
> @@ -0,0 +1,38 @@
> +* Mediatek Thermal
> +
> +This describes the device tree binding for the Mediatek thermal controller
> +which measures the on-SoC temperatures. This device does not have its own ADC,
> +instead it directly controls the AUXADC via AHB bus accesses. For this reason
> +this device needs phandles to the AUXADC. Also it controls a mux in the
> +apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
> +is also needed.
> +
> +Required properties:
> +- compatible: "mediatek,mt8173-thermal"
> +- reg: Address range of the thermal controller
> +- interrupts: IRQ for the thermal controller
> +- clocks, clock-names: Clocks needed for the thermal controller. required
> + clocks are:
> + "therm": Main clock needed for register access
> + "auxadc": The AUXADC clock
> +- resets, reset-names: Reference to the reset controller controlling the thermal
> + controller. Required reset-names:
> + "therm": The main reset line
> +- auxadc: A phandle to the AUXADC which the thermal controller uses
> +- apmixedsys: A phandle to the APMIXEDSYS controller.
Hmm, shouldn't these custom properties be prefixed with:
"mediatek,..."
-Dan
> +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
> +
> +Example:
> +
> + thermal: thermal at 1100b000 {
> + #thermal-sensor-cells = <1>;
> + compatible = "mediatek,mt8173-thermal";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> + clock-names = "therm", "auxadc";
> + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> + reset-names = "therm";
> + auxadc = <&auxadc>;
> + apmixedsys = <&apmixedsys>;
> + };
> --
> 2.1.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
2015-07-13 10:34 [PATCH] thermal: Add Mediatek thermal support Sascha Hauer
@ 2015-07-13 10:34 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-07-13 10:34 UTC (permalink / raw)
To: linux-pm
Cc: Zhang Rui, Eduardo Valentin, linux-kernel, kernel,
linux-mediatek, linux-arm-kernel, Matthias Brugger, Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..d90e4dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets, reset-names: Reference to the reset controller controlling the thermal
+ controller. Required reset-names:
+ "therm": The main reset line
+- auxadc: A phandle to the AUXADC which the thermal controller uses
+- apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
+
+Example:
+
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ auxadc = <&auxadc>;
+ apmixedsys = <&apmixedsys>;
+ };
--
2.1.4
^ permalink raw reply related [flat|nested] 81+ messages in thread
* [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller
@ 2015-07-13 10:34 ` Sascha Hauer
0 siblings, 0 replies; 81+ messages in thread
From: Sascha Hauer @ 2015-07-13 10:34 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../bindings/thermal/mediatek-thermal.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
new file mode 100644
index 0000000..d90e4dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -0,0 +1,38 @@
+* Mediatek Thermal
+
+This describes the device tree binding for the Mediatek thermal controller
+which measures the on-SoC temperatures. This device does not have its own ADC,
+instead it directly controls the AUXADC via AHB bus accesses. For this reason
+this device needs phandles to the AUXADC. Also it controls a mux in the
+apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
+is also needed.
+
+Required properties:
+- compatible: "mediatek,mt8173-thermal"
+- reg: Address range of the thermal controller
+- interrupts: IRQ for the thermal controller
+- clocks, clock-names: Clocks needed for the thermal controller. required
+ clocks are:
+ "therm": Main clock needed for register access
+ "auxadc": The AUXADC clock
+- resets, reset-names: Reference to the reset controller controlling the thermal
+ controller. Required reset-names:
+ "therm": The main reset line
+- auxadc: A phandle to the AUXADC which the thermal controller uses
+- apmixedsys: A phandle to the APMIXEDSYS controller.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
+
+Example:
+
+ thermal: thermal at 1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8173-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ auxadc = <&auxadc>;
+ apmixedsys = <&apmixedsys>;
+ };
--
2.1.4
^ permalink raw reply related [flat|nested] 81+ messages in thread
end of thread, other threads:[~2016-08-15 7:07 UTC | newest]
Thread overview: 81+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-09-23 13:37 [PATCH v9] Add Mediatek thermal support Sascha Hauer
2015-09-23 13:37 ` Sascha Hauer
2015-09-23 13:37 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-09-23 13:37 ` Sascha Hauer
2015-09-23 13:37 ` [PATCH 2/3] thermal: Add Mediatek thermal controller support Sascha Hauer
2015-09-23 13:37 ` Sascha Hauer
2015-09-23 18:31 ` Vladimir Zapolskiy
2015-09-23 18:31 ` Vladimir Zapolskiy
2015-09-23 18:31 ` Vladimir Zapolskiy
2015-09-30 6:14 ` Sascha Hauer
2015-09-30 6:14 ` Sascha Hauer
2015-09-29 23:04 ` Eduardo Valentin
2015-09-29 23:04 ` Eduardo Valentin
2015-09-29 23:04 ` Eduardo Valentin
2015-09-30 6:13 ` Sascha Hauer
2015-09-30 6:13 ` Sascha Hauer
2015-09-30 9:36 ` Punit Agrawal
2015-09-30 9:36 ` Punit Agrawal
2015-09-30 9:36 ` Punit Agrawal
2015-09-30 10:37 ` Sascha Hauer
2015-09-30 10:37 ` Sascha Hauer
2015-09-30 11:07 ` Punit Agrawal
2015-09-30 11:07 ` Punit Agrawal
2015-09-23 13:37 ` [PATCH 3/3] ARM64: dts: mt8173: Add thermal/auxadc device nodes Sascha Hauer
2015-09-23 13:37 ` Sascha Hauer
-- strict thread matches above, loose matches on Subject: below --
2016-07-07 9:06 [PATCH 0/3] thermal: Add Mediatek thermal driver for mt2701 Dawei Chien
2016-07-07 9:06 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Dawei Chien
2016-07-07 9:06 ` Dawei Chien
2016-07-07 9:06 ` Dawei Chien
2016-07-07 11:09 ` Keerthy
2016-07-07 11:09 ` Keerthy
2016-07-07 11:09 ` Keerthy
2016-07-11 8:52 ` dawei chien
2016-07-11 8:52 ` dawei chien
2016-07-11 8:52 ` dawei chien
2016-08-11 15:48 ` Matthias Brugger
2016-08-11 15:48 ` Matthias Brugger
2016-08-15 7:07 ` dawei chien
2016-08-15 7:07 ` dawei chien
2016-08-15 7:07 ` dawei chien
2015-11-30 11:42 [PATCH v12] Add Mediatek thermal support Sascha Hauer
2015-11-30 11:42 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-11-30 11:42 ` Sascha Hauer
2015-12-16 11:23 ` Daniel Kurtz
2015-12-16 11:23 ` Daniel Kurtz
2015-12-16 11:23 ` Daniel Kurtz
2015-12-17 19:23 ` Eduardo Valentin
2015-12-17 19:23 ` Eduardo Valentin
2015-12-17 19:23 ` Eduardo Valentin
2015-12-18 7:16 ` Sascha Hauer
2015-12-18 7:16 ` Sascha Hauer
2015-12-18 7:16 ` Sascha Hauer
2015-12-20 2:12 ` Eduardo Valentin
2015-12-20 2:12 ` Eduardo Valentin
2015-12-20 2:12 ` Eduardo Valentin
2015-11-18 8:24 [PATCH v11] Add Mediatek thermal support Sascha Hauer
2015-11-18 8:24 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-11-18 8:24 ` Sascha Hauer
2015-11-09 10:13 [PATCH v10] Add Mediatek thermal support Sascha Hauer
2015-11-09 10:13 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-11-09 10:13 ` Sascha Hauer
2015-11-09 10:13 ` Sascha Hauer
2015-11-09 15:59 ` Rob Herring
2015-11-09 15:59 ` Rob Herring
2015-08-31 7:34 [PATCH v8] Add Mediatek thermal support Sascha Hauer
2015-08-31 7:34 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-08-31 7:34 ` Sascha Hauer
2015-08-31 7:34 ` Sascha Hauer
2015-09-01 5:26 ` Sascha Hauer
2015-09-01 5:26 ` Sascha Hauer
2015-08-27 6:41 [PATCH v7] Add Mediatek thermal support Sascha Hauer
2015-08-27 6:41 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-08-27 11:49 ` Punit Agrawal
2015-08-27 11:49 ` Punit Agrawal
2015-08-28 2:23 ` Daniel Kurtz
2015-08-31 7:25 ` Sascha Hauer
2015-08-26 13:58 [PATCH v6] Add Mediatek thermal support Sascha Hauer
2015-08-26 13:58 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-08-20 8:05 [PATCH v5] Add Mediatek thermal support Sascha Hauer
2015-08-20 8:06 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-08-07 13:55 [PATCH v4] Add Mediatek thermal support Sascha Hauer
2015-08-07 13:55 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-08-05 12:25 [PATCH v3] Add Mediatek thermal support Sascha Hauer
2015-08-05 12:25 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-07-21 7:59 [PATCH v2] Add Mediatek thermal support Sascha Hauer
2015-07-21 7:59 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-07-21 7:59 ` Sascha Hauer
2015-07-13 10:34 [PATCH] thermal: Add Mediatek thermal support Sascha Hauer
2015-07-13 10:34 ` [PATCH 1/3] dt-bindings: thermal: Add binding document for Mediatek thermal controller Sascha Hauer
2015-07-13 10:34 ` Sascha Hauer
2015-07-15 17:41 ` Daniel Kurtz
2015-07-15 17:41 ` Daniel Kurtz
2015-07-15 17:41 ` Daniel Kurtz
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