[U-Boot] [PATCH 0/6] x86: pci: Various bug fixes/enhancements

[U-Boot] [PATCH 0/6] x86: pci: Various bug fixes/enhancements

[Bin Meng]

This series contains various bug fixes/enhancements to x86 pci related
VGA card support, as a result of attempting to support booting SeaBIOS.


Bin Meng (6):
  pci: Set PCI_COMMAND_IO bit for VGA device
  video: vesa_fb: Fix wrong return value check of pci_find_class()
  dm: pci: Fix pci_last_busno() to return the real last bus no
  dm: pci: Enable VGA address forwarding on bridges
  x86: ivybridge: Remove the dead codes that programs pci bridge
  x86: Allow disabling IGD on Intel Queensbay

 arch/x86/cpu/ivybridge/bd82x6x.c          | 32 -----------------------
 arch/x86/cpu/queensbay/Kconfig            |  8 ++++++
 arch/x86/cpu/queensbay/tnc.c              | 19 ++++++++++++++
 arch/x86/include/asm/arch-queensbay/tnc.h |  5 ++++
 drivers/pci/pci-uclass.c                  | 43 ++++++++++++++-----------------
 drivers/pci/pci_auto.c                    |  6 +++++
 drivers/video/vesa_fb.c                   |  2 +-
 include/configs/crownbay.h                |  1 +
 8 files changed, 59 insertions(+), 57 deletions(-)

-- 
1.8.2.1

[U-Boot] [PATCH 1/6] pci: Set PCI_COMMAND_IO bit for VGA device

[Bin Meng]

PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
to legacy VGA IO address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/pci/pci_auto.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 41d5447..e2c239e 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -89,6 +89,7 @@ void pciauto_setup_device(struct pci_controller *hose,
 	struct pci_region *bar_res;
 	int found_mem64 = 0;
 #endif
+	u16 class;
 
 	pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
 	cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER;
@@ -205,6 +206,11 @@ void pciauto_setup_device(struct pci_controller *hose,
 	}
 #endif
 
+	/* PCI_COMMAND_IO must be set for VGA device */
+	pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
+	if (class == PCI_CLASS_DISPLAY_VGA)
+		cmdstat |= PCI_COMMAND_IO;
+
 	pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
 	pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
 		CONFIG_SYS_PCI_CACHE_LINE_SIZE);
-- 
1.8.2.1

[U-Boot] [PATCH 2/6] video: vesa_fb: Fix wrong return value check of pci_find_class()

[Bin Meng]

When pci_find_class() fails to find a device, it returns -ENODEV.
But now we check the return value against -1. Fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/video/vesa_fb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/vesa_fb.c b/drivers/video/vesa_fb.c
index 4e6d070..a19651f 100644
--- a/drivers/video/vesa_fb.c
+++ b/drivers/video/vesa_fb.c
@@ -34,7 +34,7 @@ void *video_hw_init(void)
 	}
 	if (vbe_get_video_info(gdev)) {
 		dev = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0);
-		if (dev == -1) {
+		if (dev < 0) {
 			printf("no card detected\n");
 			return NULL;
 		}
-- 
1.8.2.1

[U-Boot] [PATCH 3/6] dm: pci: Fix pci_last_busno() to return the real last bus no

[Bin Meng]

Currently pci_last_busno() only checks the last bridge device
under the first UCLASS_PCI device. This is not the case when
there are multiple bridge devices.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/pci/pci-uclass.c | 25 +------------------------
 1 file changed, 1 insertion(+), 24 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 0756bbe..0035ac7 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -85,30 +85,7 @@ static int pci_get_bus_max(void)
 
 int pci_last_busno(void)
 {
-	struct pci_controller *hose;
-	struct udevice *bus;
-	struct uclass *uc;
-	int ret;
-
-	debug("pci_last_busno\n");
-	ret = uclass_get(UCLASS_PCI, &uc);
-	if (ret || list_empty(&uc->dev_head))
-		return -1;
-
-	/* Probe the last bus */
-	bus = list_entry(uc->dev_head.prev, struct udevice, uclass_node);
-	debug("bus = %p, %s\n", bus, bus->name);
-	assert(bus);
-	ret = device_probe(bus);
-	if (ret)
-		return ret;
-
-	/* If that bus has bridges, we may have new buses now. Get the last */
-	bus = list_entry(uc->dev_head.prev, struct udevice, uclass_node);
-	hose = dev_get_uclass_priv(bus);
-	debug("bus = %s, hose = %p\n", bus->name, hose);
-
-	return hose->last_busno;
+	return pci_get_bus_max();
 }
 
 int pci_get_ff(enum pci_size_t size)
-- 
1.8.2.1

[U-Boot] [PATCH 4/6] dm: pci: Enable VGA address forwarding on bridges

[Bin Meng]

To support graphics card behind a PCI bridge, the bridge control
register (offset 0x3e) in the configuration space must turn on
VGA address forwarding.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/pci/pci-uclass.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 0035ac7..7b01a13 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -364,9 +364,23 @@ int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
 	return 0;
 }
 
+static void set_vga_bridge_bits(struct udevice *dev)
+{
+	struct udevice *parent = dev->parent;
+	u16 bc;
+
+	while (parent->seq != 0) {
+		dm_pci_read_config16(parent, PCI_BRIDGE_CONTROL, &bc);
+		bc |= PCI_BRIDGE_CTL_VGA;
+		dm_pci_write_config16(parent, PCI_BRIDGE_CONTROL, bc);
+		parent = parent->parent;
+	}
+}
+
 int pci_auto_config_devices(struct udevice *bus)
 {
 	struct pci_controller *hose = bus->uclass_priv;
+	struct pci_child_platdata *pplat;
 	unsigned int sub_bus;
 	struct udevice *dev;
 	int ret;
@@ -382,6 +396,10 @@ int pci_auto_config_devices(struct udevice *bus)
 		debug("%s: device %s\n", __func__, dev->name);
 		max_bus = pciauto_config_device(hose, pci_get_bdf(dev));
 		sub_bus = max(sub_bus, max_bus);
+
+		pplat = dev_get_parent_platdata(dev);
+		if (pplat->class == (PCI_CLASS_DISPLAY_VGA << 8))
+			set_vga_bridge_bits(dev);
 	}
 	debug("%s: done\n", __func__);
 
-- 
1.8.2.1

[U-Boot] [PATCH 5/6] x86: ivybridge: Remove the dead codes that programs pci bridge

[Bin Meng]

Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/cpu/ivybridge/bd82x6x.c | 32 --------------------------------
 1 file changed, 32 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index ca8cccf..3e7a907 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -55,38 +55,6 @@ void bd82x6x_pci_init(pci_dev_t dev)
 	x86_pci_write_config16(dev, SECSTS, reg16);
 }
 
-#define PCI_BRIDGE_UPDATE_COMMAND
-void bd82x6x_pci_dev_enable_resources(pci_dev_t dev)
-{
-	uint16_t command;
-
-	command = x86_pci_read_config16(dev, PCI_COMMAND);
-	command |= PCI_COMMAND_IO;
-#ifdef PCI_BRIDGE_UPDATE_COMMAND
-	/*
-	 * If we write to PCI_COMMAND, on some systems this will cause the
-	 * ROM and APICs to become invisible.
-	 */
-	debug("%x cmd <- %02x\n", dev, command);
-	x86_pci_write_config16(dev, PCI_COMMAND, command);
-#else
-	printf("%s cmd <- %02x (NOT WRITTEN!)\n", dev_path(dev), command);
-#endif
-}
-
-void bd82x6x_pci_bus_enable_resources(pci_dev_t dev)
-{
-	uint16_t ctrl;
-
-	ctrl = x86_pci_read_config16(dev, PCI_BRIDGE_CONTROL);
-	ctrl |= PCI_COMMAND_IO;
-	ctrl |= PCI_BRIDGE_CTL_VGA;
-	debug("%x bridge ctrl <- %04x\n", dev, ctrl);
-	x86_pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
-
-	bd82x6x_pci_dev_enable_resources(dev);
-}
-
 static int bd82x6x_probe(struct udevice *dev)
 {
 	const void *blob = gd->fdt_blob;
-- 
1.8.2.1

[U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

[Bin Meng]

Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
based graphics card's VGA BIOS and use that for the graphics console.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
 arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
 arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
 include/configs/crownbay.h                |  1 +
 4 files changed, 33 insertions(+)

diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
index fbf85f2..6136d75 100644
--- a/arch/x86/cpu/queensbay/Kconfig
+++ b/arch/x86/cpu/queensbay/Kconfig
@@ -42,4 +42,12 @@ config CPU_ADDR_BITS
 	int
 	default 32
 
+config DISABLE_IGD
+	bool "Disable Integrated Graphics Device (IGD)"
+	help
+	  Disable the Integrated Graphics Device (IGD) so that it does not
+	  show in the PCI configuration space as a VGA disaplay controller.
+	  This gives a chance for U-Boot to run PCI/PCIe based graphics
+	  card's VGA BIOS and use that card for the graphics console.
+
 endif
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 9682cff..0c02a44 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
 	x86_pci_write_config32(TNC_LPC, 0xd8, bc);
 }
 
+static void __maybe_unused disable_igd(void)
+{
+	u32 gc;
+
+	gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
+	gc &= ~GMS_MASK;
+	gc |= VGA_DISABLE;
+	x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
+}
+
 int arch_cpu_init(void)
 {
 	int ret;
@@ -39,6 +49,15 @@ int arch_cpu_init(void)
 	return 0;
 }
 
+int arch_early_init_r(void)
+{
+#ifdef CONFIG_DISABLE_IGD
+	disable_igd();
+#endif
+
+	return 0;
+}
+
 void cpu_irq_init(void)
 {
 	struct tnc_rcba *rcba;
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
index ad9a6c4..2365394 100644
--- a/arch/x86/include/asm/arch-queensbay/tnc.h
+++ b/arch/x86/include/asm/arch-queensbay/tnc.h
@@ -7,6 +7,11 @@
 #ifndef _X86_ARCH_TNC_H_
 #define _X86_ARCH_TNC_H_
 
+/* IGD Control Register */
+#define IGD_GC		0x50
+#define VGA_DISABLE	0x00020000
+#define GMS_MASK	0x00700000
+
 /* Memory BAR Enable */
 #define MEM_BAR_EN	0x00000001
 
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 3153a74..7f91fff 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -15,6 +15,7 @@
 
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ARCH_EARLY_INIT_R
 #define CONFIG_ARCH_MISC_INIT
 
 #define CONFIG_SMSC_LPC47M
-- 
1.8.2.1

[U-Boot] [PATCH 1/6] pci: Set PCI_COMMAND_IO bit for VGA device

[Simon Glass]

On 1 October 2015 at 08:35, Bin Meng <bmeng.cn@gmail.com> wrote:
> PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
> to legacy VGA IO address.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/pci/pci_auto.c | 6 ++++++
>  1 file changed, 6 insertions(+)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 2/6] video: vesa_fb: Fix wrong return value check of pci_find_class()

[Simon Glass]

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
> When pci_find_class() fails to find a device, it returns -ENODEV.
> But now we check the return value against -1. Fix it.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/video/vesa_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 3/6] dm: pci: Fix pci_last_busno() to return the real last bus no

[Simon Glass]

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
> Currently pci_last_busno() only checks the last bridge device
> under the first UCLASS_PCI device. This is not the case when
> there are multiple bridge devices.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/pci/pci-uclass.c | 25 +------------------------
>  1 file changed, 1 insertion(+), 24 deletions(-)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 4/6] dm: pci: Enable VGA address forwarding on bridges

[Simon Glass]

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
> To support graphics card behind a PCI bridge, the bridge control
> register (offset 0x3e) in the configuration space must turn on
> VGA address forwarding.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/pci/pci-uclass.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 5/6] x86: ivybridge: Remove the dead codes that programs pci bridge

[Simon Glass]

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
> Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/cpu/ivybridge/bd82x6x.c | 32 --------------------------------
>  1 file changed, 32 deletions(-)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

[Simon Glass]

Hi Bin,

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
> so that it does not show in the PCI configuration space as a VGA
> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
> based graphics card's VGA BIOS and use that for the graphics console.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>  include/configs/crownbay.h                |  1 +
>  4 files changed, 33 insertions(+)

Acked-by: Simon Glass <sjg@chromium.org>

But do we really want configs for such device-specific things? I
wonder if device tree would be better. E.g. add 'status = "disabled"'
in the PCI node.

>
> diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
> index fbf85f2..6136d75 100644
> --- a/arch/x86/cpu/queensbay/Kconfig
> +++ b/arch/x86/cpu/queensbay/Kconfig
> @@ -42,4 +42,12 @@ config CPU_ADDR_BITS
>         int
>         default 32
>
> +config DISABLE_IGD
> +       bool "Disable Integrated Graphics Device (IGD)"
> +       help
> +         Disable the Integrated Graphics Device (IGD) so that it does not
> +         show in the PCI configuration space as a VGA disaplay controller.
> +         This gives a chance for U-Boot to run PCI/PCIe based graphics
> +         card's VGA BIOS and use that card for the graphics console.
> +
>  endif
> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
> index 9682cff..0c02a44 100644
> --- a/arch/x86/cpu/queensbay/tnc.c
> +++ b/arch/x86/cpu/queensbay/tnc.c
> @@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
>         x86_pci_write_config32(TNC_LPC, 0xd8, bc);
>  }
>
> +static void __maybe_unused disable_igd(void)
> +{
> +       u32 gc;
> +
> +       gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
> +       gc &= ~GMS_MASK;
> +       gc |= VGA_DISABLE;
> +       x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
> +}
> +
>  int arch_cpu_init(void)
>  {
>         int ret;
> @@ -39,6 +49,15 @@ int arch_cpu_init(void)
>         return 0;
>  }
>
> +int arch_early_init_r(void)
> +{
> +#ifdef CONFIG_DISABLE_IGD
> +       disable_igd();
> +#endif
> +
> +       return 0;
> +}
> +
>  void cpu_irq_init(void)
>  {
>         struct tnc_rcba *rcba;
> diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
> index ad9a6c4..2365394 100644
> --- a/arch/x86/include/asm/arch-queensbay/tnc.h
> +++ b/arch/x86/include/asm/arch-queensbay/tnc.h
> @@ -7,6 +7,11 @@
>  #ifndef _X86_ARCH_TNC_H_
>  #define _X86_ARCH_TNC_H_
>
> +/* IGD Control Register */
> +#define IGD_GC         0x50
> +#define VGA_DISABLE    0x00020000
> +#define GMS_MASK       0x00700000
> +
>  /* Memory BAR Enable */
>  #define MEM_BAR_EN     0x00000001
>
> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
> index 3153a74..7f91fff 100644
> --- a/include/configs/crownbay.h
> +++ b/include/configs/crownbay.h
> @@ -15,6 +15,7 @@
>
>  #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
>  #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_ARCH_EARLY_INIT_R
>  #define CONFIG_ARCH_MISC_INIT
>
>  #define CONFIG_SMSC_LPC47M
> --
> 1.8.2.1
>

Regards,
Simon

[U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

[Bin Meng]

Hi Simon,

On Sat, Oct 3, 2015 at 10:29 PM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>> so that it does not show in the PCI configuration space as a VGA
>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>> based graphics card's VGA BIOS and use that for the graphics console.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>>  include/configs/crownbay.h                |  1 +
>>  4 files changed, 33 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>
>
> But do we really want configs for such device-specific things? I
> wonder if device tree would be better. E.g. add 'status = "disabled"'
> in the PCI node.
>

I am not sure if I understand you correctly. To me 'status =
"disabled"' is a generic device binding, and when it comes to PCI
device, how do we define a device is in a 'disabled' state? Is it we
program the COMMAND register to disable bus master, mem and I/O
access? Or we program a chipset-specific register (Intel chipset
normally has such) to make it invisible from PCI configuration space
completely? And as you said, this is really chipset-specific thing, so
I chose to do via a platform-specific configuration macro, instead of
doing such work under a generic bindings ..

[snip]

Regards,
Bin

[U-Boot] [PATCH 2/6] video: vesa_fb: Fix wrong return value check of pci_find_class()

[Anatolij Gustschin]

On Thu,  1 Oct 2015 00:36:00 -0700
Bin Meng <bmeng.cn@gmail.com> wrote:

> When pci_find_class() fails to find a device, it returns -ENODEV.
> But now we check the return value against -1. Fix it.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
> 
>  drivers/video/vesa_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Anatolij Gustschin <agust@denx.de>

[U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

[Simon Glass]

Hi Bin,

On 7 October 2015 at 09:24, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Sat, Oct 3, 2015 at 10:29 PM, Simon Glass <sjg@chromium.org> wrote:
>> Hi Bin,
>>
>> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>>> so that it does not show in the PCI configuration space as a VGA
>>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>>> based graphics card's VGA BIOS and use that for the graphics console.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>
>>> ---
>>>
>>>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>>>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>>>  include/configs/crownbay.h                |  1 +
>>>  4 files changed, 33 insertions(+)
>>
>> Acked-by: Simon Glass <sjg@chromium.org>
>>
>> But do we really want configs for such device-specific things? I
>> wonder if device tree would be better. E.g. add 'status = "disabled"'
>> in the PCI node.
>>
>
> I am not sure if I understand you correctly. To me 'status =
> "disabled"' is a generic device binding, and when it comes to PCI
> device, how do we define a device is in a 'disabled' state? Is it we
> program the COMMAND register to disable bus master, mem and I/O
> access? Or we program a chipset-specific register (Intel chipset
> normally has such) to make it invisible from PCI configuration space
> completely? And as you said, this is really chipset-specific thing, so
> I chose to do via a platform-specific configuration macro, instead of
> doing such work under a generic bindings ..

Yes we don't have a good way to notice that a driver is disabled - it
will never be bound in that case.

If there were a driver for the SoC, then perhaps we could add config
options to that node. Then the chipset-specific SoC driver could do
the required init.

Regards,
Simon

[U-Boot] [PATCH 1/6] pci: Set PCI_COMMAND_IO bit for VGA device

[Simon Glass]

On 3 October 2015 at 08:29, Simon Glass <sjg@chromium.org> wrote:
> On 1 October 2015 at 08:35, Bin Meng <bmeng.cn@gmail.com> wrote:
>> PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
>> to legacy VGA IO address.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  drivers/pci/pci_auto.c | 6 ++++++
>>  1 file changed, 6 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH 2/6] video: vesa_fb: Fix wrong return value check of pci_find_class()

[Simon Glass]

On 7 October 2015 at 12:40, Anatolij Gustschin <agust@denx.de> wrote:
> On Thu,  1 Oct 2015 00:36:00 -0700
> Bin Meng <bmeng.cn@gmail.com> wrote:
>
>> When pci_find_class() fails to find a device, it returns -ENODEV.
>> But now we check the return value against -1. Fix it.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  drivers/video/vesa_fb.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> Acked-by: Anatolij Gustschin <agust@denx.de>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH 3/6] dm: pci: Fix pci_last_busno() to return the real last bus no

[Simon Glass]

On 3 October 2015 at 08:29, Simon Glass <sjg@chromium.org> wrote:
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Currently pci_last_busno() only checks the last bridge device
>> under the first UCLASS_PCI device. This is not the case when
>> there are multiple bridge devices.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  drivers/pci/pci-uclass.c | 25 +------------------------
>>  1 file changed, 1 insertion(+), 24 deletions(-)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH 4/6] dm: pci: Enable VGA address forwarding on bridges

[Simon Glass]

On 3 October 2015 at 08:29, Simon Glass <sjg@chromium.org> wrote:
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> To support graphics card behind a PCI bridge, the bridge control
>> register (offset 0x3e) in the configuration space must turn on
>> VGA address forwarding.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  drivers/pci/pci-uclass.c | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH 5/6] x86: ivybridge: Remove the dead codes that programs pci bridge

[Simon Glass]

On 3 October 2015 at 08:29, Simon Glass <sjg@chromium.org> wrote:
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/cpu/ivybridge/bd82x6x.c | 32 --------------------------------
>>  1 file changed, 32 deletions(-)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

[Simon Glass]

On 3 October 2015 at 08:29, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 1 October 2015 at 08:36, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
>> so that it does not show in the PCI configuration space as a VGA
>> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
>> based graphics card's VGA BIOS and use that for the graphics console.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>>  include/configs/crownbay.h                |  1 +
>>  4 files changed, 33 insertions(+)
>
> Acked-by: Simon Glass <sjg@chromium.org>
>
> But do we really want configs for such device-specific things? I
> wonder if device tree would be better. E.g. add 'status = "disabled"'
> in the PCI node.
>
>>
>> diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
>> index fbf85f2..6136d75 100644
>> --- a/arch/x86/cpu/queensbay/Kconfig
>> +++ b/arch/x86/cpu/queensbay/Kconfig
>> @@ -42,4 +42,12 @@ config CPU_ADDR_BITS
>>         int
>>         default 32
>>
>> +config DISABLE_IGD
>> +       bool "Disable Integrated Graphics Device (IGD)"
>> +       help
>> +         Disable the Integrated Graphics Device (IGD) so that it does not
>> +         show in the PCI configuration space as a VGA disaplay controller.
>> +         This gives a chance for U-Boot to run PCI/PCIe based graphics
>> +         card's VGA BIOS and use that card for the graphics console.
>> +
>>  endif
>> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
>> index 9682cff..0c02a44 100644
>> --- a/arch/x86/cpu/queensbay/tnc.c
>> +++ b/arch/x86/cpu/queensbay/tnc.c
>> @@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
>>         x86_pci_write_config32(TNC_LPC, 0xd8, bc);
>>  }
>>
>> +static void __maybe_unused disable_igd(void)
>> +{
>> +       u32 gc;
>> +
>> +       gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
>> +       gc &= ~GMS_MASK;
>> +       gc |= VGA_DISABLE;
>> +       x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
>> +}
>> +
>>  int arch_cpu_init(void)
>>  {
>>         int ret;
>> @@ -39,6 +49,15 @@ int arch_cpu_init(void)
>>         return 0;
>>  }
>>
>> +int arch_early_init_r(void)
>> +{
>> +#ifdef CONFIG_DISABLE_IGD
>> +       disable_igd();
>> +#endif
>> +
>> +       return 0;
>> +}
>> +
>>  void cpu_irq_init(void)
>>  {
>>         struct tnc_rcba *rcba;
>> diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
>> index ad9a6c4..2365394 100644
>> --- a/arch/x86/include/asm/arch-queensbay/tnc.h
>> +++ b/arch/x86/include/asm/arch-queensbay/tnc.h
>> @@ -7,6 +7,11 @@
>>  #ifndef _X86_ARCH_TNC_H_
>>  #define _X86_ARCH_TNC_H_
>>
>> +/* IGD Control Register */
>> +#define IGD_GC         0x50
>> +#define VGA_DISABLE    0x00020000
>> +#define GMS_MASK       0x00700000
>> +
>>  /* Memory BAR Enable */
>>  #define MEM_BAR_EN     0x00000001
>>
>> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
>> index 3153a74..7f91fff 100644
>> --- a/include/configs/crownbay.h
>> +++ b/include/configs/crownbay.h
>> @@ -15,6 +15,7 @@
>>
>>  #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
>>  #define CONFIG_BOARD_EARLY_INIT_F
>> +#define CONFIG_ARCH_EARLY_INIT_R
>>  #define CONFIG_ARCH_MISC_INIT
>>
>>  #define CONFIG_SMSC_LPC47M
>> --
>> 1.8.2.1
>>
>
> Regards,
> Simon

Applied to u-boot-x86, thanks!