[PATCH v4 0/4] mailbox: hisilicon: add Hi6220 mailbox driver

[PATCH v4 0/4] mailbox: hisilicon: add Hi6220 mailbox driver

[Leo Yan]

Hi6220 mailbox supports up to 32 channels. Each channel is unidirectional
with a maximum message size of 8 words. I/O is performed using register
access (there is no DMA) and the cell raises an interrupt when messages
are received.

This patch series is to implement Hi6220 mailbox driver. It registers
two channels into framework for communication with MCU, one is tx channel
and another is rx channel. Now mailbox driver is used to send message to
MCU to control dynamic voltage and frequency scaling for CPU, GPU and DDR.

Changes from v3:
* The patch series for enabling idle state for Hi6220 has reserved memory
  regions, so this series will not include it anymore
* Refined mailbox driver according to Jassi's suggestion;
  Removed kfifo from mailbox driver;
  Removed spinlock for ipc registers accessing, due every channel has its
  own dedicated bit in ipc register and readl/writel will introduce memory
  barrier, so don't need spinlock to protect ipc registers accessing
* After mailbox driver is ready, can use patch 4 to enable CPU's OPPs and
  stub clock driver; finally can enable CPUFreq driver for CPU frequency
  scaling

Changes from v2:
* Get rid of unused memory regions from memory node in DT, and don't use
  reserved-memory node according to Mark and Leif's suggestion; Haojian also
  has updated UEFI for efi memory info

Changes from v1:
* Correct lock usage for SMP scenario

Changes from RFC:
* According to Jassi's review, totally remove the abstract common driver
  layer and only commit driver dedicated for Hi6220
* According to Paul Bolle's review, fix typo issue for Kconfig and remove
  unnecessary dependency with OF and fix minor for mailbox driver
* Refine a little for dts nodes


Leo Yan (4):
  dt-bindings: mailbox: Document Hi6220 mailbox driver
  mailbox: Hi6220: add mailbox driver
  arm64: dts: add mailbox node for Hi6220
  arm64: dts: add Hi6220's stub clock node

 .../bindings/mailbox/hisilicon,hi6220-mailbox.txt  |  57 ++++
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi          |  31 ++
 drivers/mailbox/Kconfig                            |   8 +
 drivers/mailbox/Makefile                           |   2 +
 drivers/mailbox/hi6220-mailbox.c                   | 371 +++++++++++++++++++++
 5 files changed, 469 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
 create mode 100644 drivers/mailbox/hi6220-mailbox.c

-- 
1.9.1

[PATCH v4 0/4] mailbox: hisilicon: add Hi6220 mailbox driver

[Leo Yan]

Hi6220 mailbox supports up to 32 channels. Each channel is unidirectional
with a maximum message size of 8 words. I/O is performed using register
access (there is no DMA) and the cell raises an interrupt when messages
are received.

This patch series is to implement Hi6220 mailbox driver. It registers
two channels into framework for communication with MCU, one is tx channel
and another is rx channel. Now mailbox driver is used to send message to
MCU to control dynamic voltage and frequency scaling for CPU, GPU and DDR.

Changes from v3:
* The patch series for enabling idle state for Hi6220 has reserved memory
  regions, so this series will not include it anymore
* Refined mailbox driver according to Jassi's suggestion;
  Removed kfifo from mailbox driver;
  Removed spinlock for ipc registers accessing, due every channel has its
  own dedicated bit in ipc register and readl/writel will introduce memory
  barrier, so don't need spinlock to protect ipc registers accessing
* After mailbox driver is ready, can use patch 4 to enable CPU's OPPs and
  stub clock driver; finally can enable CPUFreq driver for CPU frequency
  scaling

Changes from v2:
* Get rid of unused memory regions from memory node in DT, and don't use
  reserved-memory node according to Mark and Leif's suggestion; Haojian also
  has updated UEFI for efi memory info

Changes from v1:
* Correct lock usage for SMP scenario

Changes from RFC:
* According to Jassi's review, totally remove the abstract common driver
  layer and only commit driver dedicated for Hi6220
* According to Paul Bolle's review, fix typo issue for Kconfig and remove
  unnecessary dependency with OF and fix minor for mailbox driver
* Refine a little for dts nodes


Leo Yan (4):
  dt-bindings: mailbox: Document Hi6220 mailbox driver
  mailbox: Hi6220: add mailbox driver
  arm64: dts: add mailbox node for Hi6220
  arm64: dts: add Hi6220's stub clock node

 .../bindings/mailbox/hisilicon,hi6220-mailbox.txt  |  57 ++++
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi          |  31 ++
 drivers/mailbox/Kconfig                            |   8 +
 drivers/mailbox/Makefile                           |   2 +
 drivers/mailbox/hi6220-mailbox.c                   | 371 +++++++++++++++++++++
 5 files changed, 469 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
 create mode 100644 drivers/mailbox/hi6220-mailbox.c

-- 
1.9.1

[PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Leo Yan]

Document the new compatible for Hisilicon Hi6220 mailbox driver.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 .../bindings/mailbox/hisilicon,hi6220-mailbox.txt  | 57 ++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt

diff --git a/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt b/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
new file mode 100644
index 0000000..3dfb0b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
@@ -0,0 +1,57 @@
+Hisilicon Hi6220 Mailbox Driver
+===============================
+
+Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
+is unidirectional with a maximum message size of 8 words. I/O is
+performed using register access (there is no DMA) and the cell
+raises an interrupt when messages are received.
+
+Mailbox Device Node:
+====================
+
+Required properties:
+--------------------
+- compatible:		Shall be "hisilicon,hi6220-mbox"
+- reg:			Contains the mailbox register address range (base
+			address and length); the first item is for IPC
+			registers, the second item is shared buffer for
+			slots.
+- #mbox-cells		Common mailbox binding property to identify the number
+			of cells required for the mailbox specifier. Should be 1.
+- interrupts:		Contains the interrupt information for the mailbox
+			device. The format is dependent on which interrupt
+			controller the SoCs use.
+
+Example:
+--------
+
+	mailbox: mailbox@F7510000 {
+		#mbox-cells = <1>;
+		compatible = "hisilicon,hi6220-mbox";
+		reg = <0x0 0xF7510000 0x0 0x1000>, /* IPC_S */
+		      <0x0 0x06DFF800 0x0 0x0800>; /* Mailbox */
+		interrupt-parent = <&gic>;
+		interrupts = <0 94 4>;
+	};
+
+
+Mailbox client
+===============
+
+"mboxes" and the optional "mbox-names" (please see
+Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
+of the mboxes property should contain a phandle to the mailbox controller
+device node and second argument is the channel index. It must be 0 (hardware
+support only one channel). The equivalent "mbox-names" property value can be
+used to give a name to the communication channel to be used by the client user.
+
+Example:
+--------
+
+	stub_clock: stub_clock {
+		compatible = "hisilicon,hi6220-stub-clk";
+		hisilicon,hi6220-clk-sram = <&sram>;
+		#clock-cells = <1>;
+		mbox-names = "mbox-tx";
+		mboxes = <&mailbox 1>;
+	};
-- 
1.9.1

[PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Leo Yan]

Document the new compatible for Hisilicon Hi6220 mailbox driver.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 .../bindings/mailbox/hisilicon,hi6220-mailbox.txt  | 57 ++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt

diff --git a/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt b/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
new file mode 100644
index 0000000..3dfb0b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
@@ -0,0 +1,57 @@
+Hisilicon Hi6220 Mailbox Driver
+===============================
+
+Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
+is unidirectional with a maximum message size of 8 words. I/O is
+performed using register access (there is no DMA) and the cell
+raises an interrupt when messages are received.
+
+Mailbox Device Node:
+====================
+
+Required properties:
+--------------------
+- compatible:		Shall be "hisilicon,hi6220-mbox"
+- reg:			Contains the mailbox register address range (base
+			address and length); the first item is for IPC
+			registers, the second item is shared buffer for
+			slots.
+- #mbox-cells		Common mailbox binding property to identify the number
+			of cells required for the mailbox specifier. Should be 1.
+- interrupts:		Contains the interrupt information for the mailbox
+			device. The format is dependent on which interrupt
+			controller the SoCs use.
+
+Example:
+--------
+
+	mailbox: mailbox at F7510000 {
+		#mbox-cells = <1>;
+		compatible = "hisilicon,hi6220-mbox";
+		reg = <0x0 0xF7510000 0x0 0x1000>, /* IPC_S */
+		      <0x0 0x06DFF800 0x0 0x0800>; /* Mailbox */
+		interrupt-parent = <&gic>;
+		interrupts = <0 94 4>;
+	};
+
+
+Mailbox client
+===============
+
+"mboxes" and the optional "mbox-names" (please see
+Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
+of the mboxes property should contain a phandle to the mailbox controller
+device node and second argument is the channel index. It must be 0 (hardware
+support only one channel). The equivalent "mbox-names" property value can be
+used to give a name to the communication channel to be used by the client user.
+
+Example:
+--------
+
+	stub_clock: stub_clock {
+		compatible = "hisilicon,hi6220-stub-clk";
+		hisilicon,hi6220-clk-sram = <&sram>;
+		#clock-cells = <1>;
+		mbox-names = "mbox-tx";
+		mboxes = <&mailbox 1>;
+	};
-- 
1.9.1

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

Add driver for Hi6220 mailbox, the mailbox communicates with MCU; for
sending data, it can support two methods for low level implementation:
one is to use interrupt as acknowledge, another is automatic mode which
without any acknowledge. These two methods have been supported in the
driver. For receiving data, it will depend on the interrupt to notify
the channel has incoming message.

Now mailbox driver is used to send message to MCU to control dynamic
voltage and frequency scaling for CPU, GPU and DDR.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 drivers/mailbox/Kconfig          |   8 +
 drivers/mailbox/Makefile         |   2 +
 drivers/mailbox/hi6220-mailbox.c | 371 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 381 insertions(+)
 create mode 100644 drivers/mailbox/hi6220-mailbox.c

diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index bbec500..41fb7fa 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -71,4 +71,12 @@ config BCM2835_MBOX
 	  the services of the Videocore. Say Y here if you want to use the
 	  BCM2835 Mailbox.
 
+config HI6220_MBOX
+	tristate "Hi6220 Mailbox"
+	depends on ARCH_HISI
+	help
+	  An implementation of the hi6220 mailbox. It is used to send message
+	  between application processors and MCU. Say Y here if you want to build
+	  the Hi6220 mailbox controller driver.
+
 endif
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 8e6d822..4ba9f5f 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -13,3 +13,5 @@ obj-$(CONFIG_PCC)		+= pcc.o
 obj-$(CONFIG_ALTERA_MBOX)	+= mailbox-altera.o
 
 obj-$(CONFIG_BCM2835_MBOX)	+= bcm2835-mailbox.o
+
+obj-$(CONFIG_HI6220_MBOX)	+= hi6220-mailbox.o
diff --git a/drivers/mailbox/hi6220-mailbox.c b/drivers/mailbox/hi6220-mailbox.c
new file mode 100644
index 0000000..c0e19d5
--- /dev/null
+++ b/drivers/mailbox/hi6220-mailbox.c
@@ -0,0 +1,371 @@
+/*
+ * Hisilicon's Hi6220 mailbox driver
+ *
+ * Copyright (c) 2015 Hisilicon Limited.
+ * Copyright (c) 2015 Linaro Limited.
+ *
+ * Author: Leo Yan <leo.yan@linaro.org>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kfifo.h>
+#include <linux/mailbox_controller.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#define MBOX_CHAN_MAX			32
+#define MBOX_CHAN_NUM			2
+
+#define MBOX_RX				0x0
+#define MBOX_TX				0x1
+
+/* Mailbox message length: 8 words */
+#define MBOX_MSG_LEN			8
+
+/* Mailbox Registers */
+#define MBOX_OFF(m)			(0x40 * (m))
+#define MBOX_MODE_REG(m)		(MBOX_OFF(m) + 0x0)
+#define MBOX_DATA_REG(m)		(MBOX_OFF(m) + 0x4)
+
+#define MBOX_STATE_MASK			(0xF << 4)
+#define MBOX_STATE_IDLE			(0x1 << 4)
+#define MBOX_STATE_TX			(0x2 << 4)
+#define MBOX_STATE_RX			(0x4 << 4)
+#define MBOX_STATE_ACK			(0x8 << 4)
+#define MBOX_ACK_CONFIG_MASK		(0x1 << 0)
+#define MBOX_ACK_AUTOMATIC		(0x1 << 0)
+#define MBOX_ACK_IRQ			(0x0 << 0)
+
+/* IPC registers */
+#define ACK_INT_RAW_REG(i)		((i) + 0x400)
+#define ACK_INT_MSK_REG(i)		((i) + 0x404)
+#define ACK_INT_STAT_REG(i)		((i) + 0x408)
+#define ACK_INT_CLR_REG(i)		((i) + 0x40c)
+#define ACK_INT_ENA_REG(i)		((i) + 0x500)
+#define ACK_INT_DIS_REG(i)		((i) + 0x504)
+#define DST_INT_RAW_REG(i)		((i) + 0x420)
+
+
+struct hi6220_mbox_chan {
+
+	/*
+	 * Description for channel's hardware info:
+	 *  - direction: tx or rx
+	 *  - dst irq: peer core's irq number
+	 *  - ack irq: local irq number
+	 *  - slot number
+	 */
+	unsigned int dir, dst_irq, ack_irq;
+	unsigned int slot;
+
+	struct hi6220_mbox *parent;
+};
+
+struct hi6220_mbox {
+	struct device *dev;
+
+	int irq;
+
+	/* flag of enabling tx's irq mode */
+	bool tx_irq_mode;
+
+	/* region for ipc event */
+	void __iomem *ipc;
+
+	/* region for mailbox */
+	void __iomem *base;
+
+	unsigned int chan_num;
+	struct hi6220_mbox_chan *mchan;
+
+	void *irq_map_chan[MBOX_CHAN_MAX];
+	struct mbox_chan *chan;
+	struct mbox_controller controller;
+};
+
+static void mbox_set_state(struct hi6220_mbox *mbox,
+			   unsigned int slot, u32 val)
+{
+	u32 status;
+
+	status = readl(mbox->base + MBOX_MODE_REG(slot));
+	status = (status & ~MBOX_STATE_MASK) | val;
+	writel(status, mbox->base + MBOX_MODE_REG(slot));
+}
+
+static void mbox_set_mode(struct hi6220_mbox *mbox,
+			  unsigned int slot, u32 val)
+{
+	u32 mode;
+
+	mode = readl(mbox->base + MBOX_MODE_REG(slot));
+	mode = (mode & ~MBOX_ACK_CONFIG_MASK) | val;
+	writel(mode, mbox->base + MBOX_MODE_REG(slot));
+}
+
+static bool hi6220_mbox_last_tx_done(struct mbox_chan *chan)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+	u32 state;
+
+	/* Only set idle state for polling mode */
+	BUG_ON(mbox->tx_irq_mode);
+
+	state = readl(mbox->base + MBOX_MODE_REG(mchan->slot));
+	return ((state & MBOX_STATE_MASK) == MBOX_STATE_IDLE);
+}
+
+static int hi6220_mbox_send_data(struct mbox_chan *chan, void *msg)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+	unsigned int slot = mchan->slot;
+	u32 *buf = msg;
+	int i;
+
+	mbox_set_state(mbox, slot, MBOX_STATE_TX);
+
+	if (mbox->tx_irq_mode)
+		mbox_set_mode(mbox, slot, MBOX_ACK_IRQ);
+	else
+		mbox_set_mode(mbox, slot, MBOX_ACK_AUTOMATIC);
+
+	for (i = 0; i < MBOX_MSG_LEN; i++)
+		writel(buf[i], mbox->base + MBOX_DATA_REG(slot) + i * 4);
+
+	/* trigger remote request */
+	writel(BIT(mchan->dst_irq), DST_INT_RAW_REG(mbox->ipc));
+	return 0;
+}
+
+static irqreturn_t hi6220_mbox_interrupt(int irq, void *p)
+{
+	struct hi6220_mbox *mbox = p;
+	struct hi6220_mbox_chan *mchan;
+	struct mbox_chan *chan;
+	unsigned int state, intr_bit, i;
+	u32 msg[MBOX_MSG_LEN];
+
+	state = readl(ACK_INT_STAT_REG(mbox->ipc));
+	if (!state) {
+		dev_warn(mbox->dev, "%s: spurious interrupt\n",
+			 __func__);
+		return IRQ_HANDLED;
+	}
+
+	while (state) {
+		intr_bit = __ffs(state);
+		state &= (state - 1);
+
+		chan = mbox->irq_map_chan[intr_bit];
+		if (!chan) {
+			dev_warn(mbox->dev, "%s: unexpected irq vector %d\n",
+				 __func__, intr_bit);
+			continue;
+		}
+
+		mchan = chan->con_priv;
+		if (mchan->dir == MBOX_TX)
+			mbox_chan_txdone(chan, 0);
+		else {
+			for (i = 0; i < MBOX_MSG_LEN; i++)
+				msg[i] = readl(mbox->base +
+					MBOX_DATA_REG(mchan->slot) + i * 4);
+
+			mbox_chan_received_data(chan, (void *)msg);
+		}
+
+		/* clear IRQ source */
+		writel(BIT(mchan->ack_irq), ACK_INT_CLR_REG(mbox->ipc));
+		mbox_set_state(mbox, mchan->slot, MBOX_STATE_IDLE);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int hi6220_mbox_startup(struct mbox_chan *chan)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+
+	mbox->irq_map_chan[mchan->ack_irq] = (void *)chan;
+
+	/* enable interrupt */
+	writel(BIT(mchan->ack_irq), ACK_INT_ENA_REG(mbox->ipc));
+	return 0;
+}
+
+static void hi6220_mbox_shutdown(struct mbox_chan *chan)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+
+	/* disable interrupt */
+	writel(BIT(mchan->ack_irq), ACK_INT_DIS_REG(mbox->ipc));
+	mbox->irq_map_chan[mchan->ack_irq] = NULL;
+}
+
+static struct mbox_chan_ops hi6220_mbox_chan_ops = {
+	.send_data    = hi6220_mbox_send_data,
+	.startup      = hi6220_mbox_startup,
+	.shutdown     = hi6220_mbox_shutdown,
+	.last_tx_done = hi6220_mbox_last_tx_done,
+};
+
+static void hi6220_mbox_init_hw(struct hi6220_mbox *mbox)
+{
+	struct hi6220_mbox_chan init_data[MBOX_CHAN_NUM] = {
+		{ MBOX_RX, 1, 10 },
+		{ MBOX_TX, 0, 11 },
+	};
+	struct hi6220_mbox_chan *mchan = mbox->mchan;
+	int i;
+
+	for (i = 0; i < MBOX_CHAN_NUM; i++) {
+		memcpy(&mchan[i], &init_data[i], sizeof(*mchan));
+		mchan[i].slot = i;
+		mchan[i].parent = mbox;
+	}
+
+	/* mask and clear all interrupt vectors */
+	writel(0x0,  ACK_INT_MSK_REG(mbox->ipc));
+	writel(~0x0, ACK_INT_CLR_REG(mbox->ipc));
+
+	/* use interrupt for tx's ack */
+	mbox->tx_irq_mode = true;
+}
+
+static const struct of_device_id hi6220_mbox_of_match[] = {
+	{ .compatible = "hisilicon,hi6220-mbox", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, hi6220_mbox_of_match);
+
+static int hi6220_mbox_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct hi6220_mbox *mbox;
+	struct resource *res;
+	int i, err;
+
+	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
+	if (!mbox)
+		return -ENOMEM;
+
+	mbox->dev = dev;
+	mbox->chan_num = MBOX_CHAN_NUM;
+	mbox->mchan = devm_kzalloc(dev,
+		mbox->chan_num * sizeof(*mbox->mchan), GFP_KERNEL);
+	if (!mbox->mchan)
+		return -ENOMEM;
+
+	mbox->chan = devm_kzalloc(dev,
+		mbox->chan_num * sizeof(*mbox->chan), GFP_KERNEL);
+	if (!mbox->chan)
+		return -ENOMEM;
+
+	mbox->irq = platform_get_irq(pdev, 0);
+	if (mbox->irq < 0)
+		return mbox->irq;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mbox->ipc = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mbox->ipc)) {
+		dev_err(dev, "ioremap ipc failed\n");
+		return PTR_ERR(mbox->ipc);
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+	mbox->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mbox->base)) {
+		dev_err(dev, "ioremap buffer failed\n");
+		return PTR_ERR(mbox->base);
+	}
+
+	err = devm_request_irq(dev, mbox->irq, hi6220_mbox_interrupt, 0,
+			dev_name(dev), mbox);
+	if (err) {
+		dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
+			err);
+		return -ENODEV;
+	}
+
+	/* init hardware parameters */
+	hi6220_mbox_init_hw(mbox);
+
+	for (i = 0; i < mbox->chan_num; i++) {
+		mbox->chan[i].con_priv = &mbox->mchan[i];
+		mbox->irq_map_chan[i] = NULL;
+	}
+
+	mbox->controller.dev = dev;
+	mbox->controller.chans = &mbox->chan[0];
+	mbox->controller.num_chans = mbox->chan_num;
+	mbox->controller.ops = &hi6220_mbox_chan_ops;
+
+	if (mbox->tx_irq_mode)
+		mbox->controller.txdone_irq = true;
+	else {
+		mbox->controller.txdone_poll = true;
+		mbox->controller.txpoll_period = 5;
+	}
+
+	err = mbox_controller_register(&mbox->controller);
+	if (err) {
+		dev_err(dev, "Failed to register mailbox %d\n", err);
+		return err;
+	}
+
+	platform_set_drvdata(pdev, mbox);
+	dev_info(dev, "Mailbox enabled\n");
+	return 0;
+}
+
+static int hi6220_mbox_remove(struct platform_device *pdev)
+{
+	struct hi6220_mbox *mbox = platform_get_drvdata(pdev);
+
+	mbox_controller_unregister(&mbox->controller);
+	return 0;
+}
+
+static struct platform_driver hi6220_mbox_driver = {
+	.driver = {
+		.name = "hi6220-mbox",
+		.owner = THIS_MODULE,
+		.of_match_table = hi6220_mbox_of_match,
+	},
+	.probe	= hi6220_mbox_probe,
+	.remove	= hi6220_mbox_remove,
+};
+
+static int __init hi6220_mbox_init(void)
+{
+	return platform_driver_register(&hi6220_mbox_driver);
+}
+core_initcall(hi6220_mbox_init);
+
+static void __exit hi6220_mbox_exit(void)
+{
+	platform_driver_unregister(&hi6220_mbox_driver);
+}
+module_exit(hi6220_mbox_exit);
+
+MODULE_AUTHOR("Leo Yan <leo.yan@linaro.org>");
+MODULE_DESCRIPTION("Hi6220 mailbox driver");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

Add driver for Hi6220 mailbox, the mailbox communicates with MCU; for
sending data, it can support two methods for low level implementation:
one is to use interrupt as acknowledge, another is automatic mode which
without any acknowledge. These two methods have been supported in the
driver. For receiving data, it will depend on the interrupt to notify
the channel has incoming message.

Now mailbox driver is used to send message to MCU to control dynamic
voltage and frequency scaling for CPU, GPU and DDR.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 drivers/mailbox/Kconfig          |   8 +
 drivers/mailbox/Makefile         |   2 +
 drivers/mailbox/hi6220-mailbox.c | 371 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 381 insertions(+)
 create mode 100644 drivers/mailbox/hi6220-mailbox.c

diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index bbec500..41fb7fa 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -71,4 +71,12 @@ config BCM2835_MBOX
 	  the services of the Videocore. Say Y here if you want to use the
 	  BCM2835 Mailbox.
 
+config HI6220_MBOX
+	tristate "Hi6220 Mailbox"
+	depends on ARCH_HISI
+	help
+	  An implementation of the hi6220 mailbox. It is used to send message
+	  between application processors and MCU. Say Y here if you want to build
+	  the Hi6220 mailbox controller driver.
+
 endif
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 8e6d822..4ba9f5f 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -13,3 +13,5 @@ obj-$(CONFIG_PCC)		+= pcc.o
 obj-$(CONFIG_ALTERA_MBOX)	+= mailbox-altera.o
 
 obj-$(CONFIG_BCM2835_MBOX)	+= bcm2835-mailbox.o
+
+obj-$(CONFIG_HI6220_MBOX)	+= hi6220-mailbox.o
diff --git a/drivers/mailbox/hi6220-mailbox.c b/drivers/mailbox/hi6220-mailbox.c
new file mode 100644
index 0000000..c0e19d5
--- /dev/null
+++ b/drivers/mailbox/hi6220-mailbox.c
@@ -0,0 +1,371 @@
+/*
+ * Hisilicon's Hi6220 mailbox driver
+ *
+ * Copyright (c) 2015 Hisilicon Limited.
+ * Copyright (c) 2015 Linaro Limited.
+ *
+ * Author: Leo Yan <leo.yan@linaro.org>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kfifo.h>
+#include <linux/mailbox_controller.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#define MBOX_CHAN_MAX			32
+#define MBOX_CHAN_NUM			2
+
+#define MBOX_RX				0x0
+#define MBOX_TX				0x1
+
+/* Mailbox message length: 8 words */
+#define MBOX_MSG_LEN			8
+
+/* Mailbox Registers */
+#define MBOX_OFF(m)			(0x40 * (m))
+#define MBOX_MODE_REG(m)		(MBOX_OFF(m) + 0x0)
+#define MBOX_DATA_REG(m)		(MBOX_OFF(m) + 0x4)
+
+#define MBOX_STATE_MASK			(0xF << 4)
+#define MBOX_STATE_IDLE			(0x1 << 4)
+#define MBOX_STATE_TX			(0x2 << 4)
+#define MBOX_STATE_RX			(0x4 << 4)
+#define MBOX_STATE_ACK			(0x8 << 4)
+#define MBOX_ACK_CONFIG_MASK		(0x1 << 0)
+#define MBOX_ACK_AUTOMATIC		(0x1 << 0)
+#define MBOX_ACK_IRQ			(0x0 << 0)
+
+/* IPC registers */
+#define ACK_INT_RAW_REG(i)		((i) + 0x400)
+#define ACK_INT_MSK_REG(i)		((i) + 0x404)
+#define ACK_INT_STAT_REG(i)		((i) + 0x408)
+#define ACK_INT_CLR_REG(i)		((i) + 0x40c)
+#define ACK_INT_ENA_REG(i)		((i) + 0x500)
+#define ACK_INT_DIS_REG(i)		((i) + 0x504)
+#define DST_INT_RAW_REG(i)		((i) + 0x420)
+
+
+struct hi6220_mbox_chan {
+
+	/*
+	 * Description for channel's hardware info:
+	 *  - direction: tx or rx
+	 *  - dst irq: peer core's irq number
+	 *  - ack irq: local irq number
+	 *  - slot number
+	 */
+	unsigned int dir, dst_irq, ack_irq;
+	unsigned int slot;
+
+	struct hi6220_mbox *parent;
+};
+
+struct hi6220_mbox {
+	struct device *dev;
+
+	int irq;
+
+	/* flag of enabling tx's irq mode */
+	bool tx_irq_mode;
+
+	/* region for ipc event */
+	void __iomem *ipc;
+
+	/* region for mailbox */
+	void __iomem *base;
+
+	unsigned int chan_num;
+	struct hi6220_mbox_chan *mchan;
+
+	void *irq_map_chan[MBOX_CHAN_MAX];
+	struct mbox_chan *chan;
+	struct mbox_controller controller;
+};
+
+static void mbox_set_state(struct hi6220_mbox *mbox,
+			   unsigned int slot, u32 val)
+{
+	u32 status;
+
+	status = readl(mbox->base + MBOX_MODE_REG(slot));
+	status = (status & ~MBOX_STATE_MASK) | val;
+	writel(status, mbox->base + MBOX_MODE_REG(slot));
+}
+
+static void mbox_set_mode(struct hi6220_mbox *mbox,
+			  unsigned int slot, u32 val)
+{
+	u32 mode;
+
+	mode = readl(mbox->base + MBOX_MODE_REG(slot));
+	mode = (mode & ~MBOX_ACK_CONFIG_MASK) | val;
+	writel(mode, mbox->base + MBOX_MODE_REG(slot));
+}
+
+static bool hi6220_mbox_last_tx_done(struct mbox_chan *chan)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+	u32 state;
+
+	/* Only set idle state for polling mode */
+	BUG_ON(mbox->tx_irq_mode);
+
+	state = readl(mbox->base + MBOX_MODE_REG(mchan->slot));
+	return ((state & MBOX_STATE_MASK) == MBOX_STATE_IDLE);
+}
+
+static int hi6220_mbox_send_data(struct mbox_chan *chan, void *msg)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+	unsigned int slot = mchan->slot;
+	u32 *buf = msg;
+	int i;
+
+	mbox_set_state(mbox, slot, MBOX_STATE_TX);
+
+	if (mbox->tx_irq_mode)
+		mbox_set_mode(mbox, slot, MBOX_ACK_IRQ);
+	else
+		mbox_set_mode(mbox, slot, MBOX_ACK_AUTOMATIC);
+
+	for (i = 0; i < MBOX_MSG_LEN; i++)
+		writel(buf[i], mbox->base + MBOX_DATA_REG(slot) + i * 4);
+
+	/* trigger remote request */
+	writel(BIT(mchan->dst_irq), DST_INT_RAW_REG(mbox->ipc));
+	return 0;
+}
+
+static irqreturn_t hi6220_mbox_interrupt(int irq, void *p)
+{
+	struct hi6220_mbox *mbox = p;
+	struct hi6220_mbox_chan *mchan;
+	struct mbox_chan *chan;
+	unsigned int state, intr_bit, i;
+	u32 msg[MBOX_MSG_LEN];
+
+	state = readl(ACK_INT_STAT_REG(mbox->ipc));
+	if (!state) {
+		dev_warn(mbox->dev, "%s: spurious interrupt\n",
+			 __func__);
+		return IRQ_HANDLED;
+	}
+
+	while (state) {
+		intr_bit = __ffs(state);
+		state &= (state - 1);
+
+		chan = mbox->irq_map_chan[intr_bit];
+		if (!chan) {
+			dev_warn(mbox->dev, "%s: unexpected irq vector %d\n",
+				 __func__, intr_bit);
+			continue;
+		}
+
+		mchan = chan->con_priv;
+		if (mchan->dir == MBOX_TX)
+			mbox_chan_txdone(chan, 0);
+		else {
+			for (i = 0; i < MBOX_MSG_LEN; i++)
+				msg[i] = readl(mbox->base +
+					MBOX_DATA_REG(mchan->slot) + i * 4);
+
+			mbox_chan_received_data(chan, (void *)msg);
+		}
+
+		/* clear IRQ source */
+		writel(BIT(mchan->ack_irq), ACK_INT_CLR_REG(mbox->ipc));
+		mbox_set_state(mbox, mchan->slot, MBOX_STATE_IDLE);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int hi6220_mbox_startup(struct mbox_chan *chan)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+
+	mbox->irq_map_chan[mchan->ack_irq] = (void *)chan;
+
+	/* enable interrupt */
+	writel(BIT(mchan->ack_irq), ACK_INT_ENA_REG(mbox->ipc));
+	return 0;
+}
+
+static void hi6220_mbox_shutdown(struct mbox_chan *chan)
+{
+	struct hi6220_mbox_chan *mchan = chan->con_priv;
+	struct hi6220_mbox *mbox = mchan->parent;
+
+	/* disable interrupt */
+	writel(BIT(mchan->ack_irq), ACK_INT_DIS_REG(mbox->ipc));
+	mbox->irq_map_chan[mchan->ack_irq] = NULL;
+}
+
+static struct mbox_chan_ops hi6220_mbox_chan_ops = {
+	.send_data    = hi6220_mbox_send_data,
+	.startup      = hi6220_mbox_startup,
+	.shutdown     = hi6220_mbox_shutdown,
+	.last_tx_done = hi6220_mbox_last_tx_done,
+};
+
+static void hi6220_mbox_init_hw(struct hi6220_mbox *mbox)
+{
+	struct hi6220_mbox_chan init_data[MBOX_CHAN_NUM] = {
+		{ MBOX_RX, 1, 10 },
+		{ MBOX_TX, 0, 11 },
+	};
+	struct hi6220_mbox_chan *mchan = mbox->mchan;
+	int i;
+
+	for (i = 0; i < MBOX_CHAN_NUM; i++) {
+		memcpy(&mchan[i], &init_data[i], sizeof(*mchan));
+		mchan[i].slot = i;
+		mchan[i].parent = mbox;
+	}
+
+	/* mask and clear all interrupt vectors */
+	writel(0x0,  ACK_INT_MSK_REG(mbox->ipc));
+	writel(~0x0, ACK_INT_CLR_REG(mbox->ipc));
+
+	/* use interrupt for tx's ack */
+	mbox->tx_irq_mode = true;
+}
+
+static const struct of_device_id hi6220_mbox_of_match[] = {
+	{ .compatible = "hisilicon,hi6220-mbox", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, hi6220_mbox_of_match);
+
+static int hi6220_mbox_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct hi6220_mbox *mbox;
+	struct resource *res;
+	int i, err;
+
+	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
+	if (!mbox)
+		return -ENOMEM;
+
+	mbox->dev = dev;
+	mbox->chan_num = MBOX_CHAN_NUM;
+	mbox->mchan = devm_kzalloc(dev,
+		mbox->chan_num * sizeof(*mbox->mchan), GFP_KERNEL);
+	if (!mbox->mchan)
+		return -ENOMEM;
+
+	mbox->chan = devm_kzalloc(dev,
+		mbox->chan_num * sizeof(*mbox->chan), GFP_KERNEL);
+	if (!mbox->chan)
+		return -ENOMEM;
+
+	mbox->irq = platform_get_irq(pdev, 0);
+	if (mbox->irq < 0)
+		return mbox->irq;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mbox->ipc = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mbox->ipc)) {
+		dev_err(dev, "ioremap ipc failed\n");
+		return PTR_ERR(mbox->ipc);
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+	mbox->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mbox->base)) {
+		dev_err(dev, "ioremap buffer failed\n");
+		return PTR_ERR(mbox->base);
+	}
+
+	err = devm_request_irq(dev, mbox->irq, hi6220_mbox_interrupt, 0,
+			dev_name(dev), mbox);
+	if (err) {
+		dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
+			err);
+		return -ENODEV;
+	}
+
+	/* init hardware parameters */
+	hi6220_mbox_init_hw(mbox);
+
+	for (i = 0; i < mbox->chan_num; i++) {
+		mbox->chan[i].con_priv = &mbox->mchan[i];
+		mbox->irq_map_chan[i] = NULL;
+	}
+
+	mbox->controller.dev = dev;
+	mbox->controller.chans = &mbox->chan[0];
+	mbox->controller.num_chans = mbox->chan_num;
+	mbox->controller.ops = &hi6220_mbox_chan_ops;
+
+	if (mbox->tx_irq_mode)
+		mbox->controller.txdone_irq = true;
+	else {
+		mbox->controller.txdone_poll = true;
+		mbox->controller.txpoll_period = 5;
+	}
+
+	err = mbox_controller_register(&mbox->controller);
+	if (err) {
+		dev_err(dev, "Failed to register mailbox %d\n", err);
+		return err;
+	}
+
+	platform_set_drvdata(pdev, mbox);
+	dev_info(dev, "Mailbox enabled\n");
+	return 0;
+}
+
+static int hi6220_mbox_remove(struct platform_device *pdev)
+{
+	struct hi6220_mbox *mbox = platform_get_drvdata(pdev);
+
+	mbox_controller_unregister(&mbox->controller);
+	return 0;
+}
+
+static struct platform_driver hi6220_mbox_driver = {
+	.driver = {
+		.name = "hi6220-mbox",
+		.owner = THIS_MODULE,
+		.of_match_table = hi6220_mbox_of_match,
+	},
+	.probe	= hi6220_mbox_probe,
+	.remove	= hi6220_mbox_remove,
+};
+
+static int __init hi6220_mbox_init(void)
+{
+	return platform_driver_register(&hi6220_mbox_driver);
+}
+core_initcall(hi6220_mbox_init);
+
+static void __exit hi6220_mbox_exit(void)
+{
+	platform_driver_unregister(&hi6220_mbox_driver);
+}
+module_exit(hi6220_mbox_exit);
+
+MODULE_AUTHOR("Leo Yan <leo.yan@linaro.org>");
+MODULE_DESCRIPTION("Hi6220 mailbox driver");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

[PATCH v4 3/4] arm64: dts: add mailbox node for Hi6220

[Leo Yan]

This patch add device mailbox node for Hi6220 in DT.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index e83802a..76560fa 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -207,5 +207,13 @@
 			clocks = <&ao_ctrl 27>, <&ao_ctrl 27>;
 			clock-names = "apb_pclk", "apb_pclk";
 		};
+
+		mailbox: mailbox@f7510000 {
+			#mbox-cells = <1>;
+			compatible = "hisilicon,hi6220-mbox";
+			reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
+			      <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
+			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 };
-- 
1.9.1

[PATCH v4 3/4] arm64: dts: add mailbox node for Hi6220

[Leo Yan]

This patch add device mailbox node for Hi6220 in DT.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index e83802a..76560fa 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -207,5 +207,13 @@
 			clocks = <&ao_ctrl 27>, <&ao_ctrl 27>;
 			clock-names = "apb_pclk", "apb_pclk";
 		};
+
+		mailbox: mailbox at f7510000 {
+			#mbox-cells = <1>;
+			compatible = "hisilicon,hi6220-mbox";
+			reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
+			      <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
+			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 };
-- 
1.9.1

[PATCH v4 4/4] arm64: dts: add Hi6220's stub clock node

[Leo Yan]

Enable SRAM node and stub clock node for Hi6220; furthermore
add the CPU's clock so it will be used by cpufreq-dt driver.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 76560fa..912671e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -80,6 +80,17 @@
 			device_type = "cpu";
 			reg = <0x0 0x0>;
 			enable-method = "psci";
+			clocks = <&stub_clock 0>;
+			clock-latency = <0>;
+			operating-points = <
+				/* kHz */
+				1200000  0
+				960000   0
+				729000   0
+				432000   0
+				208000   0
+			>;
+			#cooling-cells = <2>; /* min followed by max */
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
@@ -167,6 +178,11 @@
 		#size-cells = <2>;
 		ranges;
 
+		sram: sram@fff80000 {
+			compatible = "hisilicon,hi6220-sramctrl", "syscon";
+			reg = <0x0 0xfff80000 0x0 0x12000>;
+		};
+
 		ao_ctrl: ao_ctrl@f7800000 {
 			compatible = "hisilicon,hi6220-aoctrl", "syscon";
 			reg = <0x0 0xf7800000 0x0 0x2000>;
@@ -191,6 +207,13 @@
 			#clock-cells = <1>;
 		};
 
+		stub_clock: stub_clock {
+			compatible = "hisilicon,hi6220-stub-clk";
+			hisilicon,hi6220-clk-sram = <&sram>;
+			#clock-cells = <1>;
+			mboxes = <&mailbox 1>;
+		};
+
 		uart0: uart@f8015000 {	/* console */
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xf8015000 0x0 0x1000>;
-- 
1.9.1

[PATCH v4 4/4] arm64: dts: add Hi6220's stub clock node

[Leo Yan]

Enable SRAM node and stub clock node for Hi6220; furthermore
add the CPU's clock so it will be used by cpufreq-dt driver.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 76560fa..912671e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -80,6 +80,17 @@
 			device_type = "cpu";
 			reg = <0x0 0x0>;
 			enable-method = "psci";
+			clocks = <&stub_clock 0>;
+			clock-latency = <0>;
+			operating-points = <
+				/* kHz */
+				1200000  0
+				960000   0
+				729000   0
+				432000   0
+				208000   0
+			>;
+			#cooling-cells = <2>; /* min followed by max */
 			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
@@ -167,6 +178,11 @@
 		#size-cells = <2>;
 		ranges;
 
+		sram: sram at fff80000 {
+			compatible = "hisilicon,hi6220-sramctrl", "syscon";
+			reg = <0x0 0xfff80000 0x0 0x12000>;
+		};
+
 		ao_ctrl: ao_ctrl at f7800000 {
 			compatible = "hisilicon,hi6220-aoctrl", "syscon";
 			reg = <0x0 0xf7800000 0x0 0x2000>;
@@ -191,6 +207,13 @@
 			#clock-cells = <1>;
 		};
 
+		stub_clock: stub_clock {
+			compatible = "hisilicon,hi6220-stub-clk";
+			hisilicon,hi6220-clk-sram = <&sram>;
+			#clock-cells = <1>;
+			mboxes = <&mailbox 1>;
+		};
+
 		uart0: uart at f8015000 {	/* console */
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xf8015000 0x0 0x1000>;
-- 
1.9.1

Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Jassi Brar]

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:

> +
> +Mailbox Device Node:
> +====================
> +
> +Required properties:
> +--------------------
> +- compatible:          Shall be "hisilicon,hi6220-mbox"
> +- reg:                 Contains the mailbox register address range (base
> +                       address and length); the first item is for IPC
> +                       registers, the second item is shared buffer for
> +                       slots.
>
Is the shared-buffer a part of mailbox controller or just regular
memory that could be used for purposes other than mailbox also? If
latter, please remove it from here.

> +Mailbox client
> +===============
> +
> +"mboxes" and the optional "mbox-names" (please see
> +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> +of the mboxes property should contain a phandle to the mailbox controller
> +device node and second argument is the channel index. It must be 0 (hardware
> +support only one channel).
>
sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
and 2 in the driver.

Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Jassi Brar]

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:

> +
> +Mailbox Device Node:
> +====================
> +
> +Required properties:
> +--------------------
> +- compatible:          Shall be "hisilicon,hi6220-mbox"
> +- reg:                 Contains the mailbox register address range (base
> +                       address and length); the first item is for IPC
> +                       registers, the second item is shared buffer for
> +                       slots.
>
Is the shared-buffer a part of mailbox controller or just regular
memory that could be used for purposes other than mailbox also? If
latter, please remove it from here.

> +Mailbox client
> +===============
> +
> +"mboxes" and the optional "mbox-names" (please see
> +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> +of the mboxes property should contain a phandle to the mailbox controller
> +device node and second argument is the channel index. It must be 0 (hardware
> +support only one channel).
>
sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
and 2 in the driver.
--
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[PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Jassi Brar]

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:

> +
> +Mailbox Device Node:
> +====================
> +
> +Required properties:
> +--------------------
> +- compatible:          Shall be "hisilicon,hi6220-mbox"
> +- reg:                 Contains the mailbox register address range (base
> +                       address and length); the first item is for IPC
> +                       registers, the second item is shared buffer for
> +                       slots.
>
Is the shared-buffer a part of mailbox controller or just regular
memory that could be used for purposes other than mailbox also? If
latter, please remove it from here.

> +Mailbox client
> +===============
> +
> +"mboxes" and the optional "mbox-names" (please see
> +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> +of the mboxes property should contain a phandle to the mailbox controller
> +device node and second argument is the channel index. It must be 0 (hardware
> +support only one channel).
>
sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
and 2 in the driver.

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:

> +
> +#define MBOX_CHAN_MAX                  32
> +#define MBOX_CHAN_NUM                  2
> +
You mean the hardware has 32 channels but this driver can not manage
more than 2 ?

OR, there are 32 interfaces but only 2 physical 'floating' links, so
no more than 2 interfaces can be active at any time?

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:

> +
> +#define MBOX_CHAN_MAX                  32
> +#define MBOX_CHAN_NUM                  2
> +
You mean the hardware has 32 channels but this driver can not manage
more than 2 ?

OR, there are 32 interfaces but only 2 physical 'floating' links, so
no more than 2 interfaces can be active at any time?
--
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More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:

> +
> +#define MBOX_CHAN_MAX                  32
> +#define MBOX_CHAN_NUM                  2
> +
You mean the hardware has 32 channels but this driver can not manage
more than 2 ?

OR, there are 32 interfaces but only 2 physical 'floating' links, so
no more than 2 interfaces can be active at any time?

Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Leo Yan]

Hi Jassi,

Thanks for review.

On Fri, Oct 16, 2015 at 10:26:48AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> 
> > +
> > +Mailbox Device Node:
> > +====================
> > +
> > +Required properties:
> > +--------------------
> > +- compatible:          Shall be "hisilicon,hi6220-mbox"
> > +- reg:                 Contains the mailbox register address range (base
> > +                       address and length); the first item is for IPC
> > +                       registers, the second item is shared buffer for
> > +                       slots.
> >
> Is the shared-buffer a part of mailbox controller or just regular
> memory that could be used for purposes other than mailbox also? If
> latter, please remove it from here.

The shared-buffer is part of mailbox controller, this region cannot be
dynamically allocated for other purpose; it's hardcode by MCU firmware.

> > +Mailbox client
> > +===============
> > +
> > +"mboxes" and the optional "mbox-names" (please see
> > +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> > +of the mboxes property should contain a phandle to the mailbox controller
> > +device node and second argument is the channel index. It must be 0 (hardware
> > +support only one channel).
> >
> sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
> and 2 in the driver.

Will fix it.

Thanks,
Leo Yan

Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Leo Yan]

Hi Jassi,

Thanks for review.

On Fri, Oct 16, 2015 at 10:26:48AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> 
> > +
> > +Mailbox Device Node:
> > +====================
> > +
> > +Required properties:
> > +--------------------
> > +- compatible:          Shall be "hisilicon,hi6220-mbox"
> > +- reg:                 Contains the mailbox register address range (base
> > +                       address and length); the first item is for IPC
> > +                       registers, the second item is shared buffer for
> > +                       slots.
> >
> Is the shared-buffer a part of mailbox controller or just regular
> memory that could be used for purposes other than mailbox also? If
> latter, please remove it from here.

The shared-buffer is part of mailbox controller, this region cannot be
dynamically allocated for other purpose; it's hardcode by MCU firmware.

> > +Mailbox client
> > +===============
> > +
> > +"mboxes" and the optional "mbox-names" (please see
> > +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> > +of the mboxes property should contain a phandle to the mailbox controller
> > +device node and second argument is the channel index. It must be 0 (hardware
> > +support only one channel).
> >
> sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
> and 2 in the driver.

Will fix it.

Thanks,
Leo Yan
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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[PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

[Leo Yan]

Hi Jassi,

Thanks for review.

On Fri, Oct 16, 2015 at 10:26:48AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> 
> > +
> > +Mailbox Device Node:
> > +====================
> > +
> > +Required properties:
> > +--------------------
> > +- compatible:          Shall be "hisilicon,hi6220-mbox"
> > +- reg:                 Contains the mailbox register address range (base
> > +                       address and length); the first item is for IPC
> > +                       registers, the second item is shared buffer for
> > +                       slots.
> >
> Is the shared-buffer a part of mailbox controller or just regular
> memory that could be used for purposes other than mailbox also? If
> latter, please remove it from here.

The shared-buffer is part of mailbox controller, this region cannot be
dynamically allocated for other purpose; it's hardcode by MCU firmware.

> > +Mailbox client
> > +===============
> > +
> > +"mboxes" and the optional "mbox-names" (please see
> > +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> > +of the mboxes property should contain a phandle to the mailbox controller
> > +device node and second argument is the channel index. It must be 0 (hardware
> > +support only one channel).
> >
> sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
> and 2 in the driver.

Will fix it.

Thanks,
Leo Yan

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> 
> > +
> > +#define MBOX_CHAN_MAX                  32
> > +#define MBOX_CHAN_NUM                  2
> > +
> You mean the hardware has 32 channels but this driver can not manage
> more than 2 ?
> 
> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> no more than 2 interfaces can be active at any time?

For the later case. Mailbox also can be used by other modules, such
like audio hifi; later need add links for them if want to enable
audio. But so far only uses first 2 channels.

Thanks,
Leo Yan

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> 
> > +
> > +#define MBOX_CHAN_MAX                  32
> > +#define MBOX_CHAN_NUM                  2
> > +
> You mean the hardware has 32 channels but this driver can not manage
> more than 2 ?
> 
> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> no more than 2 interfaces can be active at any time?

For the later case. Mailbox also can be used by other modules, such
like audio hifi; later need add links for them if want to enable
audio. But so far only uses first 2 channels.

Thanks,
Leo Yan

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> 
> > +
> > +#define MBOX_CHAN_MAX                  32
> > +#define MBOX_CHAN_NUM                  2
> > +
> You mean the hardware has 32 channels but this driver can not manage
> more than 2 ?
> 
> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> no more than 2 interfaces can be active at any time?

For the later case. Mailbox also can be used by other modules, such
like audio hifi; later need add links for them if want to enable
audio. But so far only uses first 2 channels.

Thanks,
Leo Yan

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
>> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
>>
>> > +
>> > +#define MBOX_CHAN_MAX                  32
>> > +#define MBOX_CHAN_NUM                  2
>> > +
>> You mean the hardware has 32 channels but this driver can not manage
>> more than 2 ?
>>
>> OR, there are 32 interfaces but only 2 physical 'floating' links, so
>> no more than 2 interfaces can be active at any time?
>
> For the later case.
Former is a s/w limitation and latter is h/w limitation. From what you
write below, it seems former to be the case.

> Mailbox also can be used by other modules, such
> like audio hifi; later need add links for them if want to enable
> audio. But so far only uses first 2 channels.
>
You mean every time your platform needs another channel, you'll update
the driver? Not sure about that. It should be simpler to assign which
ever and as many channels as the client asks via DT.

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
>> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>>
>> > +
>> > +#define MBOX_CHAN_MAX                  32
>> > +#define MBOX_CHAN_NUM                  2
>> > +
>> You mean the hardware has 32 channels but this driver can not manage
>> more than 2 ?
>>
>> OR, there are 32 interfaces but only 2 physical 'floating' links, so
>> no more than 2 interfaces can be active at any time?
>
> For the later case.
Former is a s/w limitation and latter is h/w limitation. From what you
write below, it seems former to be the case.

> Mailbox also can be used by other modules, such
> like audio hifi; later need add links for them if want to enable
> audio. But so far only uses first 2 channels.
>
You mean every time your platform needs another channel, you'll update
the driver? Not sure about that. It should be simpler to assign which
ever and as many channels as the client asks via DT.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
>> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
>>
>> > +
>> > +#define MBOX_CHAN_MAX                  32
>> > +#define MBOX_CHAN_NUM                  2
>> > +
>> You mean the hardware has 32 channels but this driver can not manage
>> more than 2 ?
>>
>> OR, there are 32 interfaces but only 2 physical 'floating' links, so
>> no more than 2 interfaces can be active at any time?
>
> For the later case.
Former is a s/w limitation and latter is h/w limitation. From what you
write below, it seems former to be the case.

> Mailbox also can be used by other modules, such
> like audio hifi; later need add links for them if want to enable
> audio. But so far only uses first 2 channels.
>
You mean every time your platform needs another channel, you'll update
the driver? Not sure about that. It should be simpler to assign which
ever and as many channels as the client asks via DT.

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> >>
> >> > +
> >> > +#define MBOX_CHAN_MAX                  32
> >> > +#define MBOX_CHAN_NUM                  2
> >> > +
> >> You mean the hardware has 32 channels but this driver can not manage
> >> more than 2 ?
> >>
> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> >> no more than 2 interfaces can be active at any time?
> >
> > For the later case.
> Former is a s/w limitation and latter is h/w limitation. From what you
> write below, it seems former to be the case.

Sorry, i misunderstood the question. It's a s/w limitation.

> > Mailbox also can be used by other modules, such
> > like audio hifi; later need add links for them if want to enable
> > audio. But so far only uses first 2 channels.
> >
> You mean every time your platform needs another channel, you'll update
> the driver? Not sure about that. It should be simpler to assign which
> ever and as many channels as the client asks via DT.

For hi6220, every channel is fixed to specific purpose; so i can
register all of them in driver, such like hifi related channels;
Though i cannot test them currently, but this will avoid extra
efforts for enabling channels anymore, do you think this is okay?
Or you prefer to bind with DT?

Thanks,
Leo Yan

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> >>
> >> > +
> >> > +#define MBOX_CHAN_MAX                  32
> >> > +#define MBOX_CHAN_NUM                  2
> >> > +
> >> You mean the hardware has 32 channels but this driver can not manage
> >> more than 2 ?
> >>
> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> >> no more than 2 interfaces can be active at any time?
> >
> > For the later case.
> Former is a s/w limitation and latter is h/w limitation. From what you
> write below, it seems former to be the case.

Sorry, i misunderstood the question. It's a s/w limitation.

> > Mailbox also can be used by other modules, such
> > like audio hifi; later need add links for them if want to enable
> > audio. But so far only uses first 2 channels.
> >
> You mean every time your platform needs another channel, you'll update
> the driver? Not sure about that. It should be simpler to assign which
> ever and as many channels as the client asks via DT.

For hi6220, every channel is fixed to specific purpose; so i can
register all of them in driver, such like hifi related channels;
Though i cannot test them currently, but this will avoid extra
efforts for enabling channels anymore, do you think this is okay?
Or you prefer to bind with DT?

Thanks,
Leo Yan

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> >>
> >> > +
> >> > +#define MBOX_CHAN_MAX                  32
> >> > +#define MBOX_CHAN_NUM                  2
> >> > +
> >> You mean the hardware has 32 channels but this driver can not manage
> >> more than 2 ?
> >>
> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> >> no more than 2 interfaces can be active at any time?
> >
> > For the later case.
> Former is a s/w limitation and latter is h/w limitation. From what you
> write below, it seems former to be the case.

Sorry, i misunderstood the question. It's a s/w limitation.

> > Mailbox also can be used by other modules, such
> > like audio hifi; later need add links for them if want to enable
> > audio. But so far only uses first 2 channels.
> >
> You mean every time your platform needs another channel, you'll update
> the driver? Not sure about that. It should be simpler to assign which
> ever and as many channels as the client asks via DT.

For hi6220, every channel is fixed to specific purpose; so i can
register all of them in driver, such like hifi related channels;
Though i cannot test them currently, but this will avoid extra
efforts for enabling channels anymore, do you think this is okay?
Or you prefer to bind with DT?

Thanks,
Leo Yan

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On 16 October 2015 at 11:38, Leo Yan <leo.yan@linaro.org> wrote:
> On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
>> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
>> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
>> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
>> >>
>> >> > +
>> >> > +#define MBOX_CHAN_MAX                  32
>> >> > +#define MBOX_CHAN_NUM                  2
>> >> > +
>> >> You mean the hardware has 32 channels but this driver can not manage
>> >> more than 2 ?
>> >>
>> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
>> >> no more than 2 interfaces can be active at any time?
>> >
>> > For the later case.
>> Former is a s/w limitation and latter is h/w limitation. From what you
>> write below, it seems former to be the case.
>
> Sorry, i misunderstood the question. It's a s/w limitation.
>
>> > Mailbox also can be used by other modules, such
>> > like audio hifi; later need add links for them if want to enable
>> > audio. But so far only uses first 2 channels.
>> >
>> You mean every time your platform needs another channel, you'll update
>> the driver? Not sure about that. It should be simpler to assign which
>> ever and as many channels as the client asks via DT.
>
> For hi6220, every channel is fixed to specific purpose;
on different platform the purposes may be different, so ....

> so i can
> register all of them in driver, such like hifi related channels;
> Though i cannot test them currently, but this will avoid extra
> efforts for enabling channels anymore, do you think this is okay?
> Or you prefer to bind with DT?
>
.... DT please.

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On 16 October 2015 at 11:38, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
>> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
>> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> >>
>> >> > +
>> >> > +#define MBOX_CHAN_MAX                  32
>> >> > +#define MBOX_CHAN_NUM                  2
>> >> > +
>> >> You mean the hardware has 32 channels but this driver can not manage
>> >> more than 2 ?
>> >>
>> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
>> >> no more than 2 interfaces can be active at any time?
>> >
>> > For the later case.
>> Former is a s/w limitation and latter is h/w limitation. From what you
>> write below, it seems former to be the case.
>
> Sorry, i misunderstood the question. It's a s/w limitation.
>
>> > Mailbox also can be used by other modules, such
>> > like audio hifi; later need add links for them if want to enable
>> > audio. But so far only uses first 2 channels.
>> >
>> You mean every time your platform needs another channel, you'll update
>> the driver? Not sure about that. It should be simpler to assign which
>> ever and as many channels as the client asks via DT.
>
> For hi6220, every channel is fixed to specific purpose;
on different platform the purposes may be different, so ....

> so i can
> register all of them in driver, such like hifi related channels;
> Though i cannot test them currently, but this will avoid extra
> efforts for enabling channels anymore, do you think this is okay?
> Or you prefer to bind with DT?
>
.... DT please.
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[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Jassi Brar]

On 16 October 2015 at 11:38, Leo Yan <leo.yan@linaro.org> wrote:
> On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
>> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
>> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
>> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
>> >>
>> >> > +
>> >> > +#define MBOX_CHAN_MAX                  32
>> >> > +#define MBOX_CHAN_NUM                  2
>> >> > +
>> >> You mean the hardware has 32 channels but this driver can not manage
>> >> more than 2 ?
>> >>
>> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
>> >> no more than 2 interfaces can be active at any time?
>> >
>> > For the later case.
>> Former is a s/w limitation and latter is h/w limitation. From what you
>> write below, it seems former to be the case.
>
> Sorry, i misunderstood the question. It's a s/w limitation.
>
>> > Mailbox also can be used by other modules, such
>> > like audio hifi; later need add links for them if want to enable
>> > audio. But so far only uses first 2 channels.
>> >
>> You mean every time your platform needs another channel, you'll update
>> the driver? Not sure about that. It should be simpler to assign which
>> ever and as many channels as the client asks via DT.
>
> For hi6220, every channel is fixed to specific purpose;
on different platform the purposes may be different, so ....

> so i can
> register all of them in driver, such like hifi related channels;
> Though i cannot test them currently, but this will avoid extra
> efforts for enabling channels anymore, do you think this is okay?
> Or you prefer to bind with DT?
>
.... DT please.

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 11:42:54AM +0530, Jassi Brar wrote:
> On 16 October 2015 at 11:38, Leo Yan <leo.yan@linaro.org> wrote:
> > On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
> >> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> >> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> >> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> >> >>
> >> >> > +
> >> >> > +#define MBOX_CHAN_MAX                  32
> >> >> > +#define MBOX_CHAN_NUM                  2
> >> >> > +
> >> >> You mean the hardware has 32 channels but this driver can not manage
> >> >> more than 2 ?
> >> >>
> >> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> >> >> no more than 2 interfaces can be active at any time?
> >> >
> >> > For the later case.
> >> Former is a s/w limitation and latter is h/w limitation. From what you
> >> write below, it seems former to be the case.
> >
> > Sorry, i misunderstood the question. It's a s/w limitation.
> >
> >> > Mailbox also can be used by other modules, such
> >> > like audio hifi; later need add links for them if want to enable
> >> > audio. But so far only uses first 2 channels.
> >> >
> >> You mean every time your platform needs another channel, you'll update
> >> the driver? Not sure about that. It should be simpler to assign which
> >> ever and as many channels as the client asks via DT.
> >
> > For hi6220, every channel is fixed to specific purpose;
> on different platform the purposes may be different, so ....
> 
> > so i can
> > register all of them in driver, such like hifi related channels;
> > Though i cannot test them currently, but this will avoid extra
> > efforts for enabling channels anymore, do you think this is okay?
> > Or you prefer to bind with DT?
> >
> .... DT please.

Ok, will do this.

Thansk,
Leo Yan

Re: [PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 11:42:54AM +0530, Jassi Brar wrote:
> On 16 October 2015 at 11:38, Leo Yan <leo.yan@linaro.org> wrote:
> > On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
> >> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> >> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> >> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> >> >>
> >> >> > +
> >> >> > +#define MBOX_CHAN_MAX                  32
> >> >> > +#define MBOX_CHAN_NUM                  2
> >> >> > +
> >> >> You mean the hardware has 32 channels but this driver can not manage
> >> >> more than 2 ?
> >> >>
> >> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> >> >> no more than 2 interfaces can be active at any time?
> >> >
> >> > For the later case.
> >> Former is a s/w limitation and latter is h/w limitation. From what you
> >> write below, it seems former to be the case.
> >
> > Sorry, i misunderstood the question. It's a s/w limitation.
> >
> >> > Mailbox also can be used by other modules, such
> >> > like audio hifi; later need add links for them if want to enable
> >> > audio. But so far only uses first 2 channels.
> >> >
> >> You mean every time your platform needs another channel, you'll update
> >> the driver? Not sure about that. It should be simpler to assign which
> >> ever and as many channels as the client asks via DT.
> >
> > For hi6220, every channel is fixed to specific purpose;
> on different platform the purposes may be different, so ....
> 
> > so i can
> > register all of them in driver, such like hifi related channels;
> > Though i cannot test them currently, but this will avoid extra
> > efforts for enabling channels anymore, do you think this is okay?
> > Or you prefer to bind with DT?
> >
> .... DT please.

Ok, will do this.

Thansk,
Leo Yan

[PATCH v4 2/4] mailbox: Hi6220: add mailbox driver

[Leo Yan]

On Fri, Oct 16, 2015 at 11:42:54AM +0530, Jassi Brar wrote:
> On 16 October 2015 at 11:38, Leo Yan <leo.yan@linaro.org> wrote:
> > On Fri, Oct 16, 2015 at 11:17:32AM +0530, Jassi Brar wrote:
> >> On Fri, Oct 16, 2015 at 10:59 AM, Leo Yan <leo.yan@linaro.org> wrote:
> >> > On Fri, Oct 16, 2015 at 10:43:00AM +0530, Jassi Brar wrote:
> >> >> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> >> >>
> >> >> > +
> >> >> > +#define MBOX_CHAN_MAX                  32
> >> >> > +#define MBOX_CHAN_NUM                  2
> >> >> > +
> >> >> You mean the hardware has 32 channels but this driver can not manage
> >> >> more than 2 ?
> >> >>
> >> >> OR, there are 32 interfaces but only 2 physical 'floating' links, so
> >> >> no more than 2 interfaces can be active at any time?
> >> >
> >> > For the later case.
> >> Former is a s/w limitation and latter is h/w limitation. From what you
> >> write below, it seems former to be the case.
> >
> > Sorry, i misunderstood the question. It's a s/w limitation.
> >
> >> > Mailbox also can be used by other modules, such
> >> > like audio hifi; later need add links for them if want to enable
> >> > audio. But so far only uses first 2 channels.
> >> >
> >> You mean every time your platform needs another channel, you'll update
> >> the driver? Not sure about that. It should be simpler to assign which
> >> ever and as many channels as the client asks via DT.
> >
> > For hi6220, every channel is fixed to specific purpose;
> on different platform the purposes may be different, so ....
> 
> > so i can
> > register all of them in driver, such like hifi related channels;
> > Though i cannot test them currently, but this will avoid extra
> > efforts for enabling channels anymore, do you think this is okay?
> > Or you prefer to bind with DT?
> >
> .... DT please.

Ok, will do this.

Thansk,
Leo Yan