[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

This series patchs are working for RK3368 on Rockchip platform.

@Heiko,
    The PATCH [5/6] is working based on big/littel cluster cpufreq
    added. Anyway, the PATCH [5/6] also work for next kernel.

@Eduardo,
This patchset are based on linus master branch.
Note: Need add the following thermal patchs for thermal driver before apply
this series patchs.

1) thermal: rockchip: fix handling of invalid readings
(https://patchwork.kernel.org/patch/6973101/)

2) thermal: rockhip: fix setting thermal shutdown polarity
(https://patchwork.kernel.org/patch/6973131/)

3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
(https://patchwork.kernel.org/patch/7472021/)

4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
(https://patchwork.kernel.org/patch/7472051/)

I'm glad these patchs have merged in thermal-soc git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git

the git log oneline my local branch as follows:
3e2c90b arm64: dts: Enable the Thermal on R88 board
a33ee26 arm64: dts: Add main Thermal info to rk3368.dtsi
fc051c9 arm64: dts: Add the thermal data found on RK3368
d6e7126 thermal: rockchip: Support the RK3368 SoCs in thermal drivers
d16eb7f thermal: rockchip: Add the flag for adc value increment or decrement
acc3ead thermal: rockchip: improve the conversion function
f295e0b thermal: rockchip: trivial: fix typo in commit
2291fc3 thermal: rockchip: better to compatible the driver for different SoCs
e18e646 dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

29eb0c7 thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
cf2100b dt-bindings: rockchip-thermal: Add the pinctrl states in this document
38e287b0 thermal: rockhip: fix setting thermal shutdown polarity
ddee4a2 thermal: rockchip: fix handling of invalid readings
8a28d67 Merge tag 'powerpc-4.3-6' of
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
977bf06 powerpc/dma: dma_set_coherent_mask() should not be GPL only
a22c4d7 block: re-add discard_granularity and alignment checks
23d8827 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
3d0aa36 Merge branch 'for-linus' of git://git.kernel.dk/linux-block
dc5bc3f Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
9e17f90 Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux
174fd8d blkcg: fix incorrect read/write sync/async stat accounting
858e904 Merge tag 'iommu-fixes-v4.3-rc7' of
......

----
This series are tested on RK3368 board.

while true;do ls >/dev/null; done&

while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp; sleep .5; done &

You can get the temperature form sensors.
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:32500


Changes in v2:
- As Eduardo comments on patch v1, split in smaller changes.
- make the conversion table in as a parameter both code_to_temp
  and temp_to_code function.
Series-changes: 1
- As Dmitry comment, make the conversion table in as a parameter.
- remove some unused, completed on other patchs.
- fix a copy wrong name.
Series-changes: 1
- support the opt gpio pinctrl state

Changes in v1:
- %s/thermal/rockchip-thermal in subject.
- add a new patch for thermal driver to support more SoCs.

Caesar Wang (9):
  dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible
  thermal: rockchip: better to compatible the driver for different SoCs
  thermal: rockchip: trivial: fix typo in commit
  thermal: rockchip: improve the conversion function
  thermal: rockchip: Add the flag for adc value increment or decrement
  thermal: rockchip: Support the RK3368 SoCs in thermal drivers
  arm64: dts: Add the thermal data found on RK3368
  arm64: dts: Add main Thermal info to rk3368.dtsi
  arm64: dts: Enable the Thermal on R88 board

 .../bindings/thermal/rockchip-thermal.txt          |   4 +-
 arch/arm64/boot/dts/rockchip/rk3368-r88.dts        |   6 +
 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi   | 112 ++++++++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  36 +++
 drivers/thermal/rockchip_thermal.c                 | 312 +++++++++++++++------
 5 files changed, 389 insertions(+), 81 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

-- 
1.9.1

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

This series patchs are working for RK3368 on Rockchip platform.

@Heiko,
    The PATCH [5/6] is working based on big/littel cluster cpufreq
    added. Anyway, the PATCH [5/6] also work for next kernel.

@Eduardo,
This patchset are based on linus master branch.
Note: Need add the following thermal patchs for thermal driver before apply
this series patchs.

1) thermal: rockchip: fix handling of invalid readings
(https://patchwork.kernel.org/patch/6973101/)

2) thermal: rockhip: fix setting thermal shutdown polarity
(https://patchwork.kernel.org/patch/6973131/)

3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
(https://patchwork.kernel.org/patch/7472021/)

4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
(https://patchwork.kernel.org/patch/7472051/)

I'm glad these patchs have merged in thermal-soc git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git

the git log oneline my local branch as follows:
3e2c90b arm64: dts: Enable the Thermal on R88 board
a33ee26 arm64: dts: Add main Thermal info to rk3368.dtsi
fc051c9 arm64: dts: Add the thermal data found on RK3368
d6e7126 thermal: rockchip: Support the RK3368 SoCs in thermal drivers
d16eb7f thermal: rockchip: Add the flag for adc value increment or decrement
acc3ead thermal: rockchip: improve the conversion function
f295e0b thermal: rockchip: trivial: fix typo in commit
2291fc3 thermal: rockchip: better to compatible the driver for different SoCs
e18e646 dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

29eb0c7 thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
cf2100b dt-bindings: rockchip-thermal: Add the pinctrl states in this document
38e287b0 thermal: rockhip: fix setting thermal shutdown polarity
ddee4a2 thermal: rockchip: fix handling of invalid readings
8a28d67 Merge tag 'powerpc-4.3-6' of
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
977bf06 powerpc/dma: dma_set_coherent_mask() should not be GPL only
a22c4d7 block: re-add discard_granularity and alignment checks
23d8827 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
3d0aa36 Merge branch 'for-linus' of git://git.kernel.dk/linux-block
dc5bc3f Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
9e17f90 Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux
174fd8d blkcg: fix incorrect read/write sync/async stat accounting
858e904 Merge tag 'iommu-fixes-v4.3-rc7' of
......

----
This series are tested on RK3368 board.

while true;do ls >/dev/null; done&

while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp; sleep .5; done &

You can get the temperature form sensors.
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:32500


Changes in v2:
- As Eduardo comments on patch v1, split in smaller changes.
- make the conversion table in as a parameter both code_to_temp
  and temp_to_code function.
Series-changes: 1
- As Dmitry comment, make the conversion table in as a parameter.
- remove some unused, completed on other patchs.
- fix a copy wrong name.
Series-changes: 1
- support the opt gpio pinctrl state

Changes in v1:
- %s/thermal/rockchip-thermal in subject.
- add a new patch for thermal driver to support more SoCs.

Caesar Wang (9):
  dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible
  thermal: rockchip: better to compatible the driver for different SoCs
  thermal: rockchip: trivial: fix typo in commit
  thermal: rockchip: improve the conversion function
  thermal: rockchip: Add the flag for adc value increment or decrement
  thermal: rockchip: Support the RK3368 SoCs in thermal drivers
  arm64: dts: Add the thermal data found on RK3368
  arm64: dts: Add main Thermal info to rk3368.dtsi
  arm64: dts: Enable the Thermal on R88 board

 .../bindings/thermal/rockchip-thermal.txt          |   4 +-
 arch/arm64/boot/dts/rockchip/rk3368-r88.dts        |   6 +
 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi   | 112 ++++++++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  36 +++
 drivers/thermal/rockchip_thermal.c                 | 312 +++++++++++++++------
 5 files changed, 389 insertions(+), 81 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

-- 
1.9.1

[PATCH v2 1/9] dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

[Caesar Wang]

This patchset attempts to new compatible for thermal founding
on RK3368 SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1:
- %s/thermal/rockchip-thermal in subject.

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index b38200d..0dfa60d 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -1,7 +1,9 @@
 * Temperature Sensor ADC (TSADC) on rockchip SoCs
 
 Required properties:
-- compatible : "rockchip,rk3288-tsadc"
+- compatible : should be "rockchip,<name>-tsadc"
+   "rockchip,rk3288-tsadc": found on RK3288 SoCs
+   "rockchip,rk3368-tsadc": found on RK3368 SoCs
 - reg : physical base address of the controller and length of memory mapped
 	region.
 - interrupts : The interrupt number to the cpu. The interrupt specifier format
-- 
1.9.1

[PATCH v2 1/9] dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

[Caesar Wang]

This patchset attempts to new compatible for thermal founding
on RK3368 SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1:
- %s/thermal/rockchip-thermal in subject.

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index b38200d..0dfa60d 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -1,7 +1,9 @@
 * Temperature Sensor ADC (TSADC) on rockchip SoCs
 
 Required properties:
-- compatible : "rockchip,rk3288-tsadc"
+- compatible : should be "rockchip,<name>-tsadc"
+   "rockchip,rk3288-tsadc": found on RK3288 SoCs
+   "rockchip,rk3368-tsadc": found on RK3368 SoCs
 - reg : physical base address of the controller and length of memory mapped
 	region.
 - interrupts : The interrupt number to the cpu. The interrupt specifier format
-- 
1.9.1

Re: [PATCH v2 1/9] dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

[Rob Herring]

On Thu, Nov 05, 2015 at 01:17:57PM +0800, Caesar Wang wrote:
> This patchset attempts to new compatible for thermal founding
> on RK3368 SoCs.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

Acked-by: Rob Herring <robh@kernel.org>

> ---
> 
> Changes in v2: None
> Changes in v1:
> - %s/thermal/rockchip-thermal in subject.
> 
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> index b38200d..0dfa60d 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> @@ -1,7 +1,9 @@
>  * Temperature Sensor ADC (TSADC) on rockchip SoCs
>  
>  Required properties:
> -- compatible : "rockchip,rk3288-tsadc"
> +- compatible : should be "rockchip,<name>-tsadc"
> +   "rockchip,rk3288-tsadc": found on RK3288 SoCs
> +   "rockchip,rk3368-tsadc": found on RK3368 SoCs
>  - reg : physical base address of the controller and length of memory mapped
>  	region.
>  - interrupts : The interrupt number to the cpu. The interrupt specifier format
> -- 
> 1.9.1
> 

[PATCH v2 1/9] dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

[Rob Herring]

On Thu, Nov 05, 2015 at 01:17:57PM +0800, Caesar Wang wrote:
> This patchset attempts to new compatible for thermal founding
> on RK3368 SoCs.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

Acked-by: Rob Herring <robh@kernel.org>

> ---
> 
> Changes in v2: None
> Changes in v1:
> - %s/thermal/rockchip-thermal in subject.
> 
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> index b38200d..0dfa60d 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> @@ -1,7 +1,9 @@
>  * Temperature Sensor ADC (TSADC) on rockchip SoCs
>  
>  Required properties:
> -- compatible : "rockchip,rk3288-tsadc"
> +- compatible : should be "rockchip,<name>-tsadc"
> +   "rockchip,rk3288-tsadc": found on RK3288 SoCs
> +   "rockchip,rk3368-tsadc": found on RK3368 SoCs
>  - reg : physical base address of the controller and length of memory mapped
>  	region.
>  - interrupts : The interrupt number to the cpu. The interrupt specifier format
> -- 
> 1.9.1
> 

[PATCH v2 2/9] thermal: rockchip: better to compatible the driver for different SoCs

[Caesar Wang]

The current driver is default to register the two thermal sensors
in probe since some SoCs maybe only have one sensor for thermal.

In some cases, the channel 0 is not always the cpu or gpu sensor.
So add the channel can be configured for sensors.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1:
- add a new patch for thermal driver to support more SoCs.

 drivers/thermal/rockchip_thermal.c | 86 +++++++++++++++++++++-----------------
 1 file changed, 48 insertions(+), 38 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 2b58870..075d18e 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -44,15 +44,25 @@ enum tshut_polarity {
 };
 
 /**
- * The system has three Temperature Sensors.  channel 0 is reserved,
- * channel 1 is for CPU, and channel 2 is for GPU.
+ * The system has two Temperature Sensors.
+ * sensor0 is for CPU, and sensor1 is for GPU.
  */
 enum sensor_id {
-	SENSOR_CPU = 1,
+	SENSOR_CPU = 0,
 	SENSOR_GPU,
 };
 
+/**
+ * The max sensors is two in rockchip SoCs.
+ * Two sensors: CPU and GPU sensor.
+ */
+#define SOC_MAX_SENSORS	2
+
 struct rockchip_tsadc_chip {
+	/* The sensor id of chip correspond to the ADC channel */
+	int chn_id[SOC_MAX_SENSORS];
+	int chn_num;
+
 	/* The hardware-controlled tshut property */
 	long tshut_temp;
 	enum tshut_mode tshut_mode;
@@ -72,17 +82,15 @@ struct rockchip_tsadc_chip {
 struct rockchip_thermal_sensor {
 	struct rockchip_thermal_data *thermal;
 	struct thermal_zone_device *tzd;
-	enum sensor_id id;
+	int id;
 };
 
-#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
-
 struct rockchip_thermal_data {
 	const struct rockchip_tsadc_chip *chip;
 	struct platform_device *pdev;
 	struct reset_control *reset;
 
-	struct rockchip_thermal_sensor sensors[NUM_SENSORS];
+	struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 
 	struct clk *clk;
 	struct clk *pclk;
@@ -94,7 +102,7 @@ struct rockchip_thermal_data {
 	enum tshut_polarity tshut_polarity;
 };
 
-/* TSADC V2 Sensor info define: */
+/* TSADC Sensor info define: */
 #define TSADCV2_AUTO_CON			0x04
 #define TSADCV2_INT_EN				0x08
 #define TSADCV2_INT_PD				0x0c
@@ -317,6 +325,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 }
 
 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
+	.chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
+	.chn_num = 2, /* two channels for tsadc */
+
 	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 	.tshut_temp = 95000,
@@ -356,7 +368,7 @@ static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 
 	thermal->chip->irq_ack(thermal->regs);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		thermal_zone_device_update(thermal->sensors[i].tzd);
 
 	return IRQ_HANDLED;
@@ -441,7 +453,7 @@ static int
 rockchip_thermal_register_sensor(struct platform_device *pdev,
 				 struct rockchip_thermal_data *thermal,
 				 struct rockchip_thermal_sensor *sensor,
-				 enum sensor_id id)
+				 int id)
 {
 	const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 	int error;
@@ -480,7 +492,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 	const struct of_device_id *match;
 	struct resource *res;
 	int irq;
-	int i;
+	int i, j;
 	int error;
 
 	match = of_match_node(of_rockchip_thermal_match, np);
@@ -555,22 +567,19 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
 	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
-	error = rockchip_thermal_register_sensor(pdev, thermal,
-						 &thermal->sensors[0],
-						 SENSOR_CPU);
-	if (error) {
-		dev_err(&pdev->dev,
-			"failed to register CPU thermal sensor: %d\n", error);
-		goto err_disable_pclk;
-	}
-
-	error = rockchip_thermal_register_sensor(pdev, thermal,
-						 &thermal->sensors[1],
-						 SENSOR_GPU);
-	if (error) {
-		dev_err(&pdev->dev,
-			"failed to register GPU thermal sensor: %d\n", error);
-		goto err_unregister_cpu_sensor;
+	for (i = 0; i < thermal->chip->chn_num; i++) {
+		error = rockchip_thermal_register_sensor(pdev, thermal,
+						&thermal->sensors[i],
+						thermal->chip->chn_id[i]);
+		if (error) {
+			dev_err(&pdev->dev,
+				"failed to register sensor[%d] : error = %d\n",
+				i, error);
+			for (j = 0; j < i; j++)
+				thermal_zone_of_sensor_unregister(&pdev->dev,
+						thermal->sensors[j].tzd);
+			goto err_disable_pclk;
+		}
 	}
 
 	error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
@@ -580,22 +589,23 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 	if (error) {
 		dev_err(&pdev->dev,
 			"failed to request tsadc irq: %d\n", error);
-		goto err_unregister_gpu_sensor;
+		goto err_unregister_sensor;
 	}
 
 	thermal->chip->control(thermal->regs, true);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 
 	platform_set_drvdata(pdev, thermal);
 
 	return 0;
 
-err_unregister_gpu_sensor:
-	thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
-err_unregister_cpu_sensor:
-	thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
+err_unregister_sensor:
+	while (i--)
+		thermal_zone_of_sensor_unregister(&pdev->dev,
+						  thermal->sensors[i].tzd);
+
 err_disable_pclk:
 	clk_disable_unprepare(thermal->pclk);
 err_disable_clk:
@@ -609,7 +619,7 @@ static int rockchip_thermal_remove(struct platform_device *pdev)
 	struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
+	for (i = 0; i < thermal->chip->chn_num; i++) {
 		struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
 
 		rockchip_thermal_toggle_sensor(sensor, false);
@@ -630,7 +640,7 @@ static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
 	struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
 
 	thermal->chip->control(thermal->regs, false);
@@ -662,8 +672,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
-		enum sensor_id id = thermal->sensors[i].id;
+	for (i = 0; i < thermal->chip->chn_num; i++) {
+		int id = thermal->sensors[i].id;
 
 		thermal->chip->set_tshut_mode(id, thermal->regs,
 					      thermal->tshut_mode);
@@ -673,7 +683,7 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 	thermal->chip->control(thermal->regs, true);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 
 	pinctrl_pm_select_default_state(dev);
-- 
1.9.1

[PATCH v2 2/9] thermal: rockchip: better to compatible the driver for different SoCs

[Caesar Wang]

The current driver is default to register the two thermal sensors
in probe since some SoCs maybe only have one sensor for thermal.

In some cases, the channel 0 is not always the cpu or gpu sensor.
So add the channel can be configured for sensors.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1:
- add a new patch for thermal driver to support more SoCs.

 drivers/thermal/rockchip_thermal.c | 86 +++++++++++++++++++++-----------------
 1 file changed, 48 insertions(+), 38 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 2b58870..075d18e 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -44,15 +44,25 @@ enum tshut_polarity {
 };
 
 /**
- * The system has three Temperature Sensors.  channel 0 is reserved,
- * channel 1 is for CPU, and channel 2 is for GPU.
+ * The system has two Temperature Sensors.
+ * sensor0 is for CPU, and sensor1 is for GPU.
  */
 enum sensor_id {
-	SENSOR_CPU = 1,
+	SENSOR_CPU = 0,
 	SENSOR_GPU,
 };
 
+/**
+ * The max sensors is two in rockchip SoCs.
+ * Two sensors: CPU and GPU sensor.
+ */
+#define SOC_MAX_SENSORS	2
+
 struct rockchip_tsadc_chip {
+	/* The sensor id of chip correspond to the ADC channel */
+	int chn_id[SOC_MAX_SENSORS];
+	int chn_num;
+
 	/* The hardware-controlled tshut property */
 	long tshut_temp;
 	enum tshut_mode tshut_mode;
@@ -72,17 +82,15 @@ struct rockchip_tsadc_chip {
 struct rockchip_thermal_sensor {
 	struct rockchip_thermal_data *thermal;
 	struct thermal_zone_device *tzd;
-	enum sensor_id id;
+	int id;
 };
 
-#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
-
 struct rockchip_thermal_data {
 	const struct rockchip_tsadc_chip *chip;
 	struct platform_device *pdev;
 	struct reset_control *reset;
 
-	struct rockchip_thermal_sensor sensors[NUM_SENSORS];
+	struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 
 	struct clk *clk;
 	struct clk *pclk;
@@ -94,7 +102,7 @@ struct rockchip_thermal_data {
 	enum tshut_polarity tshut_polarity;
 };
 
-/* TSADC V2 Sensor info define: */
+/* TSADC Sensor info define: */
 #define TSADCV2_AUTO_CON			0x04
 #define TSADCV2_INT_EN				0x08
 #define TSADCV2_INT_PD				0x0c
@@ -317,6 +325,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 }
 
 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
+	.chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
+	.chn_num = 2, /* two channels for tsadc */
+
 	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 	.tshut_temp = 95000,
@@ -356,7 +368,7 @@ static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 
 	thermal->chip->irq_ack(thermal->regs);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		thermal_zone_device_update(thermal->sensors[i].tzd);
 
 	return IRQ_HANDLED;
@@ -441,7 +453,7 @@ static int
 rockchip_thermal_register_sensor(struct platform_device *pdev,
 				 struct rockchip_thermal_data *thermal,
 				 struct rockchip_thermal_sensor *sensor,
-				 enum sensor_id id)
+				 int id)
 {
 	const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 	int error;
@@ -480,7 +492,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 	const struct of_device_id *match;
 	struct resource *res;
 	int irq;
-	int i;
+	int i, j;
 	int error;
 
 	match = of_match_node(of_rockchip_thermal_match, np);
@@ -555,22 +567,19 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
 	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
-	error = rockchip_thermal_register_sensor(pdev, thermal,
-						 &thermal->sensors[0],
-						 SENSOR_CPU);
-	if (error) {
-		dev_err(&pdev->dev,
-			"failed to register CPU thermal sensor: %d\n", error);
-		goto err_disable_pclk;
-	}
-
-	error = rockchip_thermal_register_sensor(pdev, thermal,
-						 &thermal->sensors[1],
-						 SENSOR_GPU);
-	if (error) {
-		dev_err(&pdev->dev,
-			"failed to register GPU thermal sensor: %d\n", error);
-		goto err_unregister_cpu_sensor;
+	for (i = 0; i < thermal->chip->chn_num; i++) {
+		error = rockchip_thermal_register_sensor(pdev, thermal,
+						&thermal->sensors[i],
+						thermal->chip->chn_id[i]);
+		if (error) {
+			dev_err(&pdev->dev,
+				"failed to register sensor[%d] : error = %d\n",
+				i, error);
+			for (j = 0; j < i; j++)
+				thermal_zone_of_sensor_unregister(&pdev->dev,
+						thermal->sensors[j].tzd);
+			goto err_disable_pclk;
+		}
 	}
 
 	error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
@@ -580,22 +589,23 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 	if (error) {
 		dev_err(&pdev->dev,
 			"failed to request tsadc irq: %d\n", error);
-		goto err_unregister_gpu_sensor;
+		goto err_unregister_sensor;
 	}
 
 	thermal->chip->control(thermal->regs, true);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 
 	platform_set_drvdata(pdev, thermal);
 
 	return 0;
 
-err_unregister_gpu_sensor:
-	thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
-err_unregister_cpu_sensor:
-	thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
+err_unregister_sensor:
+	while (i--)
+		thermal_zone_of_sensor_unregister(&pdev->dev,
+						  thermal->sensors[i].tzd);
+
 err_disable_pclk:
 	clk_disable_unprepare(thermal->pclk);
 err_disable_clk:
@@ -609,7 +619,7 @@ static int rockchip_thermal_remove(struct platform_device *pdev)
 	struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
+	for (i = 0; i < thermal->chip->chn_num; i++) {
 		struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
 
 		rockchip_thermal_toggle_sensor(sensor, false);
@@ -630,7 +640,7 @@ static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
 	struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
 
 	thermal->chip->control(thermal->regs, false);
@@ -662,8 +672,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
-		enum sensor_id id = thermal->sensors[i].id;
+	for (i = 0; i < thermal->chip->chn_num; i++) {
+		int id = thermal->sensors[i].id;
 
 		thermal->chip->set_tshut_mode(id, thermal->regs,
 					      thermal->tshut_mode);
@@ -673,7 +683,7 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 	thermal->chip->control(thermal->regs, true);
 
-	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+	for (i = 0; i < thermal->chip->chn_num; i++)
 		rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 
 	pinctrl_pm_select_default_state(dev);
-- 
1.9.1

[PATCH v2 3/9] thermal: rockchip: trivial: fix typo in commit

[Caesar Wang]

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2:
- As Eduardo comments on patch v1, split in smaller changes.

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 075d18e..bdf7063 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -236,15 +236,19 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
 }
 
 /**
- * rk_tsadcv2_initialize - initialize TASDC Controller
- * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
- * every two accessing of TSADC in normal operation.
- * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
- * every two accessing of TSADC after the temperature is higher
- * than COM_SHUT or COM_INT.
- * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
- * if the temperature is higher than COMP_INT or COMP_SHUT for
- * "debounce" times, TSADC controller will generate interrupt or TSHUT.
+ * rk_tsadcv2_initialize - initialize TASDC Controller.
+ *
+ * (1) Set TSADC_V2_AUTO_PERIOD:
+ *     Configure the interleave between every two accessing of
+ *     TSADC in normal operation.
+ *
+ * (2) Set TSADCV2_AUTO_PERIOD_HT:
+ *     Configure the interleave between every two accessing of
+ *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
+ *
+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
+ *     If the temperature is higher than COMP_INT or COMP_SHUT for
+ *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
  */
 static void rk_tsadcv2_initialize(void __iomem *regs,
 				  enum tshut_polarity tshut_polarity)
-- 
1.9.1

[PATCH v2 3/9] thermal: rockchip: trivial: fix typo in commit

[Caesar Wang]

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2:
- As Eduardo comments on patch v1, split in smaller changes.

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 075d18e..bdf7063 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -236,15 +236,19 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
 }
 
 /**
- * rk_tsadcv2_initialize - initialize TASDC Controller
- * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
- * every two accessing of TSADC in normal operation.
- * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
- * every two accessing of TSADC after the temperature is higher
- * than COM_SHUT or COM_INT.
- * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
- * if the temperature is higher than COMP_INT or COMP_SHUT for
- * "debounce" times, TSADC controller will generate interrupt or TSHUT.
+ * rk_tsadcv2_initialize - initialize TASDC Controller.
+ *
+ * (1) Set TSADC_V2_AUTO_PERIOD:
+ *     Configure the interleave between every two accessing of
+ *     TSADC in normal operation.
+ *
+ * (2) Set TSADCV2_AUTO_PERIOD_HT:
+ *     Configure the interleave between every two accessing of
+ *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
+ *
+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
+ *     If the temperature is higher than COMP_INT or COMP_SHUT for
+ *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
  */
 static void rk_tsadcv2_initialize(void __iomem *regs,
 				  enum tshut_polarity tshut_polarity)
-- 
1.9.1

[PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Caesar Wang]

We should make the conversion table in as a parameter since the different
SoCs have the different conversionion table.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2:
- make the conversion table in as a parameter both code_to_temp
  and temp_to_code function.
Series-changes: 1
- As Dmitry comment, make the conversion table in as a parameter.

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
 1 file changed, 55 insertions(+), 27 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index bdf7063..e828f18 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -58,6 +58,16 @@ enum sensor_id {
  */
 #define SOC_MAX_SENSORS	2
 
+struct chip_tsadc_table {
+	const struct tsadc_table *id;
+
+	/* the array table size*/
+	unsigned int length;
+
+	/* that analogic mask data */
+	unsigned long data_mask;
+};
+
 struct rockchip_tsadc_chip {
 	/* The sensor id of chip correspond to the ADC channel */
 	int chn_id[SOC_MAX_SENSORS];
@@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
 	void (*control)(void __iomem *reg, bool on);
 
 	/* Per-sensor methods */
-	int (*get_temp)(int chn, void __iomem *reg, int *temp);
-	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
+	int (*get_temp)(struct chip_tsadc_table table,
+			int chn, void __iomem *reg, int *temp);
+	void (*set_tshut_temp)(struct chip_tsadc_table table,
+			       int chn, void __iomem *reg, long temp);
 	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
+
+	/* Per-table methods */
+	struct chip_tsadc_table table;
 };
 
 struct rockchip_thermal_sensor {
@@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
 	{3421, 125000},
 };
 
-static u32 rk_tsadcv2_temp_to_code(long temp)
+static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
+				   long temp)
 {
 	int high, low, mid;
 
 	low = 0;
-	high = ARRAY_SIZE(v2_code_table) - 1;
+	high = table.length - 1;
 	mid = (high + low) / 2;
 
-	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
+	if (temp < table.id[low].temp || temp > table.id[high].temp)
 		return 0;
 
 	while (low <= high) {
-		if (temp == v2_code_table[mid].temp)
-			return v2_code_table[mid].code;
-		else if (temp < v2_code_table[mid].temp)
+		if (temp == table.id[mid].temp)
+			return table.id[mid].code;
+		else if (temp < table.id[mid].temp)
 			high = mid - 1;
 		else
 			low = mid + 1;
@@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
 	return 0;
 }
 
-static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
+static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
+				   int *temp)
 {
 	unsigned int low = 1;
-	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
+	unsigned int high = table.length - 1;
 	unsigned int mid = (low + high) / 2;
 	unsigned int num;
 	unsigned long denom;
 
-	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
+	WARN_ON(table.length < 2);
 
-	code &= TSADCV2_DATA_MASK;
-	if (code < v2_code_table[high].code)
+	code &= table.data_mask;
+	if (code < table.id[high].code)
 		return -EAGAIN;		/* Incorrect reading */
 
 	while (low <= high) {
-		if (code >= v2_code_table[mid].code &&
-		    code < v2_code_table[mid - 1].code)
+		if (code >= table.id[mid].code &&
+		    code < table.id[mid - 1].code)
 			break;
-		else if (code < v2_code_table[mid].code)
+		else if (code < table.id[mid].code)
 			low = mid + 1;
 		else
 			high = mid - 1;
@@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
 	 * temperature between 2 table entries is linear and interpolate
 	 * to produce less granular result.
 	 */
-	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
-	num *= v2_code_table[mid - 1].code - code;
-	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
-	*temp = v2_code_table[mid - 1].temp + (num / denom);
+	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
+	num *= table.id[mid - 1].code - code;
+	denom = table.id[mid - 1].code - table.id[mid].code;
+	*temp = table.id[mid - 1].temp + (num / denom);
 
 	return 0;
 }
@@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 }
 
-static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
+static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
+			       int chn, void __iomem *regs, int *temp)
 {
 	u32 val;
 
 	val = readl_relaxed(regs + TSADCV2_DATA(chn));
 
-	return rk_tsadcv2_code_to_temp(val, temp);
+	return rk_tsadcv2_code_to_temp(table, val, temp);
 }
 
-static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
+static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
+				  int chn, void __iomem *regs, long temp)
 {
 	u32 tshut_value, val;
 
-	tshut_value = rk_tsadcv2_temp_to_code(temp);
+	tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 	writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 
 	/* TSHUT will be valid */
@@ -343,6 +362,12 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	.get_temp = rk_tsadcv2_get_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = v2_code_table,
+		.length = ARRAY_SIZE(v2_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+	},
 };
 
 static const struct of_device_id of_rockchip_thermal_match[] = {
@@ -385,7 +410,8 @@ static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 	const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 	int retval;
 
-	retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
+	retval = tsadc->get_temp(tsadc->table,
+				 sensor->id, thermal->regs, out_temp);
 	dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 		sensor->id, *out_temp, retval);
 
@@ -463,7 +489,8 @@ rockchip_thermal_register_sensor(struct platform_device *pdev,
 	int error;
 
 	tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
-	tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
+	tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
+			      thermal->tshut_temp);
 
 	sensor->thermal = thermal;
 	sensor->id = id;
@@ -681,7 +708,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 		thermal->chip->set_tshut_mode(id, thermal->regs,
 					      thermal->tshut_mode);
-		thermal->chip->set_tshut_temp(id, thermal->regs,
+		thermal->chip->set_tshut_temp(thermal->chip->table,
+					      id, thermal->regs,
 					      thermal->tshut_temp);
 	}
 
-- 
1.9.1

[PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Caesar Wang]

We should make the conversion table in as a parameter since the different
SoCs have the different conversionion table.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2:
- make the conversion table in as a parameter both code_to_temp
  and temp_to_code function.
Series-changes: 1
- As Dmitry comment, make the conversion table in as a parameter.

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
 1 file changed, 55 insertions(+), 27 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index bdf7063..e828f18 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -58,6 +58,16 @@ enum sensor_id {
  */
 #define SOC_MAX_SENSORS	2
 
+struct chip_tsadc_table {
+	const struct tsadc_table *id;
+
+	/* the array table size*/
+	unsigned int length;
+
+	/* that analogic mask data */
+	unsigned long data_mask;
+};
+
 struct rockchip_tsadc_chip {
 	/* The sensor id of chip correspond to the ADC channel */
 	int chn_id[SOC_MAX_SENSORS];
@@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
 	void (*control)(void __iomem *reg, bool on);
 
 	/* Per-sensor methods */
-	int (*get_temp)(int chn, void __iomem *reg, int *temp);
-	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
+	int (*get_temp)(struct chip_tsadc_table table,
+			int chn, void __iomem *reg, int *temp);
+	void (*set_tshut_temp)(struct chip_tsadc_table table,
+			       int chn, void __iomem *reg, long temp);
 	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
+
+	/* Per-table methods */
+	struct chip_tsadc_table table;
 };
 
 struct rockchip_thermal_sensor {
@@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
 	{3421, 125000},
 };
 
-static u32 rk_tsadcv2_temp_to_code(long temp)
+static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
+				   long temp)
 {
 	int high, low, mid;
 
 	low = 0;
-	high = ARRAY_SIZE(v2_code_table) - 1;
+	high = table.length - 1;
 	mid = (high + low) / 2;
 
-	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
+	if (temp < table.id[low].temp || temp > table.id[high].temp)
 		return 0;
 
 	while (low <= high) {
-		if (temp == v2_code_table[mid].temp)
-			return v2_code_table[mid].code;
-		else if (temp < v2_code_table[mid].temp)
+		if (temp == table.id[mid].temp)
+			return table.id[mid].code;
+		else if (temp < table.id[mid].temp)
 			high = mid - 1;
 		else
 			low = mid + 1;
@@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
 	return 0;
 }
 
-static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
+static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
+				   int *temp)
 {
 	unsigned int low = 1;
-	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
+	unsigned int high = table.length - 1;
 	unsigned int mid = (low + high) / 2;
 	unsigned int num;
 	unsigned long denom;
 
-	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
+	WARN_ON(table.length < 2);
 
-	code &= TSADCV2_DATA_MASK;
-	if (code < v2_code_table[high].code)
+	code &= table.data_mask;
+	if (code < table.id[high].code)
 		return -EAGAIN;		/* Incorrect reading */
 
 	while (low <= high) {
-		if (code >= v2_code_table[mid].code &&
-		    code < v2_code_table[mid - 1].code)
+		if (code >= table.id[mid].code &&
+		    code < table.id[mid - 1].code)
 			break;
-		else if (code < v2_code_table[mid].code)
+		else if (code < table.id[mid].code)
 			low = mid + 1;
 		else
 			high = mid - 1;
@@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
 	 * temperature between 2 table entries is linear and interpolate
 	 * to produce less granular result.
 	 */
-	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
-	num *= v2_code_table[mid - 1].code - code;
-	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
-	*temp = v2_code_table[mid - 1].temp + (num / denom);
+	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
+	num *= table.id[mid - 1].code - code;
+	denom = table.id[mid - 1].code - table.id[mid].code;
+	*temp = table.id[mid - 1].temp + (num / denom);
 
 	return 0;
 }
@@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 }
 
-static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
+static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
+			       int chn, void __iomem *regs, int *temp)
 {
 	u32 val;
 
 	val = readl_relaxed(regs + TSADCV2_DATA(chn));
 
-	return rk_tsadcv2_code_to_temp(val, temp);
+	return rk_tsadcv2_code_to_temp(table, val, temp);
 }
 
-static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
+static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
+				  int chn, void __iomem *regs, long temp)
 {
 	u32 tshut_value, val;
 
-	tshut_value = rk_tsadcv2_temp_to_code(temp);
+	tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 	writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 
 	/* TSHUT will be valid */
@@ -343,6 +362,12 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	.get_temp = rk_tsadcv2_get_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = v2_code_table,
+		.length = ARRAY_SIZE(v2_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+	},
 };
 
 static const struct of_device_id of_rockchip_thermal_match[] = {
@@ -385,7 +410,8 @@ static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 	const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 	int retval;
 
-	retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
+	retval = tsadc->get_temp(tsadc->table,
+				 sensor->id, thermal->regs, out_temp);
 	dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 		sensor->id, *out_temp, retval);
 
@@ -463,7 +489,8 @@ rockchip_thermal_register_sensor(struct platform_device *pdev,
 	int error;
 
 	tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
-	tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
+	tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
+			      thermal->tshut_temp);
 
 	sensor->thermal = thermal;
 	sensor->id = id;
@@ -681,7 +708,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 		thermal->chip->set_tshut_mode(id, thermal->regs,
 					      thermal->tshut_mode);
-		thermal->chip->set_tshut_temp(id, thermal->regs,
+		thermal->chip->set_tshut_temp(thermal->chip->table,
+					      id, thermal->regs,
 					      thermal->tshut_temp);
 	}
 
-- 
1.9.1

Re: [PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Eduardo Valentin]

Hello Caesar,

On Thu, Nov 05, 2015 at 01:18:00PM +0800, Caesar Wang wrote:
> We should make the conversion table in as a parameter since the different
> SoCs have the different conversionion table.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v2:
> - make the conversion table in as a parameter both code_to_temp
>   and temp_to_code function.


Now it looks cleaner. Thanks.

The comments below are probably not directly on this change. You may
want to add a different patch that takes care of the suggestions that
follows.

> Series-changes: 1
> - As Dmitry comment, make the conversion table in as a parameter.
> 
> Changes in v1: None
> 
>  drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
>  1 file changed, 55 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index bdf7063..e828f18 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -58,6 +58,16 @@ enum sensor_id {
>   */
>  #define SOC_MAX_SENSORS	2
>  
> +struct chip_tsadc_table {
> +	const struct tsadc_table *id;
> +
> +	/* the array table size*/
> +	unsigned int length;
> +
> +	/* that analogic mask data */
> +	unsigned long data_mask;

Are you sure this need to be long?

> +};
> +
>  struct rockchip_tsadc_chip {
>  	/* The sensor id of chip correspond to the ADC channel */
>  	int chn_id[SOC_MAX_SENSORS];
> @@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
>  	void (*control)(void __iomem *reg, bool on);
>  
>  	/* Per-sensor methods */
> -	int (*get_temp)(int chn, void __iomem *reg, int *temp);
> -	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
> +	int (*get_temp)(struct chip_tsadc_table table,
> +			int chn, void __iomem *reg, int *temp);
> +	void (*set_tshut_temp)(struct chip_tsadc_table table,
> +			       int chn, void __iomem *reg, long temp);

Temperature is currently represented as int not long in the thermal
framework. You may want to send a different patch that normalize the
temperature representation in your driver (long -> int).

>  	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
> +
> +	/* Per-table methods */
> +	struct chip_tsadc_table table;
>  };
>  
>  struct rockchip_thermal_sensor {
> @@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
>  	{3421, 125000},
>  };
>  
> -static u32 rk_tsadcv2_temp_to_code(long temp)
> +static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
> +				   long temp)

Same comment here.

>  {
>  	int high, low, mid;
>  
>  	low = 0;
> -	high = ARRAY_SIZE(v2_code_table) - 1;
> +	high = table.length - 1;
>  	mid = (high + low) / 2;
>  
> -	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
> +	if (temp < table.id[low].temp || temp > table.id[high].temp)
>  		return 0;
>  
>  	while (low <= high) {
> -		if (temp == v2_code_table[mid].temp)
> -			return v2_code_table[mid].code;
> -		else if (temp < v2_code_table[mid].temp)
> +		if (temp == table.id[mid].temp)
> +			return table.id[mid].code;
> +		else if (temp < table.id[mid].temp)
>  			high = mid - 1;
>  		else
>  			low = mid + 1;
> @@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
>  	return 0;
>  }
>  
> -static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
> +static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
> +				   int *temp)

Here you are ok already.

>  {
>  	unsigned int low = 1;
> -	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
> +	unsigned int high = table.length - 1;
>  	unsigned int mid = (low + high) / 2;
>  	unsigned int num;
>  	unsigned long denom;
>  
> -	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
> +	WARN_ON(table.length < 2);
>  
> -	code &= TSADCV2_DATA_MASK;
> -	if (code < v2_code_table[high].code)
> +	code &= table.data_mask;
> +	if (code < table.id[high].code)
>  		return -EAGAIN;		/* Incorrect reading */
>  
>  	while (low <= high) {
> -		if (code >= v2_code_table[mid].code &&
> -		    code < v2_code_table[mid - 1].code)
> +		if (code >= table.id[mid].code &&
> +		    code < table.id[mid - 1].code)
>  			break;
> -		else if (code < v2_code_table[mid].code)
> +		else if (code < table.id[mid].code)
>  			low = mid + 1;
>  		else
>  			high = mid - 1;
> @@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>  	 * temperature between 2 table entries is linear and interpolate
>  	 * to produce less granular result.
>  	 */
> -	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
> -	num *= v2_code_table[mid - 1].code - code;
> -	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
> -	*temp = v2_code_table[mid - 1].temp + (num / denom);
> +	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
> +	num *= table.id[mid - 1].code - code;
> +	denom = table.id[mid - 1].code - table.id[mid].code;
> +	*temp = table.id[mid - 1].temp + (num / denom);
>  
>  	return 0;
>  }
> @@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
>  	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
>  }
>  
> -static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
> +static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
> +			       int chn, void __iomem *regs, int *temp)
>  {
>  	u32 val;
>  
>  	val = readl_relaxed(regs + TSADCV2_DATA(chn));
>  
> -	return rk_tsadcv2_code_to_temp(val, temp);
> +	return rk_tsadcv2_code_to_temp(table, val, temp);
>  }
>  
> -static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
> +static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
> +				  int chn, void __iomem *regs, long temp)

Here needs fixing.


BR,

Eduardo Valentin

[PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Eduardo Valentin]

Hello Caesar,

On Thu, Nov 05, 2015 at 01:18:00PM +0800, Caesar Wang wrote:
> We should make the conversion table in as a parameter since the different
> SoCs have the different conversionion table.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v2:
> - make the conversion table in as a parameter both code_to_temp
>   and temp_to_code function.


Now it looks cleaner. Thanks.

The comments below are probably not directly on this change. You may
want to add a different patch that takes care of the suggestions that
follows.

> Series-changes: 1
> - As Dmitry comment, make the conversion table in as a parameter.
> 
> Changes in v1: None
> 
>  drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
>  1 file changed, 55 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index bdf7063..e828f18 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -58,6 +58,16 @@ enum sensor_id {
>   */
>  #define SOC_MAX_SENSORS	2
>  
> +struct chip_tsadc_table {
> +	const struct tsadc_table *id;
> +
> +	/* the array table size*/
> +	unsigned int length;
> +
> +	/* that analogic mask data */
> +	unsigned long data_mask;

Are you sure this need to be long?

> +};
> +
>  struct rockchip_tsadc_chip {
>  	/* The sensor id of chip correspond to the ADC channel */
>  	int chn_id[SOC_MAX_SENSORS];
> @@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
>  	void (*control)(void __iomem *reg, bool on);
>  
>  	/* Per-sensor methods */
> -	int (*get_temp)(int chn, void __iomem *reg, int *temp);
> -	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
> +	int (*get_temp)(struct chip_tsadc_table table,
> +			int chn, void __iomem *reg, int *temp);
> +	void (*set_tshut_temp)(struct chip_tsadc_table table,
> +			       int chn, void __iomem *reg, long temp);

Temperature is currently represented as int not long in the thermal
framework. You may want to send a different patch that normalize the
temperature representation in your driver (long -> int).

>  	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
> +
> +	/* Per-table methods */
> +	struct chip_tsadc_table table;
>  };
>  
>  struct rockchip_thermal_sensor {
> @@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
>  	{3421, 125000},
>  };
>  
> -static u32 rk_tsadcv2_temp_to_code(long temp)
> +static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
> +				   long temp)

Same comment here.

>  {
>  	int high, low, mid;
>  
>  	low = 0;
> -	high = ARRAY_SIZE(v2_code_table) - 1;
> +	high = table.length - 1;
>  	mid = (high + low) / 2;
>  
> -	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
> +	if (temp < table.id[low].temp || temp > table.id[high].temp)
>  		return 0;
>  
>  	while (low <= high) {
> -		if (temp == v2_code_table[mid].temp)
> -			return v2_code_table[mid].code;
> -		else if (temp < v2_code_table[mid].temp)
> +		if (temp == table.id[mid].temp)
> +			return table.id[mid].code;
> +		else if (temp < table.id[mid].temp)
>  			high = mid - 1;
>  		else
>  			low = mid + 1;
> @@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
>  	return 0;
>  }
>  
> -static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
> +static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
> +				   int *temp)

Here you are ok already.

>  {
>  	unsigned int low = 1;
> -	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
> +	unsigned int high = table.length - 1;
>  	unsigned int mid = (low + high) / 2;
>  	unsigned int num;
>  	unsigned long denom;
>  
> -	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
> +	WARN_ON(table.length < 2);
>  
> -	code &= TSADCV2_DATA_MASK;
> -	if (code < v2_code_table[high].code)
> +	code &= table.data_mask;
> +	if (code < table.id[high].code)
>  		return -EAGAIN;		/* Incorrect reading */
>  
>  	while (low <= high) {
> -		if (code >= v2_code_table[mid].code &&
> -		    code < v2_code_table[mid - 1].code)
> +		if (code >= table.id[mid].code &&
> +		    code < table.id[mid - 1].code)
>  			break;
> -		else if (code < v2_code_table[mid].code)
> +		else if (code < table.id[mid].code)
>  			low = mid + 1;
>  		else
>  			high = mid - 1;
> @@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>  	 * temperature between 2 table entries is linear and interpolate
>  	 * to produce less granular result.
>  	 */
> -	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
> -	num *= v2_code_table[mid - 1].code - code;
> -	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
> -	*temp = v2_code_table[mid - 1].temp + (num / denom);
> +	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
> +	num *= table.id[mid - 1].code - code;
> +	denom = table.id[mid - 1].code - table.id[mid].code;
> +	*temp = table.id[mid - 1].temp + (num / denom);
>  
>  	return 0;
>  }
> @@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
>  	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
>  }
>  
> -static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
> +static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
> +			       int chn, void __iomem *regs, int *temp)
>  {
>  	u32 val;
>  
>  	val = readl_relaxed(regs + TSADCV2_DATA(chn));
>  
> -	return rk_tsadcv2_code_to_temp(val, temp);
> +	return rk_tsadcv2_code_to_temp(table, val, temp);
>  }
>  
> -static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
> +static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
> +				  int chn, void __iomem *regs, long temp)

Here needs fixing.


BR,

Eduardo Valentin

Re: [PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Caesar Wang]

Hello Eduardo,

在 2015年11月07日 03:00, Eduardo Valentin 写道:
> Hello Caesar,
>
> On Thu, Nov 05, 2015 at 01:18:00PM +0800, Caesar Wang wrote:
>> We should make the conversion table in as a parameter since the different
>> SoCs have the different conversionion table.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2:
>> - make the conversion table in as a parameter both code_to_temp
>>    and temp_to_code function.
>
> Now it looks cleaner. Thanks.
>
> The comments below are probably not directly on this change. You may
> want to add a different patch that takes care of the suggestions that
> follows.

Okay, I will send a another patch to fix it.
Thanks your reviewing this patch.




>> Series-changes: 1
>> - As Dmitry comment, make the conversion table in as a parameter.
>>
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
>>   1 file changed, 55 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index bdf7063..e828f18 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -58,6 +58,16 @@ enum sensor_id {
>>    */
>>   #define SOC_MAX_SENSORS	2
>>   
>> +struct chip_tsadc_table {
>> +	const struct tsadc_table *id;
>> +
>> +	/* the array table size*/
>> +	unsigned int length;
>> +
>> +	/* that analogic mask data */
>> +	unsigned long data_mask;
> Are you sure this need to be long?

Seem.....we should mark the 'unsigned int  or u32'.


>> +};
>> +
>>   struct rockchip_tsadc_chip {
>>   	/* The sensor id of chip correspond to the ADC channel */
>>   	int chn_id[SOC_MAX_SENSORS];
>> @@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
>>   	void (*control)(void __iomem *reg, bool on);
>>   
>>   	/* Per-sensor methods */
>> -	int (*get_temp)(int chn, void __iomem *reg, int *temp);
>> -	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
>> +	int (*get_temp)(struct chip_tsadc_table table,
>> +			int chn, void __iomem *reg, int *temp);
>> +	void (*set_tshut_temp)(struct chip_tsadc_table table,
>> +			       int chn, void __iomem *reg, long temp);
> Temperature is currently represented as int not long in the thermal
> framework. You may want to send a different patch that normalize the
> temperature representation in your driver (long -> int).

Okay

>>   	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
>> +
>> +	/* Per-table methods */
>> +	struct chip_tsadc_table table;
>>   };
>>   
>>   struct rockchip_thermal_sensor {
>> @@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
>>   	{3421, 125000},
>>   };
>>   
>> -static u32 rk_tsadcv2_temp_to_code(long temp)
>> +static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>> +				   long temp)
> Same comment here.

Okay
>>   {
>>   	int high, low, mid;
>>   
>>   	low = 0;
>> -	high = ARRAY_SIZE(v2_code_table) - 1;
>> +	high = table.length - 1;
>>   	mid = (high + low) / 2;
>>   
>> -	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
>> +	if (temp < table.id[low].temp || temp > table.id[high].temp)
>>   		return 0;
>>   
>>   	while (low <= high) {
>> -		if (temp == v2_code_table[mid].temp)
>> -			return v2_code_table[mid].code;
>> -		else if (temp < v2_code_table[mid].temp)
>> +		if (temp == table.id[mid].temp)
>> +			return table.id[mid].code;
>> +		else if (temp < table.id[mid].temp)
>>   			high = mid - 1;
>>   		else
>>   			low = mid + 1;
>> @@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
>>   	return 0;
>>   }
>>   
>> -static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>> +static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>> +				   int *temp)
> Here you are ok already.
>
>>   {
>>   	unsigned int low = 1;
>> -	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
>> +	unsigned int high = table.length - 1;
>>   	unsigned int mid = (low + high) / 2;
>>   	unsigned int num;
>>   	unsigned long denom;
>>   
>> -	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
>> +	WARN_ON(table.length < 2);
>>   
>> -	code &= TSADCV2_DATA_MASK;
>> -	if (code < v2_code_table[high].code)
>> +	code &= table.data_mask;
>> +	if (code < table.id[high].code)
>>   		return -EAGAIN;		/* Incorrect reading */
>>   
>>   	while (low <= high) {
>> -		if (code >= v2_code_table[mid].code &&
>> -		    code < v2_code_table[mid - 1].code)
>> +		if (code >= table.id[mid].code &&
>> +		    code < table.id[mid - 1].code)
>>   			break;
>> -		else if (code < v2_code_table[mid].code)
>> +		else if (code < table.id[mid].code)
>>   			low = mid + 1;
>>   		else
>>   			high = mid - 1;
>> @@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>>   	 * temperature between 2 table entries is linear and interpolate
>>   	 * to produce less granular result.
>>   	 */
>> -	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
>> -	num *= v2_code_table[mid - 1].code - code;
>> -	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
>> -	*temp = v2_code_table[mid - 1].temp + (num / denom);
>> +	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>> +	num *= table.id[mid - 1].code - code;
>> +	denom = table.id[mid - 1].code - table.id[mid].code;
>> +	*temp = table.id[mid - 1].temp + (num / denom);
>>   
>>   	return 0;
>>   }
>> @@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
>>   	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
>>   }
>>   
>> -static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
>> +static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
>> +			       int chn, void __iomem *regs, int *temp)
>>   {
>>   	u32 val;
>>   
>>   	val = readl_relaxed(regs + TSADCV2_DATA(chn));
>>   
>> -	return rk_tsadcv2_code_to_temp(val, temp);
>> +	return rk_tsadcv2_code_to_temp(table, val, temp);
>>   }
>>   
>> -static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
>> +static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
>> +				  int chn, void __iomem *regs, long temp)
> Here needs fixing.

Okay.

>
> BR,
>
> Eduardo Valentin
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Caesar Wang]

Hello Eduardo,

? 2015?11?07? 03:00, Eduardo Valentin ??:
> Hello Caesar,
>
> On Thu, Nov 05, 2015 at 01:18:00PM +0800, Caesar Wang wrote:
>> We should make the conversion table in as a parameter since the different
>> SoCs have the different conversionion table.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2:
>> - make the conversion table in as a parameter both code_to_temp
>>    and temp_to_code function.
>
> Now it looks cleaner. Thanks.
>
> The comments below are probably not directly on this change. You may
> want to add a different patch that takes care of the suggestions that
> follows.

Okay, I will send a another patch to fix it.
Thanks your reviewing this patch.




>> Series-changes: 1
>> - As Dmitry comment, make the conversion table in as a parameter.
>>
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
>>   1 file changed, 55 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index bdf7063..e828f18 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -58,6 +58,16 @@ enum sensor_id {
>>    */
>>   #define SOC_MAX_SENSORS	2
>>   
>> +struct chip_tsadc_table {
>> +	const struct tsadc_table *id;
>> +
>> +	/* the array table size*/
>> +	unsigned int length;
>> +
>> +	/* that analogic mask data */
>> +	unsigned long data_mask;
> Are you sure this need to be long?

Seem.....we should mark the 'unsigned int  or u32'.


>> +};
>> +
>>   struct rockchip_tsadc_chip {
>>   	/* The sensor id of chip correspond to the ADC channel */
>>   	int chn_id[SOC_MAX_SENSORS];
>> @@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
>>   	void (*control)(void __iomem *reg, bool on);
>>   
>>   	/* Per-sensor methods */
>> -	int (*get_temp)(int chn, void __iomem *reg, int *temp);
>> -	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
>> +	int (*get_temp)(struct chip_tsadc_table table,
>> +			int chn, void __iomem *reg, int *temp);
>> +	void (*set_tshut_temp)(struct chip_tsadc_table table,
>> +			       int chn, void __iomem *reg, long temp);
> Temperature is currently represented as int not long in the thermal
> framework. You may want to send a different patch that normalize the
> temperature representation in your driver (long -> int).

Okay

>>   	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
>> +
>> +	/* Per-table methods */
>> +	struct chip_tsadc_table table;
>>   };
>>   
>>   struct rockchip_thermal_sensor {
>> @@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
>>   	{3421, 125000},
>>   };
>>   
>> -static u32 rk_tsadcv2_temp_to_code(long temp)
>> +static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>> +				   long temp)
> Same comment here.

Okay
>>   {
>>   	int high, low, mid;
>>   
>>   	low = 0;
>> -	high = ARRAY_SIZE(v2_code_table) - 1;
>> +	high = table.length - 1;
>>   	mid = (high + low) / 2;
>>   
>> -	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
>> +	if (temp < table.id[low].temp || temp > table.id[high].temp)
>>   		return 0;
>>   
>>   	while (low <= high) {
>> -		if (temp == v2_code_table[mid].temp)
>> -			return v2_code_table[mid].code;
>> -		else if (temp < v2_code_table[mid].temp)
>> +		if (temp == table.id[mid].temp)
>> +			return table.id[mid].code;
>> +		else if (temp < table.id[mid].temp)
>>   			high = mid - 1;
>>   		else
>>   			low = mid + 1;
>> @@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
>>   	return 0;
>>   }
>>   
>> -static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>> +static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>> +				   int *temp)
> Here you are ok already.
>
>>   {
>>   	unsigned int low = 1;
>> -	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
>> +	unsigned int high = table.length - 1;
>>   	unsigned int mid = (low + high) / 2;
>>   	unsigned int num;
>>   	unsigned long denom;
>>   
>> -	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
>> +	WARN_ON(table.length < 2);
>>   
>> -	code &= TSADCV2_DATA_MASK;
>> -	if (code < v2_code_table[high].code)
>> +	code &= table.data_mask;
>> +	if (code < table.id[high].code)
>>   		return -EAGAIN;		/* Incorrect reading */
>>   
>>   	while (low <= high) {
>> -		if (code >= v2_code_table[mid].code &&
>> -		    code < v2_code_table[mid - 1].code)
>> +		if (code >= table.id[mid].code &&
>> +		    code < table.id[mid - 1].code)
>>   			break;
>> -		else if (code < v2_code_table[mid].code)
>> +		else if (code < table.id[mid].code)
>>   			low = mid + 1;
>>   		else
>>   			high = mid - 1;
>> @@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>>   	 * temperature between 2 table entries is linear and interpolate
>>   	 * to produce less granular result.
>>   	 */
>> -	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
>> -	num *= v2_code_table[mid - 1].code - code;
>> -	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
>> -	*temp = v2_code_table[mid - 1].temp + (num / denom);
>> +	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>> +	num *= table.id[mid - 1].code - code;
>> +	denom = table.id[mid - 1].code - table.id[mid].code;
>> +	*temp = table.id[mid - 1].temp + (num / denom);
>>   
>>   	return 0;
>>   }
>> @@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
>>   	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
>>   }
>>   
>> -static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
>> +static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
>> +			       int chn, void __iomem *regs, int *temp)
>>   {
>>   	u32 val;
>>   
>>   	val = readl_relaxed(regs + TSADCV2_DATA(chn));
>>   
>> -	return rk_tsadcv2_code_to_temp(val, temp);
>> +	return rk_tsadcv2_code_to_temp(table, val, temp);
>>   }
>>   
>> -static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
>> +static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
>> +				  int chn, void __iomem *regs, long temp)
> Here needs fixing.

Okay.

>
> BR,
>
> Eduardo Valentin
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip

Re: [PATCH v2 4/9] thermal: rockchip: improve the conversion function

[Caesar Wang]

Hello Eduardo,

在 2015年11月07日 03:00, Eduardo Valentin 写道:
> Hello Caesar,
>
> On Thu, Nov 05, 2015 at 01:18:00PM +0800, Caesar Wang wrote:
>> We should make the conversion table in as a parameter since the different
>> SoCs have the different conversionion table.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2:
>> - make the conversion table in as a parameter both code_to_temp
>>    and temp_to_code function.
>
> Now it looks cleaner. Thanks.
>
> The comments below are probably not directly on this change. You may
> want to add a different patch that takes care of the suggestions that
> follows.

Okay, I will send a another patch to fix it.
Thanks your reviewing this patch.




>> Series-changes: 1
>> - As Dmitry comment, make the conversion table in as a parameter.
>>
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 82 +++++++++++++++++++++++++-------------
>>   1 file changed, 55 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index bdf7063..e828f18 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -58,6 +58,16 @@ enum sensor_id {
>>    */
>>   #define SOC_MAX_SENSORS	2
>>   
>> +struct chip_tsadc_table {
>> +	const struct tsadc_table *id;
>> +
>> +	/* the array table size*/
>> +	unsigned int length;
>> +
>> +	/* that analogic mask data */
>> +	unsigned long data_mask;
> Are you sure this need to be long?

Seem.....we should mark the 'unsigned int  or u32'.


>> +};
>> +
>>   struct rockchip_tsadc_chip {
>>   	/* The sensor id of chip correspond to the ADC channel */
>>   	int chn_id[SOC_MAX_SENSORS];
>> @@ -74,9 +84,14 @@ struct rockchip_tsadc_chip {
>>   	void (*control)(void __iomem *reg, bool on);
>>   
>>   	/* Per-sensor methods */
>> -	int (*get_temp)(int chn, void __iomem *reg, int *temp);
>> -	void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
>> +	int (*get_temp)(struct chip_tsadc_table table,
>> +			int chn, void __iomem *reg, int *temp);
>> +	void (*set_tshut_temp)(struct chip_tsadc_table table,
>> +			       int chn, void __iomem *reg, long temp);
> Temperature is currently represented as int not long in the thermal
> framework. You may want to send a different patch that normalize the
> temperature representation in your driver (long -> int).

Okay

>>   	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
>> +
>> +	/* Per-table methods */
>> +	struct chip_tsadc_table table;
>>   };
>>   
>>   struct rockchip_thermal_sensor {
>> @@ -172,21 +187,22 @@ static const struct tsadc_table v2_code_table[] = {
>>   	{3421, 125000},
>>   };
>>   
>> -static u32 rk_tsadcv2_temp_to_code(long temp)
>> +static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>> +				   long temp)
> Same comment here.

Okay
>>   {
>>   	int high, low, mid;
>>   
>>   	low = 0;
>> -	high = ARRAY_SIZE(v2_code_table) - 1;
>> +	high = table.length - 1;
>>   	mid = (high + low) / 2;
>>   
>> -	if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
>> +	if (temp < table.id[low].temp || temp > table.id[high].temp)
>>   		return 0;
>>   
>>   	while (low <= high) {
>> -		if (temp == v2_code_table[mid].temp)
>> -			return v2_code_table[mid].code;
>> -		else if (temp < v2_code_table[mid].temp)
>> +		if (temp == table.id[mid].temp)
>> +			return table.id[mid].code;
>> +		else if (temp < table.id[mid].temp)
>>   			high = mid - 1;
>>   		else
>>   			low = mid + 1;
>> @@ -196,25 +212,26 @@ static u32 rk_tsadcv2_temp_to_code(long temp)
>>   	return 0;
>>   }
>>   
>> -static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>> +static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>> +				   int *temp)
> Here you are ok already.
>
>>   {
>>   	unsigned int low = 1;
>> -	unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
>> +	unsigned int high = table.length - 1;
>>   	unsigned int mid = (low + high) / 2;
>>   	unsigned int num;
>>   	unsigned long denom;
>>   
>> -	BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
>> +	WARN_ON(table.length < 2);
>>   
>> -	code &= TSADCV2_DATA_MASK;
>> -	if (code < v2_code_table[high].code)
>> +	code &= table.data_mask;
>> +	if (code < table.id[high].code)
>>   		return -EAGAIN;		/* Incorrect reading */
>>   
>>   	while (low <= high) {
>> -		if (code >= v2_code_table[mid].code &&
>> -		    code < v2_code_table[mid - 1].code)
>> +		if (code >= table.id[mid].code &&
>> +		    code < table.id[mid - 1].code)
>>   			break;
>> -		else if (code < v2_code_table[mid].code)
>> +		else if (code < table.id[mid].code)
>>   			low = mid + 1;
>>   		else
>>   			high = mid - 1;
>> @@ -227,10 +244,10 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>>   	 * temperature between 2 table entries is linear and interpolate
>>   	 * to produce less granular result.
>>   	 */
>> -	num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
>> -	num *= v2_code_table[mid - 1].code - code;
>> -	denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
>> -	*temp = v2_code_table[mid - 1].temp + (num / denom);
>> +	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>> +	num *= table.id[mid - 1].code - code;
>> +	denom = table.id[mid - 1].code - table.id[mid].code;
>> +	*temp = table.id[mid - 1].temp + (num / denom);
>>   
>>   	return 0;
>>   }
>> @@ -290,20 +307,22 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
>>   	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
>>   }
>>   
>> -static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
>> +static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
>> +			       int chn, void __iomem *regs, int *temp)
>>   {
>>   	u32 val;
>>   
>>   	val = readl_relaxed(regs + TSADCV2_DATA(chn));
>>   
>> -	return rk_tsadcv2_code_to_temp(val, temp);
>> +	return rk_tsadcv2_code_to_temp(table, val, temp);
>>   }
>>   
>> -static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
>> +static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
>> +				  int chn, void __iomem *regs, long temp)
> Here needs fixing.

Okay.

>
> BR,
>
> Eduardo Valentin
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

[PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Caesar Wang]

The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.

Moment, we can add the flag to be better support the *code_to_temp*
for differenr SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 13 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e828f18..9df027f 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -53,6 +53,16 @@ enum sensor_id {
 };
 
 /**
+* The conversion table has the adc value and temperature.
+* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
+* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
+*/
+enum adc_flag {
+	ADC_DECREMENT = 0,
+	ADC_INCREMENT,
+};
+
+/**
  * The max sensors is two in rockchip SoCs.
  * Two sensors: CPU and GPU sensor.
  */
@@ -66,6 +76,9 @@ struct chip_tsadc_table {
 
 	/* that analogic mask data */
 	unsigned long data_mask;
+
+	/* adc value is increment or decrement */
+	unsigned int flag;
 };
 
 struct rockchip_tsadc_chip {
@@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 
 	WARN_ON(table.length < 2);
 
-	code &= table.data_mask;
-	if (code < table.id[high].code)
+	switch (table.flag) {
+	case ADC_DECREMENT:
+		code &= table.data_mask;
+		if (code < table.id[high].code)
 		return -EAGAIN;		/* Incorrect reading */
 
-	while (low <= high) {
-		if (code >= table.id[mid].code &&
-		    code < table.id[mid - 1].code)
-			break;
-		else if (code < table.id[mid].code)
-			low = mid + 1;
-		else
-			high = mid - 1;
-		mid = (low + high) / 2;
+		while (low <= high) {
+			if (code >= table.id[mid].code &&
+			    code < table.id[mid - 1].code)
+				break;
+			else if (code < table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	case ADC_INCREMENT:
+		code &= table.data_mask;
+		if (code < table.id[low].code)
+		return -EAGAIN;		/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table.id[mid - 1].code &&
+			    code < table.id[mid].code)
+				break;
+			else if (code > table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	default:
+		pr_err("Invalid the table conversion\n");
 	}
 
 	/*
@@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 	 * to produce less granular result.
 	 */
 	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
-	num *= table.id[mid - 1].code - code;
-	denom = table.id[mid - 1].code - table.id[mid].code;
+	num *= abs(table.id[mid - 1].code - code);
+	denom = abs(table.id[mid - 1].code - table.id[mid].code);
 	*temp = table.id[mid - 1].temp + (num / denom);
 
 	return 0;
@@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 		.id = v2_code_table,
 		.length = ARRAY_SIZE(v2_code_table),
 		.data_mask = TSADCV2_DATA_MASK,
+		.flag = ADC_DECREMENT,
 	},
 };
 
-- 
1.9.1

[PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Caesar Wang]

The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.

Moment, we can add the flag to be better support the *code_to_temp*
for differenr SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 13 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e828f18..9df027f 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -53,6 +53,16 @@ enum sensor_id {
 };
 
 /**
+* The conversion table has the adc value and temperature.
+* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
+* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
+*/
+enum adc_flag {
+	ADC_DECREMENT = 0,
+	ADC_INCREMENT,
+};
+
+/**
  * The max sensors is two in rockchip SoCs.
  * Two sensors: CPU and GPU sensor.
  */
@@ -66,6 +76,9 @@ struct chip_tsadc_table {
 
 	/* that analogic mask data */
 	unsigned long data_mask;
+
+	/* adc value is increment or decrement */
+	unsigned int flag;
 };
 
 struct rockchip_tsadc_chip {
@@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 
 	WARN_ON(table.length < 2);
 
-	code &= table.data_mask;
-	if (code < table.id[high].code)
+	switch (table.flag) {
+	case ADC_DECREMENT:
+		code &= table.data_mask;
+		if (code < table.id[high].code)
 		return -EAGAIN;		/* Incorrect reading */
 
-	while (low <= high) {
-		if (code >= table.id[mid].code &&
-		    code < table.id[mid - 1].code)
-			break;
-		else if (code < table.id[mid].code)
-			low = mid + 1;
-		else
-			high = mid - 1;
-		mid = (low + high) / 2;
+		while (low <= high) {
+			if (code >= table.id[mid].code &&
+			    code < table.id[mid - 1].code)
+				break;
+			else if (code < table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	case ADC_INCREMENT:
+		code &= table.data_mask;
+		if (code < table.id[low].code)
+		return -EAGAIN;		/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table.id[mid - 1].code &&
+			    code < table.id[mid].code)
+				break;
+			else if (code > table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	default:
+		pr_err("Invalid the table conversion\n");
 	}
 
 	/*
@@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 	 * to produce less granular result.
 	 */
 	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
-	num *= table.id[mid - 1].code - code;
-	denom = table.id[mid - 1].code - table.id[mid].code;
+	num *= abs(table.id[mid - 1].code - code);
+	denom = abs(table.id[mid - 1].code - table.id[mid].code);
 	*temp = table.id[mid - 1].temp + (num / denom);
 
 	return 0;
@@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 		.id = v2_code_table,
 		.length = ARRAY_SIZE(v2_code_table),
 		.data_mask = TSADCV2_DATA_MASK,
+		.flag = ADC_DECREMENT,
 	},
 };
 
-- 
1.9.1

Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
> The conversion table has the adc value and temperature.
> In fact, the adc value only has the increment or decrement mode in
> conversion table.
> 
> Moment, we can add the flag to be better support the *code_to_temp*
> for differenr SoCs.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
>  1 file changed, 51 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index e828f18..9df027f 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -53,6 +53,16 @@ enum sensor_id {
>  };
>  
>  /**
> +* The conversion table has the adc value and temperature.
> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
> +*/
> +enum adc_flag {
> +	ADC_DECREMENT = 0,
> +	ADC_INCREMENT,
> +};
> +
> +/**
>   * The max sensors is two in rockchip SoCs.
>   * Two sensors: CPU and GPU sensor.
>   */
> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>  
>  	/* that analogic mask data */
>  	unsigned long data_mask;
> +
> +	/* adc value is increment or decrement */
> +	unsigned int flag;


Maybe bool? And rename to something more meaningful?

Or do you plan to have more conditions to test in your flag?

>  };
>  
>  struct rockchip_tsadc_chip {
> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>  
>  	WARN_ON(table.length < 2);
>  
> -	code &= table.data_mask;
> -	if (code < table.id[high].code)
> +	switch (table.flag) {
> +	case ADC_DECREMENT:
> +		code &= table.data_mask;
> +		if (code < table.id[high].code)
>  		return -EAGAIN;		/* Incorrect reading */

Add an indentation.
>  
> -	while (low <= high) {
> -		if (code >= table.id[mid].code &&
> -		    code < table.id[mid - 1].code)
> -			break;
> -		else if (code < table.id[mid].code)
> -			low = mid + 1;
> -		else
> -			high = mid - 1;
> -		mid = (low + high) / 2;
> +		while (low <= high) {
> +			if (code >= table.id[mid].code &&
> +			    code < table.id[mid - 1].code)
> +				break;
> +			else if (code < table.id[mid].code)
> +				low = mid + 1;
> +			else
> +				high = mid - 1;
> +
> +			mid = (low + high) / 2;
> +		}
> +		break;
> +	case ADC_INCREMENT:
> +		code &= table.data_mask;
> +		if (code < table.id[low].code)
> +		return -EAGAIN;		/* Incorrect reading */
> +
add an indentation.

> +		while (low <= high) {
> +			if (code >= table.id[mid - 1].code &&
> +			    code < table.id[mid].code)
> +				break;
> +			else if (code > table.id[mid].code)
> +				low = mid + 1;
> +			else
> +				high = mid - 1;
> +
> +			mid = (low + high) / 2;
> +		}
> +		break;
> +	default:
> +		pr_err("Invalid the table conversion\n");
>  	}
>  
>  	/*
> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>  	 * to produce less granular result.
>  	 */
>  	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
> -	num *= table.id[mid - 1].code - code;
> -	denom = table.id[mid - 1].code - table.id[mid].code;
> +	num *= abs(table.id[mid - 1].code - code);
> +	denom = abs(table.id[mid - 1].code - table.id[mid].code);
>  	*temp = table.id[mid - 1].temp + (num / denom);
>  
>  	return 0;
> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>  		.id = v2_code_table,
>  		.length = ARRAY_SIZE(v2_code_table),
>  		.data_mask = TSADCV2_DATA_MASK,
> +		.flag = ADC_DECREMENT,
>  	},
>  };
>  
> -- 
> 1.9.1
> 

[PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
> The conversion table has the adc value and temperature.
> In fact, the adc value only has the increment or decrement mode in
> conversion table.
> 
> Moment, we can add the flag to be better support the *code_to_temp*
> for differenr SoCs.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
>  1 file changed, 51 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index e828f18..9df027f 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -53,6 +53,16 @@ enum sensor_id {
>  };
>  
>  /**
> +* The conversion table has the adc value and temperature.
> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
> +*/
> +enum adc_flag {
> +	ADC_DECREMENT = 0,
> +	ADC_INCREMENT,
> +};
> +
> +/**
>   * The max sensors is two in rockchip SoCs.
>   * Two sensors: CPU and GPU sensor.
>   */
> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>  
>  	/* that analogic mask data */
>  	unsigned long data_mask;
> +
> +	/* adc value is increment or decrement */
> +	unsigned int flag;


Maybe bool? And rename to something more meaningful?

Or do you plan to have more conditions to test in your flag?

>  };
>  
>  struct rockchip_tsadc_chip {
> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>  
>  	WARN_ON(table.length < 2);
>  
> -	code &= table.data_mask;
> -	if (code < table.id[high].code)
> +	switch (table.flag) {
> +	case ADC_DECREMENT:
> +		code &= table.data_mask;
> +		if (code < table.id[high].code)
>  		return -EAGAIN;		/* Incorrect reading */

Add an indentation.
>  
> -	while (low <= high) {
> -		if (code >= table.id[mid].code &&
> -		    code < table.id[mid - 1].code)
> -			break;
> -		else if (code < table.id[mid].code)
> -			low = mid + 1;
> -		else
> -			high = mid - 1;
> -		mid = (low + high) / 2;
> +		while (low <= high) {
> +			if (code >= table.id[mid].code &&
> +			    code < table.id[mid - 1].code)
> +				break;
> +			else if (code < table.id[mid].code)
> +				low = mid + 1;
> +			else
> +				high = mid - 1;
> +
> +			mid = (low + high) / 2;
> +		}
> +		break;
> +	case ADC_INCREMENT:
> +		code &= table.data_mask;
> +		if (code < table.id[low].code)
> +		return -EAGAIN;		/* Incorrect reading */
> +
add an indentation.

> +		while (low <= high) {
> +			if (code >= table.id[mid - 1].code &&
> +			    code < table.id[mid].code)
> +				break;
> +			else if (code > table.id[mid].code)
> +				low = mid + 1;
> +			else
> +				high = mid - 1;
> +
> +			mid = (low + high) / 2;
> +		}
> +		break;
> +	default:
> +		pr_err("Invalid the table conversion\n");
>  	}
>  
>  	/*
> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>  	 * to produce less granular result.
>  	 */
>  	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
> -	num *= table.id[mid - 1].code - code;
> -	denom = table.id[mid - 1].code - table.id[mid].code;
> +	num *= abs(table.id[mid - 1].code - code);
> +	denom = abs(table.id[mid - 1].code - table.id[mid].code);
>  	*temp = table.id[mid - 1].temp + (num / denom);
>  
>  	return 0;
> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>  		.id = v2_code_table,
>  		.length = ARRAY_SIZE(v2_code_table),
>  		.data_mask = TSADCV2_DATA_MASK,
> +		.flag = ADC_DECREMENT,
>  	},
>  };
>  
> -- 
> 1.9.1
> 

Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Caesar Wang]

Hello Eduardo,

在 2015年11月07日 03:11, Eduardo Valentin 写道:
> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>> The conversion table has the adc value and temperature.
>> In fact, the adc value only has the increment or decrement mode in
>> conversion table.
>>
>> Moment, we can add the flag to be better support the *code_to_temp*
>> for differenr SoCs.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2: None
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index e828f18..9df027f 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -53,6 +53,16 @@ enum sensor_id {
>>   };
>>   
>>   /**
>> +* The conversion table has the adc value and temperature.
>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>> +*/
>> +enum adc_flag {
>> +	ADC_DECREMENT = 0,
>> +	ADC_INCREMENT,
>> +};
>> +
>> +/**
>>    * The max sensors is two in rockchip SoCs.
>>    * Two sensors: CPU and GPU sensor.
>>    */
>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>   
>>   	/* that analogic mask data */
>>   	unsigned long data_mask;
>> +
>> +	/* adc value is increment or decrement */
>> +	unsigned int flag;
>
> Maybe bool? And rename to something more meaningful?

Sure, that should be a bool type.
I guess the rename in sort_flag......(maybe will have a better name)


>
> Or do you plan to have more conditions to test in your flag?

Moment, the flag (increment or decrement) can support all the rockchip 
series SoCs have thermal function.

>>   };
>>   
>>   struct rockchip_tsadc_chip {
>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>>   
>>   	WARN_ON(table.length < 2);
>>   
>> -	code &= table.data_mask;
>> -	if (code < table.id[high].code)
>> +	switch (table.flag) {
>> +	case ADC_DECREMENT:
>> +		code &= table.data_mask;
>> +		if (code < table.id[high].code)
>>   		return -EAGAIN;		/* Incorrect reading */
> Add an indentation.

Thanks, will be fixed in next patch.


>>   
>> -	while (low <= high) {
>> -		if (code >= table.id[mid].code &&
>> -		    code < table.id[mid - 1].code)
>> -			break;
>> -		else if (code < table.id[mid].code)
>> -			low = mid + 1;
>> -		else
>> -			high = mid - 1;
>> -		mid = (low + high) / 2;
>> +		while (low <= high) {
>> +			if (code >= table.id[mid].code &&
>> +			    code < table.id[mid - 1].code)
>> +				break;
>> +			else if (code < table.id[mid].code)
>> +				low = mid + 1;
>> +			else
>> +				high = mid - 1;
>> +
>> +			mid = (low + high) / 2;
>> +		}
>> +		break;
>> +	case ADC_INCREMENT:
>> +		code &= table.data_mask;
>> +		if (code < table.id[low].code)
>> +		return -EAGAIN;		/* Incorrect reading */
>> +
> add an indentation.

Ditto.

Thanks,
Caesar
>
>> +		while (low <= high) {
>> +			if (code >= table.id[mid - 1].code &&
>> +			    code < table.id[mid].code)
>> +				break;
>> +			else if (code > table.id[mid].code)
>> +				low = mid + 1;
>> +			else
>> +				high = mid - 1;
>> +
>> +			mid = (low + high) / 2;
>> +		}
>> +		break;
>> +	default:
>> +		pr_err("Invalid the table conversion\n");
>>   	}
>>   
>>   	/*
>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>>   	 * to produce less granular result.
>>   	 */
>>   	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>> -	num *= table.id[mid - 1].code - code;
>> -	denom = table.id[mid - 1].code - table.id[mid].code;
>> +	num *= abs(table.id[mid - 1].code - code);
>> +	denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>   	*temp = table.id[mid - 1].temp + (num / denom);
>>   
>>   	return 0;
>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>>   		.id = v2_code_table,
>>   		.length = ARRAY_SIZE(v2_code_table),
>>   		.data_mask = TSADCV2_DATA_MASK,
>> +		.flag = ADC_DECREMENT,
>>   	},
>>   };
>>   
>> -- 
>> 1.9.1
>>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Caesar Wang]

Hello Eduardo,

? 2015?11?07? 03:11, Eduardo Valentin ??:
> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>> The conversion table has the adc value and temperature.
>> In fact, the adc value only has the increment or decrement mode in
>> conversion table.
>>
>> Moment, we can add the flag to be better support the *code_to_temp*
>> for differenr SoCs.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2: None
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index e828f18..9df027f 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -53,6 +53,16 @@ enum sensor_id {
>>   };
>>   
>>   /**
>> +* The conversion table has the adc value and temperature.
>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>> +*/
>> +enum adc_flag {
>> +	ADC_DECREMENT = 0,
>> +	ADC_INCREMENT,
>> +};
>> +
>> +/**
>>    * The max sensors is two in rockchip SoCs.
>>    * Two sensors: CPU and GPU sensor.
>>    */
>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>   
>>   	/* that analogic mask data */
>>   	unsigned long data_mask;
>> +
>> +	/* adc value is increment or decrement */
>> +	unsigned int flag;
>
> Maybe bool? And rename to something more meaningful?

Sure, that should be a bool type.
I guess the rename in sort_flag......(maybe will have a better name)


>
> Or do you plan to have more conditions to test in your flag?

Moment, the flag (increment or decrement) can support all the rockchip 
series SoCs have thermal function.

>>   };
>>   
>>   struct rockchip_tsadc_chip {
>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>>   
>>   	WARN_ON(table.length < 2);
>>   
>> -	code &= table.data_mask;
>> -	if (code < table.id[high].code)
>> +	switch (table.flag) {
>> +	case ADC_DECREMENT:
>> +		code &= table.data_mask;
>> +		if (code < table.id[high].code)
>>   		return -EAGAIN;		/* Incorrect reading */
> Add an indentation.

Thanks, will be fixed in next patch.


>>   
>> -	while (low <= high) {
>> -		if (code >= table.id[mid].code &&
>> -		    code < table.id[mid - 1].code)
>> -			break;
>> -		else if (code < table.id[mid].code)
>> -			low = mid + 1;
>> -		else
>> -			high = mid - 1;
>> -		mid = (low + high) / 2;
>> +		while (low <= high) {
>> +			if (code >= table.id[mid].code &&
>> +			    code < table.id[mid - 1].code)
>> +				break;
>> +			else if (code < table.id[mid].code)
>> +				low = mid + 1;
>> +			else
>> +				high = mid - 1;
>> +
>> +			mid = (low + high) / 2;
>> +		}
>> +		break;
>> +	case ADC_INCREMENT:
>> +		code &= table.data_mask;
>> +		if (code < table.id[low].code)
>> +		return -EAGAIN;		/* Incorrect reading */
>> +
> add an indentation.

Ditto.

Thanks,
Caesar
>
>> +		while (low <= high) {
>> +			if (code >= table.id[mid - 1].code &&
>> +			    code < table.id[mid].code)
>> +				break;
>> +			else if (code > table.id[mid].code)
>> +				low = mid + 1;
>> +			else
>> +				high = mid - 1;
>> +
>> +			mid = (low + high) / 2;
>> +		}
>> +		break;
>> +	default:
>> +		pr_err("Invalid the table conversion\n");
>>   	}
>>   
>>   	/*
>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>>   	 * to produce less granular result.
>>   	 */
>>   	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>> -	num *= table.id[mid - 1].code - code;
>> -	denom = table.id[mid - 1].code - table.id[mid].code;
>> +	num *= abs(table.id[mid - 1].code - code);
>> +	denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>   	*temp = table.id[mid - 1].temp + (num / denom);
>>   
>>   	return 0;
>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>>   		.id = v2_code_table,
>>   		.length = ARRAY_SIZE(v2_code_table),
>>   		.data_mask = TSADCV2_DATA_MASK,
>> +		.flag = ADC_DECREMENT,
>>   	},
>>   };
>>   
>> -- 
>> 1.9.1
>>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Caesar Wang]

在 2015年11月07日 23:38, Caesar Wang 写道:
> Hello Eduardo,
>
> 在 2015年11月07日 03:11, Eduardo Valentin 写道:
>> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>>> The conversion table has the adc value and temperature.
>>> In fact, the adc value only has the increment or decrement mode in
>>> conversion table.
>>>
>>> Moment, we can add the flag to be better support the *code_to_temp*
>>> for differenr SoCs.
>>>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> ---
>>>
>>> Changes in v2: None
>>> Changes in v1: None
>>>
>>>   drivers/thermal/rockchip_thermal.c | 64 
>>> ++++++++++++++++++++++++++++++--------
>>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/drivers/thermal/rockchip_thermal.c 
>>> b/drivers/thermal/rockchip_thermal.c
>>> index e828f18..9df027f 100644
>>> --- a/drivers/thermal/rockchip_thermal.c
>>> +++ b/drivers/thermal/rockchip_thermal.c
>>> @@ -53,6 +53,16 @@ enum sensor_id {
>>>   };
>>>     /**
>>> +* The conversion table has the adc value and temperature.
>>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>>> +*/
>>> +enum adc_flag {
>>> +    ADC_DECREMENT = 0,
>>> +    ADC_INCREMENT,
>>> +};
>>> +
>>> +/**
>>>    * The max sensors is two in rockchip SoCs.
>>>    * Two sensors: CPU and GPU sensor.
>>>    */
>>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>>         /* that analogic mask data */
>>>       unsigned long data_mask;
>>> +
>>> +    /* adc value is increment or decrement */
>>> +    unsigned int flag;

Sorry, I think to use the enum type will be better.

Says:
enum adc_sort_flag sort_flag;
or
enum adc_sort_mode  mode;

>>
>> Maybe bool? And rename to something more meaningful?
>
> Sure, that should be a bool type.
> I guess the rename in sort_flag......(maybe will have a better name)
>
>
>>
>> Or do you plan to have more conditions to test in your flag?
>
> Moment, the flag (increment or decrement) can support all the rockchip 
> series SoCs have thermal function.
>
>>>   };
>>>     struct rockchip_tsadc_chip {
>>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>         WARN_ON(table.length < 2);
>>>   -    code &= table.data_mask;
>>> -    if (code < table.id[high].code)
>>> +    switch (table.flag) {
>>> +    case ADC_DECREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[high].code)
>>>           return -EAGAIN;        /* Incorrect reading */
>> Add an indentation.
>
> Thanks, will be fixed in next patch.
>
>
>>>   -    while (low <= high) {
>>> -        if (code >= table.id[mid].code &&
>>> -            code < table.id[mid - 1].code)
>>> -            break;
>>> -        else if (code < table.id[mid].code)
>>> -            low = mid + 1;
>>> -        else
>>> -            high = mid - 1;
>>> -        mid = (low + high) / 2;
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid].code &&
>>> +                code < table.id[mid - 1].code)
>>> +                break;
>>> +            else if (code < table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    case ADC_INCREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[low].code)
>>> +        return -EAGAIN;        /* Incorrect reading */
>>> +
>> add an indentation.
>
> Ditto.
>
> Thanks,
> Caesar
>>
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid - 1].code &&
>>> +                code < table.id[mid].code)
>>> +                break;
>>> +            else if (code > table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    default:
>>> +        pr_err("Invalid the table conversion\n");
>>>       }
>>>         /*
>>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>        * to produce less granular result.
>>>        */
>>>       num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>>> -    num *= table.id[mid - 1].code - code;
>>> -    denom = table.id[mid - 1].code - table.id[mid].code;
>>> +    num *= abs(table.id[mid - 1].code - code);
>>> +    denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>>       *temp = table.id[mid - 1].temp + (num / denom);
>>>         return 0;
>>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip 
>>> rk3288_tsadc_data = {
>>>           .id = v2_code_table,
>>>           .length = ARRAY_SIZE(v2_code_table),
>>>           .data_mask = TSADCV2_DATA_MASK,
>>> +        .flag = ADC_DECREMENT,
>>>       },
>>>   };
>>>   --
>>> 1.9.1
>>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>

-- 
Thanks,
Caesar

[PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

[Caesar Wang]

? 2015?11?07? 23:38, Caesar Wang ??:
> Hello Eduardo,
>
> ? 2015?11?07? 03:11, Eduardo Valentin ??:
>> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>>> The conversion table has the adc value and temperature.
>>> In fact, the adc value only has the increment or decrement mode in
>>> conversion table.
>>>
>>> Moment, we can add the flag to be better support the *code_to_temp*
>>> for differenr SoCs.
>>>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> ---
>>>
>>> Changes in v2: None
>>> Changes in v1: None
>>>
>>>   drivers/thermal/rockchip_thermal.c | 64 
>>> ++++++++++++++++++++++++++++++--------
>>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/drivers/thermal/rockchip_thermal.c 
>>> b/drivers/thermal/rockchip_thermal.c
>>> index e828f18..9df027f 100644
>>> --- a/drivers/thermal/rockchip_thermal.c
>>> +++ b/drivers/thermal/rockchip_thermal.c
>>> @@ -53,6 +53,16 @@ enum sensor_id {
>>>   };
>>>     /**
>>> +* The conversion table has the adc value and temperature.
>>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>>> +*/
>>> +enum adc_flag {
>>> +    ADC_DECREMENT = 0,
>>> +    ADC_INCREMENT,
>>> +};
>>> +
>>> +/**
>>>    * The max sensors is two in rockchip SoCs.
>>>    * Two sensors: CPU and GPU sensor.
>>>    */
>>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>>         /* that analogic mask data */
>>>       unsigned long data_mask;
>>> +
>>> +    /* adc value is increment or decrement */
>>> +    unsigned int flag;

Sorry, I think to use the enum type will be better.

Says:
enum adc_sort_flag sort_flag;
or
enum adc_sort_mode  mode;

>>
>> Maybe bool? And rename to something more meaningful?
>
> Sure, that should be a bool type.
> I guess the rename in sort_flag......(maybe will have a better name)
>
>
>>
>> Or do you plan to have more conditions to test in your flag?
>
> Moment, the flag (increment or decrement) can support all the rockchip 
> series SoCs have thermal function.
>
>>>   };
>>>     struct rockchip_tsadc_chip {
>>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>         WARN_ON(table.length < 2);
>>>   -    code &= table.data_mask;
>>> -    if (code < table.id[high].code)
>>> +    switch (table.flag) {
>>> +    case ADC_DECREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[high].code)
>>>           return -EAGAIN;        /* Incorrect reading */
>> Add an indentation.
>
> Thanks, will be fixed in next patch.
>
>
>>>   -    while (low <= high) {
>>> -        if (code >= table.id[mid].code &&
>>> -            code < table.id[mid - 1].code)
>>> -            break;
>>> -        else if (code < table.id[mid].code)
>>> -            low = mid + 1;
>>> -        else
>>> -            high = mid - 1;
>>> -        mid = (low + high) / 2;
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid].code &&
>>> +                code < table.id[mid - 1].code)
>>> +                break;
>>> +            else if (code < table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    case ADC_INCREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[low].code)
>>> +        return -EAGAIN;        /* Incorrect reading */
>>> +
>> add an indentation.
>
> Ditto.
>
> Thanks,
> Caesar
>>
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid - 1].code &&
>>> +                code < table.id[mid].code)
>>> +                break;
>>> +            else if (code > table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    default:
>>> +        pr_err("Invalid the table conversion\n");
>>>       }
>>>         /*
>>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>        * to produce less granular result.
>>>        */
>>>       num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>>> -    num *= table.id[mid - 1].code - code;
>>> -    denom = table.id[mid - 1].code - table.id[mid].code;
>>> +    num *= abs(table.id[mid - 1].code - code);
>>> +    denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>>       *temp = table.id[mid - 1].temp + (num / denom);
>>>         return 0;
>>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip 
>>> rk3288_tsadc_data = {
>>>           .id = v2_code_table,
>>>           .length = ARRAY_SIZE(v2_code_table),
>>>           .data_mask = TSADCV2_DATA_MASK,
>>> +        .flag = ADC_DECREMENT,
>>>       },
>>>   };
>>>   --
>>> 1.9.1
>>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>

-- 
Thanks,
Caesar

[PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Caesar Wang]

The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.

The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2:
- remove some unused, completed on other patchs.

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 9df027f..47a8873 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -1,6 +1,9 @@
 /*
  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
@@ -152,6 +155,8 @@ struct rockchip_thermal_data {
 #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
 
 #define TSADCV2_DATA_MASK			0xfff
+#define TSADCV3_DATA_MASK			0x3ff
+
 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
@@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
 	{3421, 125000},
 };
 
+static const struct tsadc_table v3_code_table[] = {
+	{0, -40000},
+	{106, -40000},
+	{108, -35000},
+	{110, -30000},
+	{112, -25000},
+	{114, -20000},
+	{116, -15000},
+	{118, -10000},
+	{120, -5000},
+	{122, 0},
+	{124, 5000},
+	{126, 10000},
+	{128, 15000},
+	{130, 20000},
+	{132, 25000},
+	{134, 30000},
+	{136, 35000},
+	{138, 40000},
+	{140, 45000},
+	{142, 50000},
+	{144, 55000},
+	{146, 60000},
+	{148, 65000},
+	{150, 70000},
+	{152, 75000},
+	{154, 80000},
+	{156, 85000},
+	{158, 90000},
+	{160, 95000},
+	{162, 100000},
+	{163, 105000},
+	{165, 110000},
+	{167, 115000},
+	{169, 120000},
+	{171, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 				   long temp)
 {
@@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	},
 };
 
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv2_irq_ack,
+	.control = rk_tsadcv2_control,
+	.get_temp = rk_tsadcv2_get_temp,
+	.set_tshut_temp = rk_tsadcv2_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = v3_code_table,
+		.length = ARRAY_SIZE(v3_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.flag = ADC_DECREMENT,
+	},
+};
+
 static const struct of_device_id of_rockchip_thermal_match[] = {
 	{
 		.compatible = "rockchip,rk3288-tsadc",
 		.data = (void *)&rk3288_tsadc_data,
 	},
+	{
+		.compatible = "rockchip,rk3368-tsadc",
+		.data = (void *)&rk3368_tsadc_data,
+	},
 	{ /* end */ },
 };
 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
-- 
1.9.1

[PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Caesar Wang]

The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.

The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2:
- remove some unused, completed on other patchs.

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 9df027f..47a8873 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -1,6 +1,9 @@
 /*
  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
@@ -152,6 +155,8 @@ struct rockchip_thermal_data {
 #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
 
 #define TSADCV2_DATA_MASK			0xfff
+#define TSADCV3_DATA_MASK			0x3ff
+
 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
@@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
 	{3421, 125000},
 };
 
+static const struct tsadc_table v3_code_table[] = {
+	{0, -40000},
+	{106, -40000},
+	{108, -35000},
+	{110, -30000},
+	{112, -25000},
+	{114, -20000},
+	{116, -15000},
+	{118, -10000},
+	{120, -5000},
+	{122, 0},
+	{124, 5000},
+	{126, 10000},
+	{128, 15000},
+	{130, 20000},
+	{132, 25000},
+	{134, 30000},
+	{136, 35000},
+	{138, 40000},
+	{140, 45000},
+	{142, 50000},
+	{144, 55000},
+	{146, 60000},
+	{148, 65000},
+	{150, 70000},
+	{152, 75000},
+	{154, 80000},
+	{156, 85000},
+	{158, 90000},
+	{160, 95000},
+	{162, 100000},
+	{163, 105000},
+	{165, 110000},
+	{167, 115000},
+	{169, 120000},
+	{171, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 				   long temp)
 {
@@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	},
 };
 
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv2_irq_ack,
+	.control = rk_tsadcv2_control,
+	.get_temp = rk_tsadcv2_get_temp,
+	.set_tshut_temp = rk_tsadcv2_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = v3_code_table,
+		.length = ARRAY_SIZE(v3_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.flag = ADC_DECREMENT,
+	},
+};
+
 static const struct of_device_id of_rockchip_thermal_match[] = {
 	{
 		.compatible = "rockchip,rk3288-tsadc",
 		.data = (void *)&rk3288_tsadc_data,
 	},
+	{
+		.compatible = "rockchip,rk3368-tsadc",
+		.data = (void *)&rk3368_tsadc_data,
+	},
 	{ /* end */ },
 };
 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
-- 
1.9.1

Re: [PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Andy Shevchenko]

On Thu, Nov 5, 2015 at 7:18 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
> of each channel can be configurable.
>
> The system has two Temperature Sensors, channel 0 is for CPU,
> and channel 1 is for GPU.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v2:
> - remove some unused, completed on other patchs.
>
> Changes in v1: None
>
>  drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 9df027f..47a8873 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -1,6 +1,9 @@
>  /*
>   * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>   *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt@rock-chips.com>
> + *
>   * This program is free software; you can redistribute it and/or modify it
>   * under the terms and conditions of the GNU General Public License,
>   * version 2, as published by the Free Software Foundation.
> @@ -152,6 +155,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_INT_PD_CLEAR_MASK              ~BIT(8)
>
>  #define TSADCV2_DATA_MASK                      0xfff
> +#define TSADCV3_DATA_MASK                      0x3ff
> +
>  #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT       4
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>  #define TSADCV2_AUTO_PERIOD_TIME               250 /* msec */
> @@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
>         {3421, 125000},
>  };
>
> +static const struct tsadc_table v3_code_table[] = {
> +       {0, -40000},
> +       {106, -40000},
> +       {108, -35000},
> +       {110, -30000},
> +       {112, -25000},
> +       {114, -20000},
> +       {116, -15000},
> +       {118, -10000},
> +       {120, -5000},
> +       {122, 0},
> +       {124, 5000},
> +       {126, 10000},
> +       {128, 15000},
> +       {130, 20000},
> +       {132, 25000},
> +       {134, 30000},
> +       {136, 35000},
> +       {138, 40000},
> +       {140, 45000},
> +       {142, 50000},
> +       {144, 55000},
> +       {146, 60000},
> +       {148, 65000},
> +       {150, 70000},
> +       {152, 75000},
> +       {154, 80000},
> +       {156, 85000},
> +       {158, 90000},
> +       {160, 95000},
> +       {162, 100000},
> +       {163, 105000},
> +       {165, 110000},
> +       {167, 115000},
> +       {169, 120000},
> +       {171, 125000},
> +       {TSADCV3_DATA_MASK, 125000},

Why not function which returns one value based on the other?

x < 106:   -40000
161 >= x >= 106: -40000 + 5000 * (x - 106) / 2
171 >= x >= 162: 100000 + 5000 * (x - 162)
x > 171 = 125000

> +};
> +
>  static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>                                    long temp)
>  {
> @@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>         },
>  };
>
> +static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
> +       .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
> +       .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
> +       .chn_num = 2, /* two channels for tsadc */
> +
> +       .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> +       .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> +       .tshut_temp = 95000,
> +
> +       .initialize = rk_tsadcv2_initialize,
> +       .irq_ack = rk_tsadcv2_irq_ack,
> +       .control = rk_tsadcv2_control,
> +       .get_temp = rk_tsadcv2_get_temp,
> +       .set_tshut_temp = rk_tsadcv2_tshut_temp,
> +       .set_tshut_mode = rk_tsadcv2_tshut_mode,
> +
> +       .table = {
> +               .id = v3_code_table,
> +               .length = ARRAY_SIZE(v3_code_table),
> +               .data_mask = TSADCV3_DATA_MASK,
> +               .flag = ADC_DECREMENT,
> +       },
> +};
> +
>  static const struct of_device_id of_rockchip_thermal_match[] = {
>         {
>                 .compatible = "rockchip,rk3288-tsadc",
>                 .data = (void *)&rk3288_tsadc_data,
>         },
> +       {
> +               .compatible = "rockchip,rk3368-tsadc",
> +               .data = (void *)&rk3368_tsadc_data,
> +       },
>         { /* end */ },
>  };
>  MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/



-- 
With Best Regards,
Andy Shevchenko

[PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Andy Shevchenko]

On Thu, Nov 5, 2015 at 7:18 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
> of each channel can be configurable.
>
> The system has two Temperature Sensors, channel 0 is for CPU,
> and channel 1 is for GPU.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v2:
> - remove some unused, completed on other patchs.
>
> Changes in v1: None
>
>  drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 9df027f..47a8873 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -1,6 +1,9 @@
>  /*
>   * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>   *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt@rock-chips.com>
> + *
>   * This program is free software; you can redistribute it and/or modify it
>   * under the terms and conditions of the GNU General Public License,
>   * version 2, as published by the Free Software Foundation.
> @@ -152,6 +155,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_INT_PD_CLEAR_MASK              ~BIT(8)
>
>  #define TSADCV2_DATA_MASK                      0xfff
> +#define TSADCV3_DATA_MASK                      0x3ff
> +
>  #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT       4
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>  #define TSADCV2_AUTO_PERIOD_TIME               250 /* msec */
> @@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
>         {3421, 125000},
>  };
>
> +static const struct tsadc_table v3_code_table[] = {
> +       {0, -40000},
> +       {106, -40000},
> +       {108, -35000},
> +       {110, -30000},
> +       {112, -25000},
> +       {114, -20000},
> +       {116, -15000},
> +       {118, -10000},
> +       {120, -5000},
> +       {122, 0},
> +       {124, 5000},
> +       {126, 10000},
> +       {128, 15000},
> +       {130, 20000},
> +       {132, 25000},
> +       {134, 30000},
> +       {136, 35000},
> +       {138, 40000},
> +       {140, 45000},
> +       {142, 50000},
> +       {144, 55000},
> +       {146, 60000},
> +       {148, 65000},
> +       {150, 70000},
> +       {152, 75000},
> +       {154, 80000},
> +       {156, 85000},
> +       {158, 90000},
> +       {160, 95000},
> +       {162, 100000},
> +       {163, 105000},
> +       {165, 110000},
> +       {167, 115000},
> +       {169, 120000},
> +       {171, 125000},
> +       {TSADCV3_DATA_MASK, 125000},

Why not function which returns one value based on the other?

x < 106:   -40000
161 >= x >= 106: -40000 + 5000 * (x - 106) / 2
171 >= x >= 162: 100000 + 5000 * (x - 162)
x > 171 = 125000

> +};
> +
>  static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>                                    long temp)
>  {
> @@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>         },
>  };
>
> +static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
> +       .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
> +       .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
> +       .chn_num = 2, /* two channels for tsadc */
> +
> +       .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> +       .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> +       .tshut_temp = 95000,
> +
> +       .initialize = rk_tsadcv2_initialize,
> +       .irq_ack = rk_tsadcv2_irq_ack,
> +       .control = rk_tsadcv2_control,
> +       .get_temp = rk_tsadcv2_get_temp,
> +       .set_tshut_temp = rk_tsadcv2_tshut_temp,
> +       .set_tshut_mode = rk_tsadcv2_tshut_mode,
> +
> +       .table = {
> +               .id = v3_code_table,
> +               .length = ARRAY_SIZE(v3_code_table),
> +               .data_mask = TSADCV3_DATA_MASK,
> +               .flag = ADC_DECREMENT,
> +       },
> +};
> +
>  static const struct of_device_id of_rockchip_thermal_match[] = {
>         {
>                 .compatible = "rockchip,rk3288-tsadc",
>                 .data = (void *)&rk3288_tsadc_data,
>         },
> +       {
> +               .compatible = "rockchip,rk3368-tsadc",
> +               .data = (void *)&rk3368_tsadc_data,
> +       },
>         { /* end */ },
>  };
>  MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/



-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Andy Shevchenko]

On Thu, Nov 5, 2015 at 7:18 AM, Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> wrote:
> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
> of each channel can be configurable.
>
> The system has two Temperature Sensors, channel 0 is for CPU,
> and channel 1 is for GPU.
>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
>
> Changes in v2:
> - remove some unused, completed on other patchs.
>
> Changes in v1: None
>
>  drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 9df027f..47a8873 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -1,6 +1,9 @@
>  /*
>   * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>   *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> + *
>   * This program is free software; you can redistribute it and/or modify it
>   * under the terms and conditions of the GNU General Public License,
>   * version 2, as published by the Free Software Foundation.
> @@ -152,6 +155,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_INT_PD_CLEAR_MASK              ~BIT(8)
>
>  #define TSADCV2_DATA_MASK                      0xfff
> +#define TSADCV3_DATA_MASK                      0x3ff
> +
>  #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT       4
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>  #define TSADCV2_AUTO_PERIOD_TIME               250 /* msec */
> @@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
>         {3421, 125000},
>  };
>
> +static const struct tsadc_table v3_code_table[] = {
> +       {0, -40000},
> +       {106, -40000},
> +       {108, -35000},
> +       {110, -30000},
> +       {112, -25000},
> +       {114, -20000},
> +       {116, -15000},
> +       {118, -10000},
> +       {120, -5000},
> +       {122, 0},
> +       {124, 5000},
> +       {126, 10000},
> +       {128, 15000},
> +       {130, 20000},
> +       {132, 25000},
> +       {134, 30000},
> +       {136, 35000},
> +       {138, 40000},
> +       {140, 45000},
> +       {142, 50000},
> +       {144, 55000},
> +       {146, 60000},
> +       {148, 65000},
> +       {150, 70000},
> +       {152, 75000},
> +       {154, 80000},
> +       {156, 85000},
> +       {158, 90000},
> +       {160, 95000},
> +       {162, 100000},
> +       {163, 105000},
> +       {165, 110000},
> +       {167, 115000},
> +       {169, 120000},
> +       {171, 125000},
> +       {TSADCV3_DATA_MASK, 125000},

Why not function which returns one value based on the other?

x < 106:   -40000
161 >= x >= 106: -40000 + 5000 * (x - 106) / 2
171 >= x >= 162: 100000 + 5000 * (x - 162)
x > 171 = 125000

> +};
> +
>  static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>                                    long temp)
>  {
> @@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>         },
>  };
>
> +static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
> +       .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
> +       .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
> +       .chn_num = 2, /* two channels for tsadc */
> +
> +       .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> +       .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> +       .tshut_temp = 95000,
> +
> +       .initialize = rk_tsadcv2_initialize,
> +       .irq_ack = rk_tsadcv2_irq_ack,
> +       .control = rk_tsadcv2_control,
> +       .get_temp = rk_tsadcv2_get_temp,
> +       .set_tshut_temp = rk_tsadcv2_tshut_temp,
> +       .set_tshut_mode = rk_tsadcv2_tshut_mode,
> +
> +       .table = {
> +               .id = v3_code_table,
> +               .length = ARRAY_SIZE(v3_code_table),
> +               .data_mask = TSADCV3_DATA_MASK,
> +               .flag = ADC_DECREMENT,
> +       },
> +};
> +
>  static const struct of_device_id of_rockchip_thermal_match[] = {
>         {
>                 .compatible = "rockchip,rk3288-tsadc",
>                 .data = (void *)&rk3288_tsadc_data,
>         },
> +       {
> +               .compatible = "rockchip,rk3368-tsadc",
> +               .data = (void *)&rk3368_tsadc_data,
> +       },
>         { /* end */ },
>  };
>  MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/



-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Caesar Wang]

在 2015年11月07日 03:39, Andy Shevchenko 写道:
> On Thu, Nov 5, 2015 at 7:18 AM, Caesar Wang <wxt@rock-chips.com> wrote:
>> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
>> of each channel can be configurable.
>>
>> The system has two Temperature Sensors, channel 0 is for CPU,
>> and channel 1 is for GPU.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2:
>> - remove some unused, completed on other patchs.
>>
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 72 insertions(+)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index 9df027f..47a8873 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -1,6 +1,9 @@
>>   /*
>>    * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>>    *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + * Caesar Wang <wxt@rock-chips.com>
>> + *
>>    * This program is free software; you can redistribute it and/or modify it
>>    * under the terms and conditions of the GNU General Public License,
>>    * version 2, as published by the Free Software Foundation.
>> @@ -152,6 +155,8 @@ struct rockchip_thermal_data {
>>   #define TSADCV2_INT_PD_CLEAR_MASK              ~BIT(8)
>>
>>   #define TSADCV2_DATA_MASK                      0xfff
>> +#define TSADCV3_DATA_MASK                      0x3ff
>> +
>>   #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT       4
>>   #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>>   #define TSADCV2_AUTO_PERIOD_TIME               250 /* msec */
>> @@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
>>          {3421, 125000},
>>   };
>>
>> +static const struct tsadc_table v3_code_table[] = {
>> +       {0, -40000},
>> +       {106, -40000},
>> +       {108, -35000},
>> +       {110, -30000},
>> +       {112, -25000},
>> +       {114, -20000},
>> +       {116, -15000},
>> +       {118, -10000},
>> +       {120, -5000},
>> +       {122, 0},
>> +       {124, 5000},
>> +       {126, 10000},
>> +       {128, 15000},
>> +       {130, 20000},
>> +       {132, 25000},
>> +       {134, 30000},
>> +       {136, 35000},
>> +       {138, 40000},
>> +       {140, 45000},
>> +       {142, 50000},
>> +       {144, 55000},
>> +       {146, 60000},
>> +       {148, 65000},
>> +       {150, 70000},
>> +       {152, 75000},
>> +       {154, 80000},
>> +       {156, 85000},
>> +       {158, 90000},
>> +       {160, 95000},
>> +       {162, 100000},
>> +       {163, 105000},
>> +       {165, 110000},
>> +       {167, 115000},
>> +       {169, 120000},
>> +       {171, 125000},
>> +       {TSADCV3_DATA_MASK, 125000},
> Why not function which returns one value based on the other?
>
> x < 106:   -40000
> 161 >= x >= 106: -40000 + 5000 * (x - 106) / 2
> 171 >= x >= 162: 100000 + 5000 * (x - 162)
> x > 171 = 125000

1) Every SoCs conversion table come from the TRM.
2) Barrier for using with other SoCs

the rockchip-thermal driver  is compatible for series SoCs for rockchip.

>> +};
>> +
>>   static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>>                                     long temp)
>>   {
>> @@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>>          },
>>   };
>>
>> +static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
>> +       .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
>> +       .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
>> +       .chn_num = 2, /* two channels for tsadc */
>> +
>> +       .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
>> +       .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
>> +       .tshut_temp = 95000,
>> +
>> +       .initialize = rk_tsadcv2_initialize,
>> +       .irq_ack = rk_tsadcv2_irq_ack,
>> +       .control = rk_tsadcv2_control,
>> +       .get_temp = rk_tsadcv2_get_temp,
>> +       .set_tshut_temp = rk_tsadcv2_tshut_temp,
>> +       .set_tshut_mode = rk_tsadcv2_tshut_mode,
>> +
>> +       .table = {
>> +               .id = v3_code_table,
>> +               .length = ARRAY_SIZE(v3_code_table),
>> +               .data_mask = TSADCV3_DATA_MASK,
>> +               .flag = ADC_DECREMENT,
>> +       },
>> +};
>> +
>>   static const struct of_device_id of_rockchip_thermal_match[] = {
>>          {
>>                  .compatible = "rockchip,rk3288-tsadc",
>>                  .data = (void *)&rk3288_tsadc_data,
>>          },
>> +       {
>> +               .compatible = "rockchip,rk3368-tsadc",
>> +               .data = (void *)&rk3368_tsadc_data,
>> +       },
>>          { /* end */ },
>>   };
>>   MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
>> --
>> 1.9.1
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at  http://www.tux.org/lkml/
>
>

[PATCH v2 6/9] thermal: rockchip: Support the RK3368 SoCs in thermal drivers

[Caesar Wang]

? 2015?11?07? 03:39, Andy Shevchenko ??:
> On Thu, Nov 5, 2015 at 7:18 AM, Caesar Wang <wxt@rock-chips.com> wrote:
>> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
>> of each channel can be configurable.
>>
>> The system has two Temperature Sensors, channel 0 is for CPU,
>> and channel 1 is for GPU.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2:
>> - remove some unused, completed on other patchs.
>>
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 72 ++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 72 insertions(+)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index 9df027f..47a8873 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -1,6 +1,9 @@
>>   /*
>>    * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>>    *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + * Caesar Wang <wxt@rock-chips.com>
>> + *
>>    * This program is free software; you can redistribute it and/or modify it
>>    * under the terms and conditions of the GNU General Public License,
>>    * version 2, as published by the Free Software Foundation.
>> @@ -152,6 +155,8 @@ struct rockchip_thermal_data {
>>   #define TSADCV2_INT_PD_CLEAR_MASK              ~BIT(8)
>>
>>   #define TSADCV2_DATA_MASK                      0xfff
>> +#define TSADCV3_DATA_MASK                      0x3ff
>> +
>>   #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT       4
>>   #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT     4
>>   #define TSADCV2_AUTO_PERIOD_TIME               250 /* msec */
>> @@ -200,6 +205,45 @@ static const struct tsadc_table v2_code_table[] = {
>>          {3421, 125000},
>>   };
>>
>> +static const struct tsadc_table v3_code_table[] = {
>> +       {0, -40000},
>> +       {106, -40000},
>> +       {108, -35000},
>> +       {110, -30000},
>> +       {112, -25000},
>> +       {114, -20000},
>> +       {116, -15000},
>> +       {118, -10000},
>> +       {120, -5000},
>> +       {122, 0},
>> +       {124, 5000},
>> +       {126, 10000},
>> +       {128, 15000},
>> +       {130, 20000},
>> +       {132, 25000},
>> +       {134, 30000},
>> +       {136, 35000},
>> +       {138, 40000},
>> +       {140, 45000},
>> +       {142, 50000},
>> +       {144, 55000},
>> +       {146, 60000},
>> +       {148, 65000},
>> +       {150, 70000},
>> +       {152, 75000},
>> +       {154, 80000},
>> +       {156, 85000},
>> +       {158, 90000},
>> +       {160, 95000},
>> +       {162, 100000},
>> +       {163, 105000},
>> +       {165, 110000},
>> +       {167, 115000},
>> +       {169, 120000},
>> +       {171, 125000},
>> +       {TSADCV3_DATA_MASK, 125000},
> Why not function which returns one value based on the other?
>
> x < 106:   -40000
> 161 >= x >= 106: -40000 + 5000 * (x - 106) / 2
> 171 >= x >= 162: 100000 + 5000 * (x - 162)
> x > 171 = 125000

1) Every SoCs conversion table come from the TRM.
2) Barrier for using with other SoCs

the rockchip-thermal driver  is compatible for series SoCs for rockchip.

>> +};
>> +
>>   static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
>>                                     long temp)
>>   {
>> @@ -408,11 +452,39 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>>          },
>>   };
>>
>> +static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
>> +       .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
>> +       .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
>> +       .chn_num = 2, /* two channels for tsadc */
>> +
>> +       .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
>> +       .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
>> +       .tshut_temp = 95000,
>> +
>> +       .initialize = rk_tsadcv2_initialize,
>> +       .irq_ack = rk_tsadcv2_irq_ack,
>> +       .control = rk_tsadcv2_control,
>> +       .get_temp = rk_tsadcv2_get_temp,
>> +       .set_tshut_temp = rk_tsadcv2_tshut_temp,
>> +       .set_tshut_mode = rk_tsadcv2_tshut_mode,
>> +
>> +       .table = {
>> +               .id = v3_code_table,
>> +               .length = ARRAY_SIZE(v3_code_table),
>> +               .data_mask = TSADCV3_DATA_MASK,
>> +               .flag = ADC_DECREMENT,
>> +       },
>> +};
>> +
>>   static const struct of_device_id of_rockchip_thermal_match[] = {
>>          {
>>                  .compatible = "rockchip,rk3288-tsadc",
>>                  .data = (void *)&rk3288_tsadc_data,
>>          },
>> +       {
>> +               .compatible = "rockchip,rk3368-tsadc",
>> +               .data = (void *)&rk3368_tsadc_data,
>> +       },
>>          { /* end */ },
>>   };
>>   MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
>> --
>> 1.9.1
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo at vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at  http://www.tux.org/lkml/
>
>

[PATCH v2 7/9] arm64: dts: Add the thermal data found on RK3368

[Caesar Wang]

This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
One cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).

This patch adds the second order for thermal throttle, and the critical
temperature for thermal over-tempeature protection on Software.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
 1 file changed, 112 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
new file mode 100644
index 0000000..a10010f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
@@ -0,0 +1,112 @@
+/*
+ * Device Tree Source for RK3368 SoC thermal
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+cpu_thermal: cpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 0>;
+
+	trips {
+		cpu_alert0: cpu_alert0 {
+			temperature = <75000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_alert1: cpu_alert1 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_crit: cpu_crit {
+			temperature = <95000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&cpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+		map1 {
+			trip = <&cpu_alert1>;
+			cooling-device =
+				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+gpu_thermal: gpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 1>;
+
+	trips {
+		gpu_alert0: gpu_alert0 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		gpu_crit: gpu_crit {
+			temperature = <1150000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&gpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
-- 
1.9.1

[PATCH v2 7/9] arm64: dts: Add the thermal data found on RK3368

[Caesar Wang]

This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
One cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).

This patch adds the second order for thermal throttle, and the critical
temperature for thermal over-tempeature protection on Software.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
 1 file changed, 112 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
new file mode 100644
index 0000000..a10010f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
@@ -0,0 +1,112 @@
+/*
+ * Device Tree Source for RK3368 SoC thermal
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+cpu_thermal: cpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 0>;
+
+	trips {
+		cpu_alert0: cpu_alert0 {
+			temperature = <75000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_alert1: cpu_alert1 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_crit: cpu_crit {
+			temperature = <95000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&cpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+		map1 {
+			trip = <&cpu_alert1>;
+			cooling-device =
+				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+gpu_thermal: gpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 1>;
+
+	trips {
+		gpu_alert0: gpu_alert0 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		gpu_crit: gpu_crit {
+			temperature = <1150000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&gpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
-- 
1.9.1

Re: [PATCH v2 7/9] arm64: dts: Add the thermal data found on RK3368

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:03PM +0800, Caesar Wang wrote:
> This patchset add the thermal for RK3368 dts,
> Since the two CPU clusters, with four CPU core for each cluster,
> One cluster is optimized for high-performance(big cluster) and the othe
> is optimized for low power(little cluster).
> 
> This patch adds the second order for thermal throttle, and the critical
> temperature for thermal over-tempeature protection on Software.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

Acked-by: Eduardo Valentin <edubezval@gmail.com>

> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
>  1 file changed, 112 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> new file mode 100644
> index 0000000..a10010f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> @@ -0,0 +1,112 @@
> +/*
> + * Device Tree Source for RK3368 SoC thermal
> + *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt@rock-chips.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/thermal/thermal.h>
> +
> +cpu_thermal: cpu_thermal {
> +	polling-delay-passive = <100>; /* milliseconds */
> +	polling-delay = <5000>; /* milliseconds */
> +
> +	thermal-sensors = <&tsadc 0>;
> +
> +	trips {
> +		cpu_alert0: cpu_alert0 {
> +			temperature = <75000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		cpu_alert1: cpu_alert1 {
> +			temperature = <80000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		cpu_crit: cpu_crit {
> +			temperature = <95000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "critical";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map0 {
> +			trip = <&cpu_alert0>;
> +			cooling-device =
> +				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +		map1 {
> +			trip = <&cpu_alert1>;
> +			cooling-device =
> +				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> +
> +gpu_thermal: gpu_thermal {
> +	polling-delay-passive = <100>; /* milliseconds */
> +	polling-delay = <5000>; /* milliseconds */
> +
> +	thermal-sensors = <&tsadc 1>;
> +
> +	trips {
> +		gpu_alert0: gpu_alert0 {
> +			temperature = <80000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		gpu_crit: gpu_crit {
> +			temperature = <1150000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "critical";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map0 {
> +			trip = <&gpu_alert0>;
> +			cooling-device =
> +				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> -- 
> 1.9.1
> 

[PATCH v2 7/9] arm64: dts: Add the thermal data found on RK3368

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:03PM +0800, Caesar Wang wrote:
> This patchset add the thermal for RK3368 dts,
> Since the two CPU clusters, with four CPU core for each cluster,
> One cluster is optimized for high-performance(big cluster) and the othe
> is optimized for low power(little cluster).
> 
> This patch adds the second order for thermal throttle, and the critical
> temperature for thermal over-tempeature protection on Software.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

Acked-by: Eduardo Valentin <edubezval@gmail.com>

> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
>  1 file changed, 112 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> new file mode 100644
> index 0000000..a10010f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> @@ -0,0 +1,112 @@
> +/*
> + * Device Tree Source for RK3368 SoC thermal
> + *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt@rock-chips.com>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/thermal/thermal.h>
> +
> +cpu_thermal: cpu_thermal {
> +	polling-delay-passive = <100>; /* milliseconds */
> +	polling-delay = <5000>; /* milliseconds */
> +
> +	thermal-sensors = <&tsadc 0>;
> +
> +	trips {
> +		cpu_alert0: cpu_alert0 {
> +			temperature = <75000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		cpu_alert1: cpu_alert1 {
> +			temperature = <80000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		cpu_crit: cpu_crit {
> +			temperature = <95000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "critical";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map0 {
> +			trip = <&cpu_alert0>;
> +			cooling-device =
> +				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +		map1 {
> +			trip = <&cpu_alert1>;
> +			cooling-device =
> +				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> +
> +gpu_thermal: gpu_thermal {
> +	polling-delay-passive = <100>; /* milliseconds */
> +	polling-delay = <5000>; /* milliseconds */
> +
> +	thermal-sensors = <&tsadc 1>;
> +
> +	trips {
> +		gpu_alert0: gpu_alert0 {
> +			temperature = <80000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		gpu_crit: gpu_crit {
> +			temperature = <1150000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "critical";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map0 {
> +			trip = <&gpu_alert0>;
> +			cooling-device =
> +				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> -- 
> 1.9.1
> 

Re: [PATCH v2 7/9] arm64: dts: Add the thermal data found on RK3368

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:03PM +0800, Caesar Wang wrote:
> This patchset add the thermal for RK3368 dts,
> Since the two CPU clusters, with four CPU core for each cluster,
> One cluster is optimized for high-performance(big cluster) and the othe
> is optimized for low power(little cluster).
> 
> This patch adds the second order for thermal throttle, and the critical
> temperature for thermal over-tempeature protection on Software.
> 
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

Acked-by: Eduardo Valentin <edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
>  1 file changed, 112 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> new file mode 100644
> index 0000000..a10010f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> @@ -0,0 +1,112 @@
> +/*
> + * Device Tree Source for RK3368 SoC thermal
> + *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This file is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This file is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/thermal/thermal.h>
> +
> +cpu_thermal: cpu_thermal {
> +	polling-delay-passive = <100>; /* milliseconds */
> +	polling-delay = <5000>; /* milliseconds */
> +
> +	thermal-sensors = <&tsadc 0>;
> +
> +	trips {
> +		cpu_alert0: cpu_alert0 {
> +			temperature = <75000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		cpu_alert1: cpu_alert1 {
> +			temperature = <80000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		cpu_crit: cpu_crit {
> +			temperature = <95000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "critical";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map0 {
> +			trip = <&cpu_alert0>;
> +			cooling-device =
> +				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +		map1 {
> +			trip = <&cpu_alert1>;
> +			cooling-device =
> +				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> +
> +gpu_thermal: gpu_thermal {
> +	polling-delay-passive = <100>; /* milliseconds */
> +	polling-delay = <5000>; /* milliseconds */
> +
> +	thermal-sensors = <&tsadc 1>;
> +
> +	trips {
> +		gpu_alert0: gpu_alert0 {
> +			temperature = <80000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "passive";
> +		};
> +		gpu_crit: gpu_crit {
> +			temperature = <1150000>; /* millicelsius */
> +			hysteresis = <2000>; /* millicelsius */
> +			type = "critical";
> +		};
> +	};
> +
> +	cooling-maps {
> +		map0 {
> +			trip = <&gpu_alert0>;
> +			cooling-device =
> +				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +		};
> +	};
> +};
> -- 
> 1.9.1
> 
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[PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi

[Caesar Wang]

This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- fix a copy wrong name.
Series-changes: 1
- support the opt gpio pinctrl state

Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 36 ++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cc093a4..83a2bd2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -45,6 +45,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3368";
@@ -123,6 +124,8 @@
 			reg = <0x0 0x0>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_l1: cpu@1 {
@@ -155,6 +158,8 @@
 			reg = <0x0 0x100>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_b1: cpu@101 {
@@ -404,6 +409,27 @@
 		status = "disabled";
 	};
 
+	thermal-zones {
+		#include "rk3368-thermal.dtsi"
+	};
+
+	tsadc: tsadc@ff280000 {
+		compatible = "rockchip,rk3368-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <95000>;
+		status = "disabled";
+	};
+
 	gmac: ethernet@ff290000 {
 		compatible = "rockchip,rk3368-gmac";
 		reg = <0x0 0xff290000 0x0 0x10000>;
@@ -829,6 +855,16 @@
 			};
 		};
 
+		tsadc {
+			otp_gpio: otp-gpio {
+				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			otp_out: otp-out {
+				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,
-- 
1.9.1

[PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi

[Caesar Wang]

This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- fix a copy wrong name.
Series-changes: 1
- support the opt gpio pinctrl state

Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 36 ++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cc093a4..83a2bd2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -45,6 +45,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3368";
@@ -123,6 +124,8 @@
 			reg = <0x0 0x0>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_l1: cpu at 1 {
@@ -155,6 +158,8 @@
 			reg = <0x0 0x100>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_b1: cpu at 101 {
@@ -404,6 +409,27 @@
 		status = "disabled";
 	};
 
+	thermal-zones {
+		#include "rk3368-thermal.dtsi"
+	};
+
+	tsadc: tsadc at ff280000 {
+		compatible = "rockchip,rk3368-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <95000>;
+		status = "disabled";
+	};
+
 	gmac: ethernet at ff290000 {
 		compatible = "rockchip,rk3368-gmac";
 		reg = <0x0 0xff290000 0x0 0x10000>;
@@ -829,6 +855,16 @@
 			};
 		};
 
+		tsadc {
+			otp_gpio: otp-gpio {
+				rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			otp_out: otp-out {
+				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,
-- 
1.9.1

Re: [PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:04PM +0800, Caesar Wang wrote:
> This patch add the thermal needed info on RK3368.
> Meanwhile, support the trips to throttle for thermal.
> 

Acked-by: Eduardo Valentin <edubezval@gmail.com>

> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> 
> ---

[PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:04PM +0800, Caesar Wang wrote:
> This patch add the thermal needed info on RK3368.
> Meanwhile, support the trips to throttle for thermal.
> 

Acked-by: Eduardo Valentin <edubezval@gmail.com>

> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> 
> ---

Re: [PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:04PM +0800, Caesar Wang wrote:
> This patch add the thermal needed info on RK3368.
> Meanwhile, support the trips to throttle for thermal.
> 

Acked-by: Eduardo Valentin <edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> 
> ---
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[PATCH v2 9/9] arm64: dts: Enable the Thermal on R88 board

[Caesar Wang]

This patch enable the TS-ADC.

When a thermal temperature is invoked use the CRU to reset the chip
on R88 board. TSHUT is low active on this board.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2: None
Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index 401a812..7684426a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -336,6 +336,12 @@
 	status = "okay";
 };
 
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+	status = "okay";
+}
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1

[PATCH v2 9/9] arm64: dts: Enable the Thermal on R88 board

[Caesar Wang]

This patch enable the TS-ADC.

When a thermal temperature is invoked use the CRU to reset the chip
on R88 board. TSHUT is low active on this board.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2: None
Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index 401a812..7684426a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -336,6 +336,12 @@
 	status = "okay";
 };
 
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+	status = "okay";
+}
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1

Re: [PATCH v2 9/9] arm64: dts: Enable the Thermal on R88 board

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:05PM +0800, Caesar Wang wrote:
> This patch enable the TS-ADC.
> 
> When a thermal temperature is invoked use the CRU to reset the chip
> on R88 board. TSHUT is low active on this board.
> 

Acked-by: Eduardo Valentin <edubezval@gmail.com>

> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> 
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> index 401a812..7684426a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> @@ -336,6 +336,12 @@
>  	status = "okay";
>  };
>  
> +&tsadc {
> +	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
> +	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
> +	status = "okay";
> +}
> +
>  &uart2 {
>  	status = "okay";
>  };
> -- 
> 1.9.1
> 

[PATCH v2 9/9] arm64: dts: Enable the Thermal on R88 board

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:05PM +0800, Caesar Wang wrote:
> This patch enable the TS-ADC.
> 
> When a thermal temperature is invoked use the CRU to reset the chip
> on R88 board. TSHUT is low active on this board.
> 

Acked-by: Eduardo Valentin <edubezval@gmail.com>

> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> 
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> index 401a812..7684426a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> @@ -336,6 +336,12 @@
>  	status = "okay";
>  };
>  
> +&tsadc {
> +	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
> +	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
> +	status = "okay";
> +}
> +
>  &uart2 {
>  	status = "okay";
>  };
> -- 
> 1.9.1
> 

Re: [PATCH v2 9/9] arm64: dts: Enable the Thermal on R88 board

[Eduardo Valentin]

On Thu, Nov 05, 2015 at 01:18:05PM +0800, Caesar Wang wrote:
> This patch enable the TS-ADC.
> 
> When a thermal temperature is invoked use the CRU to reset the chip
> on R88 board. TSHUT is low active on this board.
> 

Acked-by: Eduardo Valentin <edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> 
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> index 401a812..7684426a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
> @@ -336,6 +336,12 @@
>  	status = "okay";
>  };
>  
> +&tsadc {
> +	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
> +	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
> +	status = "okay";
> +}
> +
>  &uart2 {
>  	status = "okay";
>  };
> -- 
> 1.9.1
> 
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Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Eduardo Valentin]

Caesar,

On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> This series patchs are working for RK3368 on Rockchip platform.
> 

Good to see the perseverance! :-)

> @Heiko,
>     The PATCH [5/6] is working based on big/littel cluster cpufreq
>     added. Anyway, the PATCH [5/6] also work for next kernel.
> 
> @Eduardo,
> This patchset are based on linus master branch.
> Note: Need add the following thermal patchs for thermal driver before apply
> this series patchs.
> 
> 1) thermal: rockchip: fix handling of invalid readings
> (https://patchwork.kernel.org/patch/6973101/)
> 
> 2) thermal: rockhip: fix setting thermal shutdown polarity
> (https://patchwork.kernel.org/patch/6973131/)
> 
> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> (https://patchwork.kernel.org/patch/7472021/)
> 
> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
> (https://patchwork.kernel.org/patch/7472051/)
> 
> I'm glad these patchs have merged in thermal-soc git tree which can be found at
> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git

Yeah, apologize the delay on giving you a feedback on your code. As I
mentioned before, I had a couple of other things in past weeks that
consumed my time. 

Anyways, this specific patch series looks way better now that you have
split it further. I will have a better look on it again and let you
know when it will land.

BR,

Eduardo Valentin

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Eduardo Valentin]

Caesar,

On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> This series patchs are working for RK3368 on Rockchip platform.
> 

Good to see the perseverance! :-)

> @Heiko,
>     The PATCH [5/6] is working based on big/littel cluster cpufreq
>     added. Anyway, the PATCH [5/6] also work for next kernel.
> 
> @Eduardo,
> This patchset are based on linus master branch.
> Note: Need add the following thermal patchs for thermal driver before apply
> this series patchs.
> 
> 1) thermal: rockchip: fix handling of invalid readings
> (https://patchwork.kernel.org/patch/6973101/)
> 
> 2) thermal: rockhip: fix setting thermal shutdown polarity
> (https://patchwork.kernel.org/patch/6973131/)
> 
> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> (https://patchwork.kernel.org/patch/7472021/)
> 
> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
> (https://patchwork.kernel.org/patch/7472051/)
> 
> I'm glad these patchs have merged in thermal-soc git tree which can be found at
> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git

Yeah, apologize the delay on giving you a feedback on your code. As I
mentioned before, I had a couple of other things in past weeks that
consumed my time. 

Anyways, this specific patch series looks way better now that you have
split it further. I will have a better look on it again and let you
know when it will land.

BR,

Eduardo Valentin

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Heiko Stuebner]

Hi Eduardo, Caesar,

Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > This series patchs are working for RK3368 on Rockchip platform.
> > 
> 
> Good to see the perseverance! :-)
> 
> > @Heiko,
> >     The PATCH [5/6] is working based on big/littel cluster cpufreq
> >     added. Anyway, the PATCH [5/6] also work for next kernel.
> > 
> > @Eduardo,
> > This patchset are based on linus master branch.
> > Note: Need add the following thermal patchs for thermal driver before 
apply
> > this series patchs.
> > 
> > 1) thermal: rockchip: fix handling of invalid readings
> > (https://patchwork.kernel.org/patch/6973101/)
> > 
> > 2) thermal: rockhip: fix setting thermal shutdown polarity
> > (https://patchwork.kernel.org/patch/6973131/)
> > 
> > 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> > (https://patchwork.kernel.org/patch/7472021/)
> > 
> > 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in 
s2r
> > (https://patchwork.kernel.org/patch/7472051/)
> > 
> > I'm glad these patchs have merged in thermal-soc git tree which can be 
found at
> > git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-
thermal.git
> 
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time. 
> 
> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

I call dibs on the devicetree patches :-) .

Code and dt parts are very much separate, so I'd like to take the dt parts 
though my tree and arm-soc to keep further dts changes together.
Of course only once you are ok with the code parts :-)

Devicetree parts themselfs look ok to me.

Heiko

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Heiko Stuebner]

Hi Eduardo, Caesar,

Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > This series patchs are working for RK3368 on Rockchip platform.
> > 
> 
> Good to see the perseverance! :-)
> 
> > @Heiko,
> >     The PATCH [5/6] is working based on big/littel cluster cpufreq
> >     added. Anyway, the PATCH [5/6] also work for next kernel.
> > 
> > @Eduardo,
> > This patchset are based on linus master branch.
> > Note: Need add the following thermal patchs for thermal driver before 
apply
> > this series patchs.
> > 
> > 1) thermal: rockchip: fix handling of invalid readings
> > (https://patchwork.kernel.org/patch/6973101/)
> > 
> > 2) thermal: rockhip: fix setting thermal shutdown polarity
> > (https://patchwork.kernel.org/patch/6973131/)
> > 
> > 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> > (https://patchwork.kernel.org/patch/7472021/)
> > 
> > 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in 
s2r
> > (https://patchwork.kernel.org/patch/7472051/)
> > 
> > I'm glad these patchs have merged in thermal-soc git tree which can be 
found at
> > git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-
thermal.git
> 
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time. 
> 
> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

I call dibs on the devicetree patches :-) .

Code and dt parts are very much separate, so I'd like to take the dt parts 
though my tree and arm-soc to keep further dts changes together.
Of course only once you are ok with the code parts :-)

Devicetree parts themselfs look ok to me.

Heiko

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Heiko Stuebner]

Hi Eduardo, Caesar,

Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > This series patchs are working for RK3368 on Rockchip platform.
> > 
> 
> Good to see the perseverance! :-)
> 
> > @Heiko,
> >     The PATCH [5/6] is working based on big/littel cluster cpufreq
> >     added. Anyway, the PATCH [5/6] also work for next kernel.
> > 
> > @Eduardo,
> > This patchset are based on linus master branch.
> > Note: Need add the following thermal patchs for thermal driver before 
apply
> > this series patchs.
> > 
> > 1) thermal: rockchip: fix handling of invalid readings
> > (https://patchwork.kernel.org/patch/6973101/)
> > 
> > 2) thermal: rockhip: fix setting thermal shutdown polarity
> > (https://patchwork.kernel.org/patch/6973131/)
> > 
> > 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> > (https://patchwork.kernel.org/patch/7472021/)
> > 
> > 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in 
s2r
> > (https://patchwork.kernel.org/patch/7472051/)
> > 
> > I'm glad these patchs have merged in thermal-soc git tree which can be 
found at
> > git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-
thermal.git
> 
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time. 
> 
> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

I call dibs on the devicetree patches :-) .

Code and dt parts are very much separate, so I'd like to take the dt parts 
though my tree and arm-soc to keep further dts changes together.
Of course only once you are ok with the code parts :-)

Devicetree parts themselfs look ok to me.

Heiko
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Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Eduardo Valentin]

Hi,

On Fri, Nov 06, 2015 at 08:03:24PM +0100, Heiko Stuebner wrote:
> Hi Eduardo, Caesar,
> 
> Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> > On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > > This series patchs are working for RK3368 on Rockchip platform.
> > > 
> > 
> > Good to see the perseverance! :-)
> > 



> 
> I call dibs on the devicetree patches :-) .
> 
> Code and dt parts are very much separate, so I'd like to take the dt parts 
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
> 
> Devicetree parts themselfs look ok to me.
> 

I am picking 1-3 for now. Device tree part looks OK to me too.

> Heiko


BR,

Eduardo Valentin

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Eduardo Valentin]

Hi,

On Fri, Nov 06, 2015 at 08:03:24PM +0100, Heiko Stuebner wrote:
> Hi Eduardo, Caesar,
> 
> Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> > On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > > This series patchs are working for RK3368 on Rockchip platform.
> > > 
> > 
> > Good to see the perseverance! :-)
> > 



> 
> I call dibs on the devicetree patches :-) .
> 
> Code and dt parts are very much separate, so I'd like to take the dt parts 
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
> 
> Devicetree parts themselfs look ok to me.
> 

I am picking 1-3 for now. Device tree part looks OK to me too.

> Heiko


BR,

Eduardo Valentin

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Eduardo Valentin]

Hi,

On Fri, Nov 06, 2015 at 08:03:24PM +0100, Heiko Stuebner wrote:
> Hi Eduardo, Caesar,
> 
> Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> > On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > > This series patchs are working for RK3368 on Rockchip platform.
> > > 
> > 
> > Good to see the perseverance! :-)
> > 



> 
> I call dibs on the devicetree patches :-) .
> 
> Code and dt parts are very much separate, so I'd like to take the dt parts 
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
> 
> Devicetree parts themselfs look ok to me.
> 

I am picking 1-3 for now. Device tree part looks OK to me too.

> Heiko


BR,

Eduardo Valentin
--
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Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Heiko,

在 2015年11月07日 03:03, Heiko Stuebner 写道:[]

[....]

> I call dibs on the devicetree patches :-) .
>
> Code and dt parts are very much separate, so I'd like to take the dt parts
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
>
> Devicetree parts themselfs look ok to me.

Many thanks, I guess that I don't need send the dts patch again.;-)
the Code is still a bit change for thermal driver.

>
> Heiko
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Heiko,

? 2015?11?07? 03:03, Heiko Stuebner ??:[]

[....]

> I call dibs on the devicetree patches :-) .
>
> Code and dt parts are very much separate, so I'd like to take the dt parts
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
>
> Devicetree parts themselfs look ok to me.

Many thanks, I guess that I don't need send the dts patch again.;-)
the Code is still a bit change for thermal driver.

>
> Heiko
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Heiko Stuebner]

Hi Caesar,

Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
> 在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
> 
> [....]
> 
> > I call dibs on the devicetree patches :-) .
> >
> > Code and dt parts are very much separate, so I'd like to take the dt parts
> > though my tree and arm-soc to keep further dts changes together.
> > Of course only once you are ok with the code parts :-)
> >
> > Devicetree parts themselfs look ok to me.
> 
> Many thanks, I guess that I don't need send the dts patch again.;-)
> the Code is still a bit change for thermal driver.

I think you should still send the dts patches with next revisions. I can
only take the patches, once Eduardo is satisfied with the code changes
that include the new binding, and while I hope that this will be in v3, it
will be hard if we get to v5 or so, to grep through the older revisions,
trying to find the dts changes :-).


Heiko

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Heiko Stuebner]

Hi Caesar,

Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
> ? 2015?11?07? 03:03, Heiko Stuebner ??:[]
> 
> [....]
> 
> > I call dibs on the devicetree patches :-) .
> >
> > Code and dt parts are very much separate, so I'd like to take the dt parts
> > though my tree and arm-soc to keep further dts changes together.
> > Of course only once you are ok with the code parts :-)
> >
> > Devicetree parts themselfs look ok to me.
> 
> Many thanks, I guess that I don't need send the dts patch again.;-)
> the Code is still a bit change for thermal driver.

I think you should still send the dts patches with next revisions. I can
only take the patches, once Eduardo is satisfied with the code changes
that include the new binding, and while I hope that this will be in v3, it
will be hard if we get to v5 or so, to grep through the older revisions,
trying to find the dts changes :-).


Heiko

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Heiko Stuebner]

Hi Caesar,

Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
> 在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
> 
> [....]
> 
> > I call dibs on the devicetree patches :-) .
> >
> > Code and dt parts are very much separate, so I'd like to take the dt parts
> > though my tree and arm-soc to keep further dts changes together.
> > Of course only once you are ok with the code parts :-)
> >
> > Devicetree parts themselfs look ok to me.
> 
> Many thanks, I guess that I don't need send the dts patch again.;-)
> the Code is still a bit change for thermal driver.

I think you should still send the dts patches with next revisions. I can
only take the patches, once Eduardo is satisfied with the code changes
that include the new binding, and while I hope that this will be in v3, it
will be hard if we get to v5 or so, to grep through the older revisions,
trying to find the dts changes :-).


Heiko
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Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Hi Heiko,

在 2015年11月08日 07:13, Heiko Stuebner 写道:
> Hi Caesar,
>
> Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
>> 在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
>>
>> [....]
>>
>>> I call dibs on the devicetree patches :-) .
>>>
>>> Code and dt parts are very much separate, so I'd like to take the dt parts
>>> though my tree and arm-soc to keep further dts changes together.
>>> Of course only once you are ok with the code parts :-)
>>>
>>> Devicetree parts themselfs look ok to me.
>> Many thanks, I guess that I don't need send the dts patch again.;-)
>> the Code is still a bit change for thermal driver.
> I think you should still send the dts patches with next revisions. I can
> only take the patches, once Eduardo is satisfied with the code changes
> that include the new binding, and while I hope that this will be in v3, it
> will be hard if we get to v5 or so, to grep through the older revisions,
> trying to find the dts changes :-).

Okay, I send the v3 patchs.


>
> Heiko
>

-- 
Thanks,
Caesar

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Hi Heiko,

? 2015?11?08? 07:13, Heiko Stuebner ??:
> Hi Caesar,
>
> Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
>> ? 2015?11?07? 03:03, Heiko Stuebner ??:[]
>>
>> [....]
>>
>>> I call dibs on the devicetree patches :-) .
>>>
>>> Code and dt parts are very much separate, so I'd like to take the dt parts
>>> though my tree and arm-soc to keep further dts changes together.
>>> Of course only once you are ok with the code parts :-)
>>>
>>> Devicetree parts themselfs look ok to me.
>> Many thanks, I guess that I don't need send the dts patch again.;-)
>> the Code is still a bit change for thermal driver.
> I think you should still send the dts patches with next revisions. I can
> only take the patches, once Eduardo is satisfied with the code changes
> that include the new binding, and while I hope that this will be in v3, it
> will be hard if we get to v5 or so, to grep through the older revisions,
> trying to find the dts changes :-).

Okay, I send the v3 patchs.


>
> Heiko
>

-- 
Thanks,
Caesar

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Hi Eduardo,

在 2015年11月07日 02:47, Eduardo Valentin 写道:
> Caesar,
>
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
>> This series patchs are working for RK3368 on Rockchip platform.
>>
> Good to see the perseverance! :-)

I will send th patch [4-6]  next version and another pacth(fix the long 
temp->int temp) on tomorrow.
Need the verify it on my board firstly.:-P


>
>> @Heiko,
>>      The PATCH [5/6] is working based on big/littel cluster cpufreq
>>      added. Anyway, the PATCH [5/6] also work for next kernel.
>>
>> @Eduardo,
>> This patchset are based on linus master branch.
>> Note: Need add the following thermal patchs for thermal driver before apply
>> this series patchs.
>>
>> 1) thermal: rockchip: fix handling of invalid readings
>> (https://patchwork.kernel.org/patch/6973101/)
>>
>> 2) thermal: rockhip: fix setting thermal shutdown polarity
>> (https://patchwork.kernel.org/patch/6973131/)
>>
>> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
>> (https://patchwork.kernel.org/patch/7472021/)
>>
>> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
>> (https://patchwork.kernel.org/patch/7472051/)
>>
>> I'm glad these patchs have merged in thermal-soc git tree which can be found at
>> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time.

I see, that have been a very response from you.
Thank you taking your time to review this series patchs.:-)


> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

Many thank again.

> BR,
>
> Eduardo Valentin
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Hi Eduardo,

? 2015?11?07? 02:47, Eduardo Valentin ??:
> Caesar,
>
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
>> This series patchs are working for RK3368 on Rockchip platform.
>>
> Good to see the perseverance! :-)

I will send th patch [4-6]  next version and another pacth(fix the long 
temp->int temp) on tomorrow.
Need the verify it on my board firstly.:-P


>
>> @Heiko,
>>      The PATCH [5/6] is working based on big/littel cluster cpufreq
>>      added. Anyway, the PATCH [5/6] also work for next kernel.
>>
>> @Eduardo,
>> This patchset are based on linus master branch.
>> Note: Need add the following thermal patchs for thermal driver before apply
>> this series patchs.
>>
>> 1) thermal: rockchip: fix handling of invalid readings
>> (https://patchwork.kernel.org/patch/6973101/)
>>
>> 2) thermal: rockhip: fix setting thermal shutdown polarity
>> (https://patchwork.kernel.org/patch/6973131/)
>>
>> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
>> (https://patchwork.kernel.org/patch/7472021/)
>>
>> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
>> (https://patchwork.kernel.org/patch/7472051/)
>>
>> I'm glad these patchs have merged in thermal-soc git tree which can be found at
>> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time.

I see, that have been a very response from you.
Thank you taking your time to review this series patchs.:-)


> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

Many thank again.

> BR,
>
> Eduardo Valentin
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

[Caesar Wang]

Hi Eduardo,

在 2015年11月07日 02:47, Eduardo Valentin 写道:
> Caesar,
>
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
>> This series patchs are working for RK3368 on Rockchip platform.
>>
> Good to see the perseverance! :-)

I will send th patch [4-6]  next version and another pacth(fix the long 
temp->int temp) on tomorrow.
Need the verify it on my board firstly.:-P


>
>> @Heiko,
>>      The PATCH [5/6] is working based on big/littel cluster cpufreq
>>      added. Anyway, the PATCH [5/6] also work for next kernel.
>>
>> @Eduardo,
>> This patchset are based on linus master branch.
>> Note: Need add the following thermal patchs for thermal driver before apply
>> this series patchs.
>>
>> 1) thermal: rockchip: fix handling of invalid readings
>> (https://patchwork.kernel.org/patch/6973101/)
>>
>> 2) thermal: rockhip: fix setting thermal shutdown polarity
>> (https://patchwork.kernel.org/patch/6973131/)
>>
>> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
>> (https://patchwork.kernel.org/patch/7472021/)
>>
>> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
>> (https://patchwork.kernel.org/patch/7472051/)
>>
>> I'm glad these patchs have merged in thermal-soc git tree which can be found at
>> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time.

I see, that have been a very response from you.
Thank you taking your time to review this series patchs.:-)


> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

Many thank again.

> BR,
>
> Eduardo Valentin
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


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