* [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size
@ 2015-11-09 17:28 Yetunde Adebisi
0 siblings, 0 replies; 4+ messages in thread
From: Yetunde Adebisi @ 2015-11-09 17:28 UTC (permalink / raw)
To: dri-devel, intel-gfx; +Cc: Yetunde Adebisi, Jani Nikula
cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1252108..92d9a52 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
#define DP_BRANCH_OUI_HEADER_SIZE 0xc
#define DP_RECEIVER_CAP_SIZE 0xf
#define EDP_PSR_RECEIVER_CAP_SIZE 2
+#define EDP_DISPLAY_CTL_CAP_SIZE 3
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
--
1.9.3
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size
2016-02-05 12:18 [PATCH 0/2] DPCD Backlight Control Yetunde Adebisi
@ 2016-02-05 12:18 ` Yetunde Adebisi
0 siblings, 0 replies; 4+ messages in thread
From: Yetunde Adebisi @ 2016-02-05 12:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Yetunde Adebisi, Jani Nikula
This is used when reading Display Control capability Registers on the sink
device.
cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1252108..92d9a52 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
#define DP_BRANCH_OUI_HEADER_SIZE 0xc
#define DP_RECEIVER_CAP_SIZE 0xf
#define EDP_PSR_RECEIVER_CAP_SIZE 2
+#define EDP_DISPLAY_CTL_CAP_SIZE 3
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
--
1.9.3
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size
2016-01-12 15:59 [PATCH 0/2] DPCD Backlight Control Yetunde Adebisi
@ 2016-01-12 15:59 ` Yetunde Adebisi
0 siblings, 0 replies; 4+ messages in thread
From: Yetunde Adebisi @ 2016-01-12 15:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Yetunde Adebisi, Jani Nikula, dri-devel
This is used when reading Display Control capability Registers on the sink
device.
cc: Jani Nikula <jani.nikula@intel.com>
cc: dri-devel@lists.freedesktop.org
Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1252108..92d9a52 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
#define DP_BRANCH_OUI_HEADER_SIZE 0xc
#define DP_RECEIVER_CAP_SIZE 0xf
#define EDP_PSR_RECEIVER_CAP_SIZE 2
+#define EDP_DISPLAY_CTL_CAP_SIZE 3
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
--
1.9.3
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size
2015-12-16 12:07 [PATCH 0/2] DPCD Backlight Control Yetunde Adebisi
@ 2015-12-16 12:07 ` Yetunde Adebisi
0 siblings, 0 replies; 4+ messages in thread
From: Yetunde Adebisi @ 2015-12-16 12:07 UTC (permalink / raw)
To: intel-gfx; +Cc: Yetunde Adebisi, Jani Nikula
This is used when reading Display Control capability Registers on the sink
device.
cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1252108..92d9a52 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
#define DP_BRANCH_OUI_HEADER_SIZE 0xc
#define DP_RECEIVER_CAP_SIZE 0xf
#define EDP_PSR_RECEIVER_CAP_SIZE 2
+#define EDP_DISPLAY_CTL_CAP_SIZE 3
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
--
1.9.3
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-02-05 12:19 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2015-11-09 17:28 [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi
2015-12-16 12:07 [PATCH 0/2] DPCD Backlight Control Yetunde Adebisi
2015-12-16 12:07 ` [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi
2016-01-12 15:59 [PATCH 0/2] DPCD Backlight Control Yetunde Adebisi
2016-01-12 15:59 ` [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi
2016-02-05 12:18 [PATCH 0/2] DPCD Backlight Control Yetunde Adebisi
2016-02-05 12:18 ` [PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size Yetunde Adebisi
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