* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-15 10:54 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-15 10:54 UTC (permalink / raw)
To: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
3 files changed, 409 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7c4706d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -284,6 +284,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-gw551x.dtb \
imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
imx6dl-rex-basic.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..cded07d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+ cpus {
+ cpu@0 {
+ operating-points = <
+ /* kHz uV */
+ 792000 1150000
+ 396000 1150000
+ >;
+
+ fsl,soc-operating-points = <
+ /* ARM kHz SOC-PU uV */
+ 792000 1175000
+ 396000 1175000
+ >;
+ };
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..59c416e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,372 @@
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+
+ reg_usb_h1_vbus: usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ reg_sd4_vmmc: sd4_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-icore-rqs {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* SD3_CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* SD3_PWR */
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_audmux_4: audmux-4 {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg_1: usbotggrp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_4>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&gpc {
+ fsl,cpu_pupscr_sw2iso = <0xf>;
+ fsl,cpu_pupscr_sw = <0xf>;
+ fsl,cpu_pdnscr_iso2sw = <0x1>;
+ fsl,cpu_pdnscr_iso = <0x1>;
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
--
2.6.3
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^ permalink raw reply related [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-15 10:54 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-15 10:54 UTC (permalink / raw)
To: linux-arm-kernel
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
3 files changed, 409 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7c4706d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -284,6 +284,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-gw551x.dtb \
imx6dl-gw552x.dtb \
imx6dl-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-pbab01.dtb \
imx6dl-rex-basic.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..cded07d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+ cpus {
+ cpu at 0 {
+ operating-points = <
+ /* kHz uV */
+ 792000 1150000
+ 396000 1150000
+ >;
+
+ fsl,soc-operating-points = <
+ /* ARM kHz SOC-PU uV */
+ 792000 1175000
+ 396000 1175000
+ >;
+ };
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..59c416e
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,372 @@
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+
+ reg_usb_h1_vbus: usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ reg_sd4_vmmc: sd4_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ imx6qdl-icore-rqs {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* SD3_CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* SD3_PWR */
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_audmux_4: audmux-4 {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbotg_1: usbotggrp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_4>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&gpc {
+ fsl,cpu_pupscr_sw2iso = <0xf>;
+ fsl,cpu_pupscr_sw = <0xf>;
+ fsl,cpu_pdnscr_iso2sw = <0x1>;
+ fsl,cpu_pdnscr_iso = <0x1>;
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
--
2.6.3
^ permalink raw reply related [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-15 10:54 ` Michael Trimarchi
@ 2015-11-16 9:19 ` Lucas Stach
-1 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-16 9:19 UTC (permalink / raw)
To: Michael Trimarchi
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> 3 files changed, 409 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7c4706d 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -284,6 +284,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6dl-gw551x.dtb \
> imx6dl-gw552x.dtb \
> imx6dl-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
Alphabetical ordering, please. Quad boards must not be added in between
DL boards.
> imx6dl-nitrogen6x.dtb \
> imx6dl-phytec-pbab01.dtb \
> imx6dl-rex-basic.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..cded07d
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,36 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> + cpus {
> + cpu@0 {
> + operating-points = <
> + /* kHz uV */
> + 792000 1150000
> + 396000 1150000
> + >;
> +
> + fsl,soc-operating-points = <
> + /* ARM kHz SOC-PU uV */
> + 792000 1175000
> + 396000 1175000
> + >;
> + };
Why do you need to edit the OPPS here? Just to fix them on a specific
voltage? Why?
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..59c416e
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,372 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-always-on;
> + };
> +
> + reg_1p8v: 1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
A lot of those regulators look like they don't need to be always-on.
Also the use of a simple-bus, while giving some structure to the DT is
considered bad style as it doesn't reflect any real hardware.
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + imx6qdl-icore-rqs {
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
Add a pcie pincontrol for this.
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* SD3_CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* SD3_PWR */
Add to USDHC3 pincontrol.
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
Add to USB pincontrol where the hub is conntected.
> + >;
> + };
> +
> + pinctrl_audmux_4: audmux-4 {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbotg_1: usbotggrp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&gpc {
> + fsl,cpu_pupscr_sw2iso = <0xf>;
> + fsl,cpu_pupscr_sw = <0xf>;
> + fsl,cpu_pdnscr_iso2sw = <0x1>;
> + fsl,cpu_pdnscr_iso = <0x1>;
Those properties are not present in the mainline binding. Remove.
> +};
> +
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 9:19 ` Lucas Stach
0 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-16 9:19 UTC (permalink / raw)
To: linux-arm-kernel
Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> 3 files changed, 409 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7c4706d 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -284,6 +284,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6dl-gw551x.dtb \
> imx6dl-gw552x.dtb \
> imx6dl-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
Alphabetical ordering, please. Quad boards must not be added in between
DL boards.
> imx6dl-nitrogen6x.dtb \
> imx6dl-phytec-pbab01.dtb \
> imx6dl-rex-basic.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..cded07d
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,36 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> + cpus {
> + cpu at 0 {
> + operating-points = <
> + /* kHz uV */
> + 792000 1150000
> + 396000 1150000
> + >;
> +
> + fsl,soc-operating-points = <
> + /* ARM kHz SOC-PU uV */
> + 792000 1175000
> + 396000 1175000
> + >;
> + };
Why do you need to edit the OPPS here? Just to fix them on a specific
voltage? Why?
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..59c416e
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,372 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-always-on;
> + };
> +
> + reg_1p8v: 1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
A lot of those regulators look like they don't need to be always-on.
Also the use of a simple-bus, while giving some structure to the DT is
considered bad style as it doesn't reflect any real hardware.
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog>;
> +
> + imx6qdl-icore-rqs {
> + pinctrl_hog: hoggrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
Add a pcie pincontrol for this.
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* SD3_CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* SD3_PWR */
Add to USDHC3 pincontrol.
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
Add to USB pincontrol where the hub is conntected.
> + >;
> + };
> +
> + pinctrl_audmux_4: audmux-4 {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbotg_1: usbotggrp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&gpc {
> + fsl,cpu_pupscr_sw2iso = <0xf>;
> + fsl,cpu_pupscr_sw = <0xf>;
> + fsl,cpu_pdnscr_iso2sw = <0x1>;
> + fsl,cpu_pdnscr_iso = <0x1>;
Those properties are not present in the mainline binding. Remove.
> +};
> +
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 9:19 ` Lucas Stach
@ 2015-11-16 11:29 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 11:29 UTC (permalink / raw)
To: Lucas Stach
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi
On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > 3 files changed, 409 insertions(+)
> > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index bb8fa02..7c4706d 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -284,6 +284,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > imx6dl-gw551x.dtb \
> > imx6dl-gw552x.dtb \
> > imx6dl-hummingboard.dtb \
> > + imx6q-icore-rqs.dtb \
>
> Alphabetical ordering, please. Quad boards must not be added in between
> DL boards.
>
ok
> > imx6dl-nitrogen6x.dtb \
> > imx6dl-phytec-pbab01.dtb \
> > imx6dl-rex-basic.dtb \
> > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > new file mode 100644
> > index 0000000..cded07d
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > @@ -0,0 +1,36 @@
> > +/*
> > + * Copyright (C) 2015 Amarula Solutions B.V.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "imx6q.dtsi"
> > +#include "imx6qdl-icore-rqs.dtsi"
> > +
> > +/ {
> > + model = "Engicam i.CoreM6 Quad SOM";
> > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > + cpus {
> > + cpu@0 {
> > + operating-points = <
> > + /* kHz uV */
> > + 792000 1150000
> > + 396000 1150000
> > + >;
> > +
> > + fsl,soc-operating-points = <
> > + /* ARM kHz SOC-PU uV */
> > + 792000 1175000
> > + 396000 1175000
> > + >;
> > + };
> Why do you need to edit the OPPS here? Just to fix them on a specific
> voltage? Why?
>
Board has no pmu regulator
> > + };
> > +};
> > +
> > +&sata {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > new file mode 100644
> > index 0000000..59c416e
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > @@ -0,0 +1,372 @@
> > +/*
> > + * Copyright 2015 Amarula Solutions B.V.
> > + *
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > +
> > +/ {
> > + memory {
> > + reg = <0x10000000 0x80000000>;
> > + };
> > +
> > + regulators {
> > + compatible = "simple-bus";
> > +
> > + reg_usb_h1_vbus: usb_h1_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_h1_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + };
> > +
> > + reg_usb_otg_vbus: usb_otg_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_otg_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_3p3v: 3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_2p5v: 2p5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "2P5V";
> > + regulator-min-microvolt = <2500000>;
> > + regulator-max-microvolt = <2500000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_1p8v: 1p8v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_sd4_vmmc: sd4_vmmc {
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD4_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_sd3_vmmc: sd3_vmmc {
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD3_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
>
> A lot of those regulators look like they don't need to be always-on.
>
> Also the use of a simple-bus, while giving some structure to the DT is
> considered bad style as it doesn't reflect any real hardware.
>
I will check how other boards do it
> > + };
> > +
> > + usb_hub: usb-hub {
> > + compatible = "smsc,usb3503a";
> > + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > + clock-names = "refclk";
> > + };
> > +};
> > +
> > +&iomuxc {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_hog>;
> > +
> > + imx6qdl-icore-rqs {
> > + pinctrl_hog: hoggrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
>
> Add a pcie pincontrol for this.
ok
> > + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* SD3_CD */
> > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* SD3_PWR */
>
> Add to USDHC3 pincontrol.
ok
> > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
>
> Add to USB pincontrol where the hub is conntected.
I can put this pin in the hub definition
> > + >;
> > + };
> > +
> > + pinctrl_audmux_4: audmux-4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_usdhc1_1: usdhc1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2: usdhc3grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1: usdhc4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > + >;
> > + };
> > +
> > + pinctrl_enet_3: enetgrp-3 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> > + >;
> > + };
> > +
> > + pinctrl_i2c1_1: i2c1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c2_2: i2c2grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c3_4: i2c3grp-4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_uart4_1: uart4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > + >;
> > + };
> > +
> > + pinctrl_usbotg_1: usbotggrp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> > + >;
> > + };
> > +
> > + pinctrl_usbotg_2: usbotggrp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > + >;
> > + };
> > + };
> > +};
> > +
> > +&clks {
> > + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > +};
> > +
> > +&audmux {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_audmux_4>;
> > + status = "okay";
> > +};
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet_3>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > +};
> > +
> > +&gpc {
> > + fsl,cpu_pupscr_sw2iso = <0xf>;
> > + fsl,cpu_pupscr_sw = <0xf>;
> > + fsl,cpu_pdnscr_iso2sw = <0x1>;
> > + fsl,cpu_pdnscr_iso = <0x1>;
>
> Those properties are not present in the mainline binding. Remove.
>
Let me remove them
> > +};
> > +
> > +&i2c1 {
> > + status = "okay";
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c1_1>;
> > +
> > +};
> > +
> > +&i2c2 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2_2>;
> > + status = "okay";
> > +
> > +};
> > +
> > +&i2c3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c3_4>;
> > + status = "okay";
> > +};
> > +
> > +&pcie {
> > + status = "okay";
> > +};
> > +
> > +&ssi1 {
> > + fsl,mode = "i2s-slave";
> > + status = "okay";
> > +};
> > +
> > +&uart4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart4_1>;
> > + status = "okay";
> > +};
> > +
> > +&usbh1 {
> > + vbus-supply = <®_usb_h1_vbus>;
> > + disable-over-current;
> > + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > + status = "okay";
> > +};
> > +
> > +&usbotg {
> > + vbus-supply = <®_usb_otg_vbus>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbotg_2>;
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +&usdhc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc1_1>;
> > + no-1-8-v;
> > + status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc3_2>;
> > + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > + vmcc-supply = <®_sd3_vmmc>;
> > + bus-witdh=<4>;
> > + no-1-8-v;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&usdhc4 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc4_1>;
> > + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > + vmcc-supply = <®_sd4_vmmc>;
> > + bus-witdh=<8>;
> > + no-1-8-v;
> > + non-removable;
> > + status = "okay";
> > +};
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 11:29 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 11:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > 3 files changed, 409 insertions(+)
> > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index bb8fa02..7c4706d 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -284,6 +284,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > imx6dl-gw551x.dtb \
> > imx6dl-gw552x.dtb \
> > imx6dl-hummingboard.dtb \
> > + imx6q-icore-rqs.dtb \
>
> Alphabetical ordering, please. Quad boards must not be added in between
> DL boards.
>
ok
> > imx6dl-nitrogen6x.dtb \
> > imx6dl-phytec-pbab01.dtb \
> > imx6dl-rex-basic.dtb \
> > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > new file mode 100644
> > index 0000000..cded07d
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > @@ -0,0 +1,36 @@
> > +/*
> > + * Copyright (C) 2015 Amarula Solutions B.V.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "imx6q.dtsi"
> > +#include "imx6qdl-icore-rqs.dtsi"
> > +
> > +/ {
> > + model = "Engicam i.CoreM6 Quad SOM";
> > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > + cpus {
> > + cpu at 0 {
> > + operating-points = <
> > + /* kHz uV */
> > + 792000 1150000
> > + 396000 1150000
> > + >;
> > +
> > + fsl,soc-operating-points = <
> > + /* ARM kHz SOC-PU uV */
> > + 792000 1175000
> > + 396000 1175000
> > + >;
> > + };
> Why do you need to edit the OPPS here? Just to fix them on a specific
> voltage? Why?
>
Board has no pmu regulator
> > + };
> > +};
> > +
> > +&sata {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > new file mode 100644
> > index 0000000..59c416e
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > @@ -0,0 +1,372 @@
> > +/*
> > + * Copyright 2015 Amarula Solutions B.V.
> > + *
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > +
> > +/ {
> > + memory {
> > + reg = <0x10000000 0x80000000>;
> > + };
> > +
> > + regulators {
> > + compatible = "simple-bus";
> > +
> > + reg_usb_h1_vbus: usb_h1_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_h1_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + };
> > +
> > + reg_usb_otg_vbus: usb_otg_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_otg_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_3p3v: 3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_2p5v: 2p5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "2P5V";
> > + regulator-min-microvolt = <2500000>;
> > + regulator-max-microvolt = <2500000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_1p8v: 1p8v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_sd4_vmmc: sd4_vmmc {
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD4_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_sd3_vmmc: sd3_vmmc {
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD3_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
>
> A lot of those regulators look like they don't need to be always-on.
>
> Also the use of a simple-bus, while giving some structure to the DT is
> considered bad style as it doesn't reflect any real hardware.
>
I will check how other boards do it
> > + };
> > +
> > + usb_hub: usb-hub {
> > + compatible = "smsc,usb3503a";
> > + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > + clock-names = "refclk";
> > + };
> > +};
> > +
> > +&iomuxc {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_hog>;
> > +
> > + imx6qdl-icore-rqs {
> > + pinctrl_hog: hoggrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
>
> Add a pcie pincontrol for this.
ok
> > + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* SD3_CD */
> > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* SD3_PWR */
>
> Add to USDHC3 pincontrol.
ok
> > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
>
> Add to USB pincontrol where the hub is conntected.
I can put this pin in the hub definition
> > + >;
> > + };
> > +
> > + pinctrl_audmux_4: audmux-4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_usdhc1_1: usdhc1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2: usdhc3grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1: usdhc4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > + >;
> > + };
> > +
> > + pinctrl_enet_3: enetgrp-3 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> > + >;
> > + };
> > +
> > + pinctrl_i2c1_1: i2c1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c2_2: i2c2grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c3_4: i2c3grp-4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_uart4_1: uart4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > + >;
> > + };
> > +
> > + pinctrl_usbotg_1: usbotggrp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> > + >;
> > + };
> > +
> > + pinctrl_usbotg_2: usbotggrp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > + >;
> > + };
> > + };
> > +};
> > +
> > +&clks {
> > + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > +};
> > +
> > +&audmux {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_audmux_4>;
> > + status = "okay";
> > +};
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet_3>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > +};
> > +
> > +&gpc {
> > + fsl,cpu_pupscr_sw2iso = <0xf>;
> > + fsl,cpu_pupscr_sw = <0xf>;
> > + fsl,cpu_pdnscr_iso2sw = <0x1>;
> > + fsl,cpu_pdnscr_iso = <0x1>;
>
> Those properties are not present in the mainline binding. Remove.
>
Let me remove them
> > +};
> > +
> > +&i2c1 {
> > + status = "okay";
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c1_1>;
> > +
> > +};
> > +
> > +&i2c2 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2_2>;
> > + status = "okay";
> > +
> > +};
> > +
> > +&i2c3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c3_4>;
> > + status = "okay";
> > +};
> > +
> > +&pcie {
> > + status = "okay";
> > +};
> > +
> > +&ssi1 {
> > + fsl,mode = "i2s-slave";
> > + status = "okay";
> > +};
> > +
> > +&uart4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart4_1>;
> > + status = "okay";
> > +};
> > +
> > +&usbh1 {
> > + vbus-supply = <®_usb_h1_vbus>;
> > + disable-over-current;
> > + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > + status = "okay";
> > +};
> > +
> > +&usbotg {
> > + vbus-supply = <®_usb_otg_vbus>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbotg_2>;
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +&usdhc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc1_1>;
> > + no-1-8-v;
> > + status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc3_2>;
> > + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > + vmcc-supply = <®_sd3_vmmc>;
> > + bus-witdh=<4>;
> > + no-1-8-v;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&usdhc4 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc4_1>;
> > + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > + vmcc-supply = <®_sd4_vmmc>;
> > + bus-witdh=<8>;
> > + no-1-8-v;
> > + non-removable;
> > + status = "okay";
> > +};
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 11:29 ` Michael Trimarchi
@ 2015-11-16 11:38 ` Lucas Stach
-1 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-16 11:38 UTC (permalink / raw)
To: Michael Trimarchi
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> Hi
>
> On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > >
> > > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > > ---
> > > arch/arm/boot/dts/Makefile | 1 +
> > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > 3 files changed, 409 insertions(+)
> > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > >
[...]
> > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > new file mode 100644
> > > index 0000000..cded07d
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > @@ -0,0 +1,36 @@
> > > +/*
> > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "imx6q.dtsi"
> > > +#include "imx6qdl-icore-rqs.dtsi"
> > > +
> > > +/ {
> > > + model = "Engicam i.CoreM6 Quad SOM";
> > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > + cpus {
> > > + cpu@0 {
> > > + operating-points = <
> > > + /* kHz uV */
> > > + 792000 1150000
> > > + 396000 1150000
> > > + >;
> > > +
> > > + fsl,soc-operating-points = <
> > > + /* ARM kHz SOC-PU uV */
> > > + 792000 1175000
> > > + 396000 1175000
> > > + >;
> > > + };
> > Why do you need to edit the OPPS here? Just to fix them on a specific
> > voltage? Why?
> >
>
> Board has no pmu regulator
>
The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
and SOC domain to the internal LDOs, so voltage scaling is not dependent
on an external PMIC being present.
> > > + };
> > > +};
> > > +
> > > +&sata {
> > > + status = "okay";
> > > +};
> > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > new file mode 100644
> > > index 0000000..59c416e
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > @@ -0,0 +1,372 @@
> > > +/*
> > > + * Copyright 2015 Amarula Solutions B.V.
> > > + *
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > +
> > > +/ {
> > > + memory {
> > > + reg = <0x10000000 0x80000000>;
> > > + };
> > > +
> > > + regulators {
> > > + compatible = "simple-bus";
> > > +
> > > + reg_usb_h1_vbus: usb_h1_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_h1_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> > > + enable-active-high;
> > > + };
> > > +
> > > + reg_usb_otg_vbus: usb_otg_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_otg_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_3p3v: 3p3v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "3P3V";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_2p5v: 2p5v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "2P5V";
> > > + regulator-min-microvolt = <2500000>;
> > > + regulator-max-microvolt = <2500000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_1p8v: 1p8v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "1P8V";
> > > + regulator-min-microvolt = <1800000>;
> > > + regulator-max-microvolt = <1800000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_sd4_vmmc: sd4_vmmc {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD4_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_sd3_vmmc: sd3_vmmc {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> >
> > A lot of those regulators look like they don't need to be always-on.
> >
> > Also the use of a simple-bus, while giving some structure to the DT is
> > considered bad style as it doesn't reflect any real hardware.
> >
>
> I will check how other boards do it
>
Note that there are a lot of bad examples still around. What you need to
do is essentially just remove the additional DT level of the regulator
bus. The regulators are board components that belong to the same level
as the usb hub below, or the memory node above.
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 11:38 ` Lucas Stach
0 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-16 11:38 UTC (permalink / raw)
To: linux-arm-kernel
Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> Hi
>
> On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > >
> > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > > ---
> > > arch/arm/boot/dts/Makefile | 1 +
> > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > 3 files changed, 409 insertions(+)
> > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > >
[...]
> > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > new file mode 100644
> > > index 0000000..cded07d
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > @@ -0,0 +1,36 @@
> > > +/*
> > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + */
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "imx6q.dtsi"
> > > +#include "imx6qdl-icore-rqs.dtsi"
> > > +
> > > +/ {
> > > + model = "Engicam i.CoreM6 Quad SOM";
> > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > + cpus {
> > > + cpu at 0 {
> > > + operating-points = <
> > > + /* kHz uV */
> > > + 792000 1150000
> > > + 396000 1150000
> > > + >;
> > > +
> > > + fsl,soc-operating-points = <
> > > + /* ARM kHz SOC-PU uV */
> > > + 792000 1175000
> > > + 396000 1175000
> > > + >;
> > > + };
> > Why do you need to edit the OPPS here? Just to fix them on a specific
> > voltage? Why?
> >
>
> Board has no pmu regulator
>
The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
and SOC domain to the internal LDOs, so voltage scaling is not dependent
on an external PMIC being present.
> > > + };
> > > +};
> > > +
> > > +&sata {
> > > + status = "okay";
> > > +};
> > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > new file mode 100644
> > > index 0000000..59c416e
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > @@ -0,0 +1,372 @@
> > > +/*
> > > + * Copyright 2015 Amarula Solutions B.V.
> > > + *
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > +
> > > +/ {
> > > + memory {
> > > + reg = <0x10000000 0x80000000>;
> > > + };
> > > +
> > > + regulators {
> > > + compatible = "simple-bus";
> > > +
> > > + reg_usb_h1_vbus: usb_h1_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_h1_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> > > + enable-active-high;
> > > + };
> > > +
> > > + reg_usb_otg_vbus: usb_otg_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_otg_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_3p3v: 3p3v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "3P3V";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_2p5v: 2p5v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "2P5V";
> > > + regulator-min-microvolt = <2500000>;
> > > + regulator-max-microvolt = <2500000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_1p8v: 1p8v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "1P8V";
> > > + regulator-min-microvolt = <1800000>;
> > > + regulator-max-microvolt = <1800000>;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_sd4_vmmc: sd4_vmmc {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD4_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_sd3_vmmc: sd3_vmmc {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> >
> > A lot of those regulators look like they don't need to be always-on.
> >
> > Also the use of a simple-bus, while giving some structure to the DT is
> > considered bad style as it doesn't reflect any real hardware.
> >
>
> I will check how other boards do it
>
Note that there are a lot of bad examples still around. What you need to
do is essentially just remove the additional DT level of the regulator
bus. The regulators are board components that belong to the same level
as the usb hub below, or the memory node above.
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 11:38 ` Lucas Stach
@ 2015-11-16 11:41 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 11:41 UTC (permalink / raw)
To: Lucas Stach
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi
On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> > Hi
> >
> > On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > >
> > > > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > > > ---
> > > > arch/arm/boot/dts/Makefile | 1 +
> > > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > > 3 files changed, 409 insertions(+)
> > > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > >
> [...]
> > > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > new file mode 100644
> > > > index 0000000..cded07d
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > @@ -0,0 +1,36 @@
> > > > +/*
> > > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or modify
> > > > + * it under the terms of the GNU General Public License version 2 as
> > > > + * published by the Free Software Foundation.
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +
> > > > +#include "imx6q.dtsi"
> > > > +#include "imx6qdl-icore-rqs.dtsi"
> > > > +
> > > > +/ {
> > > > + model = "Engicam i.CoreM6 Quad SOM";
> > > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > > + cpus {
> > > > + cpu@0 {
> > > > + operating-points = <
> > > > + /* kHz uV */
> > > > + 792000 1150000
> > > > + 396000 1150000
> > > > + >;
> > > > +
> > > > + fsl,soc-operating-points = <
> > > > + /* ARM kHz SOC-PU uV */
> > > > + 792000 1175000
> > > > + 396000 1175000
> > > > + >;
> > > > + };
> > > Why do you need to edit the OPPS here? Just to fix them on a specific
> > > voltage? Why?
> > >
> >
> > Board has no pmu regulator
> >
> The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
> and SOC domain to the internal LDOs, so voltage scaling is not dependent
> on an external PMIC being present.
>
Sorry, It was a mistake based on original patch. So I need to limit the max
allowed frequency suggested by the vendor. So including the operating points
that I support. Is this fine?
> > > > + };
> > > > +};
> > > > +
> > > > +&sata {
> > > > + status = "okay";
> > > > +};
> > > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > new file mode 100644
> > > > index 0000000..59c416e
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > @@ -0,0 +1,372 @@
> > > > +/*
> > > > + * Copyright 2015 Amarula Solutions B.V.
> > > > + *
> > > > + * The code contained herein is licensed under the GNU General Public
> > > > + * License. You may obtain a copy of the GNU General Public License
> > > > + * Version 2 or later at the following locations:
> > > > + *
> > > > + * http://www.opensource.org/licenses/gpl-license.html
> > > > + * http://www.gnu.org/copyleft/gpl.html
> > > > + */
> > > > +#include <dt-bindings/gpio/gpio.h>
> > > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > > +
> > > > +/ {
> > > > + memory {
> > > > + reg = <0x10000000 0x80000000>;
> > > > + };
> > > > +
> > > > + regulators {
> > > > + compatible = "simple-bus";
> > > > +
> > > > + reg_usb_h1_vbus: usb_h1_vbus {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "usb_h1_vbus";
> > > > + regulator-min-microvolt = <5000000>;
> > > > + regulator-max-microvolt = <5000000>;
> > > > + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> > > > + enable-active-high;
> > > > + };
> > > > +
> > > > + reg_usb_otg_vbus: usb_otg_vbus {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "usb_otg_vbus";
> > > > + regulator-min-microvolt = <5000000>;
> > > > + regulator-max-microvolt = <5000000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_3p3v: 3p3v {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "3P3V";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_2p5v: 2p5v {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "2P5V";
> > > > + regulator-min-microvolt = <2500000>;
> > > > + regulator-max-microvolt = <2500000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_1p8v: 1p8v {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "1P8V";
> > > > + regulator-min-microvolt = <1800000>;
> > > > + regulator-max-microvolt = <1800000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_sd4_vmmc: sd4_vmmc {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "P3V3_SD4_SWITCHED";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_sd3_vmmc: sd3_vmmc {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + };
> > >
> > > A lot of those regulators look like they don't need to be always-on.
> > >
> > > Also the use of a simple-bus, while giving some structure to the DT is
> > > considered bad style as it doesn't reflect any real hardware.
> > >
> >
> > I will check how other boards do it
> >
> Note that there are a lot of bad examples still around. What you need to
> do is essentially just remove the additional DT level of the regulator
> bus. The regulators are board components that belong to the same level
> as the usb hub below, or the memory node above.
Understand. I will do
>
> Regards,
> Lucas
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 11:41 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 11:41 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> > Hi
> >
> > On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > >
> > > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > > > ---
> > > > arch/arm/boot/dts/Makefile | 1 +
> > > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > > 3 files changed, 409 insertions(+)
> > > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > >
> [...]
> > > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > new file mode 100644
> > > > index 0000000..cded07d
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > @@ -0,0 +1,36 @@
> > > > +/*
> > > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or modify
> > > > + * it under the terms of the GNU General Public License version 2 as
> > > > + * published by the Free Software Foundation.
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +
> > > > +#include "imx6q.dtsi"
> > > > +#include "imx6qdl-icore-rqs.dtsi"
> > > > +
> > > > +/ {
> > > > + model = "Engicam i.CoreM6 Quad SOM";
> > > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > > + cpus {
> > > > + cpu at 0 {
> > > > + operating-points = <
> > > > + /* kHz uV */
> > > > + 792000 1150000
> > > > + 396000 1150000
> > > > + >;
> > > > +
> > > > + fsl,soc-operating-points = <
> > > > + /* ARM kHz SOC-PU uV */
> > > > + 792000 1175000
> > > > + 396000 1175000
> > > > + >;
> > > > + };
> > > Why do you need to edit the OPPS here? Just to fix them on a specific
> > > voltage? Why?
> > >
> >
> > Board has no pmu regulator
> >
> The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
> and SOC domain to the internal LDOs, so voltage scaling is not dependent
> on an external PMIC being present.
>
Sorry, It was a mistake based on original patch. So I need to limit the max
allowed frequency suggested by the vendor. So including the operating points
that I support. Is this fine?
> > > > + };
> > > > +};
> > > > +
> > > > +&sata {
> > > > + status = "okay";
> > > > +};
> > > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > new file mode 100644
> > > > index 0000000..59c416e
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > @@ -0,0 +1,372 @@
> > > > +/*
> > > > + * Copyright 2015 Amarula Solutions B.V.
> > > > + *
> > > > + * The code contained herein is licensed under the GNU General Public
> > > > + * License. You may obtain a copy of the GNU General Public License
> > > > + * Version 2 or later at the following locations:
> > > > + *
> > > > + * http://www.opensource.org/licenses/gpl-license.html
> > > > + * http://www.gnu.org/copyleft/gpl.html
> > > > + */
> > > > +#include <dt-bindings/gpio/gpio.h>
> > > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > > +
> > > > +/ {
> > > > + memory {
> > > > + reg = <0x10000000 0x80000000>;
> > > > + };
> > > > +
> > > > + regulators {
> > > > + compatible = "simple-bus";
> > > > +
> > > > + reg_usb_h1_vbus: usb_h1_vbus {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "usb_h1_vbus";
> > > > + regulator-min-microvolt = <5000000>;
> > > > + regulator-max-microvolt = <5000000>;
> > > > + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> > > > + enable-active-high;
> > > > + };
> > > > +
> > > > + reg_usb_otg_vbus: usb_otg_vbus {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "usb_otg_vbus";
> > > > + regulator-min-microvolt = <5000000>;
> > > > + regulator-max-microvolt = <5000000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_3p3v: 3p3v {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "3P3V";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_2p5v: 2p5v {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "2P5V";
> > > > + regulator-min-microvolt = <2500000>;
> > > > + regulator-max-microvolt = <2500000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_1p8v: 1p8v {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "1P8V";
> > > > + regulator-min-microvolt = <1800000>;
> > > > + regulator-max-microvolt = <1800000>;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_sd4_vmmc: sd4_vmmc {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "P3V3_SD4_SWITCHED";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + };
> > > > +
> > > > + reg_sd3_vmmc: sd3_vmmc {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + };
> > >
> > > A lot of those regulators look like they don't need to be always-on.
> > >
> > > Also the use of a simple-bus, while giving some structure to the DT is
> > > considered bad style as it doesn't reflect any real hardware.
> > >
> >
> > I will check how other boards do it
> >
> Note that there are a lot of bad examples still around. What you need to
> do is essentially just remove the additional DT level of the regulator
> bus. The regulators are board components that belong to the same level
> as the usb hub below, or the memory node above.
Understand. I will do
>
> Regards,
> Lucas
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 11:41 ` Michael Trimarchi
@ 2015-11-16 11:51 ` Lucas Stach
-1 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-16 11:51 UTC (permalink / raw)
To: Michael Trimarchi
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Am Montag, den 16.11.2015, 12:41 +0100 schrieb Michael Trimarchi:
> Hi
>
> On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> > Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> > > Hi
> > >
> > > On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > > > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > > >
> > > > > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > > > > ---
> > > > > arch/arm/boot/dts/Makefile | 1 +
> > > > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > > > 3 files changed, 409 insertions(+)
> > > > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > >
> > [...]
> > > > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > new file mode 100644
> > > > > index 0000000..cded07d
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > @@ -0,0 +1,36 @@
> > > > > +/*
> > > > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > > > + *
> > > > > + * This program is free software; you can redistribute it and/or modify
> > > > > + * it under the terms of the GNU General Public License version 2 as
> > > > > + * published by the Free Software Foundation.
> > > > > + */
> > > > > +
> > > > > +/dts-v1/;
> > > > > +
> > > > > +#include "imx6q.dtsi"
> > > > > +#include "imx6qdl-icore-rqs.dtsi"
> > > > > +
> > > > > +/ {
> > > > > + model = "Engicam i.CoreM6 Quad SOM";
> > > > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > > > + cpus {
> > > > > + cpu@0 {
> > > > > + operating-points = <
> > > > > + /* kHz uV */
> > > > > + 792000 1150000
> > > > > + 396000 1150000
> > > > > + >;
> > > > > +
> > > > > + fsl,soc-operating-points = <
> > > > > + /* ARM kHz SOC-PU uV */
> > > > > + 792000 1175000
> > > > > + 396000 1175000
> > > > > + >;
> > > > > + };
> > > > Why do you need to edit the OPPS here? Just to fix them on a specific
> > > > voltage? Why?
> > > >
> > >
> > > Board has no pmu regulator
> > >
> > The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
> > and SOC domain to the internal LDOs, so voltage scaling is not dependent
> > on an external PMIC being present.
> >
>
> Sorry, It was a mistake based on original patch. So I need to limit the max
> allowed frequency suggested by the vendor. So including the operating points
> that I support. Is this fine?
>
Do you really want to remove the ability to lower voltage for the slower
OPPs? Also you only need this if the module includes a higher rated SKU,
that needs to be throttled below its rated max frequency.
If the module includes a SKU that is rated for 792MHz by Freescale (like
the industrial ones) the kernel will read the SoC fuses and disable any
OPPs that are unsupported by the SKU on its own.
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 11:51 ` Lucas Stach
0 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-16 11:51 UTC (permalink / raw)
To: linux-arm-kernel
Am Montag, den 16.11.2015, 12:41 +0100 schrieb Michael Trimarchi:
> Hi
>
> On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> > Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> > > Hi
> > >
> > > On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > > > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > > >
> > > > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > > > > ---
> > > > > arch/arm/boot/dts/Makefile | 1 +
> > > > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > > > 3 files changed, 409 insertions(+)
> > > > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > >
> > [...]
> > > > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > new file mode 100644
> > > > > index 0000000..cded07d
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > @@ -0,0 +1,36 @@
> > > > > +/*
> > > > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > > > + *
> > > > > + * This program is free software; you can redistribute it and/or modify
> > > > > + * it under the terms of the GNU General Public License version 2 as
> > > > > + * published by the Free Software Foundation.
> > > > > + */
> > > > > +
> > > > > +/dts-v1/;
> > > > > +
> > > > > +#include "imx6q.dtsi"
> > > > > +#include "imx6qdl-icore-rqs.dtsi"
> > > > > +
> > > > > +/ {
> > > > > + model = "Engicam i.CoreM6 Quad SOM";
> > > > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > > > + cpus {
> > > > > + cpu at 0 {
> > > > > + operating-points = <
> > > > > + /* kHz uV */
> > > > > + 792000 1150000
> > > > > + 396000 1150000
> > > > > + >;
> > > > > +
> > > > > + fsl,soc-operating-points = <
> > > > > + /* ARM kHz SOC-PU uV */
> > > > > + 792000 1175000
> > > > > + 396000 1175000
> > > > > + >;
> > > > > + };
> > > > Why do you need to edit the OPPS here? Just to fix them on a specific
> > > > voltage? Why?
> > > >
> > >
> > > Board has no pmu regulator
> > >
> > The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
> > and SOC domain to the internal LDOs, so voltage scaling is not dependent
> > on an external PMIC being present.
> >
>
> Sorry, It was a mistake based on original patch. So I need to limit the max
> allowed frequency suggested by the vendor. So including the operating points
> that I support. Is this fine?
>
Do you really want to remove the ability to lower voltage for the slower
OPPs? Also you only need this if the module includes a higher rated SKU,
that needs to be throttled below its rated max frequency.
If the module includes a SKU that is rated for 792MHz by Freescale (like
the industrial ones) the kernel will read the SoC fuses and disable any
OPPs that are unsupported by the SKU on its own.
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 11:51 ` Lucas Stach
@ 2015-11-16 11:54 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 11:54 UTC (permalink / raw)
To: Lucas Stach
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi
On Mon, Nov 16, 2015 at 12:51:35PM +0100, Lucas Stach wrote:
> Am Montag, den 16.11.2015, 12:41 +0100 schrieb Michael Trimarchi:
> > Hi
> >
> > On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> > > Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> > > > Hi
> > > >
> > > > On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > > > > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > > > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > > > >
> > > > > > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > > > > > ---
> > > > > > arch/arm/boot/dts/Makefile | 1 +
> > > > > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > > > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > > > > 3 files changed, 409 insertions(+)
> > > > > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > > >
> > > [...]
> > > > > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > > new file mode 100644
> > > > > > index 0000000..cded07d
> > > > > > --- /dev/null
> > > > > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > > @@ -0,0 +1,36 @@
> > > > > > +/*
> > > > > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > > > > + *
> > > > > > + * This program is free software; you can redistribute it and/or modify
> > > > > > + * it under the terms of the GNU General Public License version 2 as
> > > > > > + * published by the Free Software Foundation.
> > > > > > + */
> > > > > > +
> > > > > > +/dts-v1/;
> > > > > > +
> > > > > > +#include "imx6q.dtsi"
> > > > > > +#include "imx6qdl-icore-rqs.dtsi"
> > > > > > +
> > > > > > +/ {
> > > > > > + model = "Engicam i.CoreM6 Quad SOM";
> > > > > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > > > > + cpus {
> > > > > > + cpu@0 {
> > > > > > + operating-points = <
> > > > > > + /* kHz uV */
> > > > > > + 792000 1150000
> > > > > > + 396000 1150000
> > > > > > + >;
> > > > > > +
> > > > > > + fsl,soc-operating-points = <
> > > > > > + /* ARM kHz SOC-PU uV */
> > > > > > + 792000 1175000
> > > > > > + 396000 1175000
> > > > > > + >;
> > > > > > + };
> > > > > Why do you need to edit the OPPS here? Just to fix them on a specific
> > > > > voltage? Why?
> > > > >
> > > >
> > > > Board has no pmu regulator
> > > >
> > > The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
> > > and SOC domain to the internal LDOs, so voltage scaling is not dependent
> > > on an external PMIC being present.
> > >
> >
> > Sorry, It was a mistake based on original patch. So I need to limit the max
> > allowed frequency suggested by the vendor. So including the operating points
> > that I support. Is this fine?
> >
> Do you really want to remove the ability to lower voltage for the slower
> OPPs? Also you only need this if the module includes a higher rated SKU,
> that needs to be throttled below its rated max frequency.
>
> If the module includes a SKU that is rated for 792MHz by Freescale (like
> the industrial ones) the kernel will read the SoC fuses and disable any
> OPPs that are unsupported by the SKU on its own.
>
Yes I will drop. It's totally wrong, thank you for the lesson on fuses
Michael
> Regards,
> Lucas
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 11:54 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 11:54 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Mon, Nov 16, 2015 at 12:51:35PM +0100, Lucas Stach wrote:
> Am Montag, den 16.11.2015, 12:41 +0100 schrieb Michael Trimarchi:
> > Hi
> >
> > On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> > > Am Montag, den 16.11.2015, 12:29 +0100 schrieb Michael Trimarchi:
> > > > Hi
> > > >
> > > > On Mon, Nov 16, 2015 at 10:19:12AM +0100, Lucas Stach wrote:
> > > > > Am Sonntag, den 15.11.2015, 11:54 +0100 schrieb Michael Trimarchi:
> > > > > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > > > > >
> > > > > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > > > > > ---
> > > > > > arch/arm/boot/dts/Makefile | 1 +
> > > > > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 36 +++
> > > > > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 372 +++++++++++++++++++++++++++++++
> > > > > > 3 files changed, 409 insertions(+)
> > > > > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > > > >
> > > [...]
> > > > > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > > new file mode 100644
> > > > > > index 0000000..cded07d
> > > > > > --- /dev/null
> > > > > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > > > > @@ -0,0 +1,36 @@
> > > > > > +/*
> > > > > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > > > > + *
> > > > > > + * This program is free software; you can redistribute it and/or modify
> > > > > > + * it under the terms of the GNU General Public License version 2 as
> > > > > > + * published by the Free Software Foundation.
> > > > > > + */
> > > > > > +
> > > > > > +/dts-v1/;
> > > > > > +
> > > > > > +#include "imx6q.dtsi"
> > > > > > +#include "imx6qdl-icore-rqs.dtsi"
> > > > > > +
> > > > > > +/ {
> > > > > > + model = "Engicam i.CoreM6 Quad SOM";
> > > > > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> > > > > > + cpus {
> > > > > > + cpu at 0 {
> > > > > > + operating-points = <
> > > > > > + /* kHz uV */
> > > > > > + 792000 1150000
> > > > > > + 396000 1150000
> > > > > > + >;
> > > > > > +
> > > > > > + fsl,soc-operating-points = <
> > > > > > + /* ARM kHz SOC-PU uV */
> > > > > > + 792000 1175000
> > > > > > + 396000 1175000
> > > > > > + >;
> > > > > > + };
> > > > > Why do you need to edit the OPPS here? Just to fix them on a specific
> > > > > voltage? Why?
> > > > >
> > > >
> > > > Board has no pmu regulator
> > > >
> > > The default i.MX6 configuration (see imx6q.dtsi) is to connect the ARM
> > > and SOC domain to the internal LDOs, so voltage scaling is not dependent
> > > on an external PMIC being present.
> > >
> >
> > Sorry, It was a mistake based on original patch. So I need to limit the max
> > allowed frequency suggested by the vendor. So including the operating points
> > that I support. Is this fine?
> >
> Do you really want to remove the ability to lower voltage for the slower
> OPPs? Also you only need this if the module includes a higher rated SKU,
> that needs to be throttled below its rated max frequency.
>
> If the module includes a SKU that is rated for 792MHz by Freescale (like
> the industrial ones) the kernel will read the SoC fuses and disable any
> OPPs that are unsupported by the SKU on its own.
>
Yes I will drop. It's totally wrong, thank you for the lesson on fuses
Michael
> Regards,
> Lucas
>
> --
> Pengutronix e.K. | Lucas Stach |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V2] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 11:54 ` Michael Trimarchi
@ 2015-11-16 17:23 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 17:23 UTC (permalink / raw)
To: Lucas Stach
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 21 ++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 365 +++++++++++++++++++++++++++++++
3 files changed, 387 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..96f167f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..678ff0a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,365 @@
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ compatible = "smsc,usb3503a";
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&iomuxc {
+ imx6qdl-icore-rqs {
+
+ pinctrl_audmux_4: audmux-4 {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_4>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
--
2.6.3
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
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^ permalink raw reply related [flat|nested] 60+ messages in thread
* [PATCH V2] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 17:23 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 17:23 UTC (permalink / raw)
To: linux-arm-kernel
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 21 ++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 365 +++++++++++++++++++++++++++++++
3 files changed, 387 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..96f167f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..678ff0a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,365 @@
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ compatible = "smsc,usb3503a";
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&iomuxc {
+ imx6qdl-icore-rqs {
+
+ pinctrl_audmux_4: audmux-4 {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_4>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
--
2.6.3
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 60+ messages in thread
* Re: [PATCH V2] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 17:23 ` Michael Trimarchi
@ 2015-11-16 22:02 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 22:02 UTC (permalink / raw)
To: Lucas Stach
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi Lucas
On Mon, Nov 16, 2015 at 06:23:18PM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
Here you have the boot of the board
http://pastebin.com/DBi9kJfZ
I need this patch too
http://lkml.iu.edu/hypermail/linux/kernel/1511.1/04843.html
Regards
Michael
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 21 ++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 365 +++++++++++++++++++++++++++++++
> 3 files changed, 387 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..96f167f
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..678ff0a
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,365 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: 1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + compatible = "smsc,usb3503a";
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&iomuxc {
> + imx6qdl-icore-rqs {
> +
> + pinctrl_audmux_4: audmux-4 {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V2] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-16 22:02 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-16 22:02 UTC (permalink / raw)
To: linux-arm-kernel
Hi Lucas
On Mon, Nov 16, 2015 at 06:23:18PM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
Here you have the boot of the board
http://pastebin.com/DBi9kJfZ
I need this patch too
http://lkml.iu.edu/hypermail/linux/kernel/1511.1/04843.html
Regards
Michael
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 21 ++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 365 +++++++++++++++++++++++++++++++
> 3 files changed, 387 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..96f167f
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..678ff0a
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,365 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: 1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + compatible = "smsc,usb3503a";
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&iomuxc {
> + imx6qdl-icore-rqs {
> +
> + pinctrl_audmux_4: audmux-4 {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V2] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 17:23 ` Michael Trimarchi
@ 2015-11-17 9:31 ` Lucas Stach
-1 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-17 9:31 UTC (permalink / raw)
To: Michael Trimarchi
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Am Montag, den 16.11.2015, 18:23 +0100 schrieb Michael Trimarchi:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Looks good to me now,
Reviewed-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> ---
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 21 ++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 365 +++++++++++++++++++++++++++++++
> 3 files changed, 387 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..96f167f
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..678ff0a
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,365 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: 1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + compatible = "smsc,usb3503a";
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&iomuxc {
> + imx6qdl-icore-rqs {
> +
> + pinctrl_audmux_4: audmux-4 {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V2] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-17 9:31 ` Lucas Stach
0 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-17 9:31 UTC (permalink / raw)
To: linux-arm-kernel
Am Montag, den 16.11.2015, 18:23 +0100 schrieb Michael Trimarchi:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Looks good to me now,
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 21 ++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 365 +++++++++++++++++++++++++++++++
> 3 files changed, 387 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..96f167f
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..678ff0a
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,365 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: 1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + compatible = "smsc,usb3503a";
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&iomuxc {
> + imx6qdl-icore-rqs {
> +
> + pinctrl_audmux_4: audmux-4 {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-17 9:31 ` Lucas Stach
@ 2015-11-18 15:10 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-18 15:10 UTC (permalink / raw)
To: Lucas Stach
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
I'm not quite sure how ethernet tuning parameter
are working in other setup and this seems the
correct way to use it
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
3 files changed, 428 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..8f14edf
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
+
+&i2c3 {
+ codec: sgtl5000@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..c57a830
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,382 @@
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ compatible = "smsc,usb3503a";
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&iomuxc {
+ imx6qdl-icore-rqs {
+
+ pinctrl_audmux_4: audmux-4 {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_4>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
--
2.6.3
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply related [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-18 15:10 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-18 15:10 UTC (permalink / raw)
To: linux-arm-kernel
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
I'm not quite sure how ethernet tuning parameter
are working in other setup and this seems the
correct way to use it
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
3 files changed, 428 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..8f14edf
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
+
+&i2c3 {
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..c57a830
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,382 @@
+/*
+ * Copyright 2015 Amarula Solutions B.V.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: 1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: 2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb_otg_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ compatible = "smsc,usb3503a";
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&iomuxc {
+ imx6qdl-icore-rqs {
+
+ pinctrl_audmux_4: audmux-4 {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux_4>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
--
2.6.3
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-16 11:38 ` Lucas Stach
@ 2015-11-24 9:19 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-11-24 9:19 UTC (permalink / raw)
To: Lucas Stach
Cc: Michael Trimarchi, kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
<snip>
> > > > + reg_sd3_vmmc: sd3_vmmc {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + };
> > >
> > > A lot of those regulators look like they don't need to be always-on.
> > >
> > > Also the use of a simple-bus, while giving some structure to the DT is
> > > considered bad style as it doesn't reflect any real hardware.
> > >
> >
> > I will check how other boards do it
> >
> Note that there are a lot of bad examples still around. What you need to
> do is essentially just remove the additional DT level of the regulator
> bus. The regulators are board components that belong to the same level
> as the usb hub below, or the memory node above.
Will kernel populate platform_device for these fixed regulators if they
are being put directly under root node? Kernel used to only do that for
devices under simple-bus.
Shawn
--
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-24 9:19 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-11-24 9:19 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
<snip>
> > > > + reg_sd3_vmmc: sd3_vmmc {
> > > > + compatible = "regulator-fixed";
> > > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > > + regulator-min-microvolt = <3300000>;
> > > > + regulator-max-microvolt = <3300000>;
> > > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > > + regulator-boot-on;
> > > > + regulator-always-on;
> > > > + };
> > >
> > > A lot of those regulators look like they don't need to be always-on.
> > >
> > > Also the use of a simple-bus, while giving some structure to the DT is
> > > considered bad style as it doesn't reflect any real hardware.
> > >
> >
> > I will check how other boards do it
> >
> Note that there are a lot of bad examples still around. What you need to
> do is essentially just remove the additional DT level of the regulator
> bus. The regulators are board components that belong to the same level
> as the usb hub below, or the memory node above.
Will kernel populate platform_device for these fixed regulators if they
are being put directly under root node? Kernel used to only do that for
devices under simple-bus.
Shawn
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-24 9:19 ` Shawn Guo
@ 2015-11-24 9:31 ` Lucas Stach
-1 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-24 9:31 UTC (permalink / raw)
To: Shawn Guo
Cc: Michael Trimarchi, kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Am Dienstag, den 24.11.2015, 17:19 +0800 schrieb Shawn Guo:
> On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> <snip>
> > > > > + reg_sd3_vmmc: sd3_vmmc {
> > > > > + compatible = "regulator-fixed";
> > > > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > > > + regulator-min-microvolt = <3300000>;
> > > > > + regulator-max-microvolt = <3300000>;
> > > > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > > > + regulator-boot-on;
> > > > > + regulator-always-on;
> > > > > + };
> > > >
> > > > A lot of those regulators look like they don't need to be always-on.
> > > >
> > > > Also the use of a simple-bus, while giving some structure to the DT is
> > > > considered bad style as it doesn't reflect any real hardware.
> > > >
> > >
> > > I will check how other boards do it
> > >
> > Note that there are a lot of bad examples still around. What you need to
> > do is essentially just remove the additional DT level of the regulator
> > bus. The regulators are board components that belong to the same level
> > as the usb hub below, or the memory node above.
>
> Will kernel populate platform_device for these fixed regulators if they
> are being put directly under root node? Kernel used to only do that for
> devices under simple-bus.
>
It does, as other behavior would clearly be a bug that should not be
worked around in the DT itself.
We are using of_platform_populate() to populate the root bus. From the
comment above this function:
"It differs in that it follows the modern convention of requiring all
device nodes to have a 'compatible' property, and it is suitable for
creating devices which are children of the root node
(of_platform_bus_probe will only create children of the root which are
selected by the @matches argument)."
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-24 9:31 ` Lucas Stach
0 siblings, 0 replies; 60+ messages in thread
From: Lucas Stach @ 2015-11-24 9:31 UTC (permalink / raw)
To: linux-arm-kernel
Am Dienstag, den 24.11.2015, 17:19 +0800 schrieb Shawn Guo:
> On Mon, Nov 16, 2015 at 12:38:15PM +0100, Lucas Stach wrote:
> <snip>
> > > > > + reg_sd3_vmmc: sd3_vmmc {
> > > > > + compatible = "regulator-fixed";
> > > > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > > > + regulator-min-microvolt = <3300000>;
> > > > > + regulator-max-microvolt = <3300000>;
> > > > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > > > + regulator-boot-on;
> > > > > + regulator-always-on;
> > > > > + };
> > > >
> > > > A lot of those regulators look like they don't need to be always-on.
> > > >
> > > > Also the use of a simple-bus, while giving some structure to the DT is
> > > > considered bad style as it doesn't reflect any real hardware.
> > > >
> > >
> > > I will check how other boards do it
> > >
> > Note that there are a lot of bad examples still around. What you need to
> > do is essentially just remove the additional DT level of the regulator
> > bus. The regulators are board components that belong to the same level
> > as the usb hub below, or the memory node above.
>
> Will kernel populate platform_device for these fixed regulators if they
> are being put directly under root node? Kernel used to only do that for
> devices under simple-bus.
>
It does, as other behavior would clearly be a bug that should not be
worked around in the DT itself.
We are using of_platform_populate() to populate the root bus. From the
comment above this function:
"It differs in that it follows the modern convention of requiring all
device nodes to have a 'compatible' property, and it is suitable for
creating devices which are children of the root node
(of_platform_bus_probe will only create children of the root which are
selected by the @matches argument)."
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-18 15:10 ` Michael Trimarchi
@ 2015-11-25 18:14 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-25 18:14 UTC (permalink / raw)
To: Lucas Stach
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
shawnguo-DgEjT+Ai2ygdnm+yROfE0A, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi Shawn
On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> I'm not quite sure how ethernet tuning parameter
> are working in other setup and this seems the
> correct way to use it
>
As you can see my way to connect the ethernet phy is different. I have
seen that most of the boards put all the tuning under fec but unfortunately
this does not work. I don't know if people check if their value are correctly
written to the phy.
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
Michael
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-11-25 18:14 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-11-25 18:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Shawn
On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> I'm not quite sure how ethernet tuning parameter
> are working in other setup and this seems the
> correct way to use it
>
As you can see my way to connect the ethernet phy is different. I have
seen that most of the boards put all the tuning under fec but unfortunately
this does not work. I don't know if people check if their value are correctly
written to the phy.
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
Michael
> +&i2c1 {
> + status = "okay";
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-25 18:14 ` Michael Trimarchi
@ 2015-12-02 2:09 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-02 2:09 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
On Wed, Nov 25, 2015 at 07:14:13PM +0100, Michael Trimarchi wrote:
> Hi Shawn
>
> On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
> <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > ---
> > I'm not quite sure how ethernet tuning parameter
> > are working in other setup and this seems the
> > correct way to use it
> >
>
> As you can see my way to connect the ethernet phy is different. I have
> seen that most of the boards put all the tuning under fec but unfortunately
> this does not work. I don't know if people check if their value are correctly
> written to the phy.
Hmm, I'm not sure what example you are looking at. But here is what I
see from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
txen-skew-ps = <0>;
txc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};
Shawn
>
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet_3>;
> > + phy-handle = <ð_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > + mdio {
> > + eth_phy: ethernet-phy {
> > + rxc-skew-ps = <1140>;
> > + txc-skew-ps = <1140>;
> > + txen-skew-ps = <600>;
> > + rxdv-skew-ps = <240>;
> > + rxd0-skew-ps = <420>;
> > + rxd1-skew-ps = <600>;
> > + rxd2-skew-ps = <420>;
> > + rxd3-skew-ps = <240>;
> > + txd0-skew-ps = <60>;
> > + txd1-skew-ps = <60>;
> > + txd2-skew-ps = <60>;
> > + txd3-skew-ps = <240>;
> > + };
> > + };
> > +};
> > +
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-02 2:09 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-02 2:09 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 25, 2015 at 07:14:13PM +0100, Michael Trimarchi wrote:
> Hi Shawn
>
> On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > ---
> > I'm not quite sure how ethernet tuning parameter
> > are working in other setup and this seems the
> > correct way to use it
> >
>
> As you can see my way to connect the ethernet phy is different. I have
> seen that most of the boards put all the tuning under fec but unfortunately
> this does not work. I don't know if people check if their value are correctly
> written to the phy.
Hmm, I'm not sure what example you are looking at. But here is what I
see from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
txen-skew-ps = <0>;
txc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};
Shawn
>
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet_3>;
> > + phy-handle = <ð_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > + mdio {
> > + eth_phy: ethernet-phy {
> > + rxc-skew-ps = <1140>;
> > + txc-skew-ps = <1140>;
> > + txen-skew-ps = <600>;
> > + rxdv-skew-ps = <240>;
> > + rxd0-skew-ps = <420>;
> > + rxd1-skew-ps = <600>;
> > + rxd2-skew-ps = <420>;
> > + rxd3-skew-ps = <240>;
> > + txd0-skew-ps = <60>;
> > + txd1-skew-ps = <60>;
> > + txd2-skew-ps = <60>;
> > + txd3-skew-ps = <240>;
> > + };
> > + };
> > +};
> > +
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-02 2:09 ` Shawn Guo
@ 2015-12-02 9:15 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-02 9:15 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi
On Wed, Dec 2, 2015 at 3:09 AM, Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Wed, Nov 25, 2015 at 07:14:13PM +0100, Michael Trimarchi wrote:
>> Hi Shawn
>>
>> On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
>> <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
>> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>> >
>> > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
>> > ---
>> > I'm not quite sure how ethernet tuning parameter
>> > are working in other setup and this seems the
>> > correct way to use it
>> >
>>
>> As you can see my way to connect the ethernet phy is different. I have
>> seen that most of the boards put all the tuning under fec but unfortunately
>> this does not work. I don't know if people check if their value are correctly
>> written to the phy.
>
> Hmm, I'm not sure what example you are looking at. But here is what I
> see from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>
> &fec {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_enet>;
> phy-mode = "rgmii";
> phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
> txen-skew-ps = <0>;
> txc-skew-ps = <3000>;
> rxdv-skew-ps = <0>;
> rxc-skew-ps = <3000>;
> rxd0-skew-ps = <0>;
> rxd1-skew-ps = <0>;
> rxd2-skew-ps = <0>;
> rxd3-skew-ps = <0>;
> txd0-skew-ps = <0>;
> txd1-skew-ps = <0>;
> txd2-skew-ps = <0>;
> txd3-skew-ps = <0>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
> <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
> status = "okay";
> };
>
Yes sorry, could be only one. According in what I have seen this can
not work and the information stored in the
fec parameters are not written in the registers. Other small thing is
the IMX6/7 default config does not include
this phy at all, but that is a minor issue. Can you please do the
final review of my board so I can take care on this
too for Sabrelite?
Michael
> Shawn
>
>>
>> > +
>> > +&fec {
>> > + pinctrl-names = "default";
>> > + pinctrl-0 = <&pinctrl_enet_3>;
>> > + phy-handle = <ð_phy>;
>> > + phy-mode = "rgmii";
>> > + status = "okay";
>> > + mdio {
>> > + eth_phy: ethernet-phy {
>> > + rxc-skew-ps = <1140>;
>> > + txc-skew-ps = <1140>;
>> > + txen-skew-ps = <600>;
>> > + rxdv-skew-ps = <240>;
>> > + rxd0-skew-ps = <420>;
>> > + rxd1-skew-ps = <600>;
>> > + rxd2-skew-ps = <420>;
>> > + rxd3-skew-ps = <240>;
>> > + txd0-skew-ps = <60>;
>> > + txd1-skew-ps = <60>;
>> > + txd2-skew-ps = <60>;
>> > + txd3-skew-ps = <240>;
>> > + };
>> > + };
>> > +};
>> > +
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-02 9:15 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-02 9:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Wed, Dec 2, 2015 at 3:09 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Wed, Nov 25, 2015 at 07:14:13PM +0100, Michael Trimarchi wrote:
>> Hi Shawn
>>
>> On Wed, Nov 18, 2015 at 4:10 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>> >
>> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> > ---
>> > I'm not quite sure how ethernet tuning parameter
>> > are working in other setup and this seems the
>> > correct way to use it
>> >
>>
>> As you can see my way to connect the ethernet phy is different. I have
>> seen that most of the boards put all the tuning under fec but unfortunately
>> this does not work. I don't know if people check if their value are correctly
>> written to the phy.
>
> Hmm, I'm not sure what example you are looking at. But here is what I
> see from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
>
> &fec {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_enet>;
> phy-mode = "rgmii";
> phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
> txen-skew-ps = <0>;
> txc-skew-ps = <3000>;
> rxdv-skew-ps = <0>;
> rxc-skew-ps = <3000>;
> rxd0-skew-ps = <0>;
> rxd1-skew-ps = <0>;
> rxd2-skew-ps = <0>;
> rxd3-skew-ps = <0>;
> txd0-skew-ps = <0>;
> txd1-skew-ps = <0>;
> txd2-skew-ps = <0>;
> txd3-skew-ps = <0>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
> <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
> status = "okay";
> };
>
Yes sorry, could be only one. According in what I have seen this can
not work and the information stored in the
fec parameters are not written in the registers. Other small thing is
the IMX6/7 default config does not include
this phy at all, but that is a minor issue. Can you please do the
final review of my board so I can take care on this
too for Sabrelite?
Michael
> Shawn
>
>>
>> > +
>> > +&fec {
>> > + pinctrl-names = "default";
>> > + pinctrl-0 = <&pinctrl_enet_3>;
>> > + phy-handle = <ð_phy>;
>> > + phy-mode = "rgmii";
>> > + status = "okay";
>> > + mdio {
>> > + eth_phy: ethernet-phy {
>> > + rxc-skew-ps = <1140>;
>> > + txc-skew-ps = <1140>;
>> > + txen-skew-ps = <600>;
>> > + rxdv-skew-ps = <240>;
>> > + rxd0-skew-ps = <420>;
>> > + rxd1-skew-ps = <600>;
>> > + rxd2-skew-ps = <420>;
>> > + rxd3-skew-ps = <240>;
>> > + txd0-skew-ps = <60>;
>> > + txd1-skew-ps = <60>;
>> > + txd2-skew-ps = <60>;
>> > + txd3-skew-ps = <240>;
>> > + };
>> > + };
>> > +};
>> > +
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-11-18 15:10 ` Michael Trimarchi
@ 2015-12-11 8:36 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-11 8:36 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> I'm not quite sure how ethernet tuning parameter
> are working in other setup and this seems the
> correct way to use it
>
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> 3 files changed, 428 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..8f14edf
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,45 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
You can find a lot of examples in arch/arm/boot/dts.
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
This is not a board from Freescale, so 'fsl,' is not a appropriate for
the board compatible imx6q-icore-rqs.
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
Please sort them labelled nodes alphabetically.
> +
> +&i2c3 {
> + codec: sgtl5000@0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..c57a830
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,382 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: 1p8v {
Can we name these regulator nodes a bit better, something like
'regulator-1pv8'?
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
It's more idiomatic to use minus than underscore in node name.
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + compatible = "smsc,usb3503a";
Let 'compatible' be the top of the property list.
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
How is this device get connected? The most common case is via I2C bus.
In that case, the node shouldn't be here but under I2C node.
> +};
> +
> +&iomuxc {
Suggest move iomuxc node to the bottom to make the file a bit easier to
read.
> + imx6qdl-icore-rqs {
> +
With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
nodes) in place, we can now save this container.
> + pinctrl_audmux_4: audmux-4 {
The suffix numbering makes no sense in this case. The following example
should be good enough.
pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
Let 'status' be the last property.
Shawn
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
>
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-11 8:36 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-11 8:36 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> I'm not quite sure how ethernet tuning parameter
> are working in other setup and this seems the
> correct way to use it
>
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> 3 files changed, 428 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..8f14edf
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,45 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
You can find a lot of examples in arch/arm/boot/dts.
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
This is not a board from Freescale, so 'fsl,' is not a appropriate for
the board compatible imx6q-icore-rqs.
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
Please sort them labelled nodes alphabetically.
> +
> +&i2c3 {
> + codec: sgtl5000 at 0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..c57a830
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,382 @@
> +/*
> + * Copyright 2015 Amarula Solutions B.V.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: 1p8v {
Can we name these regulator nodes a bit better, something like
'regulator-1pv8'?
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: 2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: 3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3_vmmc {
It's more idiomatic to use minus than underscore in node name.
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb_h1_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb_otg_vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + compatible = "smsc,usb3503a";
Let 'compatible' be the top of the property list.
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
How is this device get connected? The most common case is via I2C bus.
In that case, the node shouldn't be here but under I2C node.
> +};
> +
> +&iomuxc {
Suggest move iomuxc node to the bottom to make the file a bit easier to
read.
> + imx6qdl-icore-rqs {
> +
With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
nodes) in place, we can now save this container.
> + pinctrl_audmux_4: audmux-4 {
The suffix numbering makes no sense in this case. The following example
should be good enough.
pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux_4>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
Let 'status' be the last property.
Shawn
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> --
> 2.6.3
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
>
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-11 8:36 ` Shawn Guo
@ 2015-12-14 8:45 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-14 8:45 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi
On Fri, Dec 11, 2015 at 04:36:17PM +0800, Shawn Guo wrote:
> On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > ---
> > I'm not quite sure how ethernet tuning parameter
> > are working in other setup and this seems the
> > correct way to use it
> >
> > Changes in v3:
> > - add sgtl audio support
> > - add ethernet gigabit tuning
> > - use hub reset only in usbhub and not
> > in otg vbus
> >
> > Changes in v2:
> > - add the board in alphabetic order
> > - remove cpu operating point
> > - remove simple-bus and adjust regulaotor
> > - add gpios to correct pinctrl
> > - remove no mainline binding of gpc
> >
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
> > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> > 3 files changed, 428 insertions(+)
> > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index bb8fa02..7e8f29c 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > imx6q-gw551x.dtb \
> > imx6q-gw552x.dtb \
> > imx6q-hummingboard.dtb \
> > + imx6q-icore-rqs.dtb \
> > imx6q-nitrogen6x.dtb \
> > imx6q-phytec-pbab01.dtb \
> > imx6q-rex-pro.dtb \
> > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > new file mode 100644
> > index 0000000..8f14edf
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > @@ -0,0 +1,45 @@
> > +/*
> > + * Copyright (C) 2015 Amarula Solutions B.V.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
>
> Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
> You can find a lot of examples in arch/arm/boot/dts.
>
Ok
> > +
> > +/dts-v1/;
> > +
> > +#include "imx6q.dtsi"
> > +#include "imx6qdl-icore-rqs.dtsi"
> > +
> > +/ {
> > + model = "Engicam i.CoreM6 Quad SOM";
> > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
>
> This is not a board from Freescale, so 'fsl,' is not a appropriate for
> the board compatible imx6q-icore-rqs.
>
let use eng,imx6-icore-rqs
> > +
> > + sound {
> > + compatible = "fsl,imx-audio-sgtl5000";
> > + model = "imx-audio-sgtl5000";
> > + ssi-controller = <&ssi1>;
> > + audio-codec = <&codec>;
> > + audio-routing =
> > + "MIC_IN", "Mic Jack",
> > + "Mic Jack", "Mic Bias",
> > + "Headphone Jack", "HP_OUT";
> > + mux-int-port = <1>;
> > + mux-ext-port = <4>;
> > + };
> > +};
> > +
> > +&sata {
> > + status = "okay";
> > +};
>
> Please sort them labelled nodes alphabetically.
>
ok
> > +
> > +&i2c3 {
> > + codec: sgtl5000@0a {
> > + compatible = "fsl,sgtl5000";
> > + reg = <0x0a>;
> > + clocks = <&clks IMX6QDL_CLK_CKO>;
> > + VDDA-supply = <®_2p5v>;
> > + VDDIO-supply = <®_3p3v>;
> > + VDDD-supply = <®_1p8v>;
> > + };
> > +};
> > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > new file mode 100644
> > index 0000000..c57a830
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > @@ -0,0 +1,382 @@
> > +/*
> > + * Copyright 2015 Amarula Solutions B.V.
> > + *
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > +
> > +/ {
> > + memory {
> > + reg = <0x10000000 0x80000000>;
> > + };
> > +
> > + reg_1p8v: 1p8v {
>
> Can we name these regulator nodes a bit better, something like
> 'regulator-1pv8'?
>
ok
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_2p5v: 2p5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "2P5V";
> > + regulator-min-microvolt = <2500000>;
> > + regulator-max-microvolt = <2500000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_3p3v: 3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_sd3_vmmc: sd3_vmmc {
>
> It's more idiomatic to use minus than underscore in node name.
>
ok
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD3_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > + enable-active-high;
> > + };
> > +
> > + reg_sd4_vmmc: sd4_vmmc {
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD4_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_usb_h1_vbus: usb_h1_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_h1_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_usb_otg_vbus: usb_otg_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_otg_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + usb_hub: usb-hub {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbhub>;
> > + compatible = "smsc,usb3503a";
>
> Let 'compatible' be the top of the property list.
>
ok
> > + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> > + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > + clock-names = "refclk";
> > + };
>
> How is this device get connected? The most common case is via I2C bus.
> In that case, the node shouldn't be here but under I2C node.
>
It's correct, the connection is completly defined and it's not connected
to i2c according from what I know. I will double check
> > +};
> > +
> > +&iomuxc {
>
> Suggest move iomuxc node to the bottom to make the file a bit easier to
> read.
>
Ok
> > + imx6qdl-icore-rqs {
> > +
>
> With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> nodes) in place, we can now save this container.
>
> > + pinctrl_audmux_4: audmux-4 {
>
I will take a look of that commit
> The suffix numbering makes no sense in this case. The following example
> should be good enough.
>
> pinctrl_audmux: audmux {
>
> > + fsl,pins = <
> > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_enet_3: enetgrp-3 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> > + >;
> > + };
> > +
> > + pinctrl_i2c1_1: i2c1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c2_2: i2c2grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c3_4: i2c3grp-4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_pcie: pciegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> > + >;
> > + };
> > +
> > + pinctrl_uart4_1: uart4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > + >;
> > + };
> > +
> > + pinctrl_usbhub: usbhubgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> > + >;
> > + };
> > +
> > + pinctrl_usbotg_2: usbotggrp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > + >;
> > + };
> > +
> > + pinctrl_usdhc1_1: usdhc1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2: usdhc3grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1: usdhc4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > + >;
> > + };
> > + };
> > +};
> > +
> > +&clks {
> > + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > +};
> > +
> > +&audmux {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_audmux_4>;
> > + status = "okay";
> > +};
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet_3>;
> > + phy-handle = <ð_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > + mdio {
> > + eth_phy: ethernet-phy {
> > + rxc-skew-ps = <1140>;
> > + txc-skew-ps = <1140>;
> > + txen-skew-ps = <600>;
> > + rxdv-skew-ps = <240>;
> > + rxd0-skew-ps = <420>;
> > + rxd1-skew-ps = <600>;
> > + rxd2-skew-ps = <420>;
> > + rxd3-skew-ps = <240>;
> > + txd0-skew-ps = <60>;
> > + txd1-skew-ps = <60>;
> > + txd2-skew-ps = <60>;
> > + txd3-skew-ps = <240>;
> > + };
> > + };
> > +};
> > +
> > +&i2c1 {
> > + status = "okay";
>
> Let 'status' be the last property.
>
Ok
I will repost again
Michael
> Shawn
>
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c1_1>;
> > +};
> > +
> > +&i2c2 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2_2>;
> > + status = "okay";
> > +};
> > +
> > +&i2c3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c3_4>;
> > + status = "okay";
> > +};
> > +
> > +&pcie {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pcie>;
> > + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > + status = "okay";
> > +};
> > +
> > +&ssi1 {
> > + fsl,mode = "i2s-slave";
> > + status = "okay";
> > +};
> > +
> > +&uart4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart4_1>;
> > + status = "okay";
> > +};
> > +
> > +&usbh1 {
> > + vbus-supply = <®_usb_h1_vbus>;
> > + disable-over-current;
> > + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > + status = "okay";
> > +};
> > +
> > +&usbotg {
> > + vbus-supply = <®_usb_otg_vbus>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbotg_2>;
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +&usdhc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc1_1>;
> > + no-1-8-v;
> > + status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc3_2>;
> > + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > + vmcc-supply = <®_sd3_vmmc>;
> > + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> > + bus-witdh=<4>;
> > + no-1-8-v;
> > + status = "okay";
> > +};
> > +
> > +&usdhc4 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc4_1>;
> > + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > + vmcc-supply = <®_sd4_vmmc>;
> > + bus-witdh=<8>;
> > + no-1-8-v;
> > + non-removable;
> > + status = "okay";
> > +};
> > --
> > 2.6.3
> >
> > --
> > | Michael Nazzareno Trimarchi Amarula Solutions BV |
> > | COO - Founder Cruquiuskade 47 |
> > | +31(0)851119172 Amsterdam 1018 AM NL |
> > | [`as] http://www.amarulasolutions.com |
> >
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-14 8:45 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-14 8:45 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Fri, Dec 11, 2015 at 04:36:17PM +0800, Shawn Guo wrote:
> On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> >
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > ---
> > I'm not quite sure how ethernet tuning parameter
> > are working in other setup and this seems the
> > correct way to use it
> >
> > Changes in v3:
> > - add sgtl audio support
> > - add ethernet gigabit tuning
> > - use hub reset only in usbhub and not
> > in otg vbus
> >
> > Changes in v2:
> > - add the board in alphabetic order
> > - remove cpu operating point
> > - remove simple-bus and adjust regulaotor
> > - add gpios to correct pinctrl
> > - remove no mainline binding of gpc
> >
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
> > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> > 3 files changed, 428 insertions(+)
> > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index bb8fa02..7e8f29c 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > imx6q-gw551x.dtb \
> > imx6q-gw552x.dtb \
> > imx6q-hummingboard.dtb \
> > + imx6q-icore-rqs.dtb \
> > imx6q-nitrogen6x.dtb \
> > imx6q-phytec-pbab01.dtb \
> > imx6q-rex-pro.dtb \
> > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > new file mode 100644
> > index 0000000..8f14edf
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > @@ -0,0 +1,45 @@
> > +/*
> > + * Copyright (C) 2015 Amarula Solutions B.V.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
>
> Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
> You can find a lot of examples in arch/arm/boot/dts.
>
Ok
> > +
> > +/dts-v1/;
> > +
> > +#include "imx6q.dtsi"
> > +#include "imx6qdl-icore-rqs.dtsi"
> > +
> > +/ {
> > + model = "Engicam i.CoreM6 Quad SOM";
> > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
>
> This is not a board from Freescale, so 'fsl,' is not a appropriate for
> the board compatible imx6q-icore-rqs.
>
let use eng,imx6-icore-rqs
> > +
> > + sound {
> > + compatible = "fsl,imx-audio-sgtl5000";
> > + model = "imx-audio-sgtl5000";
> > + ssi-controller = <&ssi1>;
> > + audio-codec = <&codec>;
> > + audio-routing =
> > + "MIC_IN", "Mic Jack",
> > + "Mic Jack", "Mic Bias",
> > + "Headphone Jack", "HP_OUT";
> > + mux-int-port = <1>;
> > + mux-ext-port = <4>;
> > + };
> > +};
> > +
> > +&sata {
> > + status = "okay";
> > +};
>
> Please sort them labelled nodes alphabetically.
>
ok
> > +
> > +&i2c3 {
> > + codec: sgtl5000 at 0a {
> > + compatible = "fsl,sgtl5000";
> > + reg = <0x0a>;
> > + clocks = <&clks IMX6QDL_CLK_CKO>;
> > + VDDA-supply = <®_2p5v>;
> > + VDDIO-supply = <®_3p3v>;
> > + VDDD-supply = <®_1p8v>;
> > + };
> > +};
> > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > new file mode 100644
> > index 0000000..c57a830
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > @@ -0,0 +1,382 @@
> > +/*
> > + * Copyright 2015 Amarula Solutions B.V.
> > + *
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > +
> > +/ {
> > + memory {
> > + reg = <0x10000000 0x80000000>;
> > + };
> > +
> > + reg_1p8v: 1p8v {
>
> Can we name these regulator nodes a bit better, something like
> 'regulator-1pv8'?
>
ok
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_2p5v: 2p5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "2P5V";
> > + regulator-min-microvolt = <2500000>;
> > + regulator-max-microvolt = <2500000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_3p3v: 3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_sd3_vmmc: sd3_vmmc {
>
> It's more idiomatic to use minus than underscore in node name.
>
ok
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD3_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > + enable-active-high;
> > + };
> > +
> > + reg_sd4_vmmc: sd4_vmmc {
> > + compatible = "regulator-fixed";
> > + regulator-name = "P3V3_SD4_SWITCHED";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_usb_h1_vbus: usb_h1_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_h1_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + reg_usb_otg_vbus: usb_otg_vbus {
> > + compatible = "regulator-fixed";
> > + regulator-name = "usb_otg_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + usb_hub: usb-hub {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbhub>;
> > + compatible = "smsc,usb3503a";
>
> Let 'compatible' be the top of the property list.
>
ok
> > + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> > + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > + clock-names = "refclk";
> > + };
>
> How is this device get connected? The most common case is via I2C bus.
> In that case, the node shouldn't be here but under I2C node.
>
It's correct, the connection is completly defined and it's not connected
to i2c according from what I know. I will double check
> > +};
> > +
> > +&iomuxc {
>
> Suggest move iomuxc node to the bottom to make the file a bit easier to
> read.
>
Ok
> > + imx6qdl-icore-rqs {
> > +
>
> With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> nodes) in place, we can now save this container.
>
> > + pinctrl_audmux_4: audmux-4 {
>
I will take a look of that commit
> The suffix numbering makes no sense in this case. The following example
> should be good enough.
>
> pinctrl_audmux: audmux {
>
> > + fsl,pins = <
> > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_enet_3: enetgrp-3 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> > + >;
> > + };
> > +
> > + pinctrl_i2c1_1: i2c1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c2_2: i2c2grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > + >;
> > + };
> > +
> > + pinctrl_i2c3_4: i2c3grp-4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> > + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > + >;
> > + };
> > +
> > + pinctrl_pcie: pciegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> > + >;
> > + };
> > +
> > + pinctrl_uart4_1: uart4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > + >;
> > + };
> > +
> > + pinctrl_usbhub: usbhubgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> > + >;
> > + };
> > +
> > + pinctrl_usbotg_2: usbotggrp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > + >;
> > + };
> > +
> > + pinctrl_usdhc1_1: usdhc1grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2: usdhc3grp-2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1: usdhc4grp-1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > + >;
> > + };
> > +
> > + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > + >;
> > + };
> > + };
> > +};
> > +
> > +&clks {
> > + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > +};
> > +
> > +&audmux {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_audmux_4>;
> > + status = "okay";
> > +};
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet_3>;
> > + phy-handle = <ð_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > + mdio {
> > + eth_phy: ethernet-phy {
> > + rxc-skew-ps = <1140>;
> > + txc-skew-ps = <1140>;
> > + txen-skew-ps = <600>;
> > + rxdv-skew-ps = <240>;
> > + rxd0-skew-ps = <420>;
> > + rxd1-skew-ps = <600>;
> > + rxd2-skew-ps = <420>;
> > + rxd3-skew-ps = <240>;
> > + txd0-skew-ps = <60>;
> > + txd1-skew-ps = <60>;
> > + txd2-skew-ps = <60>;
> > + txd3-skew-ps = <240>;
> > + };
> > + };
> > +};
> > +
> > +&i2c1 {
> > + status = "okay";
>
> Let 'status' be the last property.
>
Ok
I will repost again
Michael
> Shawn
>
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c1_1>;
> > +};
> > +
> > +&i2c2 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2_2>;
> > + status = "okay";
> > +};
> > +
> > +&i2c3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c3_4>;
> > + status = "okay";
> > +};
> > +
> > +&pcie {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pcie>;
> > + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > + status = "okay";
> > +};
> > +
> > +&ssi1 {
> > + fsl,mode = "i2s-slave";
> > + status = "okay";
> > +};
> > +
> > +&uart4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart4_1>;
> > + status = "okay";
> > +};
> > +
> > +&usbh1 {
> > + vbus-supply = <®_usb_h1_vbus>;
> > + disable-over-current;
> > + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > + status = "okay";
> > +};
> > +
> > +&usbotg {
> > + vbus-supply = <®_usb_otg_vbus>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbotg_2>;
> > + disable-over-current;
> > + status = "okay";
> > +};
> > +
> > +&usdhc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc1_1>;
> > + no-1-8-v;
> > + status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc3_2>;
> > + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > + vmcc-supply = <®_sd3_vmmc>;
> > + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> > + bus-witdh=<4>;
> > + no-1-8-v;
> > + status = "okay";
> > +};
> > +
> > +&usdhc4 {
> > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > + pinctrl-0 = <&pinctrl_usdhc4_1>;
> > + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > + vmcc-supply = <®_sd4_vmmc>;
> > + bus-witdh=<8>;
> > + no-1-8-v;
> > + non-removable;
> > + status = "okay";
> > +};
> > --
> > 2.6.3
> >
> > --
> > | Michael Nazzareno Trimarchi Amarula Solutions BV |
> > | COO - Founder Cruquiuskade 47 |
> > | +31(0)851119172 Amsterdam 1018 AM NL |
> > | [`as] http://www.amarulasolutions.com |
> >
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-14 8:45 ` Michael Trimarchi
@ 2015-12-16 18:12 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-16 18:12 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi
I have address most of the changes but I have problem when I remove
the group of pinctrl as you suggest
On Mon, Dec 14, 2015 at 09:44:56AM +0100, Michael Trimarchi wrote:
> Hi
>
> On Fri, Dec 11, 2015 at 04:36:17PM +0800, Shawn Guo wrote:
> > On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > >
> > > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > > ---
> > > I'm not quite sure how ethernet tuning parameter
> > > are working in other setup and this seems the
> > > correct way to use it
> > >
> > > Changes in v3:
> > > - add sgtl audio support
> > > - add ethernet gigabit tuning
> > > - use hub reset only in usbhub and not
> > > in otg vbus
> > >
> > > Changes in v2:
> > > - add the board in alphabetic order
> > > - remove cpu operating point
> > > - remove simple-bus and adjust regulaotor
> > > - add gpios to correct pinctrl
> > > - remove no mainline binding of gpc
> > >
> > > arch/arm/boot/dts/Makefile | 1 +
> > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
> > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> > > 3 files changed, 428 insertions(+)
> > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > >
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index bb8fa02..7e8f29c 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > > imx6q-gw551x.dtb \
> > > imx6q-gw552x.dtb \
> > > imx6q-hummingboard.dtb \
> > > + imx6q-icore-rqs.dtb \
> > > imx6q-nitrogen6x.dtb \
> > > imx6q-phytec-pbab01.dtb \
> > > imx6q-rex-pro.dtb \
> > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > new file mode 100644
> > > index 0000000..8f14edf
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > @@ -0,0 +1,45 @@
> > > +/*
> > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + */
> >
> > Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
> > You can find a lot of examples in arch/arm/boot/dts.
> >
>
> Ok
>
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "imx6q.dtsi"
> > > +#include "imx6qdl-icore-rqs.dtsi"
> > > +
> > > +/ {
> > > + model = "Engicam i.CoreM6 Quad SOM";
> > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> >
> > This is not a board from Freescale, so 'fsl,' is not a appropriate for
> > the board compatible imx6q-icore-rqs.
> >
>
> let use eng,imx6-icore-rqs
>
That I have fixed
> > > +
> > > + sound {
> > > + compatible = "fsl,imx-audio-sgtl5000";
> > > + model = "imx-audio-sgtl5000";
> > > + ssi-controller = <&ssi1>;
> > > + audio-codec = <&codec>;
> > > + audio-routing =
> > > + "MIC_IN", "Mic Jack",
> > > + "Mic Jack", "Mic Bias",
> > > + "Headphone Jack", "HP_OUT";
> > > + mux-int-port = <1>;
> > > + mux-ext-port = <4>;
> > > + };
> > > +};
> > > +
> > > +&sata {
> > > + status = "okay";
> > > +};
> >
> > Please sort them labelled nodes alphabetically.
> >
>
> ok
>
You mean sata and i2c?
> > > +
> > > +&i2c3 {
> > > + codec: sgtl5000@0a {
> > > + compatible = "fsl,sgtl5000";
> > > + reg = <0x0a>;
> > > + clocks = <&clks IMX6QDL_CLK_CKO>;
> > > + VDDA-supply = <®_2p5v>;
> > > + VDDIO-supply = <®_3p3v>;
> > > + VDDD-supply = <®_1p8v>;
> > > + };
> > > +};
> > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > new file mode 100644
> > > index 0000000..c57a830
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > @@ -0,0 +1,382 @@
> > > +/*
> > > + * Copyright 2015 Amarula Solutions B.V.
> > > + *
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > +
> > > +/ {
> > > + memory {
> > > + reg = <0x10000000 0x80000000>;
> > > + };
> > > +
> > > + reg_1p8v: 1p8v {
> >
> > Can we name these regulator nodes a bit better, something like
> > 'regulator-1pv8'?
> >
>
> ok
>
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "1P8V";
> > > + regulator-min-microvolt = <1800000>;
> > > + regulator-max-microvolt = <1800000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_2p5v: 2p5v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "2P5V";
> > > + regulator-min-microvolt = <2500000>;
> > > + regulator-max-microvolt = <2500000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_3p3v: 3p3v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "3P3V";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_sd3_vmmc: sd3_vmmc {
> >
> > It's more idiomatic to use minus than underscore in node name.
> >
>
> ok
>
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > + enable-active-high;
> > > + };
> > > +
> > > + reg_sd4_vmmc: sd4_vmmc {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD4_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_usb_h1_vbus: usb_h1_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_h1_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_usb_otg_vbus: usb_otg_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_otg_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + usb_hub: usb-hub {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_usbhub>;
> > > + compatible = "smsc,usb3503a";
> >
> > Let 'compatible' be the top of the property list.
> >
>
> ok
>
> > > + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> > > + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > > + clock-names = "refclk";
> > > + };
> >
> > How is this device get connected? The most common case is via I2C bus.
> > In that case, the node shouldn't be here but under I2C node.
> >
>
> It's correct, the connection is completly defined and it's not connected
> to i2c according from what I know. I will double check
>
It's fine as it is
> > > +};
> > > +
> > > +&iomuxc {
> >
> > Suggest move iomuxc node to the bottom to make the file a bit easier to
> > read.
> >
>
> Ok
>
>
> > > + imx6qdl-icore-rqs {
> > > +
> >
> > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > nodes) in place, we can now save this container.
> >
If I save this I can not register usb. Group is not found
[ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
[ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
[ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
[ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
[ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
[ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
[ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
[ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
[ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
Michael
> > > + pinctrl_audmux_4: audmux-4 {
> >
>
> I will take a look of that commit
>
> > The suffix numbering makes no sense in this case. The following example
> > should be good enough.
> >
> > pinctrl_audmux: audmux {
> >
> > > + fsl,pins = <
> > > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> > > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> > > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> > > + >;
> > > + };
> > > +
> > > + pinctrl_enet_3: enetgrp-3 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > > + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> > > + >;
> > > + };
> > > +
> > > + pinctrl_i2c1_1: i2c1grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > > + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_i2c2_2: i2c2grp-2 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_i2c3_4: i2c3grp-4 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> > > + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > > + >;
> > > + };
> > > +
> > > + pinctrl_pcie: pciegrp {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> > > + >;
> > > + };
> > > +
> > > + pinctrl_uart4_1: uart4grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usbhub: usbhubgrp {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usbotg_2: usbotggrp-2 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc1_1: usdhc1grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> > > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> > > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc3_2: usdhc3grp-2 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> > > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> > > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > > + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> > > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> > > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> > > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> > > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> > > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc4_1: usdhc4grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> > > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> > > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> > > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> > > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> > > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> > > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > > + >;
> > > + };
> > > + };
> > > +};
> > > +
> > > +&clks {
> > > + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > > + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > > +};
> > > +
> > > +&audmux {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_audmux_4>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&fec {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_enet_3>;
> > > + phy-handle = <ð_phy>;
> > > + phy-mode = "rgmii";
> > > + status = "okay";
> > > + mdio {
> > > + eth_phy: ethernet-phy {
> > > + rxc-skew-ps = <1140>;
> > > + txc-skew-ps = <1140>;
> > > + txen-skew-ps = <600>;
> > > + rxdv-skew-ps = <240>;
> > > + rxd0-skew-ps = <420>;
> > > + rxd1-skew-ps = <600>;
> > > + rxd2-skew-ps = <420>;
> > > + rxd3-skew-ps = <240>;
> > > + txd0-skew-ps = <60>;
> > > + txd1-skew-ps = <60>;
> > > + txd2-skew-ps = <60>;
> > > + txd3-skew-ps = <240>;
> > > + };
> > > + };
> > > +};
> > > +
> > > +&i2c1 {
> > > + status = "okay";
> >
> > Let 'status' be the last property.
> >
>
> Ok
>
> I will repost again
>
> Michael
>
> > Shawn
> >
> > > + clock-frequency = <100000>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_i2c1_1>;
> > > +};
> > > +
> > > +&i2c2 {
> > > + clock-frequency = <100000>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_i2c2_2>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&i2c3 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_i2c3_4>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&pcie {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_pcie>;
> > > + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&ssi1 {
> > > + fsl,mode = "i2s-slave";
> > > + status = "okay";
> > > +};
> > > +
> > > +&uart4 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_uart4_1>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usbh1 {
> > > + vbus-supply = <®_usb_h1_vbus>;
> > > + disable-over-current;
> > > + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usbotg {
> > > + vbus-supply = <®_usb_otg_vbus>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_usbotg_2>;
> > > + disable-over-current;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usdhc1 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_usdhc1_1>;
> > > + no-1-8-v;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usdhc3 {
> > > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > > + pinctrl-0 = <&pinctrl_usdhc3_2>;
> > > + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > > + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > > + vmcc-supply = <®_sd3_vmmc>;
> > > + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> > > + bus-witdh=<4>;
> > > + no-1-8-v;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usdhc4 {
> > > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > > + pinctrl-0 = <&pinctrl_usdhc4_1>;
> > > + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > > + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > > + vmcc-supply = <®_sd4_vmmc>;
> > > + bus-witdh=<8>;
> > > + no-1-8-v;
> > > + non-removable;
> > > + status = "okay";
> > > +};
> > > --
> > > 2.6.3
> > >
> > > --
> > > | Michael Nazzareno Trimarchi Amarula Solutions BV |
> > > | COO - Founder Cruquiuskade 47 |
> > > | +31(0)851119172 Amsterdam 1018 AM NL |
> > > | [`as] http://www.amarulasolutions.com |
> > >
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-16 18:12 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-16 18:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi
I have address most of the changes but I have problem when I remove
the group of pinctrl as you suggest
On Mon, Dec 14, 2015 at 09:44:56AM +0100, Michael Trimarchi wrote:
> Hi
>
> On Fri, Dec 11, 2015 at 04:36:17PM +0800, Shawn Guo wrote:
> > On Wed, Nov 18, 2015 at 04:10:34PM +0100, Michael Trimarchi wrote:
> > > www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
> > >
> > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > > ---
> > > I'm not quite sure how ethernet tuning parameter
> > > are working in other setup and this seems the
> > > correct way to use it
> > >
> > > Changes in v3:
> > > - add sgtl audio support
> > > - add ethernet gigabit tuning
> > > - use hub reset only in usbhub and not
> > > in otg vbus
> > >
> > > Changes in v2:
> > > - add the board in alphabetic order
> > > - remove cpu operating point
> > > - remove simple-bus and adjust regulaotor
> > > - add gpios to correct pinctrl
> > > - remove no mainline binding of gpc
> > >
> > > arch/arm/boot/dts/Makefile | 1 +
> > > arch/arm/boot/dts/imx6q-icore-rqs.dts | 45 ++++
> > > arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 382 +++++++++++++++++++++++++++++++
> > > 3 files changed, 428 insertions(+)
> > > create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > >
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index bb8fa02..7e8f29c 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> > > imx6q-gw551x.dtb \
> > > imx6q-gw552x.dtb \
> > > imx6q-hummingboard.dtb \
> > > + imx6q-icore-rqs.dtb \
> > > imx6q-nitrogen6x.dtb \
> > > imx6q-phytec-pbab01.dtb \
> > > imx6q-rex-pro.dtb \
> > > diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > new file mode 100644
> > > index 0000000..8f14edf
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> > > @@ -0,0 +1,45 @@
> > > +/*
> > > + * Copyright (C) 2015 Amarula Solutions B.V.
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + */
> >
> > Suggest to use GPL/X11 dual licences, so that non-Linux can use it too.
> > You can find a lot of examples in arch/arm/boot/dts.
> >
>
> Ok
>
> > > +
> > > +/dts-v1/;
> > > +
> > > +#include "imx6q.dtsi"
> > > +#include "imx6qdl-icore-rqs.dtsi"
> > > +
> > > +/ {
> > > + model = "Engicam i.CoreM6 Quad SOM";
> > > + compatible = "fsl,imx6-icore-rqs", "fsl,imx6q";
> >
> > This is not a board from Freescale, so 'fsl,' is not a appropriate for
> > the board compatible imx6q-icore-rqs.
> >
>
> let use eng,imx6-icore-rqs
>
That I have fixed
> > > +
> > > + sound {
> > > + compatible = "fsl,imx-audio-sgtl5000";
> > > + model = "imx-audio-sgtl5000";
> > > + ssi-controller = <&ssi1>;
> > > + audio-codec = <&codec>;
> > > + audio-routing =
> > > + "MIC_IN", "Mic Jack",
> > > + "Mic Jack", "Mic Bias",
> > > + "Headphone Jack", "HP_OUT";
> > > + mux-int-port = <1>;
> > > + mux-ext-port = <4>;
> > > + };
> > > +};
> > > +
> > > +&sata {
> > > + status = "okay";
> > > +};
> >
> > Please sort them labelled nodes alphabetically.
> >
>
> ok
>
You mean sata and i2c?
> > > +
> > > +&i2c3 {
> > > + codec: sgtl5000 at 0a {
> > > + compatible = "fsl,sgtl5000";
> > > + reg = <0x0a>;
> > > + clocks = <&clks IMX6QDL_CLK_CKO>;
> > > + VDDA-supply = <®_2p5v>;
> > > + VDDIO-supply = <®_3p3v>;
> > > + VDDD-supply = <®_1p8v>;
> > > + };
> > > +};
> > > diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > new file mode 100644
> > > index 0000000..c57a830
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> > > @@ -0,0 +1,382 @@
> > > +/*
> > > + * Copyright 2015 Amarula Solutions B.V.
> > > + *
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +#include <dt-bindings/clock/imx6qdl-clock.h>
> > > +
> > > +/ {
> > > + memory {
> > > + reg = <0x10000000 0x80000000>;
> > > + };
> > > +
> > > + reg_1p8v: 1p8v {
> >
> > Can we name these regulator nodes a bit better, something like
> > 'regulator-1pv8'?
> >
>
> ok
>
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "1P8V";
> > > + regulator-min-microvolt = <1800000>;
> > > + regulator-max-microvolt = <1800000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_2p5v: 2p5v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "2P5V";
> > > + regulator-min-microvolt = <2500000>;
> > > + regulator-max-microvolt = <2500000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_3p3v: 3p3v {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "3P3V";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_sd3_vmmc: sd3_vmmc {
> >
> > It's more idiomatic to use minus than underscore in node name.
> >
>
> ok
>
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD3_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> > > + enable-active-high;
> > > + };
> > > +
> > > + reg_sd4_vmmc: sd4_vmmc {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "P3V3_SD4_SWITCHED";
> > > + regulator-min-microvolt = <3300000>;
> > > + regulator-max-microvolt = <3300000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_usb_h1_vbus: usb_h1_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_h1_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + reg_usb_otg_vbus: usb_otg_vbus {
> > > + compatible = "regulator-fixed";
> > > + regulator-name = "usb_otg_vbus";
> > > + regulator-min-microvolt = <5000000>;
> > > + regulator-max-microvolt = <5000000>;
> > > + regulator-boot-on;
> > > + regulator-always-on;
> > > + };
> > > +
> > > + usb_hub: usb-hub {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_usbhub>;
> > > + compatible = "smsc,usb3503a";
> >
> > Let 'compatible' be the top of the property list.
> >
>
> ok
>
> > > + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> > > + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> > > + clock-names = "refclk";
> > > + };
> >
> > How is this device get connected? The most common case is via I2C bus.
> > In that case, the node shouldn't be here but under I2C node.
> >
>
> It's correct, the connection is completly defined and it's not connected
> to i2c according from what I know. I will double check
>
It's fine as it is
> > > +};
> > > +
> > > +&iomuxc {
> >
> > Suggest move iomuxc node to the bottom to make the file a bit easier to
> > read.
> >
>
> Ok
>
>
> > > + imx6qdl-icore-rqs {
> > > +
> >
> > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > nodes) in place, we can now save this container.
> >
If I save this I can not register usb. Group is not found
[ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
[ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
[ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
[ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
[ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
[ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
[ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
[ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
[ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
Michael
> > > + pinctrl_audmux_4: audmux-4 {
> >
>
> I will take a look of that commit
>
> > The suffix numbering makes no sense in this case. The following example
> > should be good enough.
> >
> > pinctrl_audmux: audmux {
> >
> > > + fsl,pins = <
> > > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> > > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> > > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> > > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> > > + >;
> > > + };
> > > +
> > > + pinctrl_enet_3: enetgrp-3 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> > > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> > > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> > > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> > > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> > > + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> > > + >;
> > > + };
> > > +
> > > + pinctrl_i2c1_1: i2c1grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> > > + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_i2c2_2: i2c2grp-2 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> > > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_i2c3_4: i2c3grp-4 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> > > + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> > > + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> > > + >;
> > > + };
> > > +
> > > + pinctrl_pcie: pciegrp {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> > > + >;
> > > + };
> > > +
> > > + pinctrl_uart4_1: uart4grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> > > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usbhub: usbhubgrp {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usbotg_2: usbotggrp-2 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc1_1: usdhc1grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> > > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> > > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> > > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> > > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> > > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc3_2: usdhc3grp-2 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> > > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> > > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> > > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> > > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> > > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> > > + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> > > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> > > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> > > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> > > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> > > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> > > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> > > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> > > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> > > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> > > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> > > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc4_1: usdhc4grp-1 {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> > > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> > > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> > > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> > > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> > > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> > > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> > > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> > > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> > > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> > > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> > > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> > > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> > > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> > > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> > > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> > > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> > > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> > > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> > > + >;
> > > + };
> > > +
> > > + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> > > + fsl,pins = <
> > > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> > > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> > > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> > > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> > > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> > > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> > > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> > > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> > > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> > > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> > > + >;
> > > + };
> > > + };
> > > +};
> > > +
> > > +&clks {
> > > + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> > > + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> > > +};
> > > +
> > > +&audmux {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_audmux_4>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&fec {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_enet_3>;
> > > + phy-handle = <ð_phy>;
> > > + phy-mode = "rgmii";
> > > + status = "okay";
> > > + mdio {
> > > + eth_phy: ethernet-phy {
> > > + rxc-skew-ps = <1140>;
> > > + txc-skew-ps = <1140>;
> > > + txen-skew-ps = <600>;
> > > + rxdv-skew-ps = <240>;
> > > + rxd0-skew-ps = <420>;
> > > + rxd1-skew-ps = <600>;
> > > + rxd2-skew-ps = <420>;
> > > + rxd3-skew-ps = <240>;
> > > + txd0-skew-ps = <60>;
> > > + txd1-skew-ps = <60>;
> > > + txd2-skew-ps = <60>;
> > > + txd3-skew-ps = <240>;
> > > + };
> > > + };
> > > +};
> > > +
> > > +&i2c1 {
> > > + status = "okay";
> >
> > Let 'status' be the last property.
> >
>
> Ok
>
> I will repost again
>
> Michael
>
> > Shawn
> >
> > > + clock-frequency = <100000>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_i2c1_1>;
> > > +};
> > > +
> > > +&i2c2 {
> > > + clock-frequency = <100000>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_i2c2_2>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&i2c3 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_i2c3_4>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&pcie {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_pcie>;
> > > + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&ssi1 {
> > > + fsl,mode = "i2s-slave";
> > > + status = "okay";
> > > +};
> > > +
> > > +&uart4 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_uart4_1>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usbh1 {
> > > + vbus-supply = <®_usb_h1_vbus>;
> > > + disable-over-current;
> > > + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usbotg {
> > > + vbus-supply = <®_usb_otg_vbus>;
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_usbotg_2>;
> > > + disable-over-current;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usdhc1 {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_usdhc1_1>;
> > > + no-1-8-v;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usdhc3 {
> > > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > > + pinctrl-0 = <&pinctrl_usdhc3_2>;
> > > + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> > > + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> > > + vmcc-supply = <®_sd3_vmmc>;
> > > + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> > > + bus-witdh=<4>;
> > > + no-1-8-v;
> > > + status = "okay";
> > > +};
> > > +
> > > +&usdhc4 {
> > > + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > > + pinctrl-0 = <&pinctrl_usdhc4_1>;
> > > + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> > > + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> > > + vmcc-supply = <®_sd4_vmmc>;
> > > + bus-witdh=<8>;
> > > + no-1-8-v;
> > > + non-removable;
> > > + status = "okay";
> > > +};
> > > --
> > > 2.6.3
> > >
> > > --
> > > | Michael Nazzareno Trimarchi Amarula Solutions BV |
> > > | COO - Founder Cruquiuskade 47 |
> > > | +31(0)851119172 Amsterdam 1018 AM NL |
> > > | [`as] http://www.amarulasolutions.com |
> > >
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-16 18:12 ` Michael Trimarchi
@ 2015-12-21 6:12 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-21 6:12 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
> Hi
>
> I have address most of the changes but I have problem when I remove
> the group of pinctrl as you suggest
...
> > > > +&iomuxc {
> > >
> > > Suggest move iomuxc node to the bottom to make the file a bit easier to
> > > read.
> > >
> >
> > Ok
> >
> >
> > > > + imx6qdl-icore-rqs {
> > > > +
> > >
> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > > nodes) in place, we can now save this container.
> > >
>
> If I save this I can not register usb. Group is not found
>
> [ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
> [ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
> [ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
I'm not sure if you got my comment correct, but what I meant is
something like below.
&iomuxc {
pinctrl_audmux_4: audmux-4 {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
>;
};
pinctrl_enet_3: enetgrp-3 {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>;
};
......
};
Is this what you did?
Shawn
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-21 6:12 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-21 6:12 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
> Hi
>
> I have address most of the changes but I have problem when I remove
> the group of pinctrl as you suggest
...
> > > > +&iomuxc {
> > >
> > > Suggest move iomuxc node to the bottom to make the file a bit easier to
> > > read.
> > >
> >
> > Ok
> >
> >
> > > > + imx6qdl-icore-rqs {
> > > > +
> > >
> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > > nodes) in place, we can now save this container.
> > >
>
> If I save this I can not register usb. Group is not found
>
> [ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
> [ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
> [ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
I'm not sure if you got my comment correct, but what I meant is
something like below.
&iomuxc {
pinctrl_audmux_4: audmux-4 {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
>;
};
pinctrl_enet_3: enetgrp-3 {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>;
};
......
};
Is this what you did?
Shawn
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-16 18:12 ` Michael Trimarchi
@ 2015-12-23 2:27 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-23 2:27 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
> > > > + imx6qdl-icore-rqs {
> > > > +
> > >
> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > > nodes) in place, we can now save this container.
> > >
>
> If I save this I can not register usb. Group is not found
>
> [ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
> [ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
> [ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
Sorry. I just found that to get this work on imx6q board we need to
clean up the ipu2/ipu2grp-1 group. I just send a patch doing that with
you on copy. Let me know if it works for you.
Shawn
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-23 2:27 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2015-12-23 2:27 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
> > > > + imx6qdl-icore-rqs {
> > > > +
> > >
> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
> > > nodes) in place, we can now save this container.
> > >
>
> If I save this I can not register usb. Group is not found
>
> [ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
> [ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
> [ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
> [ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
> [ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
> [ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
Sorry. I just found that to get this work on imx6q board we need to
clean up the ipu2/ipu2grp-1 group. I just send a patch doing that with
you on copy. Let me know if it works for you.
Shawn
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-23 2:27 ` Shawn Guo
@ 2015-12-23 9:18 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-23 9:18 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi
On Wed, Dec 23, 2015 at 3:27 AM, Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
>> > > > + imx6qdl-icore-rqs {
>> > > > +
>> > >
>> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
>> > > nodes) in place, we can now save this container.
>> > >
>>
>> If I save this I can not register usb. Group is not found
>>
>> [ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
>> [ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
>> [ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
>> [ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
>> [ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
>> [ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
>> [ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
>> [ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
>> [ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
>
> Sorry. I just found that to get this work on imx6q board we need to
> clean up the ipu2/ipu2grp-1 group. I just send a patch doing that with
> you on copy. Let me know if it works for you.
>
Make sense. Sorry not to fix before by myself. I will take the board
this afternoon and check it again
Michael
> Shawn
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V3] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-23 9:18 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-23 9:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Wed, Dec 23, 2015 at 3:27 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Wed, Dec 16, 2015 at 07:12:05PM +0100, Michael Trimarchi wrote:
>> > > > + imx6qdl-icore-rqs {
>> > > > +
>> > >
>> > > With commit 5fcdf6a7ed95 (pinctrl: imx: Allow parsing DT without function
>> > > nodes) in place, we can now save this container.
>> > >
>>
>> If I save this I can not register usb. Group is not found
>>
>> [ 2.768476] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
>> [ 2.768844] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc1grp-1
>> [ 2.768932] sdhci-esdhc-imx: probe of 2190000.usdhc failed with error -22
>> [ 2.768994] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
>> [ 2.769240] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc3grp-2
>> [ 2.769322] sdhci-esdhc-imx: probe of 2198000.usdhc failed with error -22
>> [ 2.769381] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
>> [ 2.769621] imx6q-pinctrl 20e0000.iomuxc: unable to find group for node usdhc4grp-1
>> [ 2.769701] sdhci-esdhc-imx: probe of 219c000.usdhc failed with error -22
>
> Sorry. I just found that to get this work on imx6q board we need to
> clean up the ipu2/ipu2grp-1 group. I just send a patch doing that with
> you on copy. Let me know if it works for you.
>
Make sense. Sorry not to fix before by myself. I will take the board
this afternoon and check it again
Michael
> Shawn
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V4] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-23 2:27 ` Shawn Guo
@ 2015-12-24 9:06 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-24 9:06 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
Test on top of ARM: dts: imx6q: clean up unused ipu2grp
Changes in v4:
- update regulator name
- using flat pins,fsl
- move iomuxc
- add X11 license
- better alphabetic order
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..b984128
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.6.4
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..b984128
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.6.4
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply related [flat|nested] 60+ messages in thread
* [PATCH V4] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-24 9:06 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-24 9:06 UTC (permalink / raw)
To: linux-arm-kernel
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Test on top of ARM: dts: imx6q: clean up unused ipu2grp
Changes in v4:
- update regulator name
- using flat pins,fsl
- move iomuxc
- add X11 license
- better alphabetic order
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..b984128
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.6.4
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..b984128
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.6.4
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 60+ messages in thread
* Re: [PATCH V4] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-24 9:06 ` Michael Trimarchi
@ 2015-12-24 9:13 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-24 9:13 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi
Sorry I mess up the email ;). Need to resend. Drop this one
On Thu, Dec 24, 2015 at 10:06 AM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>
> Changes in v4:
> - update regulator name
> - using flat pins,fsl
> - move iomuxc
> - add X11 license
> - better alphabetic order
>
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000@0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000@0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V4] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-24 9:13 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-24 9:13 UTC (permalink / raw)
To: linux-arm-kernel
Hi
Sorry I mess up the email ;). Need to resend. Drop this one
On Thu, Dec 24, 2015 at 10:06 AM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>
> Changes in v4:
> - update regulator name
> - using flat pins,fsl
> - move iomuxc
> - add X11 license
> - better alphabetic order
>
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000 at 0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000 at 0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-23 2:27 ` Shawn Guo
@ 2015-12-24 9:24 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-24 9:24 UTC (permalink / raw)
To: Shawn Guo; +Cc: devicetree, kernel, linux-arm-kernel, Lucas Stach
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Test on top of ARM: dts: imx6q: clean up unused ipu2grp
Changes in v5:
- None
Changes in v4:
- update regulator name
- using flat pins,fsl
- move iomuxc
- add X11 license
- better alphabetic order
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..b984128
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.6.4
^ permalink raw reply related [flat|nested] 60+ messages in thread
* [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2015-12-24 9:24 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2015-12-24 9:24 UTC (permalink / raw)
To: linux-arm-kernel
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Test on top of ARM: dts: imx6q: clean up unused ipu2grp
Changes in v5:
- None
Changes in v4:
- update regulator name
- using flat pins,fsl
- move iomuxc
- add X11 license
- better alphabetic order
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
3 files changed, 489 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..7e8f29c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-rex-pro.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..b984128
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_3>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_4>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4_1>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg_2>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1_1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4_1>;
+ pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet_3: enetgrp-3 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1_1: i2c1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2_2: i2c2grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3_4: i2c3grp-4 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4_1: uart4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg_2: usbotggrp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_1: usdhc1grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3_2: usdhc3grp-2 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4_1: usdhc4grp-1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.6.4
^ permalink raw reply related [flat|nested] 60+ messages in thread
* Re: [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-24 9:24 ` Michael Trimarchi
@ 2016-01-12 17:37 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2016-01-12 17:37 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi Shawn
On Thu, Dec 24, 2015 at 10:24 AM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>
> Changes in v5:
> - None
>
> Changes in v4:
> - update regulator name
> - using flat pins,fsl
> - move iomuxc
> - add X11 license
> - better alphabetic order
>
Do you have any other comments?
Michael
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000@0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2016-01-12 17:37 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2016-01-12 17:37 UTC (permalink / raw)
To: linux-arm-kernel
Hi Shawn
On Thu, Dec 24, 2015 at 10:24 AM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>
> Changes in v5:
> - None
>
> Changes in v4:
> - update regulator name
> - using flat pins,fsl
> - move iomuxc
> - add X11 license
> - better alphabetic order
>
Do you have any other comments?
Michael
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000 at 0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2015-12-24 9:24 ` Michael Trimarchi
@ 2016-01-28 2:04 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2016-01-28 2:04 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
On Thu, Dec 24, 2015 at 10:24:47AM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>
> Changes in v5:
> - None
>
> Changes in v4:
> - update regulator name
> - using flat pins,fsl
> - move iomuxc
> - add X11 license
> - better alphabetic order
>
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000@0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
Why are the regulator nodes starting from this one not following the
naming schema regulator-xxx any more?
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
Have a new line between properties and sub-node.
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
The suffix number means nothing here. Please drop them.
pinctrl_enet: enetgrp
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
pinctrl_i2c1: i2c1grp
Please check all the pinctrl nodes below.
Shawn
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
>
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2016-01-28 2:04 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2016-01-28 2:04 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Dec 24, 2015 at 10:24:47AM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>
> Changes in v5:
> - None
>
> Changes in v4:
> - update regulator name
> - using flat pins,fsl
> - move iomuxc
> - add X11 license
> - better alphabetic order
>
> Changes in v3:
> - add sgtl audio support
> - add ethernet gigabit tuning
> - use hub reset only in usbhub and not
> in otg vbus
>
> Changes in v2:
> - add the board in alphabetic order
> - remove cpu operating point
> - remove simple-bus and adjust regulaotor
> - add gpios to correct pinctrl
> - remove no mainline binding of gpc
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
> 3 files changed, 489 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bb8fa02..7e8f29c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
> imx6q-gw551x.dtb \
> imx6q-gw552x.dtb \
> imx6q-hummingboard.dtb \
> + imx6q-icore-rqs.dtb \
> imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-rex-pro.dtb \
> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> new file mode 100644
> index 0000000..0053188
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +#include "imx6qdl-icore-rqs.dtsi"
> +
> +/ {
> + model = "Engicam i.CoreM6 Quad SOM";
> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
> +
> + sound {
> + compatible = "fsl,imx-audio-sgtl5000";
> + model = "imx-audio-sgtl5000";
> + ssi-controller = <&ssi1>;
> + audio-codec = <&codec>;
> + audio-routing =
> + "MIC_IN", "Mic Jack",
> + "Mic Jack", "Mic Bias",
> + "Headphone Jack", "HP_OUT";
> + mux-int-port = <1>;
> + mux-ext-port = <4>;
> + };
> +};
> +
> +&i2c3 {
> + codec: sgtl5000 at 0a {
> + compatible = "fsl,sgtl5000";
> + reg = <0x0a>;
> + clocks = <&clks IMX6QDL_CLK_CKO>;
> + VDDA-supply = <®_2p5v>;
> + VDDIO-supply = <®_3p3v>;
> + VDDD-supply = <®_1p8v>;
> + };
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> new file mode 100644
> index 0000000..b984128
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
> @@ -0,0 +1,410 @@
> +/*
> + * Copyright (C) 2015 Amarula Solutions B.V.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This file is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/imx6qdl-clock.h>
> +
> +/ {
> + memory {
> + reg = <0x10000000 0x80000000>;
> + };
> +
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_2p5v: regulator-2p5v {
> + compatible = "regulator-fixed";
> + regulator-name = "2P5V";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_sd3_vmmc: sd3-vmmc {
Why are the regulator nodes starting from this one not following the
naming schema regulator-xxx any more?
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD3_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
> + enable-active-high;
> + };
> +
> + reg_sd4_vmmc: sd4-vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "P3V3_SD4_SWITCHED";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_h1_vbus: usb-h1-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_h1_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_usb_otg_vbus: usb-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb_otg_vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + usb_hub: usb-hub {
> + compatible = "smsc,usb3503a";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbhub>;
> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
> + clock-names = "refclk";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
> +};
> +
> +&audmux {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_audmux>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet_3>;
> + phy-handle = <ð_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
Have a new line between properties and sub-node.
> + mdio {
> + eth_phy: ethernet-phy {
> + rxc-skew-ps = <1140>;
> + txc-skew-ps = <1140>;
> + txen-skew-ps = <600>;
> + rxdv-skew-ps = <240>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <600>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <240>;
> + txd0-skew-ps = <60>;
> + txd1-skew-ps = <60>;
> + txd2-skew-ps = <60>;
> + txd3-skew-ps = <240>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_4>;
> + status = "okay";
> +};
> +
> +&pcie {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie>;
> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +&ssi1 {
> + fsl,mode = "i2s-slave";
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4_1>;
> + status = "okay";
> +};
> +
> +&usbh1 {
> + vbus-supply = <®_usb_h1_vbus>;
> + disable-over-current;
> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
> + status = "okay";
> +};
> +
> +&usbotg {
> + vbus-supply = <®_usb_otg_vbus>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usbotg_2>;
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc1_1>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc3 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc3_2>;
> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
> + vmcc-supply = <®_sd3_vmmc>;
> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
> + bus-witdh=<4>;
> + no-1-8-v;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc4_1>;
> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
> + vmcc-supply = <®_sd4_vmmc>;
> + bus-witdh=<8>;
> + no-1-8-v;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_audmux: audmux {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
> + >;
> + };
> +
> + pinctrl_enet_3: enetgrp-3 {
The suffix number means nothing here. Please drop them.
pinctrl_enet: enetgrp
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1_1: i2c1grp-1 {
pinctrl_i2c1: i2c1grp
Please check all the pinctrl nodes below.
Shawn
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2_2: i2c2grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3_4: i2c3grp-4 {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
> + >;
> + };
> +
> + pinctrl_pcie: pciegrp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
> + >;
> + };
> +
> + pinctrl_uart4_1: uart4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usbhub: usbhubgrp {
> + fsl,pins = <
> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
> + >;
> + };
> +
> + pinctrl_usbotg_2: usbotggrp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
> + >;
> + };
> +
> + pinctrl_usdhc1_1: usdhc1grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
> + >;
> + };
> +
> + pinctrl_usdhc3_2: usdhc3grp-2 {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
> + >;
> + };
> +
> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
> + >;
> + };
> +
> + pinctrl_usdhc4_1: usdhc4grp-1 {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
> + >;
> + };
> +
> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
> + >;
> + };
> +
> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
> + >;
> + };
> +};
> --
> 2.6.4
>
>
^ permalink raw reply [flat|nested] 60+ messages in thread
* Re: [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2016-01-28 2:04 ` Shawn Guo
@ 2016-01-28 2:12 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2016-01-28 2:12 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Hi
On Thu, Jan 28, 2016 at 3:04 AM, Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Thu, Dec 24, 2015 at 10:24:47AM +0100, Michael Trimarchi wrote:
>> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>>
>> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
>> ---
>> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>>
>> Changes in v5:
>> - None
>>
>> Changes in v4:
>> - update regulator name
>> - using flat pins,fsl
>> - move iomuxc
>> - add X11 license
>> - better alphabetic order
>>
>> Changes in v3:
>> - add sgtl audio support
>> - add ethernet gigabit tuning
>> - use hub reset only in usbhub and not
>> in otg vbus
>>
>> Changes in v2:
>> - add the board in alphabetic order
>> - remove cpu operating point
>> - remove simple-bus and adjust regulaotor
>> - add gpios to correct pinctrl
>> - remove no mainline binding of gpc
>>
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
>> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
>> 3 files changed, 489 insertions(+)
>> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
>> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index bb8fa02..7e8f29c 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
>> imx6q-gw551x.dtb \
>> imx6q-gw552x.dtb \
>> imx6q-hummingboard.dtb \
>> + imx6q-icore-rqs.dtb \
>> imx6q-nitrogen6x.dtb \
>> imx6q-phytec-pbab01.dtb \
>> imx6q-rex-pro.dtb \
>> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
>> new file mode 100644
>> index 0000000..0053188
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
>> @@ -0,0 +1,78 @@
>> +/*
>> + * Copyright (C) 2015 Amarula Solutions B.V.
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * version 2 as published by the Free Software Foundation.
>> + *
>> + * This file is distributed in the hope that it will be useful
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "imx6q.dtsi"
>> +#include "imx6qdl-icore-rqs.dtsi"
>> +
>> +/ {
>> + model = "Engicam i.CoreM6 Quad SOM";
>> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
>> +
>> + sound {
>> + compatible = "fsl,imx-audio-sgtl5000";
>> + model = "imx-audio-sgtl5000";
>> + ssi-controller = <&ssi1>;
>> + audio-codec = <&codec>;
>> + audio-routing =
>> + "MIC_IN", "Mic Jack",
>> + "Mic Jack", "Mic Bias",
>> + "Headphone Jack", "HP_OUT";
>> + mux-int-port = <1>;
>> + mux-ext-port = <4>;
>> + };
>> +};
>> +
>> +&i2c3 {
>> + codec: sgtl5000@0a {
>> + compatible = "fsl,sgtl5000";
>> + reg = <0x0a>;
>> + clocks = <&clks IMX6QDL_CLK_CKO>;
>> + VDDA-supply = <®_2p5v>;
>> + VDDIO-supply = <®_3p3v>;
>> + VDDD-supply = <®_1p8v>;
>> + };
>> +};
>> +
>> +&sata {
>> + status = "okay";
>> +};
>> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>> new file mode 100644
>> index 0000000..b984128
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>> @@ -0,0 +1,410 @@
>> +/*
>> + * Copyright (C) 2015 Amarula Solutions B.V.
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * version 2 as published by the Free Software Foundation.
>> + *
>> + * This file is distributed in the hope that it will be useful
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/clock/imx6qdl-clock.h>
>> +
>> +/ {
>> + memory {
>> + reg = <0x10000000 0x80000000>;
>> + };
>> +
>> + reg_1p8v: regulator-1p8v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "1P8V";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_2p5v: regulator-2p5v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "2P5V";
>> + regulator-min-microvolt = <2500000>;
>> + regulator-max-microvolt = <2500000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_3p3v: regulator-3p3v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "3P3V";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_sd3_vmmc: sd3-vmmc {
>
> Why are the regulator nodes starting from this one not following the
> naming schema regulator-xxx any more?
>
will fix
>> + compatible = "regulator-fixed";
>> + regulator-name = "P3V3_SD3_SWITCHED";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
>> + enable-active-high;
>> + };
>> +
>> + reg_sd4_vmmc: sd4-vmmc {
>> + compatible = "regulator-fixed";
>> + regulator-name = "P3V3_SD4_SWITCHED";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_usb_h1_vbus: usb-h1-vbus {
>> + compatible = "regulator-fixed";
>> + regulator-name = "usb_h1_vbus";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_usb_otg_vbus: usb-otg-vbus {
>> + compatible = "regulator-fixed";
>> + regulator-name = "usb_otg_vbus";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + usb_hub: usb-hub {
>> + compatible = "smsc,usb3503a";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usbhub>;
>> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
>> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
>> + clock-names = "refclk";
>> + };
>> +};
>> +
>> +&clks {
>> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
>> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
>> +};
>> +
>> +&audmux {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_audmux>;
>> + status = "okay";
>> +};
>> +
>> +&fec {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_enet_3>;
>> + phy-handle = <ð_phy>;
>> + phy-mode = "rgmii";
>> + status = "okay";
>
> Have a new line between properties and sub-node.
>
ok
>> + mdio {
>> + eth_phy: ethernet-phy {
>> + rxc-skew-ps = <1140>;
>> + txc-skew-ps = <1140>;
>> + txen-skew-ps = <600>;
>> + rxdv-skew-ps = <240>;
>> + rxd0-skew-ps = <420>;
>> + rxd1-skew-ps = <600>;
>> + rxd2-skew-ps = <420>;
>> + rxd3-skew-ps = <240>;
>> + txd0-skew-ps = <60>;
>> + txd1-skew-ps = <60>;
>> + txd2-skew-ps = <60>;
>> + txd3-skew-ps = <240>;
>> + };
>> + };
>> +};
>> +
>> +&i2c1 {
>> + clock-frequency = <100000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c1_1>;
>> + status = "okay";
>> +};
>> +
>> +&i2c2 {
>> + clock-frequency = <100000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c2_2>;
>> + status = "okay";
>> +};
>> +
>> +&i2c3 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c3_4>;
>> + status = "okay";
>> +};
>> +
>> +&pcie {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_pcie>;
>> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>> +};
>> +
>> +&ssi1 {
>> + fsl,mode = "i2s-slave";
>> + status = "okay";
>> +};
>> +
>> +&uart4 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart4_1>;
>> + status = "okay";
>> +};
>> +
>> +&usbh1 {
>> + vbus-supply = <®_usb_h1_vbus>;
>> + disable-over-current;
>> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
>> + status = "okay";
>> +};
>> +
>> +&usbotg {
>> + vbus-supply = <®_usb_otg_vbus>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usbotg_2>;
>> + disable-over-current;
>> + status = "okay";
>> +};
>> +
>> +&usdhc1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usdhc1_1>;
>> + no-1-8-v;
>> + status = "okay";
>> +};
>> +
>> +&usdhc3 {
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + pinctrl-0 = <&pinctrl_usdhc3_2>;
>> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
>> + vmcc-supply = <®_sd3_vmmc>;
>> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
>> + bus-witdh=<4>;
>> + no-1-8-v;
>> + status = "okay";
>> +};
>> +
>> +&usdhc4 {
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + pinctrl-0 = <&pinctrl_usdhc4_1>;
>> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
>> + vmcc-supply = <®_sd4_vmmc>;
>> + bus-witdh=<8>;
>> + no-1-8-v;
>> + non-removable;
>> + status = "okay";
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_audmux: audmux {
>> + fsl,pins = <
>> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
>> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
>> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
>> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
>> + >;
>> + };
>> +
>> + pinctrl_enet_3: enetgrp-3 {
>
> The suffix number means nothing here. Please drop them.
>
> pinctrl_enet: enetgrp
>
Ok, will fix
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
>> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
>> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
>> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
>> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>> + >;
>> + };
>> +
>> + pinctrl_i2c1_1: i2c1grp-1 {
>
> pinctrl_i2c1: i2c1grp
>
> Please check all the pinctrl nodes below.
>
Michael
> Shawn
>
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c2_2: i2c2grp-2 {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c3_4: i2c3grp-4 {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>> + >;
>> + };
>> +
>> + pinctrl_pcie: pciegrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
>> + >;
>> + };
>> +
>> + pinctrl_uart4_1: uart4grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_usbhub: usbhubgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
>> + >;
>> + };
>> +
>> + pinctrl_usbotg_2: usbotggrp-2 {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>> + >;
>> + };
>> +
>> + pinctrl_usdhc1_1: usdhc1grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
>> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
>> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
>> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
>> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
>> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_2: usdhc3grp-2 {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
>> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
>> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
>> + >;
>> + };
>> +
>> + pinctrl_usdhc4_1: usdhc4grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
>> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
>> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
>> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
>> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
>> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
>> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
>> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
>> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
>> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
>> + >;
>> + };
>> +
>> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
>> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
>> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
>> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
>> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
>> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
>> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
>> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
>> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
>> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
>> + >;
>> + };
>> +
>> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
>> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
>> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
>> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
>> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
>> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
>> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
>> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
>> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
>> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
>> + >;
>> + };
>> +};
>> --
>> 2.6.4
>>
>>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V5] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2016-01-28 2:12 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2016-01-28 2:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Thu, Jan 28, 2016 at 3:04 AM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Thu, Dec 24, 2015 at 10:24:47AM +0100, Michael Trimarchi wrote:
>> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>>
>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> ---
>> Test on top of ARM: dts: imx6q: clean up unused ipu2grp
>>
>> Changes in v5:
>> - None
>>
>> Changes in v4:
>> - update regulator name
>> - using flat pins,fsl
>> - move iomuxc
>> - add X11 license
>> - better alphabetic order
>>
>> Changes in v3:
>> - add sgtl audio support
>> - add ethernet gigabit tuning
>> - use hub reset only in usbhub and not
>> in otg vbus
>>
>> Changes in v2:
>> - add the board in alphabetic order
>> - remove cpu operating point
>> - remove simple-bus and adjust regulaotor
>> - add gpios to correct pinctrl
>> - remove no mainline binding of gpc
>>
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
>> arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 410 +++++++++++++++++++++++++++++++
>> 3 files changed, 489 insertions(+)
>> create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
>> create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index bb8fa02..7e8f29c 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -312,6 +312,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
>> imx6q-gw551x.dtb \
>> imx6q-gw552x.dtb \
>> imx6q-hummingboard.dtb \
>> + imx6q-icore-rqs.dtb \
>> imx6q-nitrogen6x.dtb \
>> imx6q-phytec-pbab01.dtb \
>> imx6q-rex-pro.dtb \
>> diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
>> new file mode 100644
>> index 0000000..0053188
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
>> @@ -0,0 +1,78 @@
>> +/*
>> + * Copyright (C) 2015 Amarula Solutions B.V.
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * version 2 as published by the Free Software Foundation.
>> + *
>> + * This file is distributed in the hope that it will be useful
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "imx6q.dtsi"
>> +#include "imx6qdl-icore-rqs.dtsi"
>> +
>> +/ {
>> + model = "Engicam i.CoreM6 Quad SOM";
>> + compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
>> +
>> + sound {
>> + compatible = "fsl,imx-audio-sgtl5000";
>> + model = "imx-audio-sgtl5000";
>> + ssi-controller = <&ssi1>;
>> + audio-codec = <&codec>;
>> + audio-routing =
>> + "MIC_IN", "Mic Jack",
>> + "Mic Jack", "Mic Bias",
>> + "Headphone Jack", "HP_OUT";
>> + mux-int-port = <1>;
>> + mux-ext-port = <4>;
>> + };
>> +};
>> +
>> +&i2c3 {
>> + codec: sgtl5000 at 0a {
>> + compatible = "fsl,sgtl5000";
>> + reg = <0x0a>;
>> + clocks = <&clks IMX6QDL_CLK_CKO>;
>> + VDDA-supply = <®_2p5v>;
>> + VDDIO-supply = <®_3p3v>;
>> + VDDD-supply = <®_1p8v>;
>> + };
>> +};
>> +
>> +&sata {
>> + status = "okay";
>> +};
>> diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>> new file mode 100644
>> index 0000000..b984128
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
>> @@ -0,0 +1,410 @@
>> +/*
>> + * Copyright (C) 2015 Amarula Solutions B.V.
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + * a) This file is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * version 2 as published by the Free Software Foundation.
>> + *
>> + * This file is distributed in the hope that it will be useful
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Or, alternatively
>> + *
>> + * b) Permission is hereby granted, free of charge, to any person
>> + * obtaining a copy of this software and associated documentation
>> + * files (the "Software"), to deal in the Software without
>> + * restriction, including without limitation the rights to use
>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>> + * sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following
>> + * conditions:
>> + *
>> + * The above copyright notice and this permission notice shall be
>> + * included in all copies or substantial portions of the Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + * OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/clock/imx6qdl-clock.h>
>> +
>> +/ {
>> + memory {
>> + reg = <0x10000000 0x80000000>;
>> + };
>> +
>> + reg_1p8v: regulator-1p8v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "1P8V";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_2p5v: regulator-2p5v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "2P5V";
>> + regulator-min-microvolt = <2500000>;
>> + regulator-max-microvolt = <2500000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_3p3v: regulator-3p3v {
>> + compatible = "regulator-fixed";
>> + regulator-name = "3P3V";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_sd3_vmmc: sd3-vmmc {
>
> Why are the regulator nodes starting from this one not following the
> naming schema regulator-xxx any more?
>
will fix
>> + compatible = "regulator-fixed";
>> + regulator-name = "P3V3_SD3_SWITCHED";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
>> + enable-active-high;
>> + };
>> +
>> + reg_sd4_vmmc: sd4-vmmc {
>> + compatible = "regulator-fixed";
>> + regulator-name = "P3V3_SD4_SWITCHED";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_usb_h1_vbus: usb-h1-vbus {
>> + compatible = "regulator-fixed";
>> + regulator-name = "usb_h1_vbus";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + reg_usb_otg_vbus: usb-otg-vbus {
>> + compatible = "regulator-fixed";
>> + regulator-name = "usb_otg_vbus";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-boot-on;
>> + regulator-always-on;
>> + };
>> +
>> + usb_hub: usb-hub {
>> + compatible = "smsc,usb3503a";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usbhub>;
>> + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
>> + clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
>> + clock-names = "refclk";
>> + };
>> +};
>> +
>> +&clks {
>> + assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
>> + assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
>> +};
>> +
>> +&audmux {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_audmux>;
>> + status = "okay";
>> +};
>> +
>> +&fec {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_enet_3>;
>> + phy-handle = <ð_phy>;
>> + phy-mode = "rgmii";
>> + status = "okay";
>
> Have a new line between properties and sub-node.
>
ok
>> + mdio {
>> + eth_phy: ethernet-phy {
>> + rxc-skew-ps = <1140>;
>> + txc-skew-ps = <1140>;
>> + txen-skew-ps = <600>;
>> + rxdv-skew-ps = <240>;
>> + rxd0-skew-ps = <420>;
>> + rxd1-skew-ps = <600>;
>> + rxd2-skew-ps = <420>;
>> + rxd3-skew-ps = <240>;
>> + txd0-skew-ps = <60>;
>> + txd1-skew-ps = <60>;
>> + txd2-skew-ps = <60>;
>> + txd3-skew-ps = <240>;
>> + };
>> + };
>> +};
>> +
>> +&i2c1 {
>> + clock-frequency = <100000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c1_1>;
>> + status = "okay";
>> +};
>> +
>> +&i2c2 {
>> + clock-frequency = <100000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c2_2>;
>> + status = "okay";
>> +};
>> +
>> +&i2c3 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c3_4>;
>> + status = "okay";
>> +};
>> +
>> +&pcie {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_pcie>;
>> + reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
>> + status = "okay";
>> +};
>> +
>> +&ssi1 {
>> + fsl,mode = "i2s-slave";
>> + status = "okay";
>> +};
>> +
>> +&uart4 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_uart4_1>;
>> + status = "okay";
>> +};
>> +
>> +&usbh1 {
>> + vbus-supply = <®_usb_h1_vbus>;
>> + disable-over-current;
>> + clocks = <&clks IMX6QDL_CLK_USBOH3>;
>> + status = "okay";
>> +};
>> +
>> +&usbotg {
>> + vbus-supply = <®_usb_otg_vbus>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usbotg_2>;
>> + disable-over-current;
>> + status = "okay";
>> +};
>> +
>> +&usdhc1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usdhc1_1>;
>> + no-1-8-v;
>> + status = "okay";
>> +};
>> +
>> +&usdhc3 {
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + pinctrl-0 = <&pinctrl_usdhc3_2>;
>> + pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
>> + vmcc-supply = <®_sd3_vmmc>;
>> + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
>> + bus-witdh=<4>;
>> + no-1-8-v;
>> + status = "okay";
>> +};
>> +
>> +&usdhc4 {
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + pinctrl-0 = <&pinctrl_usdhc4_1>;
>> + pinctrl-1 = <&pinctrl_usdhc4_1_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc4_1_200mhz>;
>> + vmcc-supply = <®_sd4_vmmc>;
>> + bus-witdh=<8>;
>> + no-1-8-v;
>> + non-removable;
>> + status = "okay";
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_audmux: audmux {
>> + fsl,pins = <
>> + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
>> + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
>> + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
>> + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
>> + >;
>> + };
>> +
>> + pinctrl_enet_3: enetgrp-3 {
>
> The suffix number means nothing here. Please drop them.
>
> pinctrl_enet: enetgrp
>
Ok, will fix
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
>> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
>> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
>> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
>> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
>> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
>> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
>> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
>> + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>> + >;
>> + };
>> +
>> + pinctrl_i2c1_1: i2c1grp-1 {
>
> pinctrl_i2c1: i2c1grp
>
> Please check all the pinctrl nodes below.
>
Michael
> Shawn
>
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c2_2: i2c2grp-2 {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>> + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>> + >;
>> + };
>> +
>> + pinctrl_i2c3_4: i2c3grp-4 {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
>> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>> + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>> + >;
>> + };
>> +
>> + pinctrl_pcie: pciegrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
>> + >;
>> + };
>> +
>> + pinctrl_uart4_1: uart4grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
>> + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>> + >;
>> + };
>> +
>> + pinctrl_usbhub: usbhubgrp {
>> + fsl,pins = <
>> + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
>> + >;
>> + };
>> +
>> + pinctrl_usbotg_2: usbotggrp-2 {
>> + fsl,pins = <
>> + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>> + >;
>> + };
>> +
>> + pinctrl_usdhc1_1: usdhc1grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
>> + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
>> + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
>> + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
>> + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
>> + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_2: usdhc3grp-2 {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
>> + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
>> + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_2_100mhz: usdhc3grp-2_100mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_2_200mhz: usdhc3grp-2_200mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
>> + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
>> + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
>> + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
>> + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
>> + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
>> + >;
>> + };
>> +
>> + pinctrl_usdhc4_1: usdhc4grp-1 {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
>> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
>> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
>> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
>> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
>> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
>> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
>> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
>> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
>> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
>> + >;
>> + };
>> +
>> + pinctrl_usdhc4_1_100mhz: usdhc4grp-1_100mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
>> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
>> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
>> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
>> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
>> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
>> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
>> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
>> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
>> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
>> + >;
>> + };
>> +
>> + pinctrl_usdhc4_1_200mhz: usdhc4grp-2_200mhz {
>> + fsl,pins = <
>> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
>> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
>> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
>> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
>> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
>> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
>> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
>> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
>> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
>> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
>> + >;
>> + };
>> +};
>> --
>> 2.6.4
>>
>>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V6] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2016-01-28 2:04 ` Shawn Guo
@ 2016-01-29 8:01 ` Michael Trimarchi
-1 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2016-01-29 8:01 UTC (permalink / raw)
To: Shawn Guo
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
Test on top of ARM: dts: imx6q: clean up unused ipu2grp
Changes in v6:
- fix all the regulator name using regulator- as prefix
- cleanup pinmux group name
Changes in v5:
- None
Changes in v4:
- update regulator name
- using flat pins,fsl
- move iomuxc
- add X11 license
- better alphabetic order
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 411 +++++++++++++++++++++++++++++++
3 files changed, 490 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 30bbc37..5caf0a6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -323,6 +323,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-nitrogen6_max.dtb \
imx6q-phytec-pbab01.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..f8d945a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,411 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: regulator-sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: regulator-sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: regulator-usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: regulator-usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply related [flat|nested] 60+ messages in thread
* [PATCH V6] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2016-01-29 8:01 ` Michael Trimarchi
0 siblings, 0 replies; 60+ messages in thread
From: Michael Trimarchi @ 2016-01-29 8:01 UTC (permalink / raw)
To: linux-arm-kernel
www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Test on top of ARM: dts: imx6q: clean up unused ipu2grp
Changes in v6:
- fix all the regulator name using regulator- as prefix
- cleanup pinmux group name
Changes in v5:
- None
Changes in v4:
- update regulator name
- using flat pins,fsl
- move iomuxc
- add X11 license
- better alphabetic order
Changes in v3:
- add sgtl audio support
- add ethernet gigabit tuning
- use hub reset only in usbhub and not
in otg vbus
Changes in v2:
- add the board in alphabetic order
- remove cpu operating point
- remove simple-bus and adjust regulaotor
- add gpios to correct pinctrl
- remove no mainline binding of gpc
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-icore-rqs.dts | 78 ++++++
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi | 411 +++++++++++++++++++++++++++++++
3 files changed, 490 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-icore-rqs.dts
create mode 100644 arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 30bbc37..5caf0a6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -323,6 +323,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
+ imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-nitrogen6_max.dtb \
imx6q-phytec-pbab01.dtb \
diff --git a/arch/arm/boot/dts/imx6q-icore-rqs.dts b/arch/arm/boot/dts/imx6q-icore-rqs.dts
new file mode 100644
index 0000000..0053188
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-icore-rqs.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-icore-rqs.dtsi"
+
+/ {
+ model = "Engicam i.CoreM6 Quad SOM";
+ compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
+
+ sound {
+ compatible = "fsl,imx-audio-sgtl5000";
+ model = "imx-audio-sgtl5000";
+ ssi-controller = <&ssi1>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "MIC_IN", "Mic Jack",
+ "Mic Jack", "Mic Bias",
+ "Headphone Jack", "HP_OUT";
+ mux-int-port = <1>;
+ mux-ext-port = <4>;
+ };
+};
+
+&i2c3 {
+ codec: sgtl5000 at 0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ VDDA-supply = <®_2p5v>;
+ VDDIO-supply = <®_3p3v>;
+ VDDD-supply = <®_1p8v>;
+ };
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
new file mode 100644
index 0000000..f8d945a
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -0,0 +1,411 @@
+/*
+ * Copyright (C) 2015 Amarula Solutions B.V.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_sd3_vmmc: regulator-sd3-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD3_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ reg_sd4_vmmc: regulator-sd4-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "P3V3_SD4_SWITCHED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_h1_vbus: regulator-usb-h1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_usb_otg_vbus: regulator-usb-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ usb_hub: usb-hub {
+ compatible = "smsc,usb3503a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
+ clock-names = "refclk";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
+};
+
+&audmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_audmux>;
+ status = "okay";
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+ phy-handle = <ð_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+
+ mdio {
+ eth_phy: ethernet-phy {
+ rxc-skew-ps = <1140>;
+ txc-skew-ps = <1140>;
+ txen-skew-ps = <600>;
+ rxdv-skew-ps = <240>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <600>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <240>;
+ txd0-skew-ps = <60>;
+ txd1-skew-ps = <60>;
+ txd2-skew-ps = <60>;
+ txd3-skew-ps = <240>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&ssi1 {
+ fsl,mode = "i2s-slave";
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_h1_vbus>;
+ disable-over-current;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ vmcc-supply = <®_sd3_vmmc>;
+ cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ bus-witdh=<4>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usdhc4 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
+ vmcc-supply = <®_sd4_vmmc>;
+ bus-witdh=<8>;
+ no-1-8-v;
+ non-removable;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_audmux: audmux {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
+ >;
+ };
+
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
+ >;
+ };
+
+ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+ >;
+ };
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
+
+ pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+ >;
+ };
+
+ pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+ >;
+ };
+};
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 60+ messages in thread
* Re: [PATCH V6] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
2016-01-29 8:01 ` Michael Trimarchi
@ 2016-02-01 11:07 ` Shawn Guo
-1 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2016-02-01 11:07 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Lucas Stach, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ
On Fri, Jan 29, 2016 at 09:01:39AM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Applied, thanks.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 60+ messages in thread
* [PATCH V6] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support
@ 2016-02-01 11:07 ` Shawn Guo
0 siblings, 0 replies; 60+ messages in thread
From: Shawn Guo @ 2016-02-01 11:07 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 29, 2016 at 09:01:39AM +0100, Michael Trimarchi wrote:
> www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 60+ messages in thread
end of thread, other threads:[~2016-02-01 11:07 UTC | newest]
Thread overview: 60+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-11-15 10:54 [PATCH] ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support Michael Trimarchi
2015-11-15 10:54 ` Michael Trimarchi
[not found] ` <1447584853-12560-1-git-send-email-michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
2015-11-16 9:19 ` Lucas Stach
2015-11-16 9:19 ` Lucas Stach
[not found] ` <1447665552.3144.6.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-11-16 11:29 ` Michael Trimarchi
2015-11-16 11:29 ` Michael Trimarchi
2015-11-16 11:38 ` Lucas Stach
2015-11-16 11:38 ` Lucas Stach
[not found] ` <1447673895.3144.16.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-11-16 11:41 ` Michael Trimarchi
2015-11-16 11:41 ` Michael Trimarchi
2015-11-16 11:51 ` Lucas Stach
2015-11-16 11:51 ` Lucas Stach
[not found] ` <1447674695.3144.21.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-11-16 11:54 ` Michael Trimarchi
2015-11-16 11:54 ` Michael Trimarchi
2015-11-16 17:23 ` [PATCH V2] " Michael Trimarchi
2015-11-16 17:23 ` Michael Trimarchi
2015-11-16 22:02 ` Michael Trimarchi
2015-11-16 22:02 ` Michael Trimarchi
2015-11-17 9:31 ` Lucas Stach
2015-11-17 9:31 ` Lucas Stach
[not found] ` <1447752697.3144.47.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-11-18 15:10 ` [PATCH V3] " Michael Trimarchi
2015-11-18 15:10 ` Michael Trimarchi
2015-11-25 18:14 ` Michael Trimarchi
2015-11-25 18:14 ` Michael Trimarchi
[not found] ` <CAOf5uw=q7fwh93w7LUQaAV3-+YLDwzL65wB1WB5L2BKUe+Vtpg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-12-02 2:09 ` Shawn Guo
2015-12-02 2:09 ` Shawn Guo
2015-12-02 9:15 ` Michael Trimarchi
2015-12-02 9:15 ` Michael Trimarchi
2015-12-11 8:36 ` Shawn Guo
2015-12-11 8:36 ` Shawn Guo
2015-12-14 8:45 ` Michael Trimarchi
2015-12-14 8:45 ` Michael Trimarchi
2015-12-16 18:12 ` Michael Trimarchi
2015-12-16 18:12 ` Michael Trimarchi
2015-12-21 6:12 ` Shawn Guo
2015-12-21 6:12 ` Shawn Guo
2015-12-23 2:27 ` Shawn Guo
2015-12-23 2:27 ` Shawn Guo
2015-12-23 9:18 ` Michael Trimarchi
2015-12-23 9:18 ` Michael Trimarchi
2015-12-24 9:06 ` [PATCH V4] " Michael Trimarchi
2015-12-24 9:06 ` Michael Trimarchi
2015-12-24 9:13 ` Michael Trimarchi
2015-12-24 9:13 ` Michael Trimarchi
2015-12-24 9:24 ` [PATCH V5] " Michael Trimarchi
2015-12-24 9:24 ` Michael Trimarchi
2016-01-12 17:37 ` Michael Trimarchi
2016-01-12 17:37 ` Michael Trimarchi
2016-01-28 2:04 ` Shawn Guo
2016-01-28 2:04 ` Shawn Guo
2016-01-28 2:12 ` Michael Trimarchi
2016-01-28 2:12 ` Michael Trimarchi
2016-01-29 8:01 ` [PATCH V6] " Michael Trimarchi
2016-01-29 8:01 ` Michael Trimarchi
2016-02-01 11:07 ` Shawn Guo
2016-02-01 11:07 ` Shawn Guo
2015-11-24 9:19 ` [PATCH] " Shawn Guo
2015-11-24 9:19 ` Shawn Guo
2015-11-24 9:31 ` Lucas Stach
2015-11-24 9:31 ` Lucas Stach
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