* [v5 0/7] add support SATA for BMIPS_GENERIC
@ 2015-11-19 2:41 Jaedon Shin
2015-11-19 2:41 ` [v5 1/7] ata: ahci_brcmstb: add support MIPS-based platforms Jaedon Shin
` (7 more replies)
0 siblings, 8 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
Hi all,
This patch series add support SATA for BMIPS_GENERIC.
Changes in v5:
- uses brcm_sata_readreg and brcm_sata_writereg for HOST_CAP_NCQ overriding
- pull out already applied patches for device tree entries
- add "Tested-by:" and "Acked-by:" tags
Changes in v4:
- remove unused properties from bcm{7425,7342,7362}.dtsi
Changes in v3:
- fix typo quirk instead of quick
- disable NCQ before initialzing SATA controller endianness
- fix misnomer controlling phy interface
- remove brcm,broken-ncq and brcm,broken-phy properties from devicetree
- use compatible string for quirks
- use list for compatible strings
- add "Acked-by:" tags
Changes in v2:
- adds quirk for ncq
- adds quirk for phy interface control
- remove unused definitions in ahci_brcmstb
- combines compatible string
Jaedon Shin (7):
ata: ahci_brcmstb: add support MIPS-based platforms
ata: ahci_brcmstb: add quirk for broken ncq
ata: ahci_brcmstb: add quirk for different phy
ata: ahci_brcmstb: remove unused definitions
phy: phy_brcmstb_sata: remove duplicate definitions
phy: phy_brcmstb_sata: add data for phy version
phy: phy_brcmstb_sata: add support MIPS-based platforms
.../devicetree/bindings/ata/brcm,sata-brcmstb.txt | 4 +-
.../bindings/phy/brcm,brcmstb-sata-phy.txt | 1 +
drivers/ata/Kconfig | 2 +-
drivers/ata/ahci_brcmstb.c | 58 +++++++++++++++++++++-
drivers/phy/Kconfig | 4 +-
drivers/phy/phy-brcmstb-sata.c | 47 ++++++++++++++----
6 files changed, 100 insertions(+), 16 deletions(-)
--
2.6.3
^ permalink raw reply [flat|nested] 12+ messages in thread
* [v5 1/7] ata: ahci_brcmstb: add support MIPS-based platforms
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 2:41 ` [v5 2/7] ata: ahci_brcmstb: add quirk for broken ncq Jaedon Shin
` (6 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware
block for AHCI SATA3.
The BCM7425 is main chipset of MIPS-based 40nm class. The others have
same AHCI block. The compatible string may be use brcm,bcm7425-ahci.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
---
Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt | 4 +++-
drivers/ata/Kconfig | 2 +-
drivers/ata/ahci_brcmstb.c | 1 +
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt b/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt
index 20ac9bbfa1fd..60872838f1ad 100644
--- a/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt
+++ b/Documentation/devicetree/bindings/ata/brcm,sata-brcmstb.txt
@@ -4,7 +4,9 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
Each SATA controller should have its own node.
Required properties:
-- compatible : compatible list, may contain "brcm,bcm7445-ahci" and/or
+- compatible : should be one or more of
+ "brcm,bcm7425-ahci"
+ "brcm,bcm7445-ahci"
"brcm,sata3-ahci"
- reg : register mappings for AHCI and SATA_TOP_CTRL
- reg-names : "ahci" and "top-ctrl"
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 6aaa3f81755b..861643ea91b5 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -100,7 +100,7 @@ config SATA_AHCI_PLATFORM
config AHCI_BRCMSTB
tristate "Broadcom STB AHCI SATA support"
- depends on ARCH_BRCMSTB
+ depends on ARCH_BRCMSTB || BMIPS_GENERIC
help
This option enables support for the AHCI SATA3 controller found on
STB SoC's.
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
index 14b7305d2ba0..73e3b0b2a3c2 100644
--- a/drivers/ata/ahci_brcmstb.c
+++ b/drivers/ata/ahci_brcmstb.c
@@ -300,6 +300,7 @@ static int brcm_ahci_remove(struct platform_device *pdev)
}
static const struct of_device_id ahci_of_match[] = {
+ {.compatible = "brcm,bcm7425-ahci"},
{.compatible = "brcm,bcm7445-ahci"},
{},
};
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [v5 2/7] ata: ahci_brcmstb: add quirk for broken ncq
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
2015-11-19 2:41 ` [v5 1/7] ata: ahci_brcmstb: add support MIPS-based platforms Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 18:44 ` Brian Norris
2015-11-19 2:41 ` [v5 3/7] ata: ahci_brcmstb: add quirk for different phy Jaedon Shin
` (5 subsequent siblings)
7 siblings, 1 reply; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
Add quirk for broken ncq. Some chipsets (eg. BCM7349A0, BCM7445A0,
BCM7445B0, and all 40nm chipsets including BCM7425) need a workaround
disabling NCQ.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/ata/ahci_brcmstb.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
index 73e3b0b2a3c2..3bf1cf6259d7 100644
--- a/drivers/ata/ahci_brcmstb.c
+++ b/drivers/ata/ahci_brcmstb.c
@@ -69,10 +69,15 @@
(DATA_ENDIAN << DMADESC_ENDIAN_SHIFT) | \
(MMIO_ENDIAN << MMIO_ENDIAN_SHIFT))
+enum brcm_ahci_quirks {
+ BRCM_AHCI_QUIRK_NONCQ = BIT(0),
+};
+
struct brcm_ahci_priv {
struct device *dev;
void __iomem *top_ctrl;
u32 port_mask;
+ u32 quirks;
};
static const struct ata_port_info ahci_brcm_port_info = {
@@ -202,6 +207,42 @@ static u32 brcm_ahci_get_portmask(struct platform_device *pdev,
return impl;
}
+static void brcm_sata_quirks(struct platform_device *pdev,
+ struct brcm_ahci_priv *priv)
+{
+ if (priv->quirks & BRCM_AHCI_QUIRK_NONCQ) {
+ void __iomem *ctrl = priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL;
+ void __iomem *ahci;
+ struct resource *res;
+ u32 reg;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "ahci");
+ ahci = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(ahci))
+ return;
+
+ reg = brcm_sata_readreg(ctrl);
+ reg |= OVERRIDE_HWINIT;
+ brcm_sata_writereg(reg, ctrl);
+
+ /* Clear out the NCQ bit so the AHCI driver will not issue
+ * FPDMA/NCQ commands.
+ */
+ reg = brcm_sata_readreg(ahci + HOST_CAP);
+ reg &= ~HOST_CAP_NCQ;
+ brcm_sata_writereg(reg, ahci + HOST_CAP);
+
+ reg = brcm_sata_readreg(ctrl);
+ reg &= ~OVERRIDE_HWINIT;
+ brcm_sata_writereg(reg, ctrl);
+
+ devm_iounmap(&pdev->dev, ahci);
+ devm_release_mem_region(&pdev->dev, res->start,
+ resource_size(res));
+ }
+}
+
static void brcm_sata_init(struct brcm_ahci_priv *priv)
{
/* Configure endianness */
@@ -256,6 +297,11 @@ static int brcm_ahci_probe(struct platform_device *pdev)
if (IS_ERR(priv->top_ctrl))
return PTR_ERR(priv->top_ctrl);
+ if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci"))
+ priv->quirks |= BRCM_AHCI_QUIRK_NONCQ;
+
+ brcm_sata_quirks(pdev, priv);
+
brcm_sata_init(priv);
priv->port_mask = brcm_ahci_get_portmask(pdev, priv);
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [v5 3/7] ata: ahci_brcmstb: add quirk for different phy
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
2015-11-19 2:41 ` [v5 1/7] ata: ahci_brcmstb: add support MIPS-based platforms Jaedon Shin
2015-11-19 2:41 ` [v5 2/7] ata: ahci_brcmstb: add quirk for broken ncq Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 2:41 ` [v5 4/7] ata: ahci_brcmstb: remove unused definitions Jaedon Shin
` (4 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
Add quirk for phy interface of MIPS-based chipsets. The ARM-based
chipsets have four phy interface control registers and each port has two
registers but the MIPS-based chipsets have three. There are no
information and documentation.
The Broadcom strict-ahci based BSP of legacy version did not control
these registers.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/ata/ahci_brcmstb.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
index 3bf1cf6259d7..b7cdfc8fabb7 100644
--- a/drivers/ata/ahci_brcmstb.c
+++ b/drivers/ata/ahci_brcmstb.c
@@ -71,6 +71,7 @@
enum brcm_ahci_quirks {
BRCM_AHCI_QUIRK_NONCQ = BIT(0),
+ BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE = BIT(1),
};
struct brcm_ahci_priv {
@@ -119,6 +120,9 @@ static void brcm_sata_phy_enable(struct brcm_ahci_priv *priv, int port)
void __iomem *p;
u32 reg;
+ if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
+ return;
+
/* clear PHY_DEFAULT_POWER_STATE */
p = phyctrl + SATA_TOP_CTRL_PHY_CTRL_1;
reg = brcm_sata_readreg(p);
@@ -148,6 +152,9 @@ static void brcm_sata_phy_disable(struct brcm_ahci_priv *priv, int port)
void __iomem *p;
u32 reg;
+ if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
+ return;
+
/* power-off the PHY digital logic */
p = phyctrl + SATA_TOP_CTRL_PHY_CTRL_2;
reg = brcm_sata_readreg(p);
@@ -297,8 +304,10 @@ static int brcm_ahci_probe(struct platform_device *pdev)
if (IS_ERR(priv->top_ctrl))
return PTR_ERR(priv->top_ctrl);
- if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci"))
+ if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci")) {
priv->quirks |= BRCM_AHCI_QUIRK_NONCQ;
+ priv->quirks |= BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE;
+ }
brcm_sata_quirks(pdev, priv);
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [v5 4/7] ata: ahci_brcmstb: remove unused definitions
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
` (2 preceding siblings ...)
2015-11-19 2:41 ` [v5 3/7] ata: ahci_brcmstb: add quirk for different phy Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 2:41 ` [v5 5/7] phy: phy_brcmstb_sata: remove duplicate definitions Jaedon Shin
` (3 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
Remove unused definitions, and this is to avoid confusion with MIPS-based
chipsets.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/ata/ahci_brcmstb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
index b7cdfc8fabb7..0af6d6dd6a36 100644
--- a/drivers/ata/ahci_brcmstb.c
+++ b/drivers/ata/ahci_brcmstb.c
@@ -52,8 +52,6 @@
#define SATA_TOP_CTRL_2_PHY_GLOBAL_RESET BIT(14)
#define SATA_TOP_CTRL_PHY_OFFS 0x8
#define SATA_TOP_MAX_PHYS 2
-#define SATA_TOP_CTRL_SATA_TP_OUT 0x1c
-#define SATA_TOP_CTRL_CLIENT_INIT_CTRL 0x20
/* On big-endian MIPS, buses are reversed to big endian, so switch them back */
#if defined(CONFIG_MIPS) && defined(__BIG_ENDIAN)
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [v5 5/7] phy: phy_brcmstb_sata: remove duplicate definitions
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
` (3 preceding siblings ...)
2015-11-19 2:41 ` [v5 4/7] ata: ahci_brcmstb: remove unused definitions Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 2:41 ` [v5 6/7] phy: phy_brcmstb_sata: add data for phy version Jaedon Shin
` (2 subsequent siblings)
7 siblings, 0 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
Remove duplicate definitions.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/phy/phy-brcmstb-sata.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
index 8a2cb16a1937..0be55dafe9ea 100644
--- a/drivers/phy/phy-brcmstb-sata.c
+++ b/drivers/phy/phy-brcmstb-sata.c
@@ -26,8 +26,6 @@
#define SATA_MDIO_BANK_OFFSET 0x23c
#define SATA_MDIO_REG_OFFSET(ofs) ((ofs) * 4)
-#define SATA_MDIO_REG_SPACE_SIZE 0x1000
-#define SATA_MDIO_REG_LENGTH 0x1f00
#define MAX_PORTS 2
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [v5 6/7] phy: phy_brcmstb_sata: add data for phy version
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
` (4 preceding siblings ...)
2015-11-19 2:41 ` [v5 5/7] phy: phy_brcmstb_sata: remove duplicate definitions Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 2:41 ` [v5 7/7] phy: phy_brcmstb_sata: add support MIPS-based platforms Jaedon Shin
2015-11-24 23:51 ` [v5 0/7] add support SATA for BMIPS_GENERIC Florian Fainelli
7 siblings, 0 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
Add data of device for phy version. and 28nm version is default.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/phy/phy-brcmstb-sata.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
index 0be55dafe9ea..5de394f589c8 100644
--- a/drivers/phy/phy-brcmstb-sata.c
+++ b/drivers/phy/phy-brcmstb-sata.c
@@ -30,7 +30,11 @@
#define MAX_PORTS 2
/* Register offset between PHYs in PCB space */
-#define SATA_MDIO_REG_SPACE_SIZE 0x1000
+#define SATA_MDIO_REG_28NM_SPACE_SIZE 0x1000
+
+enum brcm_sata_phy_version {
+ BRCM_SATA_PHY_28NM,
+};
struct brcm_sata_port {
int portnum;
@@ -42,6 +46,7 @@ struct brcm_sata_port {
struct brcm_sata_phy {
struct device *dev;
void __iomem *phy_base;
+ enum brcm_sata_phy_version version;
struct brcm_sata_port phys[MAX_PORTS];
};
@@ -64,8 +69,12 @@ enum sata_mdio_phy_regs_28nm {
static inline void __iomem *brcm_sata_phy_base(struct brcm_sata_port *port)
{
struct brcm_sata_phy *priv = port->phy_priv;
+ u32 offset;
- return priv->phy_base + (port->portnum * SATA_MDIO_REG_SPACE_SIZE);
+ if (priv->version == BRCM_SATA_PHY_28NM)
+ offset = SATA_MDIO_REG_28NM_SPACE_SIZE;
+
+ return priv->phy_base + (port->portnum * offset);
}
static void brcm_sata_mdio_wr(void __iomem *addr, u32 bank, u32 ofs,
@@ -126,7 +135,8 @@ static const struct phy_ops phy_ops_28nm = {
};
static const struct of_device_id brcm_sata_phy_of_match[] = {
- { .compatible = "brcm,bcm7445-sata-phy" },
+ { .compatible = "brcm,bcm7445-sata-phy",
+ .data = (void *)BRCM_SATA_PHY_28NM },
{},
};
MODULE_DEVICE_TABLE(of, brcm_sata_phy_of_match);
@@ -135,6 +145,7 @@ static int brcm_sata_phy_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *dn = dev->of_node, *child;
+ const struct of_device_id *of_id;
struct brcm_sata_phy *priv;
struct resource *res;
struct phy_provider *provider;
@@ -154,6 +165,12 @@ static int brcm_sata_phy_probe(struct platform_device *pdev)
if (IS_ERR(priv->phy_base))
return PTR_ERR(priv->phy_base);
+ of_id = of_match_node(brcm_sata_phy_of_match, dn);
+ if (of_id)
+ priv->version = (enum brcm_sata_phy_version)of_id->data;
+ else
+ priv->version = BRCM_SATA_PHY_28NM;
+
for_each_available_child_of_node(dn, child) {
unsigned int id;
struct brcm_sata_port *port;
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [v5 7/7] phy: phy_brcmstb_sata: add support MIPS-based platforms
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
` (5 preceding siblings ...)
2015-11-19 2:41 ` [v5 6/7] phy: phy_brcmstb_sata: add data for phy version Jaedon Shin
@ 2015-11-19 2:41 ` Jaedon Shin
2015-11-19 13:49 ` Kishon Vijay Abraham I
2015-11-24 23:51 ` [v5 0/7] add support SATA for BMIPS_GENERIC Florian Fainelli
7 siblings, 1 reply; 12+ messages in thread
From: Jaedon Shin @ 2015-11-19 2:41 UTC (permalink / raw)
To: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic, Jaedon Shin
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware
block for AHCI SATA3.
The BCM7425 is main chipset of MIPS-based 40nm class. The others have
same PHY of AHCI block. The compatible string may use
brcm,bcm7425-sata-phy.
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
---
.../bindings/phy/brcm,brcmstb-sata-phy.txt | 1 +
drivers/phy/Kconfig | 4 ++--
drivers/phy/phy-brcmstb-sata.c | 24 ++++++++++++++++------
3 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt b/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
index 7f81ef90146a..d87ab7c127b8 100644
--- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
+++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
@@ -2,6 +2,7 @@
Required properties:
- compatible: should be one or more of
+ "brcm,bcm7425-sata-phy"
"brcm,bcm7445-sata-phy"
"brcm,phy-sata3"
- address-cells: should be 1
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 7eb5859dd035..c6f4798ed3af 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -373,11 +373,11 @@ config PHY_TUSB1210
config PHY_BRCMSTB_SATA
tristate "Broadcom STB SATA PHY driver"
- depends on ARCH_BRCMSTB
+ depends on ARCH_BRCMSTB || BMIPS_GENERIC
depends on OF
select GENERIC_PHY
help
- Enable this to support the SATA3 PHY on 28nm Broadcom STB SoCs.
+ Enable this to support the SATA3 PHY on 28nm or 40nm Broadcom STB SoCs.
Likely useful only with CONFIG_SATA_BRCMSTB enabled.
config PHY_CYGNUS_PCIE
diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
index 5de394f589c8..c8243581f196 100644
--- a/drivers/phy/phy-brcmstb-sata.c
+++ b/drivers/phy/phy-brcmstb-sata.c
@@ -32,8 +32,14 @@
/* Register offset between PHYs in PCB space */
#define SATA_MDIO_REG_28NM_SPACE_SIZE 0x1000
+/* The older SATA PHY registers duplicated per port registers within the map,
+ * rather than having a separate map per port.
+ */
+#define SATA_MDIO_REG_40NM_SPACE_SIZE 0x10
+
enum brcm_sata_phy_version {
BRCM_SATA_PHY_28NM,
+ BRCM_SATA_PHY_40NM,
};
struct brcm_sata_port {
@@ -51,7 +57,7 @@ struct brcm_sata_phy {
struct brcm_sata_port phys[MAX_PORTS];
};
-enum sata_mdio_phy_regs_28nm {
+enum sata_mdio_phy_regs {
PLL_REG_BANK_0 = 0x50,
PLL_REG_BANK_0_PLLCONTROL_0 = 0x81,
@@ -69,10 +75,14 @@ enum sata_mdio_phy_regs_28nm {
static inline void __iomem *brcm_sata_phy_base(struct brcm_sata_port *port)
{
struct brcm_sata_phy *priv = port->phy_priv;
- u32 offset;
+ u32 offset = 0;
if (priv->version == BRCM_SATA_PHY_28NM)
offset = SATA_MDIO_REG_28NM_SPACE_SIZE;
+ else if (priv->version == BRCM_SATA_PHY_40NM)
+ offset = SATA_MDIO_REG_40NM_SPACE_SIZE;
+ else
+ dev_err(priv->dev, "should not happen\n");
return priv->phy_base + (port->portnum * offset);
}
@@ -93,7 +103,7 @@ static void brcm_sata_mdio_wr(void __iomem *addr, u32 bank, u32 ofs,
#define FMAX_VAL_DEFAULT 0x3df
#define FMAX_VAL_SSC 0x83
-static void brcm_sata_cfg_ssc_28nm(struct brcm_sata_port *port)
+static void brcm_sata_cfg_ssc(struct brcm_sata_port *port)
{
void __iomem *base = brcm_sata_phy_base(port);
struct brcm_sata_phy *priv = port->phy_priv;
@@ -124,12 +134,12 @@ static int brcm_sata_phy_init(struct phy *phy)
{
struct brcm_sata_port *port = phy_get_drvdata(phy);
- brcm_sata_cfg_ssc_28nm(port);
+ brcm_sata_cfg_ssc(port);
return 0;
}
-static const struct phy_ops phy_ops_28nm = {
+static const struct phy_ops phy_ops = {
.init = brcm_sata_phy_init,
.owner = THIS_MODULE,
};
@@ -137,6 +147,8 @@ static const struct phy_ops phy_ops_28nm = {
static const struct of_device_id brcm_sata_phy_of_match[] = {
{ .compatible = "brcm,bcm7445-sata-phy",
.data = (void *)BRCM_SATA_PHY_28NM },
+ { .compatible = "brcm,bcm7425-sata-phy",
+ .data = (void *)BRCM_SATA_PHY_40NM },
{},
};
MODULE_DEVICE_TABLE(of, brcm_sata_phy_of_match);
@@ -193,7 +205,7 @@ static int brcm_sata_phy_probe(struct platform_device *pdev)
port = &priv->phys[id];
port->portnum = id;
port->phy_priv = priv;
- port->phy = devm_phy_create(dev, child, &phy_ops_28nm);
+ port->phy = devm_phy_create(dev, child, &phy_ops);
port->ssc_en = of_property_read_bool(child, "brcm,enable-ssc");
if (IS_ERR(port->phy)) {
dev_err(dev, "failed to create PHY\n");
--
2.6.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [v5 7/7] phy: phy_brcmstb_sata: add support MIPS-based platforms
2015-11-19 2:41 ` [v5 7/7] phy: phy_brcmstb_sata: add support MIPS-based platforms Jaedon Shin
@ 2015-11-19 13:49 ` Kishon Vijay Abraham I
0 siblings, 0 replies; 12+ messages in thread
From: Kishon Vijay Abraham I @ 2015-11-19 13:49 UTC (permalink / raw)
To: Jaedon Shin, Tejun Heo, Rob Herring, Brian Norris,
Florian Fainelli, linux-ide
Cc: Ralf Baechle, Dragan Stancevic
Hi,
On Thursday 19 November 2015 08:11 AM, Jaedon Shin wrote:
> The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware
> block for AHCI SATA3.
>
> The BCM7425 is main chipset of MIPS-based 40nm class. The others have
> same PHY of AHCI block. The compatible string may use
> brcm,bcm7425-sata-phy.
>
> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Tested-by: Florian Fainelli <f.fainelli@gmail.com>
> Acked-by: Brian Norris <computersforpeace@gmail.com>
> ---
> .../bindings/phy/brcm,brcmstb-sata-phy.txt | 1 +
> drivers/phy/Kconfig | 4 ++--
> drivers/phy/phy-brcmstb-sata.c | 24 ++++++++++++++++------
> 3 files changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt b/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
> index 7f81ef90146a..d87ab7c127b8 100644
> --- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
> @@ -2,6 +2,7 @@
>
> Required properties:
> - compatible: should be one or more of
> + "brcm,bcm7425-sata-phy"
> "brcm,bcm7445-sata-phy"
> "brcm,phy-sata3"
> - address-cells: should be 1
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 7eb5859dd035..c6f4798ed3af 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -373,11 +373,11 @@ config PHY_TUSB1210
>
> config PHY_BRCMSTB_SATA
> tristate "Broadcom STB SATA PHY driver"
> - depends on ARCH_BRCMSTB
> + depends on ARCH_BRCMSTB || BMIPS_GENERIC
> depends on OF
> select GENERIC_PHY
> help
> - Enable this to support the SATA3 PHY on 28nm Broadcom STB SoCs.
> + Enable this to support the SATA3 PHY on 28nm or 40nm Broadcom STB SoCs.
> Likely useful only with CONFIG_SATA_BRCMSTB enabled.
>
> config PHY_CYGNUS_PCIE
> diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
> index 5de394f589c8..c8243581f196 100644
> --- a/drivers/phy/phy-brcmstb-sata.c
> +++ b/drivers/phy/phy-brcmstb-sata.c
> @@ -32,8 +32,14 @@
> /* Register offset between PHYs in PCB space */
> #define SATA_MDIO_REG_28NM_SPACE_SIZE 0x1000
>
> +/* The older SATA PHY registers duplicated per port registers within the map,
> + * rather than having a separate map per port.
> + */
> +#define SATA_MDIO_REG_40NM_SPACE_SIZE 0x10
> +
> enum brcm_sata_phy_version {
> BRCM_SATA_PHY_28NM,
> + BRCM_SATA_PHY_40NM,
> };
>
> struct brcm_sata_port {
> @@ -51,7 +57,7 @@ struct brcm_sata_phy {
> struct brcm_sata_port phys[MAX_PORTS];
> };
>
> -enum sata_mdio_phy_regs_28nm {
> +enum sata_mdio_phy_regs {
> PLL_REG_BANK_0 = 0x50,
> PLL_REG_BANK_0_PLLCONTROL_0 = 0x81,
>
> @@ -69,10 +75,14 @@ enum sata_mdio_phy_regs_28nm {
> static inline void __iomem *brcm_sata_phy_base(struct brcm_sata_port *port)
> {
> struct brcm_sata_phy *priv = port->phy_priv;
> - u32 offset;
> + u32 offset = 0;
>
> if (priv->version == BRCM_SATA_PHY_28NM)
> offset = SATA_MDIO_REG_28NM_SPACE_SIZE;
> + else if (priv->version == BRCM_SATA_PHY_40NM)
> + offset = SATA_MDIO_REG_40NM_SPACE_SIZE;
> + else
> + dev_err(priv->dev, "should not happen\n");
"invalid phy version" here?
Thanks
Kishon
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [v5 2/7] ata: ahci_brcmstb: add quirk for broken ncq
2015-11-19 2:41 ` [v5 2/7] ata: ahci_brcmstb: add quirk for broken ncq Jaedon Shin
@ 2015-11-19 18:44 ` Brian Norris
0 siblings, 0 replies; 12+ messages in thread
From: Brian Norris @ 2015-11-19 18:44 UTC (permalink / raw)
To: Jaedon Shin
Cc: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Florian Fainelli,
linux-ide, Ralf Baechle, Dragan Stancevic
On Thu, Nov 19, 2015 at 11:41:14AM +0900, Jaedon Shin wrote:
> Add quirk for broken ncq. Some chipsets (eg. BCM7349A0, BCM7445A0,
> BCM7445B0, and all 40nm chipsets including BCM7425) need a workaround
> disabling NCQ.
>
> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
> Tested-by: Florian Fainelli <f.fainelli@gmail.com>
> Acked-by: Brian Norris <computersforpeace@gmail.com>
> ---
> drivers/ata/ahci_brcmstb.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
> index 73e3b0b2a3c2..3bf1cf6259d7 100644
> --- a/drivers/ata/ahci_brcmstb.c
> +++ b/drivers/ata/ahci_brcmstb.c
> @@ -69,10 +69,15 @@
> (DATA_ENDIAN << DMADESC_ENDIAN_SHIFT) | \
> (MMIO_ENDIAN << MMIO_ENDIAN_SHIFT))
>
> +enum brcm_ahci_quirks {
> + BRCM_AHCI_QUIRK_NONCQ = BIT(0),
> +};
> +
> struct brcm_ahci_priv {
> struct device *dev;
> void __iomem *top_ctrl;
> u32 port_mask;
> + u32 quirks;
> };
>
> static const struct ata_port_info ahci_brcm_port_info = {
> @@ -202,6 +207,42 @@ static u32 brcm_ahci_get_portmask(struct platform_device *pdev,
> return impl;
> }
>
> +static void brcm_sata_quirks(struct platform_device *pdev,
> + struct brcm_ahci_priv *priv)
> +{
> + if (priv->quirks & BRCM_AHCI_QUIRK_NONCQ) {
> + void __iomem *ctrl = priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL;
> + void __iomem *ahci;
> + struct resource *res;
> + u32 reg;
> +
> + res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> + "ahci");
> + ahci = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(ahci))
> + return;
> +
> + reg = brcm_sata_readreg(ctrl);
> + reg |= OVERRIDE_HWINIT;
> + brcm_sata_writereg(reg, ctrl);
> +
> + /* Clear out the NCQ bit so the AHCI driver will not issue
> + * FPDMA/NCQ commands.
> + */
> + reg = brcm_sata_readreg(ahci + HOST_CAP);
> + reg &= ~HOST_CAP_NCQ;
> + brcm_sata_writereg(reg, ahci + HOST_CAP);
> +
> + reg = brcm_sata_readreg(ctrl);
> + reg &= ~OVERRIDE_HWINIT;
> + brcm_sata_writereg(reg, ctrl);
> +
> + devm_iounmap(&pdev->dev, ahci);
> + devm_release_mem_region(&pdev->dev, res->start,
> + resource_size(res));
You missed Tejun's suggestion:
http://article.gmane.org/gmane.linux.ide/60602
This can all be killed and replaced with
hpriv->flags |= AHCI_HFLAG_NO_NCQ;
And you need to move brcm_sata_quirks() after
ahci_platform_get_resources(). (It makes sense there anyway, despite
whatever the original Broadcom BSP did.)
Brian
> + }
> +}
> +
> static void brcm_sata_init(struct brcm_ahci_priv *priv)
> {
> /* Configure endianness */
> @@ -256,6 +297,11 @@ static int brcm_ahci_probe(struct platform_device *pdev)
> if (IS_ERR(priv->top_ctrl))
> return PTR_ERR(priv->top_ctrl);
>
> + if (of_device_is_compatible(dev->of_node, "brcm,bcm7425-ahci"))
> + priv->quirks |= BRCM_AHCI_QUIRK_NONCQ;
> +
> + brcm_sata_quirks(pdev, priv);
> +
> brcm_sata_init(priv);
>
> priv->port_mask = brcm_ahci_get_portmask(pdev, priv);
> --
> 2.6.3
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [v5 0/7] add support SATA for BMIPS_GENERIC
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
` (6 preceding siblings ...)
2015-11-19 2:41 ` [v5 7/7] phy: phy_brcmstb_sata: add support MIPS-based platforms Jaedon Shin
@ 2015-11-24 23:51 ` Florian Fainelli
2015-11-25 9:30 ` Jaedon Shin
7 siblings, 1 reply; 12+ messages in thread
From: Florian Fainelli @ 2015-11-24 23:51 UTC (permalink / raw)
To: Jaedon Shin, Tejun Heo, Kishon Vijay Abraham I, Rob Herring,
Brian Norris, linux-ide
Cc: Ralf Baechle, Dragan Stancevic
On 18/11/15 18:41, Jaedon Shin wrote:
> Hi all,
>
> This patch series add support SATA for BMIPS_GENERIC.
>
> Changes in v5:
> - uses brcm_sata_readreg and brcm_sata_writereg for HOST_CAP_NCQ overriding
> - pull out already applied patches for device tree entries
> - add "Tested-by:" and "Acked-by:" tags
And now also tested on 7435 and 7429 and worked just fine, I plan on
submitting DTSes updates or additions for these chips a little later on.
Jaedon, can you address Brian's and Kishon's feedback so we can get
these patches included in their respective trees?
Thanks again!
>
> Changes in v4:
> - remove unused properties from bcm{7425,7342,7362}.dtsi
>
> Changes in v3:
> - fix typo quirk instead of quick
> - disable NCQ before initialzing SATA controller endianness
> - fix misnomer controlling phy interface
> - remove brcm,broken-ncq and brcm,broken-phy properties from devicetree
> - use compatible string for quirks
> - use list for compatible strings
> - add "Acked-by:" tags
>
> Changes in v2:
> - adds quirk for ncq
> - adds quirk for phy interface control
> - remove unused definitions in ahci_brcmstb
> - combines compatible string
>
> Jaedon Shin (7):
> ata: ahci_brcmstb: add support MIPS-based platforms
> ata: ahci_brcmstb: add quirk for broken ncq
> ata: ahci_brcmstb: add quirk for different phy
> ata: ahci_brcmstb: remove unused definitions
> phy: phy_brcmstb_sata: remove duplicate definitions
> phy: phy_brcmstb_sata: add data for phy version
> phy: phy_brcmstb_sata: add support MIPS-based platforms
>
> .../devicetree/bindings/ata/brcm,sata-brcmstb.txt | 4 +-
> .../bindings/phy/brcm,brcmstb-sata-phy.txt | 1 +
> drivers/ata/Kconfig | 2 +-
> drivers/ata/ahci_brcmstb.c | 58 +++++++++++++++++++++-
> drivers/phy/Kconfig | 4 +-
> drivers/phy/phy-brcmstb-sata.c | 47 ++++++++++++++----
> 6 files changed, 100 insertions(+), 16 deletions(-)
>
> --
> 2.6.3
>
--
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [v5 0/7] add support SATA for BMIPS_GENERIC
2015-11-24 23:51 ` [v5 0/7] add support SATA for BMIPS_GENERIC Florian Fainelli
@ 2015-11-25 9:30 ` Jaedon Shin
0 siblings, 0 replies; 12+ messages in thread
From: Jaedon Shin @ 2015-11-25 9:30 UTC (permalink / raw)
To: Florian Fainelli
Cc: Tejun Heo, Kishon Vijay Abraham I, Rob Herring, Brian Norris,
linux-ide, Ralf Baechle, Dragan Stancevic
On Nov 25, 2015, at 8:51 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> On 18/11/15 18:41, Jaedon Shin wrote:
>> Hi all,
>>
>> This patch series add support SATA for BMIPS_GENERIC.
>>
>> Changes in v5:
>> - uses brcm_sata_readreg and brcm_sata_writereg for HOST_CAP_NCQ overriding
>> - pull out already applied patches for device tree entries
>> - add "Tested-by:" and "Acked-by:" tags
>
> And now also tested on 7435 and 7429 and worked just fine, I plan on
> submitting DTSes updates or additions for these chips a little later on.
>
> Jaedon, can you address Brian's and Kishon's feedback so we can get
> these patches included in their respective trees?
>
> Thanks again!
>
Sorry too late, and I will resubmit patches in tomorrow including Tejun's,
Brian's and Kishon's feedbacks.
Thanks,
Jaedon
>>
>> Changes in v4:
>> - remove unused properties from bcm{7425,7342,7362}.dtsi
>>
>> Changes in v3:
>> - fix typo quirk instead of quick
>> - disable NCQ before initialzing SATA controller endianness
>> - fix misnomer controlling phy interface
>> - remove brcm,broken-ncq and brcm,broken-phy properties from devicetree
>> - use compatible string for quirks
>> - use list for compatible strings
>> - add "Acked-by:" tags
>>
>> Changes in v2:
>> - adds quirk for ncq
>> - adds quirk for phy interface control
>> - remove unused definitions in ahci_brcmstb
>> - combines compatible string
>>
>> Jaedon Shin (7):
>> ata: ahci_brcmstb: add support MIPS-based platforms
>> ata: ahci_brcmstb: add quirk for broken ncq
>> ata: ahci_brcmstb: add quirk for different phy
>> ata: ahci_brcmstb: remove unused definitions
>> phy: phy_brcmstb_sata: remove duplicate definitions
>> phy: phy_brcmstb_sata: add data for phy version
>> phy: phy_brcmstb_sata: add support MIPS-based platforms
>>
>> .../devicetree/bindings/ata/brcm,sata-brcmstb.txt | 4 +-
>> .../bindings/phy/brcm,brcmstb-sata-phy.txt | 1 +
>> drivers/ata/Kconfig | 2 +-
>> drivers/ata/ahci_brcmstb.c | 58 +++++++++++++++++++++-
>> drivers/phy/Kconfig | 4 +-
>> drivers/phy/phy-brcmstb-sata.c | 47 ++++++++++++++----
>> 6 files changed, 100 insertions(+), 16 deletions(-)
>>
>> --
>> 2.6.3
>>
>
>
> --
> Florian
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2015-11-25 9:30 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-11-19 2:41 [v5 0/7] add support SATA for BMIPS_GENERIC Jaedon Shin
2015-11-19 2:41 ` [v5 1/7] ata: ahci_brcmstb: add support MIPS-based platforms Jaedon Shin
2015-11-19 2:41 ` [v5 2/7] ata: ahci_brcmstb: add quirk for broken ncq Jaedon Shin
2015-11-19 18:44 ` Brian Norris
2015-11-19 2:41 ` [v5 3/7] ata: ahci_brcmstb: add quirk for different phy Jaedon Shin
2015-11-19 2:41 ` [v5 4/7] ata: ahci_brcmstb: remove unused definitions Jaedon Shin
2015-11-19 2:41 ` [v5 5/7] phy: phy_brcmstb_sata: remove duplicate definitions Jaedon Shin
2015-11-19 2:41 ` [v5 6/7] phy: phy_brcmstb_sata: add data for phy version Jaedon Shin
2015-11-19 2:41 ` [v5 7/7] phy: phy_brcmstb_sata: add support MIPS-based platforms Jaedon Shin
2015-11-19 13:49 ` Kishon Vijay Abraham I
2015-11-24 23:51 ` [v5 0/7] add support SATA for BMIPS_GENERIC Florian Fainelli
2015-11-25 9:30 ` Jaedon Shin
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