* [PATCH linux] Temporary setup of AST registers until pinmux driver is complete
@ 2015-12-09 7:40 OpenBMC Patches
2015-12-09 7:40 ` [PATCH linux] Temporary AST setup for Palmetto and Barreleye OpenBMC Patches
0 siblings, 1 reply; 3+ messages in thread
From: OpenBMC Patches @ 2015-12-09 7:40 UTC (permalink / raw)
To: openbmc; +Cc: Norman James
Temporarily setup AST registers until pinmux driver is complete
Signed-off-by: Norman James <nkskjames@gmail.com>
https://github.com/openbmc/linux/pull/28
Norman James (1):
Temporary AST setup for Palmetto and Barreleye
arch/arm/mach-aspeed/aspeed.c | 77 +++++++++++++++++++++++++++++++++++++++----
1 file changed, 70 insertions(+), 7 deletions(-)
--
2.6.3
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH linux] Temporary AST setup for Palmetto and Barreleye
2015-12-09 7:40 [PATCH linux] Temporary setup of AST registers until pinmux driver is complete OpenBMC Patches
@ 2015-12-09 7:40 ` OpenBMC Patches
2015-12-10 3:15 ` Joel Stanley
0 siblings, 1 reply; 3+ messages in thread
From: OpenBMC Patches @ 2015-12-09 7:40 UTC (permalink / raw)
To: openbmc; +Cc: Norman James, Norman James
From: Norman James <njames@us.ibm.com>
Removed when pinmux driver is ready.
Signed-off-by: Norman James <nkskjames@gmail.com>
---
arch/arm/mach-aspeed/aspeed.c | 77 +++++++++++++++++++++++++++++++++++++++----
1 file changed, 70 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 7ec9141..65e0f1f 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -103,6 +103,71 @@ static void ast_host_uart_setup(unsigned int speed, unsigned int clock)
ast_uart_out(UART_FCR, 0x7);
}
+static void __init do_common_setup(void)
+{
+ u32 reg;
+
+ /* Enable LPC FWH cycles, Enable LPC to AHB bridge */
+ writel(0x00000500, AST_IO(AST_BASE_LPC | 0x80));
+
+
+ /* Flash controller */
+ writel(0x00000003, AST_IO(AST_BASE_SPI | 0x00));
+ writel(0x00002404, AST_IO(AST_BASE_SPI | 0x04));
+
+ /* set UART routing */
+ writel(0x00000000, AST_IO(AST_BASE_LPC | 0x9c));
+
+ /* SCU setup */
+ writel(0x01C000FF, AST_IO(AST_BASE_SCU | 0x88));
+ writel(0xC1C000FF, AST_IO(AST_BASE_SCU | 0x8c));
+ writel(0x01C0007F, AST_IO(AST_BASE_SCU | 0x88));
+ writel(0x003FA009, AST_IO(AST_BASE_SCU | 0x90));
+
+ /* setup scratch registers */
+ writel(0x00000042, AST_IO(AST_BASE_LPC | 0x170));
+ writel(0x00004000, AST_IO(AST_BASE_LPC | 0x174));
+}
+
+static void __init do_barreleye_setup(void)
+{
+ u32 reg;
+ do_common_setup();
+
+ /* Setup PNOR address mapping for 64M flash */
+ writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88));
+ writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C));
+
+ /* GPIO setup */
+ writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00));
+ writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));
+
+ /*
+ * Do read/modify/write on power gpio
+ * to prevent resetting power on reboot
+ */
+ reg = readl(AST_IO(AST_BASE_GPIO | 0x20));
+ reg |= 0xCFC8F7FD;
+ writel(reg, AST_IO(AST_BASE_GPIO | 0x20));
+ writel(0xC738F20A, AST_IO(AST_BASE_GPIO | 0x24));
+ writel(0x0031FFAF, AST_IO(AST_BASE_GPIO | 0x80));
+}
+
+static void __init do_palmetto_setup(void)
+{
+ do_common_setup();
+
+ /* Setup PNOR address mapping for 32M flash */
+ writel(0x30000E00, AST_IO(AST_BASE_LPC | 0x88));
+ writel(0xFE0001FF, AST_IO(AST_BASE_LPC | 0x8C));
+
+ /* GPIO setup */
+ writel(0x13008CE7, AST_IO(AST_BASE_GPIO | 0x00));
+ writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));
+ writel(0xDF48F7FF, AST_IO(AST_BASE_GPIO | 0x20));
+ writel(0xC738F202, AST_IO(AST_BASE_GPIO | 0x24));
+}
+
#define SCU_PASSWORD 0x1688A8A8
static void __init aspeed_init_early(void)
@@ -127,13 +192,11 @@ static void __init aspeed_init_early(void)
writel(0, AST_IO(AST_BASE_WDT | 0x0c));
writel(0, AST_IO(AST_BASE_WDT | 0x2c));
- /*
- * temporary: enable i2c usage of the shared GPIO/I2C pins for
- * i2c busses 4 - 8
- */
- reg = readl(AST_IO(AST_BASE_SCU | 0x90));
- reg |= 0x3E0000;
- writel(reg, AST_IO(AST_BASE_SCU | 0x90));
+ if (of_machine_is_compatible("rackspace,barreleye-bmc"))
+ do_barreleye_setup();
+ if (of_machine_is_compatible("tyan,palmetto-bmc"))
+ do_palmetto_setup();
+
}
static void __init aspeed_map_io(void)
--
2.6.3
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH linux] Temporary AST setup for Palmetto and Barreleye
2015-12-09 7:40 ` [PATCH linux] Temporary AST setup for Palmetto and Barreleye OpenBMC Patches
@ 2015-12-10 3:15 ` Joel Stanley
0 siblings, 0 replies; 3+ messages in thread
From: Joel Stanley @ 2015-12-10 3:15 UTC (permalink / raw)
To: OpenBMC Patches; +Cc: OpenBMC Maillist, Norman James
On Wed, Dec 9, 2015 at 6:10 PM, OpenBMC Patches
<openbmc-patches@stwcx.xyz> wrote:
> From: Norman James <njames@us.ibm.com>
>
> Removed when pinmux driver is ready.
Thanks Norm. Merged as 6da1b0f7943571e825ad06b3cdb990472cc07d2b.
I've got a question below.
> +static void __init do_common_setup(void)
> +{
> + u32 reg;
This is unused. I fixed it for you.
> +
> + /* Enable LPC FWH cycles, Enable LPC to AHB bridge */
> + writel(0x00000500, AST_IO(AST_BASE_LPC | 0x80));
> +static void __init do_barreleye_setup(void)
> +{
> + u32 reg;
> + do_common_setup();
> +
> + /* Setup PNOR address mapping for 64M flash */
> + writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88));
> + writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C));
> +
> + /* GPIO setup */
> + writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00));
> + writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));
> +
> + /*
> + * Do read/modify/write on power gpio
> + * to prevent resetting power on reboot
> + */
Can you explain to me why we need to do this?
> + reg = readl(AST_IO(AST_BASE_GPIO | 0x20));
> + reg |= 0xCFC8F7FD;
> + writel(reg, AST_IO(AST_BASE_GPIO | 0x20));
> + writel(0xC738F20A, AST_IO(AST_BASE_GPIO | 0x24));
> + writel(0x0031FFAF, AST_IO(AST_BASE_GPIO | 0x80));
> +}
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-12-09 7:40 [PATCH linux] Temporary setup of AST registers until pinmux driver is complete OpenBMC Patches
2015-12-09 7:40 ` [PATCH linux] Temporary AST setup for Palmetto and Barreleye OpenBMC Patches
2015-12-10 3:15 ` Joel Stanley
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