* [PATCH 1/3] drm/i915: Move HAS_PSR definition to the platform definition.
@ 2016-01-05 1:10 Rodrigo Vivi
2016-01-05 1:10 ` [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM " Rodrigo Vivi
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Rodrigo Vivi @ 2016-01-05 1:10 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
No functional changes with this patch. The idea is just to organize
the platform features in a standard place making new platform aditions
easily and possible to see all the present features of the platform on
the intel info dumped information at dmesg.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 3 +++
drivers/gpu/drm/i915/i915_drv.h | 5 ++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3ac616d..6fea26f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -251,6 +251,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
#define VLV_FEATURES \
.gen = 7, .num_pipes = 2, \
+ .has_psr = 1, \
.need_gfx_hws = 1, .has_hotplug = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
.display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -272,6 +273,7 @@ static const struct intel_device_info intel_valleyview_d_info = {
GEN7_FEATURES, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
.has_ddi = 1, \
+ .has_psr = 1, \
.has_fpga_dbg = 1
static const struct intel_device_info intel_haswell_d_info = {
@@ -312,6 +314,7 @@ static const struct intel_device_info intel_cherryview_info = {
.need_gfx_hws = 1, .has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.is_cherryview = 1,
+ .has_psr = 1,
.display_mmio_offset = VLV_DISPLAY_BASE,
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cf7e0fc..20840f0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -763,6 +763,7 @@ struct intel_csr {
func(is_kabylake) sep \
func(is_preliminary) sep \
func(has_fbc) sep \
+ func(has_psr) sep \
func(has_pipe_cxsr) sep \
func(has_hotplug) sep \
func(cursor_needs_physical) sep \
@@ -2604,9 +2605,7 @@ struct drm_i915_cmd_table {
#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
-#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev) || \
- IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
- IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
+#define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr)
#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
--
2.4.3
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM definition to the platform definition. 2016-01-05 1:10 [PATCH 1/3] drm/i915: Move HAS_PSR definition to the platform definition Rodrigo Vivi @ 2016-01-05 1:10 ` Rodrigo Vivi 2016-01-05 10:08 ` Jani Nikula 2016-01-05 1:10 ` [PATCH 3/3] drm/i915: Move HAS_CORE_RING_FREQ " Rodrigo Vivi 2016-01-05 7:49 ` ✗ warning: Fi.CI.BAT Patchwork 2 siblings, 1 reply; 6+ messages in thread From: Rodrigo Vivi @ 2016-01-05 1:10 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi No functional changes with this patch. The idea is just to organize the platform features in a standard place making new platform aditions easily and possible to see all the present features of the platform on the intel info dumped information at dmesg. (I just wonder why Ivy Bridge doesn't have runtime pm. So, let's use this v1 to start the discussion). Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 4 ++++ drivers/gpu/drm/i915/i915_drv.h | 6 ++---- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 6fea26f..cb8adb5 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -217,6 +217,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .gen = 6, .is_mobile = 1, .num_pipes = 2, .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 1, + .has_runtime_pm = 1, .ring_mask = RENDER_RING | BSD_RING | BLT_RING, .has_llc = 1, GEN_DEFAULT_PIPEOFFSETS, @@ -252,6 +253,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { #define VLV_FEATURES \ .gen = 7, .num_pipes = 2, \ .has_psr = 1, \ + .has_runtime_pm = 1, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ @@ -274,6 +276,7 @@ static const struct intel_device_info intel_valleyview_d_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \ .has_ddi = 1, \ .has_psr = 1, \ + .has_runtime_pm = 1,\ .has_fpga_dbg = 1 static const struct intel_device_info intel_haswell_d_info = { @@ -315,6 +318,7 @@ static const struct intel_device_info intel_cherryview_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .is_cherryview = 1, .has_psr = 1, + .has_runtime_pm = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 20840f0..8143a51 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -764,6 +764,7 @@ struct intel_csr { func(is_preliminary) sep \ func(has_fbc) sep \ func(has_psr) sep \ + func(has_runtime_pm) sep \ func(has_pipe_cxsr) sep \ func(has_hotplug) sep \ func(cursor_needs_physical) sep \ @@ -2606,10 +2607,7 @@ struct drm_i915_cmd_table { #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) #define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr) -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ - IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \ - IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \ - IS_KABYLAKE(dev)) +#define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->has_runtime_pm) #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6) #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev)) -- 2.4.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM definition to the platform definition. 2016-01-05 1:10 ` [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM " Rodrigo Vivi @ 2016-01-05 10:08 ` Jani Nikula 0 siblings, 0 replies; 6+ messages in thread From: Jani Nikula @ 2016-01-05 10:08 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi On Tue, 05 Jan 2016, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > No functional changes with this patch. The idea is just to organize > the platform features in a standard place making new platform aditions > easily and possible to see all the present features of the platform on > the intel info dumped information at dmesg. > > (I just wonder why Ivy Bridge doesn't have runtime pm. > So, let's use this v1 to start the discussion). > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 4 ++++ > drivers/gpu/drm/i915/i915_drv.h | 6 ++---- > 2 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 6fea26f..cb8adb5 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -217,6 +217,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { > .gen = 6, .is_mobile = 1, .num_pipes = 2, > .need_gfx_hws = 1, .has_hotplug = 1, > .has_fbc = 1, > + .has_runtime_pm = 1, Missing for sandybridge_d? BR, Jani. > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, > .has_llc = 1, > GEN_DEFAULT_PIPEOFFSETS, > @@ -252,6 +253,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { > #define VLV_FEATURES \ > .gen = 7, .num_pipes = 2, \ > .has_psr = 1, \ > + .has_runtime_pm = 1, \ > .need_gfx_hws = 1, .has_hotplug = 1, \ > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ > .display_mmio_offset = VLV_DISPLAY_BASE, \ > @@ -274,6 +276,7 @@ static const struct intel_device_info intel_valleyview_d_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \ > .has_ddi = 1, \ > .has_psr = 1, \ > + .has_runtime_pm = 1,\ > .has_fpga_dbg = 1 > > static const struct intel_device_info intel_haswell_d_info = { > @@ -315,6 +318,7 @@ static const struct intel_device_info intel_cherryview_info = { > .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, > .is_cherryview = 1, > .has_psr = 1, > + .has_runtime_pm = 1, > .display_mmio_offset = VLV_DISPLAY_BASE, > GEN_CHV_PIPEOFFSETS, > CURSOR_OFFSETS, > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 20840f0..8143a51 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -764,6 +764,7 @@ struct intel_csr { > func(is_preliminary) sep \ > func(has_fbc) sep \ > func(has_psr) sep \ > + func(has_runtime_pm) sep \ > func(has_pipe_cxsr) sep \ > func(has_hotplug) sep \ > func(cursor_needs_physical) sep \ > @@ -2606,10 +2607,7 @@ struct drm_i915_cmd_table { > #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) > #define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr) > -#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \ > - IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \ > - IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \ > - IS_KABYLAKE(dev)) > +#define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->has_runtime_pm) > #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6) > #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev)) -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] drm/i915: Move HAS_CORE_RING_FREQ definition to the platform definition. 2016-01-05 1:10 [PATCH 1/3] drm/i915: Move HAS_PSR definition to the platform definition Rodrigo Vivi 2016-01-05 1:10 ` [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM " Rodrigo Vivi @ 2016-01-05 1:10 ` Rodrigo Vivi 2016-01-05 10:13 ` Jani Nikula 2016-01-05 7:49 ` ✗ warning: Fi.CI.BAT Patchwork 2 siblings, 1 reply; 6+ messages in thread From: Rodrigo Vivi @ 2016-01-05 1:10 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi No functional changes with this patch. The idea is just to organize the platform features in a standard place making new platform aditions easily and possible to see all the present features of the platform on the intel info dumped information at dmesg. Also for this one it is better to put the ones that support than skip for every atom based platform. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 5 ++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index cb8adb5..ed34164 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -218,6 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .need_gfx_hws = 1, .has_hotplug = 1, .has_fbc = 1, .has_runtime_pm = 1, + .has_core_ring_freq = 1, .ring_mask = RENDER_RING | BSD_RING | BLT_RING, .has_llc = 1, GEN_DEFAULT_PIPEOFFSETS, @@ -228,6 +229,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .gen = 7, .num_pipes = 3, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .has_fbc = 1, \ + .has_core_ring_freq = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_llc = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 8143a51..cb08d7d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -765,6 +765,7 @@ struct intel_csr { func(has_fbc) sep \ func(has_psr) sep \ func(has_runtime_pm) sep \ + func(has_core_ring_freq) sep \ func(has_pipe_cxsr) sep \ func(has_hotplug) sep \ func(cursor_needs_physical) sep \ @@ -2619,9 +2620,7 @@ struct drm_i915_cmd_table { #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \ INTEL_INFO(dev)->gen >= 8) -#define HAS_CORE_RING_FREQ(dev) (INTEL_INFO(dev)->gen >= 6 && \ - !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \ - !IS_BROXTON(dev)) +#define HAS_CORE_RING_FREQ(dev) (INTEL_INFO(dev)->has_core_ring_freq) #define INTEL_PCH_DEVICE_ID_MASK 0xff00 #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 -- 2.4.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 3/3] drm/i915: Move HAS_CORE_RING_FREQ definition to the platform definition. 2016-01-05 1:10 ` [PATCH 3/3] drm/i915: Move HAS_CORE_RING_FREQ " Rodrigo Vivi @ 2016-01-05 10:13 ` Jani Nikula 0 siblings, 0 replies; 6+ messages in thread From: Jani Nikula @ 2016-01-05 10:13 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi On Tue, 05 Jan 2016, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > No functional changes with this patch. The idea is just to organize > the platform features in a standard place making new platform aditions > easily and possible to see all the present features of the platform on > the intel info dumped information at dmesg. > > Also for this one it is better to put the ones that support than > skip for every atom based platform. > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 2 ++ > drivers/gpu/drm/i915/i915_drv.h | 5 ++--- > 2 files changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index cb8adb5..ed34164 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -218,6 +218,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { > .need_gfx_hws = 1, .has_hotplug = 1, > .has_fbc = 1, > .has_runtime_pm = 1, > + .has_core_ring_freq = 1, Missing for sandybridge_d? BR, Jani. > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, > .has_llc = 1, > GEN_DEFAULT_PIPEOFFSETS, > @@ -228,6 +229,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { > .gen = 7, .num_pipes = 3, \ > .need_gfx_hws = 1, .has_hotplug = 1, \ > .has_fbc = 1, \ > + .has_core_ring_freq = 1, \ > .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ > .has_llc = 1, \ > GEN_DEFAULT_PIPEOFFSETS, \ > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 8143a51..cb08d7d 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -765,6 +765,7 @@ struct intel_csr { > func(has_fbc) sep \ > func(has_psr) sep \ > func(has_runtime_pm) sep \ > + func(has_core_ring_freq) sep \ > func(has_pipe_cxsr) sep \ > func(has_hotplug) sep \ > func(cursor_needs_physical) sep \ > @@ -2619,9 +2620,7 @@ struct drm_i915_cmd_table { > #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \ > INTEL_INFO(dev)->gen >= 8) > > -#define HAS_CORE_RING_FREQ(dev) (INTEL_INFO(dev)->gen >= 6 && \ > - !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \ > - !IS_BROXTON(dev)) > +#define HAS_CORE_RING_FREQ(dev) (INTEL_INFO(dev)->has_core_ring_freq) > > #define INTEL_PCH_DEVICE_ID_MASK 0xff00 > #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* ✗ warning: Fi.CI.BAT 2016-01-05 1:10 [PATCH 1/3] drm/i915: Move HAS_PSR definition to the platform definition Rodrigo Vivi 2016-01-05 1:10 ` [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM " Rodrigo Vivi 2016-01-05 1:10 ` [PATCH 3/3] drm/i915: Move HAS_CORE_RING_FREQ " Rodrigo Vivi @ 2016-01-05 7:49 ` Patchwork 2 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2016-01-05 7:49 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx == Summary == Built on 0417da5e6f56078d87d366d5f959f8290ae9d16d drm-intel-nightly: 2016y-01m-04d-14h-05m-39s UTC integration manifest Test gem_storedw_loop: Subgroup basic-render: dmesg-warn -> PASS (skl-i5k-2) pass -> DMESG-WARN (skl-i7k-2) Test kms_flip: Subgroup basic-flip-vs-dpms: dmesg-warn -> PASS (ilk-hp8440p) Subgroup basic-flip-vs-modeset: pass -> DMESG-WARN (skl-i5k-2) dmesg-warn -> PASS (hsw-brixbox) pass -> DMESG-WARN (bdw-nuci7) Subgroup basic-plain-flip: dmesg-warn -> PASS (skl-i5k-2) pass -> DMESG-WARN (snb-dellxps) dmesg-warn -> PASS (bdw-ultra) Test kms_pipe_crc_basic: Subgroup read-crc-pipe-b: dmesg-warn -> PASS (snb-dellxps) Subgroup read-crc-pipe-c: pass -> DMESG-WARN (skl-i7k-2) Subgroup suspend-read-crc-pipe-b: dmesg-warn -> PASS (snb-x220t) Test kms_psr_sink_crc: Subgroup psr_basic: pass -> DMESG-WARN (bdw-ultra) Test pm_rpm: Subgroup basic-pci-d3-state: pass -> SKIP (snb-dellxps) Subgroup basic-rte: pass -> SKIP (snb-dellxps) bdw-nuci7 total:132 pass:121 dwarn:2 dfail:0 fail:0 skip:9 bdw-ultra total:132 pass:124 dwarn:2 dfail:0 fail:0 skip:6 bsw-nuc-2 total:135 pass:114 dwarn:1 dfail:0 fail:0 skip:20 hsw-brixbox total:135 pass:127 dwarn:1 dfail:0 fail:0 skip:7 hsw-gt2 total:135 pass:130 dwarn:1 dfail:0 fail:0 skip:4 ilk-hp8440p total:135 pass:100 dwarn:0 dfail:0 fail:0 skip:35 ivb-t430s total:135 pass:127 dwarn:2 dfail:0 fail:0 skip:6 skl-i5k-2 total:135 pass:124 dwarn:3 dfail:0 fail:0 skip:8 skl-i7k-2 total:135 pass:123 dwarn:4 dfail:0 fail:0 skip:8 snb-dellxps total:135 pass:119 dwarn:2 dfail:0 fail:0 skip:14 snb-x220t total:135 pass:122 dwarn:1 dfail:0 fail:1 skip:11 Results at /archive/results/CI_IGT_test/Patchwork_1077/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-01-05 10:13 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-01-05 1:10 [PATCH 1/3] drm/i915: Move HAS_PSR definition to the platform definition Rodrigo Vivi 2016-01-05 1:10 ` [PATCH 2/3] drm/i915: Move HAS_RUNTIME_PM " Rodrigo Vivi 2016-01-05 10:08 ` Jani Nikula 2016-01-05 1:10 ` [PATCH 3/3] drm/i915: Move HAS_CORE_RING_FREQ " Rodrigo Vivi 2016-01-05 10:13 ` Jani Nikula 2016-01-05 7:49 ` ✗ warning: Fi.CI.BAT Patchwork
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