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* [PATCH 0/6] Add support for MAXIM MAX77620/MAX20024 PMIC
@ 2016-01-07 14:38 ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan

Add SW support for MAXIM Semiconductor's Power Management
IC (PMIC) MAX77620/MAX20024. This PMIC supports DC-DC/LDOS, GPIOs,
RTC, watchdog, clocks etc.

This series add respective driver for each of sub-modules.

Laxman Dewangan (6):
  DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  mfd: max77620: add core driver for MAX77620/MAX20024
  pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
  gpio: max77620: add gpio driver for MAX77620/MAX20024
  rtc: max77620: add support for max77620/max20024 RTC driver
  regulator: max77620: add regulator driver for max77620/max20024

 Documentation/devicetree/bindings/mfd/max77620.txt |  383 +++++++
 drivers/gpio/Kconfig                               |    9 +
 drivers/gpio/Makefile                              |    1 +
 drivers/gpio/gpio-max77620.c                       |  330 ++++++
 drivers/mfd/Kconfig                                |   15 +
 drivers/mfd/Makefile                               |    1 +
 drivers/mfd/max77620.c                             |  926 +++++++++++++++++
 drivers/pinctrl/Kconfig                            |   10 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/pinctrl-max77620.c                 |  700 +++++++++++++
 drivers/regulator/Kconfig                          |    9 +
 drivers/regulator/Makefile                         |    1 +
 drivers/regulator/max77620-regulator.c             | 1062 ++++++++++++++++++++
 drivers/rtc/Kconfig                                |    9 +
 drivers/rtc/Makefile                               |    1 +
 drivers/rtc/rtc-max77620.c                         |  574 +++++++++++
 include/dt-bindings/mfd/max77620.h                 |   38 +
 include/linux/mfd/max77620.h                       |  503 +++++++++
 18 files changed, 4573 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
 create mode 100644 drivers/gpio/gpio-max77620.c
 create mode 100644 drivers/mfd/max77620.c
 create mode 100644 drivers/pinctrl/pinctrl-max77620.c
 create mode 100644 drivers/regulator/max77620-regulator.c
 create mode 100644 drivers/rtc/rtc-max77620.c
 create mode 100644 include/dt-bindings/mfd/max77620.h
 create mode 100644 include/linux/mfd/max77620.h

-- 
2.1.4


^ permalink raw reply	[flat|nested] 103+ messages in thread

* [PATCH 0/6] Add support for MAXIM MAX77620/MAX20024 PMIC
@ 2016-01-07 14:38 ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan

Add SW support for MAXIM Semiconductor's Power Management
IC (PMIC) MAX77620/MAX20024. This PMIC supports DC-DC/LDOS, GPIOs,
RTC, watchdog, clocks etc.

This series add respective driver for each of sub-modules.

Laxman Dewangan (6):
  DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  mfd: max77620: add core driver for MAX77620/MAX20024
  pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
  gpio: max77620: add gpio driver for MAX77620/MAX20024
  rtc: max77620: add support for max77620/max20024 RTC driver
  regulator: max77620: add regulator driver for max77620/max20024

 Documentation/devicetree/bindings/mfd/max77620.txt |  383 +++++++
 drivers/gpio/Kconfig                               |    9 +
 drivers/gpio/Makefile                              |    1 +
 drivers/gpio/gpio-max77620.c                       |  330 ++++++
 drivers/mfd/Kconfig                                |   15 +
 drivers/mfd/Makefile                               |    1 +
 drivers/mfd/max77620.c                             |  926 +++++++++++++++++
 drivers/pinctrl/Kconfig                            |   10 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/pinctrl-max77620.c                 |  700 +++++++++++++
 drivers/regulator/Kconfig                          |    9 +
 drivers/regulator/Makefile                         |    1 +
 drivers/regulator/max77620-regulator.c             | 1062 ++++++++++++++++++++
 drivers/rtc/Kconfig                                |    9 +
 drivers/rtc/Makefile                               |    1 +
 drivers/rtc/rtc-max77620.c                         |  574 +++++++++++
 include/dt-bindings/mfd/max77620.h                 |   38 +
 include/linux/mfd/max77620.h                       |  503 +++++++++
 18 files changed, 4573 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
 create mode 100644 drivers/gpio/gpio-max77620.c
 create mode 100644 drivers/mfd/max77620.c
 create mode 100644 drivers/pinctrl/pinctrl-max77620.c
 create mode 100644 drivers/regulator/max77620-regulator.c
 create mode 100644 drivers/rtc/rtc-max77620.c
 create mode 100644 include/dt-bindings/mfd/max77620.h
 create mode 100644 include/linux/mfd/max77620.h

-- 
2.1.4


^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 0/6] Add support for MAXIM MAX77620/MAX20024 PMIC
@ 2016-01-07 14:38 ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan

Add SW support for MAXIM Semiconductor's Power Management
IC (PMIC) MAX77620/MAX20024. This PMIC supports DC-DC/LDOS, GPIOs,
RTC, watchdog, clocks etc.

This series add respective driver for each of sub-modules.

Laxman Dewangan (6):
  DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  mfd: max77620: add core driver for MAX77620/MAX20024
  pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
  gpio: max77620: add gpio driver for MAX77620/MAX20024
  rtc: max77620: add support for max77620/max20024 RTC driver
  regulator: max77620: add regulator driver for max77620/max20024

 Documentation/devicetree/bindings/mfd/max77620.txt |  383 +++++++
 drivers/gpio/Kconfig                               |    9 +
 drivers/gpio/Makefile                              |    1 +
 drivers/gpio/gpio-max77620.c                       |  330 ++++++
 drivers/mfd/Kconfig                                |   15 +
 drivers/mfd/Makefile                               |    1 +
 drivers/mfd/max77620.c                             |  926 +++++++++++++++++
 drivers/pinctrl/Kconfig                            |   10 +
 drivers/pinctrl/Makefile                           |    1 +
 drivers/pinctrl/pinctrl-max77620.c                 |  700 +++++++++++++
 drivers/regulator/Kconfig                          |    9 +
 drivers/regulator/Makefile                         |    1 +
 drivers/regulator/max77620-regulator.c             | 1062 ++++++++++++++++++++
 drivers/rtc/Kconfig                                |    9 +
 drivers/rtc/Makefile                               |    1 +
 drivers/rtc/rtc-max77620.c                         |  574 +++++++++++
 include/dt-bindings/mfd/max77620.h                 |   38 +
 include/linux/mfd/max77620.h                       |  503 +++++++++
 18 files changed, 4573 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
 create mode 100644 drivers/gpio/gpio-max77620.c
 create mode 100644 drivers/mfd/max77620.c
 create mode 100644 drivers/pinctrl/pinctrl-max77620.c
 create mode 100644 drivers/regulator/max77620-regulator.c
 create mode 100644 drivers/rtc/rtc-max77620.c
 create mode 100644 include/dt-bindings/mfd/max77620.h
 create mode 100644 include/linux/mfd/max77620.h

-- 
2.1.4

-- 
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  2016-01-07 14:38 ` Laxman Dewangan
  (?)
@ 2016-01-07 14:38   ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan

The MAXIM PMIC MAX77620 and MAX20024 are power management IC
which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
watchdog etc.

Add DT binding document for the different functionality of
this device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
 Documentation/devicetree/bindings/mfd/max77620.txt | 383 +++++++++++++++++++++
 include/dt-bindings/mfd/max77620.h                 |  38 ++
 2 files changed, 421 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
 create mode 100644 include/dt-bindings/mfd/max77620.h

diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documentation/devicetree/bindings/mfd/max77620.txt
new file mode 100644
index 0000000..09cff4a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77620.txt
@@ -0,0 +1,383 @@
+* MAX77620 Power management IC from Maxim Semiconductor.
+
+Required properties:
+-------------------
+- compatible: Must be one of
+		"maxim,max77620" or
+		"maxim,max20024".
+- reg: I2C device address.
+- interrupt-controller: MAX77620 has internal interrupt controller which
+  takes the interrupt request from internal sub-blocks like RTC,
+  regulators, GPIOs as well as external input.
+- #interrupt-cells: Should be set to 2 for IRQ number and flags.
+  The first cell is the IRQ number. IRQ numbers for different interrupt
+  source of MAX77620 are defined at dt-bindings/mfd/max77620.h
+  The second cell is the flags, encoded as the trigger masks from binding
+  document interrupts.txt, using dt-bindings/irq.
+
+Optional properties:
+-------------------
+This device also supports the power OFF of system.
+Following properties are used for this purpose:
+- system-power-controller: Boolean, This device will be use as
+	system power controller and used for power OFF of system.
+	Host issue necessary command to PMIC.
+
+
+Optional submodule and their properties:
+=======================================
+
+Flexible power sequence configuration
+====================================
+This sub-node configures the Flexible Power Sequnece(FPS) for power ON slot,
+power OFF slot and slot period of the device. Device has 3 FPS as FPS0,
+FPS1 and FPS2. The details of FPS configuration is provided through
+subnode "fps". The details of FPS0, FPS1, FPS2 are provided through the
+child node under this subnodes. The FPS number is provided via reg property.
+
+The property for fps child nodes as:
+Required properties:
+	-reg: FPS number like 0, 1, 2 for FPS0, FPS1 and FPS2 respectively.
+Optinal properties:
+	-maxim,active-fps-time-period: Active state FPS time period.
+	-maxim,suspend-fps-time-period: Suspend state FPS time period.
+	-maxim,fps-enable-input: FPS enable source like EN0, EN1 or SW. The
+			macros are defined on dt-bindings/mfd/max77620.h for
+			different enable source.
+				FPS_EN_SRC_EN0 for EN0 enable source.
+				FPS_EN_SRC_EN1 for En1 enable source.
+				FPS_EN_SRC_SW for SW based control.
+	-maxim,fps-sw-enable: Boolean, applicable if enable input is SW.
+			If this property present then enable the FPS else
+			disable FPS.
+	-maxim,enable-sleep: Enable sleep when the external control goes from
+			HIGH to LOW.
+	-maxim,enable-global-lpm: Enable global LPM when the external control
+			goes from HIGH to LOW.
+
+Pinmux and GPIO:
+===============
+Device has 8 GPIO pins which can be configured as GPIO as well as the
+special IO functions.
+
+Please refer to pinctrl-bindings.txt for details of the common pinctrl
+bindings used by client devices, including the meaning of the phrase
+"pin configuration node".
+
+Following are properties which is needed if GPIO and pinmux functionality
+is required:
+    Required properties:
+    -------------------
+	- gpio-controller: Marks the device node as a GPIO controller.
+	- #gpio-cells: Number of GPIO cells. Refer to binding document
+			gpio/gpio.txt
+
+    Optional properties:
+    --------------------
+	Following properties are require if pin control setting is required
+	at boot.
+	- pinctrl-names: A pinctrl state named "default" be defined, using
+		the bindings in pinctrl/pinctrl-binding.txt.
+	- pinctrl[0...n]: Properties to contain the phandle that refer to
+		different nodes of pin control settings. These nodes
+		represents the pin control setting of state 0 to state n.
+		Each of these nodes contains different subnodes to
+		represents some desired configuration for a list of pins.
+		This configuration can include the mux function to select
+		on those pin(s), and various pin configuration parameters,
+		such as pull-up, open drain.
+
+		Each subnode have following properties:
+		Required properties:
+		    - pins: List of pins. Valid values of pins properties
+				are: gpio0, gpio1, gpio2, gpio3, gpio4,
+				gpio5, gpio6, gpio7
+
+		Optional properties:
+			function, drive-push-pull, drive-open-drain,
+			bias-pull-up, bias-pull-down.
+				Definitions are in the pinmux dt binding
+			devicetree/bindings/pinctrl/pinctrl-bindings.txt
+			Absence of properties will leave the configuration
+			on default.
+
+			Valid values for function properties are:
+				gpio, lpm-control-in, fps-out, 32k-out,
+				sd0-dvs-in, sd1-dvs-in, reference-out
+			Theres is also customised property for the GPIO1,
+				GPIO2 and GPIO3.
+			- maxim,active-fps-source: FPS source for the gpios in
+				active state of the GPIO. Valid values are
+				FPS_SRC_0, FPS_SRC_1, FPS_SRC_2 and
+				FPS_SRC_NONE. Absence of this property will
+				leave the pin on default.
+			- maxim,active-fps-power-up-slot: Power up slot on
+				given FPS for acive state.Valid values are 0
+				to 7.
+			- maxim,active-fps-power-down-slot: Power down slot
+				on given FPS for active state. Valid values
+				are 0 t  7.
+			- maxim,suspend-fps-source: Suspend state FPS source.
+			- maxim,suspend-fps-power-down-slot: Suspend state
+				power down slot.
+			- maxim,suspend-fps-power-up-slot: Suspend state power
+				up slot.
+
+Regulators:
+===========
+Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The node "regulators"
+is require if regulator functionality is needed.
+
+Following are properties of regulator subnode.
+
+    Optional properties:
+    -------------------
+	The input supply of regulators are the optional properties on the
+	regulator node. The input supply of these regulators are provided
+	through following properties:
+		in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
+		in-sd1-supply: Input supply for SD1.
+		in-sd2-supply: Input supply for SD2.
+		in-sd3-supply: Input supply for SD3.
+		in-ldo0-1-supply: Input supply for LDO0 and LDO1.
+		in-ldo2-supply: Input supply for LDO2.
+		in-ldo3-5-supply: Input supply for LDO3 and LDO5
+		in-ldo4-6-supply: Input supply for LDO4 and LDO6.
+		in-ldo7-8-supply: Input supply for LDO7 and LDO8.
+
+
+    Optional sub nodes for regulators:
+    ---------------------------------
+	The subnodes name is the name of regulator and it must be one of:
+	sd[0-3], ldo[0-8]
+
+	Each sub-node should contain the constraints and initialization
+	information for that regulator. See regulator.txt for a description
+	of standard properties for these sub-nodes.
+	Additional optional custom properties  are listed below.
+		maxim,active-fps-source: FPS source. The macros are defined at
+			dt-bindings/mfd/max77620.h
+		maxim,shutdown-fps-source: Same as maxim,fps-source, but it
+			will apply during shutdown of system.
+		maxim,active-fps-power-up-slot: Active state Power up slot for
+			rail on given FPS.
+		maxim,active-fps-power-down-slot: Active state Power down slot
+			for rail on given FPS.
+		maxim,suspend-fps-source: Suspend state FPS source of rail.
+		maxim,suspend-fps-power-up-slot: Suspend state FPS power
+			up slot.
+		maxim,suspend-fps-power-down-slot: Suspend state FPS power
+			down slot.
+		maxim,enable-group-low-power: Enable Group low power mode.
+		maxim,enable-sd0-en2-control: Enable EN2 pincontrol for SD0.
+			This property is only applicable for SD0.
+		maxim,disable-remote-sense-on-suspend: Boolean, disable
+			remote sense on suspend and re-enable on resume.
+			If this property is not there then no change on
+			configuration.
+
+Backup Battery:
+==============
+This sub-node configure charging backup battery of the device. Device
+has support of charging the backup battery. The subnode name is
+"backup-battery".
+
+The property for backup-battery child nodes as:
+Presense of this child node will enable the backup battery charging.
+
+Optinal properties:
+	-maxim,backup-battery-charging-current: Charging current setting.
+			The device supports 50/100/200/400/600/800uA.
+			If this property is unavailable then it will
+			charge with 50uA.
+	-maxim,backup-battery-charging-voltage: Charging Voltage Limit Setting.
+			Device supports 2500000/3000000/3300000/350000uV.
+			Default will be set to 2500mV. The voltage will be roundoff
+			to nearest lower side if other than above is configured.
+	-maxim,backup-battery-output-resister: Output resistor on Ohm.
+			Device supports 100/1000/3000/6000 Ohms.
+
+Low-Battery Monitor:
+==================
+This sub-node configure low battery monitor configuration registers.
+Device has support for low-battery monitor configuration through
+child DT node "low-battery-monitor".
+
+Optinal properties:
+	- maxim,low-battery-dac-enable: Enable low battery DAC.
+	- maxim,low-battery-dac-disable: Disable low battery DAC.
+	- maxim,low-battery-shutdown-enable: Enable low battery shutdown.
+	- maxim,low-battery-shutdown-disable: Disable low battery shutdown.
+	- maxim,low-battery-reset-enable: Enable low battery reset.
+	- maxim,low-battery-reset-disable: Disable low battery reset.
+
+Example:
+--------
+#include <dt-bindings/mfd/max77620.h>
+...
+max77620@3c {
+	compatible = "maxim,max77620";
+	reg = <0x3c>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <0 86 IRQ_TYPE_NONE>;
+
+
+Example:
+--------
+#include <dt-bindings/mfd/max77620.h>
+...
+max77620@3c {
+	compatible = "maxim,max77620";
+	reg = <0x3c>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <0 86 IRQ_TYPE_NONE>;
+
+	interrupt-controller;
+	#interrupt-cells = <2>;
+
+	gpio-controller;
+	#gpio-cells = <2>;
+
+	backup-battery {
+		maxim,backup-battery-charging-current = <100>;
+		maxim,backup-battery-charging-voltage = <3000000>;
+		maxim,backup-battery-output-resister = <100>;
+	};
+
+	fps {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		fps@0 {
+			reg = <0>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_EN0>;
+		};
+
+		fps@1 {
+			reg = <1>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_EN1>;
+		};
+
+		fps@2 {
+			reg = <2>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_SW>;
+		};
+	};
+
+	regulators {
+		in-ldo0-1-supply = <&max77620_sd2>;
+		in-ldo7-8-supply = <&max77620_sd2>;
+
+		max77620_sd0: sd0 {
+			regulator-name = "vdd-core";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1400000>;
+			regulator-boot-on;
+			regulator-always-on;
+			maxim,fps-source = <FPS_SRC_1>;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+		};
+
+		max77620_sd1: sd1 {
+			regulator-name = "vddio-ddr";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+			maxim,fps-source = <FPS_SRC_0>;
+		};
+
+		max77620_sd2: sd2 {
+			regulator-name = "vdd-pre-reg";
+			regulator-min-microvolt = <1350000>;
+			regulator-max-microvolt = <1350000>;
+			maxim,fps-source = <FPS_SRC_1>;
+		};
+
+		max77620_sd3: sd3 {
+			regulator-name = "vdd-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_0>;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+		};
+
+		max77620_ldo0: ldo0 {
+			regulator-name = "avdd-sys";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo1: ldo1 {
+			regulator-name = "vdd-pex";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo2: ldo2 {
+			regulator-name = "vddio-sdmmc3";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo3: ldo3 {
+			regulator-name = "vdd-cam-hv";
+			regulator-min-microvolt = <2800000>;
+			regulator-max-microvolt = <2800000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo4: ldo4 {
+			regulator-name = "vdd-rtc";
+			regulator-min-microvolt = <1250000>;
+			regulator-max-microvolt = <1250000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_0>;
+		};
+
+		max77620_ldo5: ldo5 {
+			regulator-name = "avdd-ts-hv";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo6: ldo6 {
+			regulator-name = "vdd-ts";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo7: ldo7 {
+			regulator-name = "vdd-gen-pll-edp";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_1>;
+		};
+
+		max77620_ldo8: ldo8 {
+			regulator-name = "vdd-hdmi-dp";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+	};
+};
diff --git a/include/dt-bindings/mfd/max77620.h b/include/dt-bindings/mfd/max77620.h
new file mode 100644
index 0000000..8423d1d
--- /dev/null
+++ b/include/dt-bindings/mfd/max77620.h
@@ -0,0 +1,38 @@
+/*
+ * This header provides macros for MAXIM MAX77620 device bindings.
+ *
+ * Copyright (c) 2016, NVIDIA Corporation.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ */
+
+#ifndef _DT_BINDINGS_MFD_MAX77620_H
+#define _DT_BINDINGS_MFD_MAX77620_H
+
+/* MAX77620 interrupts */
+#define MAX77620_IRQ_TOP_GLBL		0 /* Low-Battery */
+#define MAX77620_IRQ_TOP_SD		1 /* SD power fail */
+#define MAX77620_IRQ_TOP_LDO		2 /* LDO power fail */
+#define MAX77620_IRQ_TOP_GPIO		3 /* GPIO internal int to MAX77620 */
+#define MAX77620_IRQ_TOP_RTC		4 /* RTC */
+#define MAX77620_IRQ_TOP_32K		5 /* 32kHz oscillator */
+#define MAX77620_IRQ_TOP_ONOFF		6 /* ON/OFF oscillator */
+#define MAX77620_IRQ_LBT_MBATLOW	7 /* Thermal alarm status, > 120C */
+#define MAX77620_IRQ_LBT_TJALRM1	8 /* Thermal alarm status, > 120C */
+#define MAX77620_IRQ_LBT_TJALRM2	9 /* Thermal alarm status, > 140C */
+
+/* FPS enable -inputs */
+#define FPS_EN_SRC_EN0	0
+#define FPS_EN_SRC_EN1	1
+#define FPS_EN_SRC_SW	2
+#define FPS_EN_SRC_RSVD	3
+
+/* FPS source */
+#define FPS_SRC_0	0
+#define FPS_SRC_1	1
+#define FPS_SRC_2	2
+#define FPS_SRC_NONE	3
+#define FPS_SRC_DEF	4
+
+#endif
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan

The MAXIM PMIC MAX77620 and MAX20024 are power management IC
which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
watchdog etc.

Add DT binding document for the different functionality of
this device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
 Documentation/devicetree/bindings/mfd/max77620.txt | 383 +++++++++++++++++++++
 include/dt-bindings/mfd/max77620.h                 |  38 ++
 2 files changed, 421 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
 create mode 100644 include/dt-bindings/mfd/max77620.h

diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documentation/devicetree/bindings/mfd/max77620.txt
new file mode 100644
index 0000000..09cff4a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77620.txt
@@ -0,0 +1,383 @@
+* MAX77620 Power management IC from Maxim Semiconductor.
+
+Required properties:
+-------------------
+- compatible: Must be one of
+		"maxim,max77620" or
+		"maxim,max20024".
+- reg: I2C device address.
+- interrupt-controller: MAX77620 has internal interrupt controller which
+  takes the interrupt request from internal sub-blocks like RTC,
+  regulators, GPIOs as well as external input.
+- #interrupt-cells: Should be set to 2 for IRQ number and flags.
+  The first cell is the IRQ number. IRQ numbers for different interrupt
+  source of MAX77620 are defined at dt-bindings/mfd/max77620.h
+  The second cell is the flags, encoded as the trigger masks from binding
+  document interrupts.txt, using dt-bindings/irq.
+
+Optional properties:
+-------------------
+This device also supports the power OFF of system.
+Following properties are used for this purpose:
+- system-power-controller: Boolean, This device will be use as
+	system power controller and used for power OFF of system.
+	Host issue necessary command to PMIC.
+
+
+Optional submodule and their properties:
+=======================================
+
+Flexible power sequence configuration
+====================================
+This sub-node configures the Flexible Power Sequnece(FPS) for power ON slot,
+power OFF slot and slot period of the device. Device has 3 FPS as FPS0,
+FPS1 and FPS2. The details of FPS configuration is provided through
+subnode "fps". The details of FPS0, FPS1, FPS2 are provided through the
+child node under this subnodes. The FPS number is provided via reg property.
+
+The property for fps child nodes as:
+Required properties:
+	-reg: FPS number like 0, 1, 2 for FPS0, FPS1 and FPS2 respectively.
+Optinal properties:
+	-maxim,active-fps-time-period: Active state FPS time period.
+	-maxim,suspend-fps-time-period: Suspend state FPS time period.
+	-maxim,fps-enable-input: FPS enable source like EN0, EN1 or SW. The
+			macros are defined on dt-bindings/mfd/max77620.h for
+			different enable source.
+				FPS_EN_SRC_EN0 for EN0 enable source.
+				FPS_EN_SRC_EN1 for En1 enable source.
+				FPS_EN_SRC_SW for SW based control.
+	-maxim,fps-sw-enable: Boolean, applicable if enable input is SW.
+			If this property present then enable the FPS else
+			disable FPS.
+	-maxim,enable-sleep: Enable sleep when the external control goes from
+			HIGH to LOW.
+	-maxim,enable-global-lpm: Enable global LPM when the external control
+			goes from HIGH to LOW.
+
+Pinmux and GPIO:
+===============
+Device has 8 GPIO pins which can be configured as GPIO as well as the
+special IO functions.
+
+Please refer to pinctrl-bindings.txt for details of the common pinctrl
+bindings used by client devices, including the meaning of the phrase
+"pin configuration node".
+
+Following are properties which is needed if GPIO and pinmux functionality
+is required:
+    Required properties:
+    -------------------
+	- gpio-controller: Marks the device node as a GPIO controller.
+	- #gpio-cells: Number of GPIO cells. Refer to binding document
+			gpio/gpio.txt
+
+    Optional properties:
+    --------------------
+	Following properties are require if pin control setting is required
+	at boot.
+	- pinctrl-names: A pinctrl state named "default" be defined, using
+		the bindings in pinctrl/pinctrl-binding.txt.
+	- pinctrl[0...n]: Properties to contain the phandle that refer to
+		different nodes of pin control settings. These nodes
+		represents the pin control setting of state 0 to state n.
+		Each of these nodes contains different subnodes to
+		represents some desired configuration for a list of pins.
+		This configuration can include the mux function to select
+		on those pin(s), and various pin configuration parameters,
+		such as pull-up, open drain.
+
+		Each subnode have following properties:
+		Required properties:
+		    - pins: List of pins. Valid values of pins properties
+				are: gpio0, gpio1, gpio2, gpio3, gpio4,
+				gpio5, gpio6, gpio7
+
+		Optional properties:
+			function, drive-push-pull, drive-open-drain,
+			bias-pull-up, bias-pull-down.
+				Definitions are in the pinmux dt binding
+			devicetree/bindings/pinctrl/pinctrl-bindings.txt
+			Absence of properties will leave the configuration
+			on default.
+
+			Valid values for function properties are:
+				gpio, lpm-control-in, fps-out, 32k-out,
+				sd0-dvs-in, sd1-dvs-in, reference-out
+			Theres is also customised property for the GPIO1,
+				GPIO2 and GPIO3.
+			- maxim,active-fps-source: FPS source for the gpios in
+				active state of the GPIO. Valid values are
+				FPS_SRC_0, FPS_SRC_1, FPS_SRC_2 and
+				FPS_SRC_NONE. Absence of this property will
+				leave the pin on default.
+			- maxim,active-fps-power-up-slot: Power up slot on
+				given FPS for acive state.Valid values are 0
+				to 7.
+			- maxim,active-fps-power-down-slot: Power down slot
+				on given FPS for active state. Valid values
+				are 0 t  7.
+			- maxim,suspend-fps-source: Suspend state FPS source.
+			- maxim,suspend-fps-power-down-slot: Suspend state
+				power down slot.
+			- maxim,suspend-fps-power-up-slot: Suspend state power
+				up slot.
+
+Regulators:
+===========
+Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The node "regulators"
+is require if regulator functionality is needed.
+
+Following are properties of regulator subnode.
+
+    Optional properties:
+    -------------------
+	The input supply of regulators are the optional properties on the
+	regulator node. The input supply of these regulators are provided
+	through following properties:
+		in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
+		in-sd1-supply: Input supply for SD1.
+		in-sd2-supply: Input supply for SD2.
+		in-sd3-supply: Input supply for SD3.
+		in-ldo0-1-supply: Input supply for LDO0 and LDO1.
+		in-ldo2-supply: Input supply for LDO2.
+		in-ldo3-5-supply: Input supply for LDO3 and LDO5
+		in-ldo4-6-supply: Input supply for LDO4 and LDO6.
+		in-ldo7-8-supply: Input supply for LDO7 and LDO8.
+
+
+    Optional sub nodes for regulators:
+    ---------------------------------
+	The subnodes name is the name of regulator and it must be one of:
+	sd[0-3], ldo[0-8]
+
+	Each sub-node should contain the constraints and initialization
+	information for that regulator. See regulator.txt for a description
+	of standard properties for these sub-nodes.
+	Additional optional custom properties  are listed below.
+		maxim,active-fps-source: FPS source. The macros are defined at
+			dt-bindings/mfd/max77620.h
+		maxim,shutdown-fps-source: Same as maxim,fps-source, but it
+			will apply during shutdown of system.
+		maxim,active-fps-power-up-slot: Active state Power up slot for
+			rail on given FPS.
+		maxim,active-fps-power-down-slot: Active state Power down slot
+			for rail on given FPS.
+		maxim,suspend-fps-source: Suspend state FPS source of rail.
+		maxim,suspend-fps-power-up-slot: Suspend state FPS power
+			up slot.
+		maxim,suspend-fps-power-down-slot: Suspend state FPS power
+			down slot.
+		maxim,enable-group-low-power: Enable Group low power mode.
+		maxim,enable-sd0-en2-control: Enable EN2 pincontrol for SD0.
+			This property is only applicable for SD0.
+		maxim,disable-remote-sense-on-suspend: Boolean, disable
+			remote sense on suspend and re-enable on resume.
+			If this property is not there then no change on
+			configuration.
+
+Backup Battery:
+==============
+This sub-node configure charging backup battery of the device. Device
+has support of charging the backup battery. The subnode name is
+"backup-battery".
+
+The property for backup-battery child nodes as:
+Presense of this child node will enable the backup battery charging.
+
+Optinal properties:
+	-maxim,backup-battery-charging-current: Charging current setting.
+			The device supports 50/100/200/400/600/800uA.
+			If this property is unavailable then it will
+			charge with 50uA.
+	-maxim,backup-battery-charging-voltage: Charging Voltage Limit Setting.
+			Device supports 2500000/3000000/3300000/350000uV.
+			Default will be set to 2500mV. The voltage will be roundoff
+			to nearest lower side if other than above is configured.
+	-maxim,backup-battery-output-resister: Output resistor on Ohm.
+			Device supports 100/1000/3000/6000 Ohms.
+
+Low-Battery Monitor:
+==================
+This sub-node configure low battery monitor configuration registers.
+Device has support for low-battery monitor configuration through
+child DT node "low-battery-monitor".
+
+Optinal properties:
+	- maxim,low-battery-dac-enable: Enable low battery DAC.
+	- maxim,low-battery-dac-disable: Disable low battery DAC.
+	- maxim,low-battery-shutdown-enable: Enable low battery shutdown.
+	- maxim,low-battery-shutdown-disable: Disable low battery shutdown.
+	- maxim,low-battery-reset-enable: Enable low battery reset.
+	- maxim,low-battery-reset-disable: Disable low battery reset.
+
+Example:
+--------
+#include <dt-bindings/mfd/max77620.h>
+...
+max77620@3c {
+	compatible = "maxim,max77620";
+	reg = <0x3c>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <0 86 IRQ_TYPE_NONE>;
+
+
+Example:
+--------
+#include <dt-bindings/mfd/max77620.h>
+...
+max77620@3c {
+	compatible = "maxim,max77620";
+	reg = <0x3c>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <0 86 IRQ_TYPE_NONE>;
+
+	interrupt-controller;
+	#interrupt-cells = <2>;
+
+	gpio-controller;
+	#gpio-cells = <2>;
+
+	backup-battery {
+		maxim,backup-battery-charging-current = <100>;
+		maxim,backup-battery-charging-voltage = <3000000>;
+		maxim,backup-battery-output-resister = <100>;
+	};
+
+	fps {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		fps@0 {
+			reg = <0>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_EN0>;
+		};
+
+		fps@1 {
+			reg = <1>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_EN1>;
+		};
+
+		fps@2 {
+			reg = <2>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_SW>;
+		};
+	};
+
+	regulators {
+		in-ldo0-1-supply = <&max77620_sd2>;
+		in-ldo7-8-supply = <&max77620_sd2>;
+
+		max77620_sd0: sd0 {
+			regulator-name = "vdd-core";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1400000>;
+			regulator-boot-on;
+			regulator-always-on;
+			maxim,fps-source = <FPS_SRC_1>;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+		};
+
+		max77620_sd1: sd1 {
+			regulator-name = "vddio-ddr";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+			maxim,fps-source = <FPS_SRC_0>;
+		};
+
+		max77620_sd2: sd2 {
+			regulator-name = "vdd-pre-reg";
+			regulator-min-microvolt = <1350000>;
+			regulator-max-microvolt = <1350000>;
+			maxim,fps-source = <FPS_SRC_1>;
+		};
+
+		max77620_sd3: sd3 {
+			regulator-name = "vdd-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_0>;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+		};
+
+		max77620_ldo0: ldo0 {
+			regulator-name = "avdd-sys";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo1: ldo1 {
+			regulator-name = "vdd-pex";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo2: ldo2 {
+			regulator-name = "vddio-sdmmc3";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo3: ldo3 {
+			regulator-name = "vdd-cam-hv";
+			regulator-min-microvolt = <2800000>;
+			regulator-max-microvolt = <2800000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo4: ldo4 {
+			regulator-name = "vdd-rtc";
+			regulator-min-microvolt = <1250000>;
+			regulator-max-microvolt = <1250000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_0>;
+		};
+
+		max77620_ldo5: ldo5 {
+			regulator-name = "avdd-ts-hv";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo6: ldo6 {
+			regulator-name = "vdd-ts";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo7: ldo7 {
+			regulator-name = "vdd-gen-pll-edp";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_1>;
+		};
+
+		max77620_ldo8: ldo8 {
+			regulator-name = "vdd-hdmi-dp";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+	};
+};
diff --git a/include/dt-bindings/mfd/max77620.h b/include/dt-bindings/mfd/max77620.h
new file mode 100644
index 0000000..8423d1d
--- /dev/null
+++ b/include/dt-bindings/mfd/max77620.h
@@ -0,0 +1,38 @@
+/*
+ * This header provides macros for MAXIM MAX77620 device bindings.
+ *
+ * Copyright (c) 2016, NVIDIA Corporation.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ */
+
+#ifndef _DT_BINDINGS_MFD_MAX77620_H
+#define _DT_BINDINGS_MFD_MAX77620_H
+
+/* MAX77620 interrupts */
+#define MAX77620_IRQ_TOP_GLBL		0 /* Low-Battery */
+#define MAX77620_IRQ_TOP_SD		1 /* SD power fail */
+#define MAX77620_IRQ_TOP_LDO		2 /* LDO power fail */
+#define MAX77620_IRQ_TOP_GPIO		3 /* GPIO internal int to MAX77620 */
+#define MAX77620_IRQ_TOP_RTC		4 /* RTC */
+#define MAX77620_IRQ_TOP_32K		5 /* 32kHz oscillator */
+#define MAX77620_IRQ_TOP_ONOFF		6 /* ON/OFF oscillator */
+#define MAX77620_IRQ_LBT_MBATLOW	7 /* Thermal alarm status, > 120C */
+#define MAX77620_IRQ_LBT_TJALRM1	8 /* Thermal alarm status, > 120C */
+#define MAX77620_IRQ_LBT_TJALRM2	9 /* Thermal alarm status, > 140C */
+
+/* FPS enable -inputs */
+#define FPS_EN_SRC_EN0	0
+#define FPS_EN_SRC_EN1	1
+#define FPS_EN_SRC_SW	2
+#define FPS_EN_SRC_RSVD	3
+
+/* FPS source */
+#define FPS_SRC_0	0
+#define FPS_SRC_1	1
+#define FPS_SRC_2	2
+#define FPS_SRC_NONE	3
+#define FPS_SRC_DEF	4
+
+#endif
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan

The MAXIM PMIC MAX77620 and MAX20024 are power management IC
which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
watchdog etc.

Add DT binding document for the different functionality of
this device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
 Documentation/devicetree/bindings/mfd/max77620.txt | 383 +++++++++++++++++++++
 include/dt-bindings/mfd/max77620.h                 |  38 ++
 2 files changed, 421 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
 create mode 100644 include/dt-bindings/mfd/max77620.h

diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documentation/devicetree/bindings/mfd/max77620.txt
new file mode 100644
index 0000000..09cff4a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77620.txt
@@ -0,0 +1,383 @@
+* MAX77620 Power management IC from Maxim Semiconductor.
+
+Required properties:
+-------------------
+- compatible: Must be one of
+		"maxim,max77620" or
+		"maxim,max20024".
+- reg: I2C device address.
+- interrupt-controller: MAX77620 has internal interrupt controller which
+  takes the interrupt request from internal sub-blocks like RTC,
+  regulators, GPIOs as well as external input.
+- #interrupt-cells: Should be set to 2 for IRQ number and flags.
+  The first cell is the IRQ number. IRQ numbers for different interrupt
+  source of MAX77620 are defined at dt-bindings/mfd/max77620.h
+  The second cell is the flags, encoded as the trigger masks from binding
+  document interrupts.txt, using dt-bindings/irq.
+
+Optional properties:
+-------------------
+This device also supports the power OFF of system.
+Following properties are used for this purpose:
+- system-power-controller: Boolean, This device will be use as
+	system power controller and used for power OFF of system.
+	Host issue necessary command to PMIC.
+
+
+Optional submodule and their properties:
+=======================================
+
+Flexible power sequence configuration
+====================================
+This sub-node configures the Flexible Power Sequnece(FPS) for power ON slot,
+power OFF slot and slot period of the device. Device has 3 FPS as FPS0,
+FPS1 and FPS2. The details of FPS configuration is provided through
+subnode "fps". The details of FPS0, FPS1, FPS2 are provided through the
+child node under this subnodes. The FPS number is provided via reg property.
+
+The property for fps child nodes as:
+Required properties:
+	-reg: FPS number like 0, 1, 2 for FPS0, FPS1 and FPS2 respectively.
+Optinal properties:
+	-maxim,active-fps-time-period: Active state FPS time period.
+	-maxim,suspend-fps-time-period: Suspend state FPS time period.
+	-maxim,fps-enable-input: FPS enable source like EN0, EN1 or SW. The
+			macros are defined on dt-bindings/mfd/max77620.h for
+			different enable source.
+				FPS_EN_SRC_EN0 for EN0 enable source.
+				FPS_EN_SRC_EN1 for En1 enable source.
+				FPS_EN_SRC_SW for SW based control.
+	-maxim,fps-sw-enable: Boolean, applicable if enable input is SW.
+			If this property present then enable the FPS else
+			disable FPS.
+	-maxim,enable-sleep: Enable sleep when the external control goes from
+			HIGH to LOW.
+	-maxim,enable-global-lpm: Enable global LPM when the external control
+			goes from HIGH to LOW.
+
+Pinmux and GPIO:
+===============
+Device has 8 GPIO pins which can be configured as GPIO as well as the
+special IO functions.
+
+Please refer to pinctrl-bindings.txt for details of the common pinctrl
+bindings used by client devices, including the meaning of the phrase
+"pin configuration node".
+
+Following are properties which is needed if GPIO and pinmux functionality
+is required:
+    Required properties:
+    -------------------
+	- gpio-controller: Marks the device node as a GPIO controller.
+	- #gpio-cells: Number of GPIO cells. Refer to binding document
+			gpio/gpio.txt
+
+    Optional properties:
+    --------------------
+	Following properties are require if pin control setting is required
+	at boot.
+	- pinctrl-names: A pinctrl state named "default" be defined, using
+		the bindings in pinctrl/pinctrl-binding.txt.
+	- pinctrl[0...n]: Properties to contain the phandle that refer to
+		different nodes of pin control settings. These nodes
+		represents the pin control setting of state 0 to state n.
+		Each of these nodes contains different subnodes to
+		represents some desired configuration for a list of pins.
+		This configuration can include the mux function to select
+		on those pin(s), and various pin configuration parameters,
+		such as pull-up, open drain.
+
+		Each subnode have following properties:
+		Required properties:
+		    - pins: List of pins. Valid values of pins properties
+				are: gpio0, gpio1, gpio2, gpio3, gpio4,
+				gpio5, gpio6, gpio7
+
+		Optional properties:
+			function, drive-push-pull, drive-open-drain,
+			bias-pull-up, bias-pull-down.
+				Definitions are in the pinmux dt binding
+			devicetree/bindings/pinctrl/pinctrl-bindings.txt
+			Absence of properties will leave the configuration
+			on default.
+
+			Valid values for function properties are:
+				gpio, lpm-control-in, fps-out, 32k-out,
+				sd0-dvs-in, sd1-dvs-in, reference-out
+			Theres is also customised property for the GPIO1,
+				GPIO2 and GPIO3.
+			- maxim,active-fps-source: FPS source for the gpios in
+				active state of the GPIO. Valid values are
+				FPS_SRC_0, FPS_SRC_1, FPS_SRC_2 and
+				FPS_SRC_NONE. Absence of this property will
+				leave the pin on default.
+			- maxim,active-fps-power-up-slot: Power up slot on
+				given FPS for acive state.Valid values are 0
+				to 7.
+			- maxim,active-fps-power-down-slot: Power down slot
+				on given FPS for active state. Valid values
+				are 0 t  7.
+			- maxim,suspend-fps-source: Suspend state FPS source.
+			- maxim,suspend-fps-power-down-slot: Suspend state
+				power down slot.
+			- maxim,suspend-fps-power-up-slot: Suspend state power
+				up slot.
+
+Regulators:
+===========
+Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The node "regulators"
+is require if regulator functionality is needed.
+
+Following are properties of regulator subnode.
+
+    Optional properties:
+    -------------------
+	The input supply of regulators are the optional properties on the
+	regulator node. The input supply of these regulators are provided
+	through following properties:
+		in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
+		in-sd1-supply: Input supply for SD1.
+		in-sd2-supply: Input supply for SD2.
+		in-sd3-supply: Input supply for SD3.
+		in-ldo0-1-supply: Input supply for LDO0 and LDO1.
+		in-ldo2-supply: Input supply for LDO2.
+		in-ldo3-5-supply: Input supply for LDO3 and LDO5
+		in-ldo4-6-supply: Input supply for LDO4 and LDO6.
+		in-ldo7-8-supply: Input supply for LDO7 and LDO8.
+
+
+    Optional sub nodes for regulators:
+    ---------------------------------
+	The subnodes name is the name of regulator and it must be one of:
+	sd[0-3], ldo[0-8]
+
+	Each sub-node should contain the constraints and initialization
+	information for that regulator. See regulator.txt for a description
+	of standard properties for these sub-nodes.
+	Additional optional custom properties  are listed below.
+		maxim,active-fps-source: FPS source. The macros are defined at
+			dt-bindings/mfd/max77620.h
+		maxim,shutdown-fps-source: Same as maxim,fps-source, but it
+			will apply during shutdown of system.
+		maxim,active-fps-power-up-slot: Active state Power up slot for
+			rail on given FPS.
+		maxim,active-fps-power-down-slot: Active state Power down slot
+			for rail on given FPS.
+		maxim,suspend-fps-source: Suspend state FPS source of rail.
+		maxim,suspend-fps-power-up-slot: Suspend state FPS power
+			up slot.
+		maxim,suspend-fps-power-down-slot: Suspend state FPS power
+			down slot.
+		maxim,enable-group-low-power: Enable Group low power mode.
+		maxim,enable-sd0-en2-control: Enable EN2 pincontrol for SD0.
+			This property is only applicable for SD0.
+		maxim,disable-remote-sense-on-suspend: Boolean, disable
+			remote sense on suspend and re-enable on resume.
+			If this property is not there then no change on
+			configuration.
+
+Backup Battery:
+==============
+This sub-node configure charging backup battery of the device. Device
+has support of charging the backup battery. The subnode name is
+"backup-battery".
+
+The property for backup-battery child nodes as:
+Presense of this child node will enable the backup battery charging.
+
+Optinal properties:
+	-maxim,backup-battery-charging-current: Charging current setting.
+			The device supports 50/100/200/400/600/800uA.
+			If this property is unavailable then it will
+			charge with 50uA.
+	-maxim,backup-battery-charging-voltage: Charging Voltage Limit Setting.
+			Device supports 2500000/3000000/3300000/350000uV.
+			Default will be set to 2500mV. The voltage will be roundoff
+			to nearest lower side if other than above is configured.
+	-maxim,backup-battery-output-resister: Output resistor on Ohm.
+			Device supports 100/1000/3000/6000 Ohms.
+
+Low-Battery Monitor:
+==================
+This sub-node configure low battery monitor configuration registers.
+Device has support for low-battery monitor configuration through
+child DT node "low-battery-monitor".
+
+Optinal properties:
+	- maxim,low-battery-dac-enable: Enable low battery DAC.
+	- maxim,low-battery-dac-disable: Disable low battery DAC.
+	- maxim,low-battery-shutdown-enable: Enable low battery shutdown.
+	- maxim,low-battery-shutdown-disable: Disable low battery shutdown.
+	- maxim,low-battery-reset-enable: Enable low battery reset.
+	- maxim,low-battery-reset-disable: Disable low battery reset.
+
+Example:
+--------
+#include <dt-bindings/mfd/max77620.h>
+...
+max77620@3c {
+	compatible = "maxim,max77620";
+	reg = <0x3c>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <0 86 IRQ_TYPE_NONE>;
+
+
+Example:
+--------
+#include <dt-bindings/mfd/max77620.h>
+...
+max77620@3c {
+	compatible = "maxim,max77620";
+	reg = <0x3c>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <0 86 IRQ_TYPE_NONE>;
+
+	interrupt-controller;
+	#interrupt-cells = <2>;
+
+	gpio-controller;
+	#gpio-cells = <2>;
+
+	backup-battery {
+		maxim,backup-battery-charging-current = <100>;
+		maxim,backup-battery-charging-voltage = <3000000>;
+		maxim,backup-battery-output-resister = <100>;
+	};
+
+	fps {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		fps@0 {
+			reg = <0>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_EN0>;
+		};
+
+		fps@1 {
+			reg = <1>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_EN1>;
+		};
+
+		fps@2 {
+			reg = <2>;
+			maxim,fps-time-period = <100>;
+			maxim,fps-enable-input = <FPS_EN_SRC_SW>;
+		};
+	};
+
+	regulators {
+		in-ldo0-1-supply = <&max77620_sd2>;
+		in-ldo7-8-supply = <&max77620_sd2>;
+
+		max77620_sd0: sd0 {
+			regulator-name = "vdd-core";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1400000>;
+			regulator-boot-on;
+			regulator-always-on;
+			maxim,fps-source = <FPS_SRC_1>;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+		};
+
+		max77620_sd1: sd1 {
+			regulator-name = "vddio-ddr";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+			maxim,fps-source = <FPS_SRC_0>;
+		};
+
+		max77620_sd2: sd2 {
+			regulator-name = "vdd-pre-reg";
+			regulator-min-microvolt = <1350000>;
+			regulator-max-microvolt = <1350000>;
+			maxim,fps-source = <FPS_SRC_1>;
+		};
+
+		max77620_sd3: sd3 {
+			regulator-name = "vdd-1v8";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_0>;
+			regulator-init-mode = <REGULATOR_MODE_NORMAL>;
+		};
+
+		max77620_ldo0: ldo0 {
+			regulator-name = "avdd-sys";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo1: ldo1 {
+			regulator-name = "vdd-pex";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo2: ldo2 {
+			regulator-name = "vddio-sdmmc3";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo3: ldo3 {
+			regulator-name = "vdd-cam-hv";
+			regulator-min-microvolt = <2800000>;
+			regulator-max-microvolt = <2800000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo4: ldo4 {
+			regulator-name = "vdd-rtc";
+			regulator-min-microvolt = <1250000>;
+			regulator-max-microvolt = <1250000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_0>;
+		};
+
+		max77620_ldo5: ldo5 {
+			regulator-name = "avdd-ts-hv";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo6: ldo6 {
+			regulator-name = "vdd-ts";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+
+		max77620_ldo7: ldo7 {
+			regulator-name = "vdd-gen-pll-edp";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			regulator-always-on;
+			regulator-boot-on;
+			maxim,fps-source = <FPS_SRC_1>;
+		};
+
+		max77620_ldo8: ldo8 {
+			regulator-name = "vdd-hdmi-dp";
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			maxim,fps-source = <FPS_SRC_NONE>;
+		};
+	};
+};
diff --git a/include/dt-bindings/mfd/max77620.h b/include/dt-bindings/mfd/max77620.h
new file mode 100644
index 0000000..8423d1d
--- /dev/null
+++ b/include/dt-bindings/mfd/max77620.h
@@ -0,0 +1,38 @@
+/*
+ * This header provides macros for MAXIM MAX77620 device bindings.
+ *
+ * Copyright (c) 2016, NVIDIA Corporation.
+ *
+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ */
+
+#ifndef _DT_BINDINGS_MFD_MAX77620_H
+#define _DT_BINDINGS_MFD_MAX77620_H
+
+/* MAX77620 interrupts */
+#define MAX77620_IRQ_TOP_GLBL		0 /* Low-Battery */
+#define MAX77620_IRQ_TOP_SD		1 /* SD power fail */
+#define MAX77620_IRQ_TOP_LDO		2 /* LDO power fail */
+#define MAX77620_IRQ_TOP_GPIO		3 /* GPIO internal int to MAX77620 */
+#define MAX77620_IRQ_TOP_RTC		4 /* RTC */
+#define MAX77620_IRQ_TOP_32K		5 /* 32kHz oscillator */
+#define MAX77620_IRQ_TOP_ONOFF		6 /* ON/OFF oscillator */
+#define MAX77620_IRQ_LBT_MBATLOW	7 /* Thermal alarm status, > 120C */
+#define MAX77620_IRQ_LBT_TJALRM1	8 /* Thermal alarm status, > 120C */
+#define MAX77620_IRQ_LBT_TJALRM2	9 /* Thermal alarm status, > 140C */
+
+/* FPS enable -inputs */
+#define FPS_EN_SRC_EN0	0
+#define FPS_EN_SRC_EN1	1
+#define FPS_EN_SRC_SW	2
+#define FPS_EN_SRC_RSVD	3
+
+/* FPS source */
+#define FPS_SRC_0	0
+#define FPS_SRC_1	1
+#define FPS_SRC_2	2
+#define FPS_SRC_NONE	3
+#define FPS_SRC_DEF	4
+
+#endif
-- 
2.1.4

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^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-07 14:38 ` Laxman Dewangan
  (?)
@ 2016-01-07 14:38   ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

MAX77620/MAX20024 are Power Management IC from the MAXIM.
It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
watchdog, clock etc.

Add MFD drier to provides common support for accessing the
device; additional drivers is developed on respected subsystem
in order to use the functionality of the device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/mfd/Kconfig          |  15 +
 drivers/mfd/Makefile         |   1 +
 drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
 4 files changed, 1445 insertions(+)
 create mode 100644 drivers/mfd/max77620.c
 create mode 100644 include/linux/mfd/max77620.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 9581ebb..edeb85c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -492,6 +492,21 @@ config MFD_MAX14577
 	  additional drivers must be enabled in order to use the functionality
 	  of the device.
 
+config MFD_MAX77620
+	bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support"
+	depends on I2C=y
+	depends on OF
+	select MFD_CORE
+	select REGMAP_I2C
+	select REGMAP_IRQ
+	select IRQ_DOMAIN
+	help
+	  Say yes here to add support for Maxim Semiconductor MAX77620 and
+	  MAX20024 which are Power Management IC with General purpose pins,
+	  RTC, regulators, clock generator, watchdog etc. This driver
+	  provides common support for accessing the device; additional drivers
+	  must be enabled in order to use the functionality of the device.
+
 config MFD_MAX77686
 	bool "Maxim Semiconductor MAX77686/802 PMIC Support"
 	depends on I2C=y
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0f230a6..97910ed 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -123,6 +123,7 @@ obj-$(CONFIG_MFD_DA9063)	+= da9063.o
 obj-$(CONFIG_MFD_DA9150)	+= da9150-core.o
 
 obj-$(CONFIG_MFD_MAX14577)	+= max14577.o
+obj-$(CONFIG_MFD_MAX77620)	+= max77620.o
 obj-$(CONFIG_MFD_MAX77686)	+= max77686.o
 obj-$(CONFIG_MFD_MAX77693)	+= max77693.o
 obj-$(CONFIG_MFD_MAX77843)	+= max77843.o
diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c
new file mode 100644
index 0000000..5f59279
--- /dev/null
+++ b/drivers/mfd/max77620.c
@@ -0,0 +1,926 @@
+/*
+ * Maxim MAX77620 MFD Driver
+ *
+ * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author:
+ *		Laxman Dewangan <ldewangan@nvidia.com>
+ *		Chaitanya Bandi <bandik@nvidia.com>
+ *		Mallikarjun Kasoju <mkasoju@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/ratelimit.h>
+#include <linux/kthread.h>
+#include <linux/mfd/core.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+
+#include <linux/mfd/max77620.h>
+
+static struct resource gpio_resources[] = {
+	{
+		.start	= MAX77620_IRQ_TOP_GPIO,
+		.end	= MAX77620_IRQ_TOP_GPIO,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static struct resource rtc_resources[] = {
+	{
+		.start	= MAX77620_IRQ_TOP_RTC,
+		.end	= MAX77620_IRQ_TOP_RTC,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static struct resource thermal_resources[] = {
+	{
+		.start	= MAX77620_IRQ_LBT_TJALRM1,
+		.end	= MAX77620_IRQ_LBT_TJALRM1,
+		.flags  = IORESOURCE_IRQ,
+	},
+	{
+		.start	= MAX77620_IRQ_LBT_TJALRM2,
+		.end	= MAX77620_IRQ_LBT_TJALRM2,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static const struct regmap_irq max77620_top_irqs[] = {
+	[MAX77620_IRQ_TOP_GLBL] = {
+		.mask = MAX77620_IRQ_TOP_GLBL_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_SD] = {
+		.mask = MAX77620_IRQ_TOP_SD_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_LDO] = {
+		.mask = MAX77620_IRQ_TOP_LDO_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_GPIO] = {
+		.mask = MAX77620_IRQ_TOP_GPIO_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_RTC] = {
+		.mask = MAX77620_IRQ_TOP_RTC_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_32K] = {
+		.mask = MAX77620_IRQ_TOP_32K_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_ONOFF] = {
+		.mask = MAX77620_IRQ_TOP_ONOFF_MASK,
+		.reg_offset = 0,
+	},
+
+	[MAX77620_IRQ_LBT_MBATLOW] = {
+		.mask = MAX77620_IRQ_LBM_MASK,
+		.reg_offset = 1,
+	},
+	[MAX77620_IRQ_LBT_TJALRM1] = {
+		.mask = MAX77620_IRQ_TJALRM1_MASK,
+		.reg_offset = 1,
+	},
+	[MAX77620_IRQ_LBT_TJALRM2] = {
+		.mask = MAX77620_IRQ_TJALRM2_MASK,
+		.reg_offset = 1,
+	},
+
+};
+
+static const char * const max77620_nverc[] = {
+	"Shutdown-pin",
+	"System WatchDog Timer",
+	"Hard Reset",
+	"Junction Temp Overload",
+	"Main-Battery Low",
+	"Main-Battery overvoltage Lockout",
+	"Main-Battery undervoltage Lockout",
+	"Reset input",
+};
+
+enum max77660_ids {
+	MAX77620_PMIC_ID,
+	MAX77620_GPIO_ID,
+	MAX77620_RTC_ID,
+	MAX77620_PINCTRL_ID,
+	MAX77620_CLK_ID,
+	MAX77620_POWER_OFF_ID,
+	MAX77620_WDT_ID,
+	MAX77620_THERMAL_ID,
+};
+
+#define MAX77620_SUB_MODULE_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max77620-"#_name,			\
+		.num_resources	= ARRAY_SIZE(_name##_resources), \
+		.resources	= &_name##_resources[0],	\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX20024_SUB_MODULE_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max20024-"#_name,			\
+		.num_resources	= ARRAY_SIZE(_name##_resources), \
+		.resources	= &_name##_resources[0],	\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX77620_SUB_MODULE_NO_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max77620-"#_name,			\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX20024_SUB_MODULE_NO_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max20024-"#_name,			\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+static struct mfd_cell max77620_children[] = {
+	MAX77620_SUB_MODULE_RES(gpio, GPIO),
+	MAX77620_SUB_MODULE_NO_RES(pmic, PMIC),
+	MAX77620_SUB_MODULE_RES(rtc, RTC),
+	MAX77620_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
+	MAX77620_SUB_MODULE_NO_RES(clk, CLK),
+	MAX77620_SUB_MODULE_NO_RES(power-off, POWER_OFF),
+	MAX77620_SUB_MODULE_NO_RES(wdt, WDT),
+	MAX77620_SUB_MODULE_RES(thermal, THERMAL),
+};
+
+static struct mfd_cell max20024_children[] = {
+	MAX20024_SUB_MODULE_RES(gpio, GPIO),
+	MAX20024_SUB_MODULE_NO_RES(pmic, PMIC),
+	MAX20024_SUB_MODULE_RES(rtc, RTC),
+	MAX20024_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
+	MAX20024_SUB_MODULE_NO_RES(clk, CLK),
+	MAX20024_SUB_MODULE_NO_RES(power-off, POWER_OFF),
+	MAX20024_SUB_MODULE_NO_RES(wdt, WDT),
+	MAX20024_SUB_MODULE_RES(thermal, THERMAL),
+};
+
+struct max77620_sub_modules {
+	struct mfd_cell *cells;
+	int ncells;
+	u32 id;
+};
+
+static const struct max77620_sub_modules max77620_cells = {
+	.cells = max77620_children,
+	.ncells = ARRAY_SIZE(max77620_children),
+	.id = MAX77620,
+};
+
+static const struct max77620_sub_modules  max20024_cells = {
+	.cells = max20024_children,
+	.ncells = ARRAY_SIZE(max20024_children),
+	.id = MAX20024,
+};
+
+static const struct of_device_id max77620_of_match[] = {
+	{
+		.compatible = "maxim,max77620",
+		.data = &max77620_cells,
+	}, {
+		.compatible = "maxim,max20024",
+		.data = &max20024_cells,
+	}, {
+	},
+};
+MODULE_DEVICE_TABLE(of, max77620_of_match);
+
+static struct regmap_irq_chip max77620_top_irq_chip = {
+	.name = "max77620-top",
+	.irqs = max77620_top_irqs,
+	.num_irqs = ARRAY_SIZE(max77620_top_irqs),
+	.num_regs = 2,
+	.status_base = MAX77620_REG_IRQTOP,
+	.mask_base = MAX77620_REG_IRQTOPM,
+};
+
+static const struct regmap_range max77620_readable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+};
+
+static const struct regmap_access_table max77620_readable_table = {
+	.yes_ranges = max77620_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max77620_readable_ranges),
+};
+
+static const struct regmap_range max20024_readable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+	regmap_reg_range(MAX20024_REG_MAX_ADD, MAX20024_REG_MAX_ADD),
+};
+
+static const struct regmap_access_table max20024_readable_table = {
+	.yes_ranges = max20024_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max20024_readable_ranges),
+};
+
+static const struct regmap_range max77620_writable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+};
+
+static const struct regmap_access_table max77620_writable_table = {
+	.yes_ranges = max77620_writable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max77620_writable_ranges),
+};
+
+static const struct regmap_range max77620_cacheable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_SD0_CFG, MAX77620_REG_LDO_CFG3),
+	regmap_reg_range(MAX77620_REG_FPS_CFG0, MAX77620_REG_FPS_SD3),
+};
+
+static const struct regmap_access_table max77620_volatile_table = {
+	.no_ranges = max77620_cacheable_ranges,
+	.n_no_ranges = ARRAY_SIZE(max77620_cacheable_ranges),
+};
+
+static struct regmap_config max77620_regmap_config[] = {
+	[MAX77620_PWR_SLAVE] = {
+		.reg_bits = 8,
+		.val_bits = 8,
+		.max_register = MAX77620_REG_DVSSD4 + 1,
+		.cache_type = REGCACHE_RBTREE,
+		.rd_table = &max77620_readable_table,
+		.wr_table = &max77620_writable_table,
+		.volatile_table = &max77620_volatile_table,
+	},
+	[MAX77620_RTC_SLAVE] = {
+		.reg_bits = 8,
+		.val_bits = 8,
+		.max_register = 0x1b,
+	},
+};
+
+static int max77620_slave_address[MAX77620_NUM_SLAVES] = {
+	MAX77620_PWR_I2C_ADDR,
+	MAX77620_RTC_I2C_ADDR,
+};
+
+static int max77620_initialise_fps(struct max77620_chip *chip,
+			struct device *dev)
+{
+	struct device_node *node;
+	struct device_node *child;
+	u32 reg, pval;
+	int ret;
+	int time_period = 40;
+	int input_enable = 2;
+	bool enable_fps = false;
+	unsigned int mask;
+	unsigned int config;
+	int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
+	int i;
+
+	node = of_get_child_by_name(dev->of_node, "fps");
+	if (!node)
+		goto skip_fps;
+
+	for (reg = 0; reg < 3; ++reg) {
+		chip->active_fps_period[reg] = -1;
+		chip->suspend_fps_period[reg] = -1;
+	}
+
+	for_each_child_of_node(node, child) {
+		ret = of_property_read_u32(child, "reg", &reg);
+		if (ret) {
+			dev_err(dev, "node %s does not have reg property\n",
+					child->name);
+			continue;
+		}
+		if (reg > 2) {
+			dev_err(dev, "FPS%d is not supported\n", reg);
+			continue;
+		}
+
+		mask = 0;
+		ret = of_property_read_u32(child,
+				"maxim,active-fps-time-period", &pval);
+		if (!ret) {
+			time_period = min(pval, 5120U);
+			mask |= MAX77620_FPS_TIME_PERIOD_MASK;
+			chip->active_fps_period[reg] = time_period;
+		}
+
+		ret = of_property_read_u32(child,
+					"maxim,suspend-fps-time-period", &pval);
+		if (!ret)
+			chip->suspend_fps_period[reg] = min(pval, 5120U);
+
+		ret = of_property_read_u32(child, "maxim,fps-enable-input",
+						&pval);
+		if (!ret) {
+			if (pval > 2) {
+				dev_err(dev,
+				    "FPS enable-input %u is not supported\n",
+					pval);
+			} else {
+				input_enable = pval;
+				mask |= MAX77620_FPS_EN_SRC_MASK;
+			}
+		}
+
+		if (input_enable == 2) {
+			enable_fps = of_property_read_bool(child,
+						"maxim,fps-sw-enable");
+			mask |= MAX77620_FPS_ENFPS_MASK;
+		}
+
+		if (!chip->sleep_enable)
+			chip->sleep_enable = of_property_read_bool(child,
+						"maxim,enable-sleep");
+		if (!chip->enable_global_lpm)
+			chip->enable_global_lpm = of_property_read_bool(child,
+						"maxim,enable-global-lpm");
+
+		for (i = 0; i < 0x7; ++i) {
+			int x = base_fps_time * BIT(i);
+
+			if (x >= time_period)
+				break;
+		}
+		config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
+		config |= (input_enable & 0x3) << MAX77620_FPS_EN_SRC_SHIFT;
+		if (enable_fps)
+			config |= 1;
+		ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+				MAX77620_REG_FPS_CFG0 + reg, mask, config);
+		if (ret < 0) {
+			dev_err(dev, "Reg 0x%02x write failed: %d\n",
+				MAX77620_REG_FPS_CFG0 + reg, ret);
+			return ret;
+		}
+	}
+
+	config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2,
+			MAX77620_ONOFFCNFG2_SLP_LPM_MSK, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 update failed: %d\n", ret);
+		return ret;
+	}
+
+skip_fps:
+	/* Enable wake on EN0 pin */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
+			MAX77620_ONOFFCNFG2_WK_EN0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	if (!chip->sleep_enable)
+		chip->sleep_enable = of_property_read_bool(dev->of_node,
+						"maxim,enable-sleep");
+
+	/* For MAX20024, SLPEN will be POR reset if CLRSE is b11 */
+	if ((chip->id == MAX20024) && chip->sleep_enable) {
+		config = MAX77620_ONOFFCNFG1_SLPEN | MAX20024_ONOFFCNFG1_CLRSE;
+		ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, config, config);
+		if (ret < 0) {
+			dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static int max77620_init_backup_battery_charging(struct max77620_chip *chip,
+		struct device *dev)
+{
+	struct device_node *np;
+	u32 pval;
+	u8 config;
+	int charging_current;
+	int charging_voltage;
+	int resistor;
+	int ret;
+
+	np = of_get_child_by_name(dev->of_node, "backup-battery");
+	if (!np) {
+		dev_info(dev, "Backup battery charging support disabled\n");
+		max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_ENABLE, 0);
+		return 0;
+	}
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-charging-current", &pval);
+	charging_current = (!ret) ? pval : 50;
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-charging-voltage", &pval);
+	charging_voltage = (!ret) ? pval : 2500000;
+	charging_voltage /= 1000;
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-output-resister", &pval);
+	resistor = (!ret) ? pval : 1000;
+
+	config = MAX77620_CNFGBBC_ENABLE;
+	if (charging_current <= 50)
+		config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 100)
+		config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 200)
+		config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 400)
+		config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 600)
+		config |= 1 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else
+		config |= 2 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+
+	if (charging_current > 100)
+		config |= MAX77620_CNFGBBC_LOW_CURRENT_ENABLE;
+
+	if (charging_voltage <= 2500)
+		config |= 0 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else if (charging_voltage <= 3000)
+		config |= 1 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else if (charging_voltage <= 3300)
+		config |= 2 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else
+		config |= 3 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+
+	if (resistor <= 100)
+		config |= 0 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 1000)
+		config |= 1 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 3000)
+		config |= 2 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 6000)
+		config |= 3 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+
+	ret = max77620_reg_write(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGBBC, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg 0x%02x write failed: %d\n",
+			MAX77620_REG_CNFGBBC, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_init_low_battery_monitor(struct max77620_chip *chip,
+		struct device *dev)
+{
+	struct device_node *np;
+	bool pval;
+	u8 mask = 0;
+	u8 val = 0;
+	int ret;
+
+
+	np = of_get_child_by_name(dev->of_node, "low-battery-monitor");
+	if (!np)
+		return 0;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-dac-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
+		val |= MAX77620_CNFGGLBL1_LBDAC_EN;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-dac-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-shutdown-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_MPPLD;
+		val |= MAX77620_CNFGGLBL1_MPPLD;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-shutdown-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_MPPLD;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-reset-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_LBRSTEN;
+		val |= MAX77620_CNFGGLBL1_LBRSTEN;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-reset-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_LBRSTEN;
+
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGGLBL1, mask, val);
+	if (ret < 0) {
+		dev_err(dev, "Reg CNFGGLBL1 update failed: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_initialise_chip(struct max77620_chip *chip,
+			struct device *dev)
+{
+	struct device_node *node = dev->of_node;
+	u32 mrt_time = 0;
+	u8 reg_val;
+	int ret;
+
+	of_property_read_u32(node, "maxim,hard-power-off-time", &mrt_time);
+	if (!mrt_time)
+		return 0;
+
+	mrt_time = (mrt_time > 12) ? 12 : mrt_time;
+	if (mrt_time <= 6)
+		reg_val = mrt_time - 2;
+	else
+		reg_val = (mrt_time - 6) / 2 + 4;
+
+	reg_val <<= MAX77620_ONOFFCNFG1_MRT_SHIFT;
+
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_MRT_MASK,
+			reg_val);
+	if (ret < 0)
+		dev_err(dev, "Reg 0x%02x update failed: %d\n",
+			MAX77620_REG_ONOFFCNFG1, reg_val);
+	return ret;
+}
+
+static int max77620_read_es_version(struct max77620_chip *chip)
+{
+	int ret;
+	u8 val;
+	u8 cid;
+	int i;
+	u8 cid_val[6];
+
+	for (i = MAX77620_REG_CID0; i <= MAX77620_REG_CID5; ++i) {
+		ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
+				i, &cid);
+		if (ret < 0) {
+			dev_err(chip->dev, "CID%d register read failed: %d\n",
+					i - MAX77620_REG_CID0, ret);
+			return ret;
+		}
+		dev_info(chip->dev, "CID%d: 0x%02x\n",
+			i - MAX77620_REG_CID0, cid);
+		cid_val[i - MAX77620_REG_CID0] = cid;
+	}
+
+	/* CID4 is OTP Version */
+	dev_info(chip->dev, "MAX77620 PMIC OTP Version: 0x%02X\n", cid_val[4]);
+
+	/* CID5 is ES version */
+	chip->es_minor_version = MAX77620_CID5_DIDM(cid_val[5]);
+	chip->es_major_version = 1;
+	dev_info(chip->dev, "MAX77620 PMIC ES version: %d.%d\n",
+				chip->es_major_version, chip->es_minor_version);
+
+	/* Read NVERC register */
+	ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_NVERC, &val);
+	if (ret < 0) {
+		dev_err(chip->dev, "NVERC read failed: %d\n", ret);
+		return ret;
+	}
+	dev_info(chip->dev, "NVERC = 0x%02x\n", val);
+	for (i = 0; i < 8; ++i) {
+		if (val & BIT(i))
+			dev_info(chip->dev, "NVERC: %s\n", max77620_nverc[i]);
+	}
+	return ret;
+}
+
+static irqreturn_t max77620_mbattlow_irq(int irq, void *data)
+{
+	struct max77620_chip *max77620 = data;
+
+	dev_info(max77620->dev, "MBATTLOW interrupt occurred\n");
+
+	return IRQ_HANDLED;
+}
+
+static int max77620_probe(struct i2c_client *client,
+			  const struct i2c_device_id *id)
+{
+	struct device_node *node = client->dev.of_node;
+	const struct max77620_sub_modules *children;
+	struct max77620_chip *chip;
+	int i = 0;
+	int ret = 0;
+	const struct of_device_id *match;
+
+	if (!node) {
+		dev_err(&client->dev, "Device is not from DT\n");
+		return -ENODEV;
+	}
+
+	match = of_match_device(max77620_of_match, &client->dev);
+	children = match->data;
+	if (!children)
+		return -ENODEV;
+
+	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
+	if (!chip)
+		return -ENOMEM;
+
+	i2c_set_clientdata(client, chip);
+	chip->dev = &client->dev;
+	chip->irq_base = -1;
+	chip->chip_irq = client->irq;
+	chip->id = children->id;
+
+	if (chip->id == MAX20024) {
+		max77620_regmap_config[MAX77620_PWR_SLAVE].rd_table =
+					&max20024_readable_table;
+		max77620_regmap_config[MAX77620_PWR_SLAVE].max_register =
+				MAX20024_REG_MAX_ADD + 1;
+	}
+
+	mutex_init(&chip->mutex_config);
+
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (max77620_slave_address[i] == client->addr)
+			chip->clients[i] = client;
+		else
+			chip->clients[i] = i2c_new_dummy(client->adapter,
+						max77620_slave_address[i]);
+		if (!chip->clients[i]) {
+			dev_err(&client->dev, "can't attach client %d\n", i);
+			ret = -ENOMEM;
+			goto fail_client_reg;
+		}
+
+		chip->clients[i]->dev.of_node = node;
+		i2c_set_clientdata(chip->clients[i], chip);
+		max77620_regmap_config[i].lock_arg = chip;
+		chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
+		(const struct regmap_config *)&max77620_regmap_config[i]);
+		if (IS_ERR(chip->rmap[i])) {
+			ret = PTR_ERR(chip->rmap[i]);
+			dev_err(&client->dev,
+				"regmap %d init failed, err %d\n", i, ret);
+			goto fail_client_reg;
+		}
+	}
+
+	ret = max77620_read_es_version(chip);
+	if (ret < 0) {
+		dev_err(chip->dev, "Chip revision init failed: %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = max77620_initialise_chip(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "Chip initialisation failed: %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
+		chip->chip_irq, IRQF_ONESHOT | IRQF_SHARED, chip->irq_base,
+		&max77620_top_irq_chip, &chip->top_irq_data);
+	if (ret < 0) {
+		dev_err(chip->dev, "Failed to add top irq_chip %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = max77620_initialise_fps(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "FPS initialisation failed: %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	ret = max77620_init_backup_battery_charging(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev,
+			"Backup battery charging init failed: %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	ret = max77620_init_low_battery_monitor(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "Low battery monitor init failed: %d\n",
+			ret);
+		goto fail_free_irq;
+	}
+
+	ret =  mfd_add_devices(&client->dev, -1, children->cells,
+			children->ncells, NULL, 0,
+			regmap_irq_get_domain(chip->top_irq_data));
+	if (ret < 0) {
+		dev_err(&client->dev, "mfd add dev fail %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	chip->irq_mbattlow = max77620_irq_get_virq(chip->dev,
+					MAX77620_IRQ_LBT_MBATLOW);
+	if (chip->irq_mbattlow) {
+		ret = devm_request_threaded_irq(chip->dev, chip->irq_mbattlow,
+			NULL, max77620_mbattlow_irq,
+			IRQF_ONESHOT, dev_name(chip->dev),
+			chip);
+		if (ret < 0)
+			dev_err(&client->dev, "request irq %d failed: %d\n",
+			chip->irq_mbattlow, ret);
+	}
+
+	dev_info(&client->dev, "max77620 probe successfully\n");
+	return 0;
+
+fail_free_irq:
+	regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
+
+fail_client_reg:
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (!chip->clients[i] || chip->clients[i] == client)
+			continue;
+		i2c_unregister_device(chip->clients[i]);
+	}
+	return ret;
+}
+
+static int max77620_remove(struct i2c_client *client)
+{
+
+	struct max77620_chip *chip = i2c_get_clientdata(client);
+	int i;
+
+	mfd_remove_devices(chip->dev);
+	regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
+
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (chip->clients[i] != client)
+			i2c_unregister_device(chip->clients[i]);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_set_fps_period(struct max77620_chip *chip,
+	int fps_id, int time_period)
+{
+	unsigned int config;
+	struct device *dev = chip->dev;
+	int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
+	int ret;
+	int i;
+
+	for (i = 0; i < 0x7; ++i) {
+		int x = base_fps_time * BIT(i);
+
+		if (x >= time_period)
+			break;
+	}
+	config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_FPS_CFG0 + fps_id,
+			MAX77620_FPS_TIME_PERIOD_MASK, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg 0x%02x write failed: %d\n",
+			MAX77620_REG_FPS_CFG0 + fps_id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_i2c_suspend(struct device *dev)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	unsigned int config;
+	int fps;
+	int ret;
+
+	for (fps = 0; fps < 2; ++fps) {
+		if (chip->suspend_fps_period[fps] < 0)
+			continue;
+
+		ret = max77620_set_fps_period(chip, fps,
+				chip->suspend_fps_period[fps]);
+		if (ret < 0)
+			dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
+	}
+
+	/*
+	 * For MAX20024: No need to configure SLPEN on suspend as
+	 * it will be configured on Init.
+	 */
+	if (chip->id == MAX20024)
+		return 0;
+
+	config = (chip->sleep_enable) ? MAX77620_ONOFFCNFG1_SLPEN : 0;
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SLPEN,
+			config);
+	if (ret < 0)
+		dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
+
+	/* Disable WK_EN0 */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0, 0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int max77620_i2c_resume(struct device *dev)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	int ret;
+	int fps;
+
+	for (fps = 0; fps < 2; ++fps) {
+		if (chip->active_fps_period[fps] < 0)
+			continue;
+
+		ret = max77620_set_fps_period(chip, fps,
+				chip->active_fps_period[fps]);
+		if (ret < 0)
+			dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
+	}
+
+	/*
+	 * For MAX20024: No need to configure WKEN0 on resume as
+	 * it is configured on Init.
+	 */
+	if (chip->id == MAX20024)
+		return 0;
+
+	/* Enable WK_EN0 */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+		MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
+		MAX77620_ONOFFCNFG2_WK_EN0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+#endif
+
+static const struct i2c_device_id max77620_id[] = {
+	{"max77620", 0},
+	{"max20024", 1},
+	{},
+};
+MODULE_DEVICE_TABLE(i2c, max77620_id);
+
+static const struct dev_pm_ops max77620_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_i2c_suspend, max77620_i2c_resume)
+};
+
+static struct i2c_driver max77620_driver = {
+	.driver = {
+		.name = "max77620",
+		.owner = THIS_MODULE,
+		.pm = &max77620_pm_ops,
+		.of_match_table = max77620_of_match,
+	},
+	.probe = max77620_probe,
+	.remove = max77620_remove,
+	.id_table = max77620_id,
+};
+
+static int __init max77620_init(void)
+{
+	return i2c_add_driver(&max77620_driver);
+}
+subsys_initcall(max77620_init);
+
+static void __exit max77620_exit(void)
+{
+	i2c_del_driver(&max77620_driver);
+}
+module_exit(max77620_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 Multi Function Device Core Driver");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
+MODULE_ALIAS("i2c:max77620");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
new file mode 100644
index 0000000..9d712b2
--- /dev/null
+++ b/include/linux/mfd/max77620.h
@@ -0,0 +1,503 @@
+/*
+ * max77620.h: Defining registers address and its bit definitions
+ *	of MAX77620 and	MAX20024
+ *
+ * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _LINUX_MFD_MAX77620_H_
+#define _LINUX_MFD_MAX77620_H_
+
+#include <linux/irq.h>
+#include <linux/i2c.h>
+#include <linux/mfd/core.h>
+#include <linux/regmap.h>
+#include <linux/regulator/machine.h>
+#include <linux/mutex.h>
+
+/* RTC Registers */
+#define MAX77620_REG_RTCINT			0x00
+#define MAX77620_REG_RTCINTM			0x01
+#define MAX77620_REG_RTCCNTLM			0x02
+#define MAX77620_REG_RTCCNTL			0x03
+#define MAX77620_REG_RTCUPDATE0			0x04
+#define MAX77620_REG_RTCUPDATE1			0x05
+#define MAX77620_REG_RTCSMPL			0x06
+#define MAX77620_REG_RTCSEC			0x07
+#define MAX77620_REG_RTCMIN			0x08
+#define MAX77620_REG_RTCHOUR			0x09
+#define MAX77620_REG_RTCDOW			0x0A
+#define MAX77620_REG_RTCMONTH			0x0B
+#define MAX77620_REG_RTCYEAR			0x0C
+#define MAX77620_REG_RTCDOM			0x0D
+#define MAX77620_REG_RTCSECA1			0x0E
+#define MAX77620_REG_RTCMINA1			0x0F
+#define MAX77620_REG_RTCHOURA1			0x10
+#define MAX77620_REG_RTCDOWA1			0x11
+#define MAX77620_REG_RTCMONTHA1			0x12
+#define MAX77620_REG_RTCYEARA1			0x13
+#define MAX77620_REG_RTCDOMA1			0x14
+#define MAX77620_REG_RTCSECA2			0x15
+#define MAX77620_REG_RTCMINA2			0x16
+#define MAX77620_REG_RTCHOURA2			0x17
+#define MAX77620_REG_RTCDOWA2			0x18
+#define MAX77620_REG_RTCMONTHA2			0x19
+#define MAX77620_REG_RTCYEARA2			0x1A
+#define MAX77620_REG_RTCDOMA2			0x1B
+
+/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
+#define MAX77620_REG_CNFGGLBL1			0x00
+#define MAX77620_REG_CNFGGLBL2			0x01
+#define MAX77620_REG_CNFGGLBL3			0x02
+#define MAX77620_REG_CNFG1_32K			0x03
+#define MAX77620_REG_CNFGBBC			0x04
+#define MAX77620_REG_IRQTOP			0x05
+#define MAX77620_REG_INTLBT			0x06
+#define MAX77620_REG_IRQSD			0x07
+#define MAX77620_REG_IRQ_LVL2_L0_7		0x08
+#define MAX77620_REG_IRQ_LVL2_L8		0x09
+#define MAX77620_REG_IRQ_LVL2_GPIO		0x0A
+#define MAX77620_REG_ONOFFIRQ			0x0B
+#define MAX77620_REG_NVERC			0x0C
+#define MAX77620_REG_IRQTOPM			0x0D
+#define MAX77620_REG_INTENLBT			0x0E
+#define MAX77620_REG_IRQMASKSD			0x0F
+#define MAX77620_REG_IRQ_MSK_L0_7		0x10
+#define MAX77620_REG_IRQ_MSK_L8			0x11
+#define MAX77620_REG_ONOFFIRQM			0x12
+#define MAX77620_REG_STATLBT			0x13
+#define MAX77620_REG_STATSD			0x14
+#define MAX77620_REG_ONOFFSTAT			0x15
+
+/* SD and LDO Registers */
+#define MAX77620_REG_SD0			0x16
+#define MAX77620_REG_SD1			0x17
+#define MAX77620_REG_SD2			0x18
+#define MAX77620_REG_SD3			0x19
+#define MAX77620_REG_SD4			0x1A
+#define MAX77620_REG_DVSSD0			0x1B
+#define MAX77620_REG_DVSSD1			0x1C
+#define MAX77620_REG_SD0_CFG			0x1D
+#define MAX77620_REG_SD1_CFG			0x1E
+#define MAX77620_REG_SD2_CFG			0x1F
+#define MAX77620_REG_SD3_CFG			0x20
+#define MAX77620_REG_SD4_CFG			0x21
+#define MAX77620_REG_SD_CFG2			0x22
+#define MAX77620_REG_LDO0_CFG			0x23
+#define MAX77620_REG_LDO0_CFG2			0x24
+#define MAX77620_REG_LDO1_CFG			0x25
+#define MAX77620_REG_LDO1_CFG2			0x26
+#define MAX77620_REG_LDO2_CFG			0x27
+#define MAX77620_REG_LDO2_CFG2			0x28
+#define MAX77620_REG_LDO3_CFG			0x29
+#define MAX77620_REG_LDO3_CFG2			0x2A
+#define MAX77620_REG_LDO4_CFG			0x2B
+#define MAX77620_REG_LDO4_CFG2			0x2C
+#define MAX77620_REG_LDO5_CFG			0x2D
+#define MAX77620_REG_LDO5_CFG2			0x2E
+#define MAX77620_REG_LDO6_CFG			0x2F
+#define MAX77620_REG_LDO6_CFG2			0x30
+#define MAX77620_REG_LDO7_CFG			0x31
+#define MAX77620_REG_LDO7_CFG2			0x32
+#define MAX77620_REG_LDO8_CFG			0x33
+#define MAX77620_REG_LDO8_CFG2			0x34
+#define MAX77620_REG_LDO_CFG3			0x35
+
+#define MAX77620_LDO_SLEW_RATE_MASK		0x1
+
+/* LDO Configuration 3 */
+#define MAX77620_TRACK4_MASK			BIT(5)
+#define MAX77620_TRACK4_SHIFT			5
+
+/* Voltage */
+#define  MAX77620_SDX_VOLT_MASK			0xFF
+#define  MAX77620_SD0_VOLT_MASK			0x3F
+#define  MAX77620_SD1_VOLT_MASK			0x7F
+#define MAX77620_LDO_VOLT_MASK			0x3F
+
+#define MAX77620_REG_GPIO0			0x36
+#define MAX77620_REG_GPIO1			0x37
+#define MAX77620_REG_GPIO2			0x38
+#define MAX77620_REG_GPIO3			0x39
+#define MAX77620_REG_GPIO4			0x3A
+#define MAX77620_REG_GPIO5			0x3B
+#define MAX77620_REG_GPIO6			0x3C
+#define MAX77620_REG_GPIO7			0x3D
+#define MAX77620_REG_PUE_GPIO			0x3E
+#define MAX77620_REG_PDE_GPIO			0x3F
+#define MAX77620_REG_AME_GPIO			0x40
+#define MAX77620_REG_ONOFFCNFG1			0x41
+#define MAX77620_REG_ONOFFCNFG2			0x42
+
+/* FPS Registers */
+#define MAX77620_REG_FPS_CFG0			0x43
+#define MAX77620_REG_FPS_CFG1			0x44
+#define MAX77620_REG_FPS_CFG2			0x45
+#define MAX77620_REG_FPS_LDO0			0x46
+#define MAX77620_REG_FPS_LDO1			0x47
+#define MAX77620_REG_FPS_LDO2			0x48
+#define MAX77620_REG_FPS_LDO3			0x49
+#define MAX77620_REG_FPS_LDO4			0x4A
+#define MAX77620_REG_FPS_LDO5			0x4B
+#define MAX77620_REG_FPS_LDO6			0x4C
+#define MAX77620_REG_FPS_LDO7			0x4D
+#define MAX77620_REG_FPS_LDO8			0x4E
+#define MAX77620_REG_FPS_SD0			0x4F
+#define MAX77620_REG_FPS_SD1			0x50
+#define MAX77620_REG_FPS_SD2			0x51
+#define MAX77620_REG_FPS_SD3			0x52
+#define MAX77620_REG_FPS_SD4			0x53
+#define MAX77620_REG_FPS_NONE			0
+
+#define MAX77620_FPS_SRC_MASK			0xC0
+#define MAX77620_FPS_SRC_SHIFT			6
+#define MAX77620_FPS_PU_PERIOD_MASK		0x38
+#define MAX77620_FPS_PU_PERIOD_SHIFT		3
+#define MAX77620_FPS_PD_PERIOD_MASK		0x07
+#define MAX77620_FPS_PD_PERIOD_SHIFT		0
+#define MAX77620_FPS_TIME_PERIOD_MASK		0x38
+#define MAX77620_FPS_TIME_PERIOD_SHIFT		3
+#define MAX77620_FPS_EN_SRC_MASK		0x06
+#define MAX77620_FPS_EN_SRC_SHIFT		1
+#define MAX77620_FPS_ENFPS_MASK			0x01
+
+#define MAX77620_REG_FPS_GPIO1			0x54
+#define MAX77620_REG_FPS_GPIO2			0x55
+#define MAX77620_REG_FPS_GPIO3			0x56
+#define MAX77620_REG_FPS_RSO			0x57
+#define MAX77620_REG_CID0			0x58
+#define MAX77620_REG_CID1			0x59
+#define MAX77620_REG_CID2			0x5A
+#define MAX77620_REG_CID3			0x5B
+#define MAX77620_REG_CID4			0x5C
+#define MAX77620_REG_CID5			0x5D
+
+#define MAX77620_REG_DVSSD4			0x5E
+#define MAX20024_REG_MAX_ADD			0x70
+
+#define MAX77620_CID_DIDM_MASK			0xF0
+#define MAX77620_CID_DIDM_SHIFT			4
+
+/* CNCG2SD */
+#define MAX77620_SD_CNF2_ROVS_EN_SD1		BIT(1)
+#define MAX77620_SD_CNF2_ROVS_EN_SD0		BIT(2)
+
+/* Device Identification Metal */
+#define MAX77620_CID5_DIDM(n)			(((n) >> 4) & 0xF)
+/* Device Indentification OTP */
+#define MAX77620_CID5_DIDO(n)			((n) & 0xF)
+
+/* SD CNFG1 */
+#define MAX77620_SD_SR_MASK			0xC0
+#define MAX77620_SD_SR_SHIFT			6
+#define MAX77620_SD_POWER_MODE_MASK		0x30
+#define MAX77620_SD_POWER_MODE_SHIFT		4
+#define MAX77620_SD_CFG1_ADE_MASK		BIT(3)
+#define MAX77620_SD_CFG1_ADE_DISABLE		0
+#define MAX77620_SD_CFG1_ADE_ENABLE		BIT(3)
+#define MAX77620_SD_FPWM_MASK			0x04
+#define MAX77620_SD_FPWM_SHIFT			2
+#define MAX77620_SD_FSRADE_MASK			0x01
+#define MAX77620_SD_FSRADE_SHIFT		0
+#define MAX77620_SD_CFG1_FPWM_SD_MASK		BIT(2)
+#define MAX77620_SD_CFG1_FPWM_SD_SKIP		0
+#define MAX77620_SD_CFG1_FPWM_SD_FPWM		BIT(2)
+#define MAX77620_SD_CFG1_FSRADE_SD_MASK		BIT(0)
+#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE	0
+#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE	BIT(0)
+
+/* LDO_CNFG2 */
+#define MAX77620_LDO_POWER_MODE_MASK		0xC0
+#define MAX77620_LDO_POWER_MODE_SHIFT		6
+#define MAX77620_LDO_CFG2_ADE_MASK		BIT(1)
+#define MAX77620_LDO_CFG2_ADE_DISABLE		0
+#define MAX77620_LDO_CFG2_ADE_ENABLE		BIT(1)
+#define MAX77620_LDO_CFG2_SS_MASK		BIT(0)
+#define MAX77620_LDO_CFG2_SS_FAST		BIT(0)
+#define MAX77620_LDO_CFG2_SS_SLOW		0
+
+#define MAX77620_IRQ_TOP_GLBL_MASK		BIT(7)
+#define MAX77620_IRQ_TOP_SD_MASK		BIT(6)
+#define MAX77620_IRQ_TOP_LDO_MASK		BIT(5)
+#define MAX77620_IRQ_TOP_GPIO_MASK		BIT(4)
+#define MAX77620_IRQ_TOP_RTC_MASK		BIT(3)
+#define MAX77620_IRQ_TOP_32K_MASK		BIT(2)
+#define MAX77620_IRQ_TOP_ONOFF_MASK		BIT(1)
+
+#define MAX77620_IRQ_LBM_MASK			BIT(3)
+#define MAX77620_IRQ_TJALRM1_MASK		BIT(2)
+#define MAX77620_IRQ_TJALRM2_MASK		BIT(1)
+
+#define MAX77620_PWR_I2C_ADDR			0x3c
+#define MAX77620_RTC_I2C_ADDR			0x68
+
+#define MAX77620_CNFG_GPIO_DRV_MASK		BIT(0)
+#define MAX77620_CNFG_GPIO_DRV_PUSHPULL		BIT(0)
+#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN	0
+#define MAX77620_CNFG_GPIO_DIR_MASK		BIT(1)
+#define MAX77620_CNFG_GPIO_DIR_INPUT		BIT(1)
+#define MAX77620_CNFG_GPIO_DIR_OUTPUT		0
+#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK	BIT(2)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK	BIT(3)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH	BIT(3)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW	0
+#define MAX77620_CNFG_GPIO_INT_MASK		(0x3 << 4)
+#define MAX77620_CNFG_GPIO_INT_FALLING		BIT(4)
+#define MAX77620_CNFG_GPIO_INT_RISING		BIT(5)
+#define MAX77620_CNFG_GPIO_DBNC_MASK		(0x3 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_None		(0x0 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_8ms		(0x1 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_16ms		(0x2 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_32ms		(0x3 << 6)
+
+#define MAX77620_IRQ_LVL2_GPIO_EDGE0		BIT(0)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE1		BIT(1)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE2		BIT(2)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE3		BIT(3)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE4		BIT(4)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE5		BIT(5)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE6		BIT(6)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE7		BIT(7)
+
+#define MAX77620_CNFG1_32K_OUT0_EN		BIT(2)
+
+#define MAX77620_ONOFFCNFG1_SFT_RST		BIT(7)
+#define MAX77620_ONOFFCNFG1_MRT_MASK		0x38
+#define MAX77620_ONOFFCNFG1_MRT_SHIFT		0x3
+#define MAX77620_ONOFFCNFG1_SLPEN		BIT(2)
+#define MAX77620_ONOFFCNFG1_PWR_OFF		BIT(1)
+#define MAX20024_ONOFFCNFG1_CLRSE		0x18
+
+#define MAX77620_ONOFFCNFG2_SFT_RST_WK		BIT(7)
+#define MAX77620_ONOFFCNFG2_WD_RST_WK		BIT(6)
+#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK		BIT(5)
+#define MAX77620_ONOFFCNFG2_WK_EN0		BIT(0)
+
+#define	MAX77620_GLBLM_MASK			BIT(0)
+
+#define MAX77620_WDTC_MASK			0x3
+#define MAX77620_WDTOFFC			BIT(4)
+#define MAX77620_WDTSLPC			BIT(3)
+#define MAX77620_WDTEN				BIT(2)
+
+#define MAX77620_TWD_MASK			0x3
+#define MAX77620_TWD_2s				0x0
+#define MAX77620_TWD_16s			0x1
+#define MAX77620_TWD_64s			0x2
+#define MAX77620_TWD_128s			0x3
+
+#define MAX77620_CNFGGLBL1_LBDAC_EN		BIT(7)
+#define MAX77620_CNFGGLBL1_MPPLD		BIT(6)
+#define MAX77620_CNFGGLBL1_LBHYST		(BIT(5) | BIT(4))
+#define MAX77620_CNFGGLBL1_LBDAC		0x0E
+#define MAX77620_CNFGGLBL1_LBRSTEN		BIT(0)
+
+/* CNFG BBC registers */
+#define MAX77620_CNFGBBC_ENABLE			BIT(0)
+#define MAX77620_CNFGBBC_CURRENT_MASK		0x06
+#define MAX77620_CNFGBBC_CURRENT_SHIFT		1
+#define MAX77620_CNFGBBC_VOLTAGE_MASK		0x18
+#define MAX77620_CNFGBBC_VOLTAGE_SHIFT		3
+#define MAX77620_CNFGBBC_LOW_CURRENT_ENABLE	BIT(5)
+#define MAX77620_CNFGBBC_RESISTOR_MASK		0xC0
+#define MAX77620_CNFGBBC_RESISTOR_SHIFT		6
+
+/* I2c Slave Id */
+enum {
+	MAX77620_PWR_SLAVE,
+	MAX77620_RTC_SLAVE,
+	MAX77620_NUM_SLAVES,
+};
+
+/* GPIOs */
+enum {
+	MAX77620_GPIO0,
+	MAX77620_GPIO1,
+	MAX77620_GPIO2,
+	MAX77620_GPIO3,
+	MAX77620_GPIO4,
+	MAX77620_GPIO5,
+	MAX77620_GPIO6,
+	MAX77620_GPIO7,
+
+	MAX77620_GPIO_NR,
+};
+
+/* Interrupts */
+enum {
+	MAX77620_IRQ_TOP_GLBL,		/* Low-Battery */
+	MAX77620_IRQ_TOP_SD,		/* SD power fail */
+	MAX77620_IRQ_TOP_LDO,		/* LDO power fail */
+	MAX77620_IRQ_TOP_GPIO,		/* TOP GPIO internal int to MAX77620 */
+	MAX77620_IRQ_TOP_RTC,		/* RTC */
+	MAX77620_IRQ_TOP_32K,		/* 32kHz oscillator */
+	MAX77620_IRQ_TOP_ONOFF,		/* ON/OFF oscillator */
+
+	MAX77620_IRQ_LBT_MBATLOW,	/* Thermal alarm status, > 120C */
+	MAX77620_IRQ_LBT_TJALRM1,	/* Thermal alarm status, > 120C */
+	MAX77620_IRQ_LBT_TJALRM2,	/* Thermal alarm status, > 140C */
+
+	MAX77620_IRQ_GPIO0,		/* GPIO0 edge detection */
+	MAX77620_IRQ_GPIO1,		/* GPIO1 edge detection */
+	MAX77620_IRQ_GPIO2,		/* GPIO2 edge detection */
+	MAX77620_IRQ_GPIO3,		/* GPIO3 edge detection */
+	MAX77620_IRQ_GPIO4,		/* GPIO4 edge detection */
+	MAX77620_IRQ_GPIO5,		/* GPIO5 edge detection */
+	MAX77620_IRQ_GPIO6,		/* GPIO6 edge detection */
+	MAX77620_IRQ_GPIO7,		/* GPIO7 edge detection */
+
+	MAX77620_IRQ_ONOFF_MRWRN,	/* Hard power off warnning */
+	MAX77620_IRQ_ONOFF_EN0_1SEC,	/* EN0 active for 1s */
+	MAX77620_IRQ_ONOFF_EN0_F,	/* EN0 falling */
+	MAX77620_IRQ_ONOFF_EN0_R,	/* EN0 rising */
+	MAX77620_IRQ_ONOFF_LID_F,	/* LID falling */
+	MAX77620_IRQ_ONOFF_LID_R,	/* LID rising */
+	MAX77620_IRQ_ONOFF_ACOK_F,	/* ACOK falling */
+	MAX77620_IRQ_ONOFF_ACOK_R,	/* ACOK rising */
+
+	MAX77620_IRQ_NVER,		/* Non-Volatile Event Recorder */
+	MAX77620_IRQ_NR,
+};
+
+enum max77620_regulators {
+	MAX77620_REGULATOR_ID_SD0,
+	MAX77620_REGULATOR_ID_SD1,
+	MAX77620_REGULATOR_ID_SD2,
+	MAX77620_REGULATOR_ID_SD3,
+	MAX77620_REGULATOR_ID_SD4,
+	MAX77620_REGULATOR_ID_LDO0,
+	MAX77620_REGULATOR_ID_LDO1,
+	MAX77620_REGULATOR_ID_LDO2,
+	MAX77620_REGULATOR_ID_LDO3,
+	MAX77620_REGULATOR_ID_LDO4,
+	MAX77620_REGULATOR_ID_LDO5,
+	MAX77620_REGULATOR_ID_LDO6,
+	MAX77620_REGULATOR_ID_LDO7,
+	MAX77620_REGULATOR_ID_LDO8,
+	MAX77620_NUM_REGS,
+};
+
+/* FPS Source */
+enum max77620_regulator_fps_src {
+	FPS_SRC_0,
+	FPS_SRC_1,
+	FPS_SRC_2,
+	FPS_SRC_NONE,
+	FPS_SRC_DEF,
+};
+
+/* Regulator types */
+enum max77620_regulator_type {
+	MAX77620_REGULATOR_TYPE_SD,
+	MAX77620_REGULATOR_TYPE_LDO_N,
+	MAX77620_REGULATOR_TYPE_LDO_P,
+};
+
+enum max77620_chip_id {
+	MAX77620,
+	MAX20024,
+};
+
+struct max77620_chip {
+	struct device *dev;
+
+	struct i2c_client *clients[MAX77620_NUM_SLAVES];
+	struct regmap *rmap[MAX77620_NUM_SLAVES];
+
+	int chip_irq;
+	int irq_base;
+	int irq_mbattlow;
+
+	struct mutex mutex_config;
+	bool sleep_enable;
+	bool enable_global_lpm;
+	int active_fps_period[3];
+	int suspend_fps_period[3];
+
+	int es_minor_version;
+	int es_major_version;
+
+	struct regmap_irq_chip_data *top_irq_data;
+	struct regmap_irq_chip_data *gpio_irq_data;
+
+	/* chip id */
+	u32 id;
+};
+
+static inline int max77620_irq_get_virq(struct device *dev, int irq)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_irq_get_virq(chip->top_irq_data, irq);
+}
+
+static inline int max77620_reg_write(struct device *dev, int sid,
+		unsigned int reg, u8 val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_write(chip->rmap[sid], reg, val);
+}
+
+static inline int max77620_reg_writes(struct device *dev, int sid,
+		unsigned int reg, int len, void *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	int ret = 0;
+	u8 *src = (u8 *)val;
+	int i;
+
+	/* Device does not support bulk write */
+	for (i = 0; i < len; i++) {
+		ret = regmap_write(chip->rmap[sid], reg, *src++);
+		if (ret < 0)
+			break;
+		reg++;
+	}
+	if (ret < 0)
+		dev_err(chip->dev, "%s() failed: %d\n", __func__, ret);
+	return ret;
+}
+
+static inline int max77620_reg_read(struct device *dev, int sid,
+		unsigned int reg, u8 *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	unsigned int ival;
+	int ret;
+
+	ret = regmap_read(chip->rmap[sid], reg, &ival);
+	if (ret < 0) {
+		dev_err(dev, "failed reading from reg 0x%02x\n", reg);
+		return ret;
+	}
+	*val = ival;
+	return ret;
+}
+
+static inline int max77620_reg_reads(struct device *dev, int sid,
+		unsigned int reg, int len, void *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_bulk_read(chip->rmap[sid], reg, val, len);
+}
+
+static inline int max77620_reg_update(struct device *dev, int sid,
+		unsigned int reg, unsigned int mask, unsigned int val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_update_bits(chip->rmap[sid], reg, mask, val);
+}
+
+#endif /* _LINUX_MFD_MAX77620_H_ */
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

MAX77620/MAX20024 are Power Management IC from the MAXIM.
It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
watchdog, clock etc.

Add MFD drier to provides common support for accessing the
device; additional drivers is developed on respected subsystem
in order to use the functionality of the device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/mfd/Kconfig          |  15 +
 drivers/mfd/Makefile         |   1 +
 drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
 4 files changed, 1445 insertions(+)
 create mode 100644 drivers/mfd/max77620.c
 create mode 100644 include/linux/mfd/max77620.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 9581ebb..edeb85c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -492,6 +492,21 @@ config MFD_MAX14577
 	  additional drivers must be enabled in order to use the functionality
 	  of the device.
 
+config MFD_MAX77620
+	bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support"
+	depends on I2C=y
+	depends on OF
+	select MFD_CORE
+	select REGMAP_I2C
+	select REGMAP_IRQ
+	select IRQ_DOMAIN
+	help
+	  Say yes here to add support for Maxim Semiconductor MAX77620 and
+	  MAX20024 which are Power Management IC with General purpose pins,
+	  RTC, regulators, clock generator, watchdog etc. This driver
+	  provides common support for accessing the device; additional drivers
+	  must be enabled in order to use the functionality of the device.
+
 config MFD_MAX77686
 	bool "Maxim Semiconductor MAX77686/802 PMIC Support"
 	depends on I2C=y
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0f230a6..97910ed 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -123,6 +123,7 @@ obj-$(CONFIG_MFD_DA9063)	+= da9063.o
 obj-$(CONFIG_MFD_DA9150)	+= da9150-core.o
 
 obj-$(CONFIG_MFD_MAX14577)	+= max14577.o
+obj-$(CONFIG_MFD_MAX77620)	+= max77620.o
 obj-$(CONFIG_MFD_MAX77686)	+= max77686.o
 obj-$(CONFIG_MFD_MAX77693)	+= max77693.o
 obj-$(CONFIG_MFD_MAX77843)	+= max77843.o
diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c
new file mode 100644
index 0000000..5f59279
--- /dev/null
+++ b/drivers/mfd/max77620.c
@@ -0,0 +1,926 @@
+/*
+ * Maxim MAX77620 MFD Driver
+ *
+ * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author:
+ *		Laxman Dewangan <ldewangan@nvidia.com>
+ *		Chaitanya Bandi <bandik@nvidia.com>
+ *		Mallikarjun Kasoju <mkasoju@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/ratelimit.h>
+#include <linux/kthread.h>
+#include <linux/mfd/core.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+
+#include <linux/mfd/max77620.h>
+
+static struct resource gpio_resources[] = {
+	{
+		.start	= MAX77620_IRQ_TOP_GPIO,
+		.end	= MAX77620_IRQ_TOP_GPIO,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static struct resource rtc_resources[] = {
+	{
+		.start	= MAX77620_IRQ_TOP_RTC,
+		.end	= MAX77620_IRQ_TOP_RTC,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static struct resource thermal_resources[] = {
+	{
+		.start	= MAX77620_IRQ_LBT_TJALRM1,
+		.end	= MAX77620_IRQ_LBT_TJALRM1,
+		.flags  = IORESOURCE_IRQ,
+	},
+	{
+		.start	= MAX77620_IRQ_LBT_TJALRM2,
+		.end	= MAX77620_IRQ_LBT_TJALRM2,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static const struct regmap_irq max77620_top_irqs[] = {
+	[MAX77620_IRQ_TOP_GLBL] = {
+		.mask = MAX77620_IRQ_TOP_GLBL_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_SD] = {
+		.mask = MAX77620_IRQ_TOP_SD_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_LDO] = {
+		.mask = MAX77620_IRQ_TOP_LDO_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_GPIO] = {
+		.mask = MAX77620_IRQ_TOP_GPIO_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_RTC] = {
+		.mask = MAX77620_IRQ_TOP_RTC_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_32K] = {
+		.mask = MAX77620_IRQ_TOP_32K_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_ONOFF] = {
+		.mask = MAX77620_IRQ_TOP_ONOFF_MASK,
+		.reg_offset = 0,
+	},
+
+	[MAX77620_IRQ_LBT_MBATLOW] = {
+		.mask = MAX77620_IRQ_LBM_MASK,
+		.reg_offset = 1,
+	},
+	[MAX77620_IRQ_LBT_TJALRM1] = {
+		.mask = MAX77620_IRQ_TJALRM1_MASK,
+		.reg_offset = 1,
+	},
+	[MAX77620_IRQ_LBT_TJALRM2] = {
+		.mask = MAX77620_IRQ_TJALRM2_MASK,
+		.reg_offset = 1,
+	},
+
+};
+
+static const char * const max77620_nverc[] = {
+	"Shutdown-pin",
+	"System WatchDog Timer",
+	"Hard Reset",
+	"Junction Temp Overload",
+	"Main-Battery Low",
+	"Main-Battery overvoltage Lockout",
+	"Main-Battery undervoltage Lockout",
+	"Reset input",
+};
+
+enum max77660_ids {
+	MAX77620_PMIC_ID,
+	MAX77620_GPIO_ID,
+	MAX77620_RTC_ID,
+	MAX77620_PINCTRL_ID,
+	MAX77620_CLK_ID,
+	MAX77620_POWER_OFF_ID,
+	MAX77620_WDT_ID,
+	MAX77620_THERMAL_ID,
+};
+
+#define MAX77620_SUB_MODULE_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max77620-"#_name,			\
+		.num_resources	= ARRAY_SIZE(_name##_resources), \
+		.resources	= &_name##_resources[0],	\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX20024_SUB_MODULE_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max20024-"#_name,			\
+		.num_resources	= ARRAY_SIZE(_name##_resources), \
+		.resources	= &_name##_resources[0],	\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX77620_SUB_MODULE_NO_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max77620-"#_name,			\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX20024_SUB_MODULE_NO_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max20024-"#_name,			\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+static struct mfd_cell max77620_children[] = {
+	MAX77620_SUB_MODULE_RES(gpio, GPIO),
+	MAX77620_SUB_MODULE_NO_RES(pmic, PMIC),
+	MAX77620_SUB_MODULE_RES(rtc, RTC),
+	MAX77620_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
+	MAX77620_SUB_MODULE_NO_RES(clk, CLK),
+	MAX77620_SUB_MODULE_NO_RES(power-off, POWER_OFF),
+	MAX77620_SUB_MODULE_NO_RES(wdt, WDT),
+	MAX77620_SUB_MODULE_RES(thermal, THERMAL),
+};
+
+static struct mfd_cell max20024_children[] = {
+	MAX20024_SUB_MODULE_RES(gpio, GPIO),
+	MAX20024_SUB_MODULE_NO_RES(pmic, PMIC),
+	MAX20024_SUB_MODULE_RES(rtc, RTC),
+	MAX20024_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
+	MAX20024_SUB_MODULE_NO_RES(clk, CLK),
+	MAX20024_SUB_MODULE_NO_RES(power-off, POWER_OFF),
+	MAX20024_SUB_MODULE_NO_RES(wdt, WDT),
+	MAX20024_SUB_MODULE_RES(thermal, THERMAL),
+};
+
+struct max77620_sub_modules {
+	struct mfd_cell *cells;
+	int ncells;
+	u32 id;
+};
+
+static const struct max77620_sub_modules max77620_cells = {
+	.cells = max77620_children,
+	.ncells = ARRAY_SIZE(max77620_children),
+	.id = MAX77620,
+};
+
+static const struct max77620_sub_modules  max20024_cells = {
+	.cells = max20024_children,
+	.ncells = ARRAY_SIZE(max20024_children),
+	.id = MAX20024,
+};
+
+static const struct of_device_id max77620_of_match[] = {
+	{
+		.compatible = "maxim,max77620",
+		.data = &max77620_cells,
+	}, {
+		.compatible = "maxim,max20024",
+		.data = &max20024_cells,
+	}, {
+	},
+};
+MODULE_DEVICE_TABLE(of, max77620_of_match);
+
+static struct regmap_irq_chip max77620_top_irq_chip = {
+	.name = "max77620-top",
+	.irqs = max77620_top_irqs,
+	.num_irqs = ARRAY_SIZE(max77620_top_irqs),
+	.num_regs = 2,
+	.status_base = MAX77620_REG_IRQTOP,
+	.mask_base = MAX77620_REG_IRQTOPM,
+};
+
+static const struct regmap_range max77620_readable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+};
+
+static const struct regmap_access_table max77620_readable_table = {
+	.yes_ranges = max77620_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max77620_readable_ranges),
+};
+
+static const struct regmap_range max20024_readable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+	regmap_reg_range(MAX20024_REG_MAX_ADD, MAX20024_REG_MAX_ADD),
+};
+
+static const struct regmap_access_table max20024_readable_table = {
+	.yes_ranges = max20024_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max20024_readable_ranges),
+};
+
+static const struct regmap_range max77620_writable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+};
+
+static const struct regmap_access_table max77620_writable_table = {
+	.yes_ranges = max77620_writable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max77620_writable_ranges),
+};
+
+static const struct regmap_range max77620_cacheable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_SD0_CFG, MAX77620_REG_LDO_CFG3),
+	regmap_reg_range(MAX77620_REG_FPS_CFG0, MAX77620_REG_FPS_SD3),
+};
+
+static const struct regmap_access_table max77620_volatile_table = {
+	.no_ranges = max77620_cacheable_ranges,
+	.n_no_ranges = ARRAY_SIZE(max77620_cacheable_ranges),
+};
+
+static struct regmap_config max77620_regmap_config[] = {
+	[MAX77620_PWR_SLAVE] = {
+		.reg_bits = 8,
+		.val_bits = 8,
+		.max_register = MAX77620_REG_DVSSD4 + 1,
+		.cache_type = REGCACHE_RBTREE,
+		.rd_table = &max77620_readable_table,
+		.wr_table = &max77620_writable_table,
+		.volatile_table = &max77620_volatile_table,
+	},
+	[MAX77620_RTC_SLAVE] = {
+		.reg_bits = 8,
+		.val_bits = 8,
+		.max_register = 0x1b,
+	},
+};
+
+static int max77620_slave_address[MAX77620_NUM_SLAVES] = {
+	MAX77620_PWR_I2C_ADDR,
+	MAX77620_RTC_I2C_ADDR,
+};
+
+static int max77620_initialise_fps(struct max77620_chip *chip,
+			struct device *dev)
+{
+	struct device_node *node;
+	struct device_node *child;
+	u32 reg, pval;
+	int ret;
+	int time_period = 40;
+	int input_enable = 2;
+	bool enable_fps = false;
+	unsigned int mask;
+	unsigned int config;
+	int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
+	int i;
+
+	node = of_get_child_by_name(dev->of_node, "fps");
+	if (!node)
+		goto skip_fps;
+
+	for (reg = 0; reg < 3; ++reg) {
+		chip->active_fps_period[reg] = -1;
+		chip->suspend_fps_period[reg] = -1;
+	}
+
+	for_each_child_of_node(node, child) {
+		ret = of_property_read_u32(child, "reg", &reg);
+		if (ret) {
+			dev_err(dev, "node %s does not have reg property\n",
+					child->name);
+			continue;
+		}
+		if (reg > 2) {
+			dev_err(dev, "FPS%d is not supported\n", reg);
+			continue;
+		}
+
+		mask = 0;
+		ret = of_property_read_u32(child,
+				"maxim,active-fps-time-period", &pval);
+		if (!ret) {
+			time_period = min(pval, 5120U);
+			mask |= MAX77620_FPS_TIME_PERIOD_MASK;
+			chip->active_fps_period[reg] = time_period;
+		}
+
+		ret = of_property_read_u32(child,
+					"maxim,suspend-fps-time-period", &pval);
+		if (!ret)
+			chip->suspend_fps_period[reg] = min(pval, 5120U);
+
+		ret = of_property_read_u32(child, "maxim,fps-enable-input",
+						&pval);
+		if (!ret) {
+			if (pval > 2) {
+				dev_err(dev,
+				    "FPS enable-input %u is not supported\n",
+					pval);
+			} else {
+				input_enable = pval;
+				mask |= MAX77620_FPS_EN_SRC_MASK;
+			}
+		}
+
+		if (input_enable == 2) {
+			enable_fps = of_property_read_bool(child,
+						"maxim,fps-sw-enable");
+			mask |= MAX77620_FPS_ENFPS_MASK;
+		}
+
+		if (!chip->sleep_enable)
+			chip->sleep_enable = of_property_read_bool(child,
+						"maxim,enable-sleep");
+		if (!chip->enable_global_lpm)
+			chip->enable_global_lpm = of_property_read_bool(child,
+						"maxim,enable-global-lpm");
+
+		for (i = 0; i < 0x7; ++i) {
+			int x = base_fps_time * BIT(i);
+
+			if (x >= time_period)
+				break;
+		}
+		config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
+		config |= (input_enable & 0x3) << MAX77620_FPS_EN_SRC_SHIFT;
+		if (enable_fps)
+			config |= 1;
+		ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+				MAX77620_REG_FPS_CFG0 + reg, mask, config);
+		if (ret < 0) {
+			dev_err(dev, "Reg 0x%02x write failed: %d\n",
+				MAX77620_REG_FPS_CFG0 + reg, ret);
+			return ret;
+		}
+	}
+
+	config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2,
+			MAX77620_ONOFFCNFG2_SLP_LPM_MSK, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 update failed: %d\n", ret);
+		return ret;
+	}
+
+skip_fps:
+	/* Enable wake on EN0 pin */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
+			MAX77620_ONOFFCNFG2_WK_EN0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	if (!chip->sleep_enable)
+		chip->sleep_enable = of_property_read_bool(dev->of_node,
+						"maxim,enable-sleep");
+
+	/* For MAX20024, SLPEN will be POR reset if CLRSE is b11 */
+	if ((chip->id == MAX20024) && chip->sleep_enable) {
+		config = MAX77620_ONOFFCNFG1_SLPEN | MAX20024_ONOFFCNFG1_CLRSE;
+		ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, config, config);
+		if (ret < 0) {
+			dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static int max77620_init_backup_battery_charging(struct max77620_chip *chip,
+		struct device *dev)
+{
+	struct device_node *np;
+	u32 pval;
+	u8 config;
+	int charging_current;
+	int charging_voltage;
+	int resistor;
+	int ret;
+
+	np = of_get_child_by_name(dev->of_node, "backup-battery");
+	if (!np) {
+		dev_info(dev, "Backup battery charging support disabled\n");
+		max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_ENABLE, 0);
+		return 0;
+	}
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-charging-current", &pval);
+	charging_current = (!ret) ? pval : 50;
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-charging-voltage", &pval);
+	charging_voltage = (!ret) ? pval : 2500000;
+	charging_voltage /= 1000;
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-output-resister", &pval);
+	resistor = (!ret) ? pval : 1000;
+
+	config = MAX77620_CNFGBBC_ENABLE;
+	if (charging_current <= 50)
+		config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 100)
+		config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 200)
+		config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 400)
+		config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 600)
+		config |= 1 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else
+		config |= 2 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+
+	if (charging_current > 100)
+		config |= MAX77620_CNFGBBC_LOW_CURRENT_ENABLE;
+
+	if (charging_voltage <= 2500)
+		config |= 0 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else if (charging_voltage <= 3000)
+		config |= 1 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else if (charging_voltage <= 3300)
+		config |= 2 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else
+		config |= 3 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+
+	if (resistor <= 100)
+		config |= 0 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 1000)
+		config |= 1 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 3000)
+		config |= 2 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 6000)
+		config |= 3 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+
+	ret = max77620_reg_write(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGBBC, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg 0x%02x write failed: %d\n",
+			MAX77620_REG_CNFGBBC, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_init_low_battery_monitor(struct max77620_chip *chip,
+		struct device *dev)
+{
+	struct device_node *np;
+	bool pval;
+	u8 mask = 0;
+	u8 val = 0;
+	int ret;
+
+
+	np = of_get_child_by_name(dev->of_node, "low-battery-monitor");
+	if (!np)
+		return 0;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-dac-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
+		val |= MAX77620_CNFGGLBL1_LBDAC_EN;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-dac-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-shutdown-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_MPPLD;
+		val |= MAX77620_CNFGGLBL1_MPPLD;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-shutdown-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_MPPLD;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-reset-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_LBRSTEN;
+		val |= MAX77620_CNFGGLBL1_LBRSTEN;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-reset-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_LBRSTEN;
+
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGGLBL1, mask, val);
+	if (ret < 0) {
+		dev_err(dev, "Reg CNFGGLBL1 update failed: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_initialise_chip(struct max77620_chip *chip,
+			struct device *dev)
+{
+	struct device_node *node = dev->of_node;
+	u32 mrt_time = 0;
+	u8 reg_val;
+	int ret;
+
+	of_property_read_u32(node, "maxim,hard-power-off-time", &mrt_time);
+	if (!mrt_time)
+		return 0;
+
+	mrt_time = (mrt_time > 12) ? 12 : mrt_time;
+	if (mrt_time <= 6)
+		reg_val = mrt_time - 2;
+	else
+		reg_val = (mrt_time - 6) / 2 + 4;
+
+	reg_val <<= MAX77620_ONOFFCNFG1_MRT_SHIFT;
+
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_MRT_MASK,
+			reg_val);
+	if (ret < 0)
+		dev_err(dev, "Reg 0x%02x update failed: %d\n",
+			MAX77620_REG_ONOFFCNFG1, reg_val);
+	return ret;
+}
+
+static int max77620_read_es_version(struct max77620_chip *chip)
+{
+	int ret;
+	u8 val;
+	u8 cid;
+	int i;
+	u8 cid_val[6];
+
+	for (i = MAX77620_REG_CID0; i <= MAX77620_REG_CID5; ++i) {
+		ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
+				i, &cid);
+		if (ret < 0) {
+			dev_err(chip->dev, "CID%d register read failed: %d\n",
+					i - MAX77620_REG_CID0, ret);
+			return ret;
+		}
+		dev_info(chip->dev, "CID%d: 0x%02x\n",
+			i - MAX77620_REG_CID0, cid);
+		cid_val[i - MAX77620_REG_CID0] = cid;
+	}
+
+	/* CID4 is OTP Version */
+	dev_info(chip->dev, "MAX77620 PMIC OTP Version: 0x%02X\n", cid_val[4]);
+
+	/* CID5 is ES version */
+	chip->es_minor_version = MAX77620_CID5_DIDM(cid_val[5]);
+	chip->es_major_version = 1;
+	dev_info(chip->dev, "MAX77620 PMIC ES version: %d.%d\n",
+				chip->es_major_version, chip->es_minor_version);
+
+	/* Read NVERC register */
+	ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_NVERC, &val);
+	if (ret < 0) {
+		dev_err(chip->dev, "NVERC read failed: %d\n", ret);
+		return ret;
+	}
+	dev_info(chip->dev, "NVERC = 0x%02x\n", val);
+	for (i = 0; i < 8; ++i) {
+		if (val & BIT(i))
+			dev_info(chip->dev, "NVERC: %s\n", max77620_nverc[i]);
+	}
+	return ret;
+}
+
+static irqreturn_t max77620_mbattlow_irq(int irq, void *data)
+{
+	struct max77620_chip *max77620 = data;
+
+	dev_info(max77620->dev, "MBATTLOW interrupt occurred\n");
+
+	return IRQ_HANDLED;
+}
+
+static int max77620_probe(struct i2c_client *client,
+			  const struct i2c_device_id *id)
+{
+	struct device_node *node = client->dev.of_node;
+	const struct max77620_sub_modules *children;
+	struct max77620_chip *chip;
+	int i = 0;
+	int ret = 0;
+	const struct of_device_id *match;
+
+	if (!node) {
+		dev_err(&client->dev, "Device is not from DT\n");
+		return -ENODEV;
+	}
+
+	match = of_match_device(max77620_of_match, &client->dev);
+	children = match->data;
+	if (!children)
+		return -ENODEV;
+
+	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
+	if (!chip)
+		return -ENOMEM;
+
+	i2c_set_clientdata(client, chip);
+	chip->dev = &client->dev;
+	chip->irq_base = -1;
+	chip->chip_irq = client->irq;
+	chip->id = children->id;
+
+	if (chip->id == MAX20024) {
+		max77620_regmap_config[MAX77620_PWR_SLAVE].rd_table =
+					&max20024_readable_table;
+		max77620_regmap_config[MAX77620_PWR_SLAVE].max_register =
+				MAX20024_REG_MAX_ADD + 1;
+	}
+
+	mutex_init(&chip->mutex_config);
+
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (max77620_slave_address[i] == client->addr)
+			chip->clients[i] = client;
+		else
+			chip->clients[i] = i2c_new_dummy(client->adapter,
+						max77620_slave_address[i]);
+		if (!chip->clients[i]) {
+			dev_err(&client->dev, "can't attach client %d\n", i);
+			ret = -ENOMEM;
+			goto fail_client_reg;
+		}
+
+		chip->clients[i]->dev.of_node = node;
+		i2c_set_clientdata(chip->clients[i], chip);
+		max77620_regmap_config[i].lock_arg = chip;
+		chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
+		(const struct regmap_config *)&max77620_regmap_config[i]);
+		if (IS_ERR(chip->rmap[i])) {
+			ret = PTR_ERR(chip->rmap[i]);
+			dev_err(&client->dev,
+				"regmap %d init failed, err %d\n", i, ret);
+			goto fail_client_reg;
+		}
+	}
+
+	ret = max77620_read_es_version(chip);
+	if (ret < 0) {
+		dev_err(chip->dev, "Chip revision init failed: %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = max77620_initialise_chip(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "Chip initialisation failed: %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
+		chip->chip_irq, IRQF_ONESHOT | IRQF_SHARED, chip->irq_base,
+		&max77620_top_irq_chip, &chip->top_irq_data);
+	if (ret < 0) {
+		dev_err(chip->dev, "Failed to add top irq_chip %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = max77620_initialise_fps(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "FPS initialisation failed: %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	ret = max77620_init_backup_battery_charging(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev,
+			"Backup battery charging init failed: %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	ret = max77620_init_low_battery_monitor(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "Low battery monitor init failed: %d\n",
+			ret);
+		goto fail_free_irq;
+	}
+
+	ret =  mfd_add_devices(&client->dev, -1, children->cells,
+			children->ncells, NULL, 0,
+			regmap_irq_get_domain(chip->top_irq_data));
+	if (ret < 0) {
+		dev_err(&client->dev, "mfd add dev fail %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	chip->irq_mbattlow = max77620_irq_get_virq(chip->dev,
+					MAX77620_IRQ_LBT_MBATLOW);
+	if (chip->irq_mbattlow) {
+		ret = devm_request_threaded_irq(chip->dev, chip->irq_mbattlow,
+			NULL, max77620_mbattlow_irq,
+			IRQF_ONESHOT, dev_name(chip->dev),
+			chip);
+		if (ret < 0)
+			dev_err(&client->dev, "request irq %d failed: %d\n",
+			chip->irq_mbattlow, ret);
+	}
+
+	dev_info(&client->dev, "max77620 probe successfully\n");
+	return 0;
+
+fail_free_irq:
+	regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
+
+fail_client_reg:
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (!chip->clients[i] || chip->clients[i] == client)
+			continue;
+		i2c_unregister_device(chip->clients[i]);
+	}
+	return ret;
+}
+
+static int max77620_remove(struct i2c_client *client)
+{
+
+	struct max77620_chip *chip = i2c_get_clientdata(client);
+	int i;
+
+	mfd_remove_devices(chip->dev);
+	regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
+
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (chip->clients[i] != client)
+			i2c_unregister_device(chip->clients[i]);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_set_fps_period(struct max77620_chip *chip,
+	int fps_id, int time_period)
+{
+	unsigned int config;
+	struct device *dev = chip->dev;
+	int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
+	int ret;
+	int i;
+
+	for (i = 0; i < 0x7; ++i) {
+		int x = base_fps_time * BIT(i);
+
+		if (x >= time_period)
+			break;
+	}
+	config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_FPS_CFG0 + fps_id,
+			MAX77620_FPS_TIME_PERIOD_MASK, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg 0x%02x write failed: %d\n",
+			MAX77620_REG_FPS_CFG0 + fps_id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_i2c_suspend(struct device *dev)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	unsigned int config;
+	int fps;
+	int ret;
+
+	for (fps = 0; fps < 2; ++fps) {
+		if (chip->suspend_fps_period[fps] < 0)
+			continue;
+
+		ret = max77620_set_fps_period(chip, fps,
+				chip->suspend_fps_period[fps]);
+		if (ret < 0)
+			dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
+	}
+
+	/*
+	 * For MAX20024: No need to configure SLPEN on suspend as
+	 * it will be configured on Init.
+	 */
+	if (chip->id == MAX20024)
+		return 0;
+
+	config = (chip->sleep_enable) ? MAX77620_ONOFFCNFG1_SLPEN : 0;
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SLPEN,
+			config);
+	if (ret < 0)
+		dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
+
+	/* Disable WK_EN0 */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0, 0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int max77620_i2c_resume(struct device *dev)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	int ret;
+	int fps;
+
+	for (fps = 0; fps < 2; ++fps) {
+		if (chip->active_fps_period[fps] < 0)
+			continue;
+
+		ret = max77620_set_fps_period(chip, fps,
+				chip->active_fps_period[fps]);
+		if (ret < 0)
+			dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
+	}
+
+	/*
+	 * For MAX20024: No need to configure WKEN0 on resume as
+	 * it is configured on Init.
+	 */
+	if (chip->id == MAX20024)
+		return 0;
+
+	/* Enable WK_EN0 */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+		MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
+		MAX77620_ONOFFCNFG2_WK_EN0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+#endif
+
+static const struct i2c_device_id max77620_id[] = {
+	{"max77620", 0},
+	{"max20024", 1},
+	{},
+};
+MODULE_DEVICE_TABLE(i2c, max77620_id);
+
+static const struct dev_pm_ops max77620_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_i2c_suspend, max77620_i2c_resume)
+};
+
+static struct i2c_driver max77620_driver = {
+	.driver = {
+		.name = "max77620",
+		.owner = THIS_MODULE,
+		.pm = &max77620_pm_ops,
+		.of_match_table = max77620_of_match,
+	},
+	.probe = max77620_probe,
+	.remove = max77620_remove,
+	.id_table = max77620_id,
+};
+
+static int __init max77620_init(void)
+{
+	return i2c_add_driver(&max77620_driver);
+}
+subsys_initcall(max77620_init);
+
+static void __exit max77620_exit(void)
+{
+	i2c_del_driver(&max77620_driver);
+}
+module_exit(max77620_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 Multi Function Device Core Driver");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
+MODULE_ALIAS("i2c:max77620");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
new file mode 100644
index 0000000..9d712b2
--- /dev/null
+++ b/include/linux/mfd/max77620.h
@@ -0,0 +1,503 @@
+/*
+ * max77620.h: Defining registers address and its bit definitions
+ *	of MAX77620 and	MAX20024
+ *
+ * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _LINUX_MFD_MAX77620_H_
+#define _LINUX_MFD_MAX77620_H_
+
+#include <linux/irq.h>
+#include <linux/i2c.h>
+#include <linux/mfd/core.h>
+#include <linux/regmap.h>
+#include <linux/regulator/machine.h>
+#include <linux/mutex.h>
+
+/* RTC Registers */
+#define MAX77620_REG_RTCINT			0x00
+#define MAX77620_REG_RTCINTM			0x01
+#define MAX77620_REG_RTCCNTLM			0x02
+#define MAX77620_REG_RTCCNTL			0x03
+#define MAX77620_REG_RTCUPDATE0			0x04
+#define MAX77620_REG_RTCUPDATE1			0x05
+#define MAX77620_REG_RTCSMPL			0x06
+#define MAX77620_REG_RTCSEC			0x07
+#define MAX77620_REG_RTCMIN			0x08
+#define MAX77620_REG_RTCHOUR			0x09
+#define MAX77620_REG_RTCDOW			0x0A
+#define MAX77620_REG_RTCMONTH			0x0B
+#define MAX77620_REG_RTCYEAR			0x0C
+#define MAX77620_REG_RTCDOM			0x0D
+#define MAX77620_REG_RTCSECA1			0x0E
+#define MAX77620_REG_RTCMINA1			0x0F
+#define MAX77620_REG_RTCHOURA1			0x10
+#define MAX77620_REG_RTCDOWA1			0x11
+#define MAX77620_REG_RTCMONTHA1			0x12
+#define MAX77620_REG_RTCYEARA1			0x13
+#define MAX77620_REG_RTCDOMA1			0x14
+#define MAX77620_REG_RTCSECA2			0x15
+#define MAX77620_REG_RTCMINA2			0x16
+#define MAX77620_REG_RTCHOURA2			0x17
+#define MAX77620_REG_RTCDOWA2			0x18
+#define MAX77620_REG_RTCMONTHA2			0x19
+#define MAX77620_REG_RTCYEARA2			0x1A
+#define MAX77620_REG_RTCDOMA2			0x1B
+
+/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
+#define MAX77620_REG_CNFGGLBL1			0x00
+#define MAX77620_REG_CNFGGLBL2			0x01
+#define MAX77620_REG_CNFGGLBL3			0x02
+#define MAX77620_REG_CNFG1_32K			0x03
+#define MAX77620_REG_CNFGBBC			0x04
+#define MAX77620_REG_IRQTOP			0x05
+#define MAX77620_REG_INTLBT			0x06
+#define MAX77620_REG_IRQSD			0x07
+#define MAX77620_REG_IRQ_LVL2_L0_7		0x08
+#define MAX77620_REG_IRQ_LVL2_L8		0x09
+#define MAX77620_REG_IRQ_LVL2_GPIO		0x0A
+#define MAX77620_REG_ONOFFIRQ			0x0B
+#define MAX77620_REG_NVERC			0x0C
+#define MAX77620_REG_IRQTOPM			0x0D
+#define MAX77620_REG_INTENLBT			0x0E
+#define MAX77620_REG_IRQMASKSD			0x0F
+#define MAX77620_REG_IRQ_MSK_L0_7		0x10
+#define MAX77620_REG_IRQ_MSK_L8			0x11
+#define MAX77620_REG_ONOFFIRQM			0x12
+#define MAX77620_REG_STATLBT			0x13
+#define MAX77620_REG_STATSD			0x14
+#define MAX77620_REG_ONOFFSTAT			0x15
+
+/* SD and LDO Registers */
+#define MAX77620_REG_SD0			0x16
+#define MAX77620_REG_SD1			0x17
+#define MAX77620_REG_SD2			0x18
+#define MAX77620_REG_SD3			0x19
+#define MAX77620_REG_SD4			0x1A
+#define MAX77620_REG_DVSSD0			0x1B
+#define MAX77620_REG_DVSSD1			0x1C
+#define MAX77620_REG_SD0_CFG			0x1D
+#define MAX77620_REG_SD1_CFG			0x1E
+#define MAX77620_REG_SD2_CFG			0x1F
+#define MAX77620_REG_SD3_CFG			0x20
+#define MAX77620_REG_SD4_CFG			0x21
+#define MAX77620_REG_SD_CFG2			0x22
+#define MAX77620_REG_LDO0_CFG			0x23
+#define MAX77620_REG_LDO0_CFG2			0x24
+#define MAX77620_REG_LDO1_CFG			0x25
+#define MAX77620_REG_LDO1_CFG2			0x26
+#define MAX77620_REG_LDO2_CFG			0x27
+#define MAX77620_REG_LDO2_CFG2			0x28
+#define MAX77620_REG_LDO3_CFG			0x29
+#define MAX77620_REG_LDO3_CFG2			0x2A
+#define MAX77620_REG_LDO4_CFG			0x2B
+#define MAX77620_REG_LDO4_CFG2			0x2C
+#define MAX77620_REG_LDO5_CFG			0x2D
+#define MAX77620_REG_LDO5_CFG2			0x2E
+#define MAX77620_REG_LDO6_CFG			0x2F
+#define MAX77620_REG_LDO6_CFG2			0x30
+#define MAX77620_REG_LDO7_CFG			0x31
+#define MAX77620_REG_LDO7_CFG2			0x32
+#define MAX77620_REG_LDO8_CFG			0x33
+#define MAX77620_REG_LDO8_CFG2			0x34
+#define MAX77620_REG_LDO_CFG3			0x35
+
+#define MAX77620_LDO_SLEW_RATE_MASK		0x1
+
+/* LDO Configuration 3 */
+#define MAX77620_TRACK4_MASK			BIT(5)
+#define MAX77620_TRACK4_SHIFT			5
+
+/* Voltage */
+#define  MAX77620_SDX_VOLT_MASK			0xFF
+#define  MAX77620_SD0_VOLT_MASK			0x3F
+#define  MAX77620_SD1_VOLT_MASK			0x7F
+#define MAX77620_LDO_VOLT_MASK			0x3F
+
+#define MAX77620_REG_GPIO0			0x36
+#define MAX77620_REG_GPIO1			0x37
+#define MAX77620_REG_GPIO2			0x38
+#define MAX77620_REG_GPIO3			0x39
+#define MAX77620_REG_GPIO4			0x3A
+#define MAX77620_REG_GPIO5			0x3B
+#define MAX77620_REG_GPIO6			0x3C
+#define MAX77620_REG_GPIO7			0x3D
+#define MAX77620_REG_PUE_GPIO			0x3E
+#define MAX77620_REG_PDE_GPIO			0x3F
+#define MAX77620_REG_AME_GPIO			0x40
+#define MAX77620_REG_ONOFFCNFG1			0x41
+#define MAX77620_REG_ONOFFCNFG2			0x42
+
+/* FPS Registers */
+#define MAX77620_REG_FPS_CFG0			0x43
+#define MAX77620_REG_FPS_CFG1			0x44
+#define MAX77620_REG_FPS_CFG2			0x45
+#define MAX77620_REG_FPS_LDO0			0x46
+#define MAX77620_REG_FPS_LDO1			0x47
+#define MAX77620_REG_FPS_LDO2			0x48
+#define MAX77620_REG_FPS_LDO3			0x49
+#define MAX77620_REG_FPS_LDO4			0x4A
+#define MAX77620_REG_FPS_LDO5			0x4B
+#define MAX77620_REG_FPS_LDO6			0x4C
+#define MAX77620_REG_FPS_LDO7			0x4D
+#define MAX77620_REG_FPS_LDO8			0x4E
+#define MAX77620_REG_FPS_SD0			0x4F
+#define MAX77620_REG_FPS_SD1			0x50
+#define MAX77620_REG_FPS_SD2			0x51
+#define MAX77620_REG_FPS_SD3			0x52
+#define MAX77620_REG_FPS_SD4			0x53
+#define MAX77620_REG_FPS_NONE			0
+
+#define MAX77620_FPS_SRC_MASK			0xC0
+#define MAX77620_FPS_SRC_SHIFT			6
+#define MAX77620_FPS_PU_PERIOD_MASK		0x38
+#define MAX77620_FPS_PU_PERIOD_SHIFT		3
+#define MAX77620_FPS_PD_PERIOD_MASK		0x07
+#define MAX77620_FPS_PD_PERIOD_SHIFT		0
+#define MAX77620_FPS_TIME_PERIOD_MASK		0x38
+#define MAX77620_FPS_TIME_PERIOD_SHIFT		3
+#define MAX77620_FPS_EN_SRC_MASK		0x06
+#define MAX77620_FPS_EN_SRC_SHIFT		1
+#define MAX77620_FPS_ENFPS_MASK			0x01
+
+#define MAX77620_REG_FPS_GPIO1			0x54
+#define MAX77620_REG_FPS_GPIO2			0x55
+#define MAX77620_REG_FPS_GPIO3			0x56
+#define MAX77620_REG_FPS_RSO			0x57
+#define MAX77620_REG_CID0			0x58
+#define MAX77620_REG_CID1			0x59
+#define MAX77620_REG_CID2			0x5A
+#define MAX77620_REG_CID3			0x5B
+#define MAX77620_REG_CID4			0x5C
+#define MAX77620_REG_CID5			0x5D
+
+#define MAX77620_REG_DVSSD4			0x5E
+#define MAX20024_REG_MAX_ADD			0x70
+
+#define MAX77620_CID_DIDM_MASK			0xF0
+#define MAX77620_CID_DIDM_SHIFT			4
+
+/* CNCG2SD */
+#define MAX77620_SD_CNF2_ROVS_EN_SD1		BIT(1)
+#define MAX77620_SD_CNF2_ROVS_EN_SD0		BIT(2)
+
+/* Device Identification Metal */
+#define MAX77620_CID5_DIDM(n)			(((n) >> 4) & 0xF)
+/* Device Indentification OTP */
+#define MAX77620_CID5_DIDO(n)			((n) & 0xF)
+
+/* SD CNFG1 */
+#define MAX77620_SD_SR_MASK			0xC0
+#define MAX77620_SD_SR_SHIFT			6
+#define MAX77620_SD_POWER_MODE_MASK		0x30
+#define MAX77620_SD_POWER_MODE_SHIFT		4
+#define MAX77620_SD_CFG1_ADE_MASK		BIT(3)
+#define MAX77620_SD_CFG1_ADE_DISABLE		0
+#define MAX77620_SD_CFG1_ADE_ENABLE		BIT(3)
+#define MAX77620_SD_FPWM_MASK			0x04
+#define MAX77620_SD_FPWM_SHIFT			2
+#define MAX77620_SD_FSRADE_MASK			0x01
+#define MAX77620_SD_FSRADE_SHIFT		0
+#define MAX77620_SD_CFG1_FPWM_SD_MASK		BIT(2)
+#define MAX77620_SD_CFG1_FPWM_SD_SKIP		0
+#define MAX77620_SD_CFG1_FPWM_SD_FPWM		BIT(2)
+#define MAX77620_SD_CFG1_FSRADE_SD_MASK		BIT(0)
+#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE	0
+#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE	BIT(0)
+
+/* LDO_CNFG2 */
+#define MAX77620_LDO_POWER_MODE_MASK		0xC0
+#define MAX77620_LDO_POWER_MODE_SHIFT		6
+#define MAX77620_LDO_CFG2_ADE_MASK		BIT(1)
+#define MAX77620_LDO_CFG2_ADE_DISABLE		0
+#define MAX77620_LDO_CFG2_ADE_ENABLE		BIT(1)
+#define MAX77620_LDO_CFG2_SS_MASK		BIT(0)
+#define MAX77620_LDO_CFG2_SS_FAST		BIT(0)
+#define MAX77620_LDO_CFG2_SS_SLOW		0
+
+#define MAX77620_IRQ_TOP_GLBL_MASK		BIT(7)
+#define MAX77620_IRQ_TOP_SD_MASK		BIT(6)
+#define MAX77620_IRQ_TOP_LDO_MASK		BIT(5)
+#define MAX77620_IRQ_TOP_GPIO_MASK		BIT(4)
+#define MAX77620_IRQ_TOP_RTC_MASK		BIT(3)
+#define MAX77620_IRQ_TOP_32K_MASK		BIT(2)
+#define MAX77620_IRQ_TOP_ONOFF_MASK		BIT(1)
+
+#define MAX77620_IRQ_LBM_MASK			BIT(3)
+#define MAX77620_IRQ_TJALRM1_MASK		BIT(2)
+#define MAX77620_IRQ_TJALRM2_MASK		BIT(1)
+
+#define MAX77620_PWR_I2C_ADDR			0x3c
+#define MAX77620_RTC_I2C_ADDR			0x68
+
+#define MAX77620_CNFG_GPIO_DRV_MASK		BIT(0)
+#define MAX77620_CNFG_GPIO_DRV_PUSHPULL		BIT(0)
+#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN	0
+#define MAX77620_CNFG_GPIO_DIR_MASK		BIT(1)
+#define MAX77620_CNFG_GPIO_DIR_INPUT		BIT(1)
+#define MAX77620_CNFG_GPIO_DIR_OUTPUT		0
+#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK	BIT(2)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK	BIT(3)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH	BIT(3)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW	0
+#define MAX77620_CNFG_GPIO_INT_MASK		(0x3 << 4)
+#define MAX77620_CNFG_GPIO_INT_FALLING		BIT(4)
+#define MAX77620_CNFG_GPIO_INT_RISING		BIT(5)
+#define MAX77620_CNFG_GPIO_DBNC_MASK		(0x3 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_None		(0x0 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_8ms		(0x1 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_16ms		(0x2 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_32ms		(0x3 << 6)
+
+#define MAX77620_IRQ_LVL2_GPIO_EDGE0		BIT(0)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE1		BIT(1)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE2		BIT(2)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE3		BIT(3)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE4		BIT(4)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE5		BIT(5)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE6		BIT(6)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE7		BIT(7)
+
+#define MAX77620_CNFG1_32K_OUT0_EN		BIT(2)
+
+#define MAX77620_ONOFFCNFG1_SFT_RST		BIT(7)
+#define MAX77620_ONOFFCNFG1_MRT_MASK		0x38
+#define MAX77620_ONOFFCNFG1_MRT_SHIFT		0x3
+#define MAX77620_ONOFFCNFG1_SLPEN		BIT(2)
+#define MAX77620_ONOFFCNFG1_PWR_OFF		BIT(1)
+#define MAX20024_ONOFFCNFG1_CLRSE		0x18
+
+#define MAX77620_ONOFFCNFG2_SFT_RST_WK		BIT(7)
+#define MAX77620_ONOFFCNFG2_WD_RST_WK		BIT(6)
+#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK		BIT(5)
+#define MAX77620_ONOFFCNFG2_WK_EN0		BIT(0)
+
+#define	MAX77620_GLBLM_MASK			BIT(0)
+
+#define MAX77620_WDTC_MASK			0x3
+#define MAX77620_WDTOFFC			BIT(4)
+#define MAX77620_WDTSLPC			BIT(3)
+#define MAX77620_WDTEN				BIT(2)
+
+#define MAX77620_TWD_MASK			0x3
+#define MAX77620_TWD_2s				0x0
+#define MAX77620_TWD_16s			0x1
+#define MAX77620_TWD_64s			0x2
+#define MAX77620_TWD_128s			0x3
+
+#define MAX77620_CNFGGLBL1_LBDAC_EN		BIT(7)
+#define MAX77620_CNFGGLBL1_MPPLD		BIT(6)
+#define MAX77620_CNFGGLBL1_LBHYST		(BIT(5) | BIT(4))
+#define MAX77620_CNFGGLBL1_LBDAC		0x0E
+#define MAX77620_CNFGGLBL1_LBRSTEN		BIT(0)
+
+/* CNFG BBC registers */
+#define MAX77620_CNFGBBC_ENABLE			BIT(0)
+#define MAX77620_CNFGBBC_CURRENT_MASK		0x06
+#define MAX77620_CNFGBBC_CURRENT_SHIFT		1
+#define MAX77620_CNFGBBC_VOLTAGE_MASK		0x18
+#define MAX77620_CNFGBBC_VOLTAGE_SHIFT		3
+#define MAX77620_CNFGBBC_LOW_CURRENT_ENABLE	BIT(5)
+#define MAX77620_CNFGBBC_RESISTOR_MASK		0xC0
+#define MAX77620_CNFGBBC_RESISTOR_SHIFT		6
+
+/* I2c Slave Id */
+enum {
+	MAX77620_PWR_SLAVE,
+	MAX77620_RTC_SLAVE,
+	MAX77620_NUM_SLAVES,
+};
+
+/* GPIOs */
+enum {
+	MAX77620_GPIO0,
+	MAX77620_GPIO1,
+	MAX77620_GPIO2,
+	MAX77620_GPIO3,
+	MAX77620_GPIO4,
+	MAX77620_GPIO5,
+	MAX77620_GPIO6,
+	MAX77620_GPIO7,
+
+	MAX77620_GPIO_NR,
+};
+
+/* Interrupts */
+enum {
+	MAX77620_IRQ_TOP_GLBL,		/* Low-Battery */
+	MAX77620_IRQ_TOP_SD,		/* SD power fail */
+	MAX77620_IRQ_TOP_LDO,		/* LDO power fail */
+	MAX77620_IRQ_TOP_GPIO,		/* TOP GPIO internal int to MAX77620 */
+	MAX77620_IRQ_TOP_RTC,		/* RTC */
+	MAX77620_IRQ_TOP_32K,		/* 32kHz oscillator */
+	MAX77620_IRQ_TOP_ONOFF,		/* ON/OFF oscillator */
+
+	MAX77620_IRQ_LBT_MBATLOW,	/* Thermal alarm status, > 120C */
+	MAX77620_IRQ_LBT_TJALRM1,	/* Thermal alarm status, > 120C */
+	MAX77620_IRQ_LBT_TJALRM2,	/* Thermal alarm status, > 140C */
+
+	MAX77620_IRQ_GPIO0,		/* GPIO0 edge detection */
+	MAX77620_IRQ_GPIO1,		/* GPIO1 edge detection */
+	MAX77620_IRQ_GPIO2,		/* GPIO2 edge detection */
+	MAX77620_IRQ_GPIO3,		/* GPIO3 edge detection */
+	MAX77620_IRQ_GPIO4,		/* GPIO4 edge detection */
+	MAX77620_IRQ_GPIO5,		/* GPIO5 edge detection */
+	MAX77620_IRQ_GPIO6,		/* GPIO6 edge detection */
+	MAX77620_IRQ_GPIO7,		/* GPIO7 edge detection */
+
+	MAX77620_IRQ_ONOFF_MRWRN,	/* Hard power off warnning */
+	MAX77620_IRQ_ONOFF_EN0_1SEC,	/* EN0 active for 1s */
+	MAX77620_IRQ_ONOFF_EN0_F,	/* EN0 falling */
+	MAX77620_IRQ_ONOFF_EN0_R,	/* EN0 rising */
+	MAX77620_IRQ_ONOFF_LID_F,	/* LID falling */
+	MAX77620_IRQ_ONOFF_LID_R,	/* LID rising */
+	MAX77620_IRQ_ONOFF_ACOK_F,	/* ACOK falling */
+	MAX77620_IRQ_ONOFF_ACOK_R,	/* ACOK rising */
+
+	MAX77620_IRQ_NVER,		/* Non-Volatile Event Recorder */
+	MAX77620_IRQ_NR,
+};
+
+enum max77620_regulators {
+	MAX77620_REGULATOR_ID_SD0,
+	MAX77620_REGULATOR_ID_SD1,
+	MAX77620_REGULATOR_ID_SD2,
+	MAX77620_REGULATOR_ID_SD3,
+	MAX77620_REGULATOR_ID_SD4,
+	MAX77620_REGULATOR_ID_LDO0,
+	MAX77620_REGULATOR_ID_LDO1,
+	MAX77620_REGULATOR_ID_LDO2,
+	MAX77620_REGULATOR_ID_LDO3,
+	MAX77620_REGULATOR_ID_LDO4,
+	MAX77620_REGULATOR_ID_LDO5,
+	MAX77620_REGULATOR_ID_LDO6,
+	MAX77620_REGULATOR_ID_LDO7,
+	MAX77620_REGULATOR_ID_LDO8,
+	MAX77620_NUM_REGS,
+};
+
+/* FPS Source */
+enum max77620_regulator_fps_src {
+	FPS_SRC_0,
+	FPS_SRC_1,
+	FPS_SRC_2,
+	FPS_SRC_NONE,
+	FPS_SRC_DEF,
+};
+
+/* Regulator types */
+enum max77620_regulator_type {
+	MAX77620_REGULATOR_TYPE_SD,
+	MAX77620_REGULATOR_TYPE_LDO_N,
+	MAX77620_REGULATOR_TYPE_LDO_P,
+};
+
+enum max77620_chip_id {
+	MAX77620,
+	MAX20024,
+};
+
+struct max77620_chip {
+	struct device *dev;
+
+	struct i2c_client *clients[MAX77620_NUM_SLAVES];
+	struct regmap *rmap[MAX77620_NUM_SLAVES];
+
+	int chip_irq;
+	int irq_base;
+	int irq_mbattlow;
+
+	struct mutex mutex_config;
+	bool sleep_enable;
+	bool enable_global_lpm;
+	int active_fps_period[3];
+	int suspend_fps_period[3];
+
+	int es_minor_version;
+	int es_major_version;
+
+	struct regmap_irq_chip_data *top_irq_data;
+	struct regmap_irq_chip_data *gpio_irq_data;
+
+	/* chip id */
+	u32 id;
+};
+
+static inline int max77620_irq_get_virq(struct device *dev, int irq)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_irq_get_virq(chip->top_irq_data, irq);
+}
+
+static inline int max77620_reg_write(struct device *dev, int sid,
+		unsigned int reg, u8 val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_write(chip->rmap[sid], reg, val);
+}
+
+static inline int max77620_reg_writes(struct device *dev, int sid,
+		unsigned int reg, int len, void *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	int ret = 0;
+	u8 *src = (u8 *)val;
+	int i;
+
+	/* Device does not support bulk write */
+	for (i = 0; i < len; i++) {
+		ret = regmap_write(chip->rmap[sid], reg, *src++);
+		if (ret < 0)
+			break;
+		reg++;
+	}
+	if (ret < 0)
+		dev_err(chip->dev, "%s() failed: %d\n", __func__, ret);
+	return ret;
+}
+
+static inline int max77620_reg_read(struct device *dev, int sid,
+		unsigned int reg, u8 *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	unsigned int ival;
+	int ret;
+
+	ret = regmap_read(chip->rmap[sid], reg, &ival);
+	if (ret < 0) {
+		dev_err(dev, "failed reading from reg 0x%02x\n", reg);
+		return ret;
+	}
+	*val = ival;
+	return ret;
+}
+
+static inline int max77620_reg_reads(struct device *dev, int sid,
+		unsigned int reg, int len, void *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_bulk_read(chip->rmap[sid], reg, val, len);
+}
+
+static inline int max77620_reg_update(struct device *dev, int sid,
+		unsigned int reg, unsigned int mask, unsigned int val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_update_bits(chip->rmap[sid], reg, mask, val);
+}
+
+#endif /* _LINUX_MFD_MAX77620_H_ */
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

MAX77620/MAX20024 are Power Management IC from the MAXIM.
It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
watchdog, clock etc.

Add MFD drier to provides common support for accessing the
device; additional drivers is developed on respected subsystem
in order to use the functionality of the device.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/mfd/Kconfig          |  15 +
 drivers/mfd/Makefile         |   1 +
 drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
 4 files changed, 1445 insertions(+)
 create mode 100644 drivers/mfd/max77620.c
 create mode 100644 include/linux/mfd/max77620.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 9581ebb..edeb85c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -492,6 +492,21 @@ config MFD_MAX14577
 	  additional drivers must be enabled in order to use the functionality
 	  of the device.
 
+config MFD_MAX77620
+	bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support"
+	depends on I2C=y
+	depends on OF
+	select MFD_CORE
+	select REGMAP_I2C
+	select REGMAP_IRQ
+	select IRQ_DOMAIN
+	help
+	  Say yes here to add support for Maxim Semiconductor MAX77620 and
+	  MAX20024 which are Power Management IC with General purpose pins,
+	  RTC, regulators, clock generator, watchdog etc. This driver
+	  provides common support for accessing the device; additional drivers
+	  must be enabled in order to use the functionality of the device.
+
 config MFD_MAX77686
 	bool "Maxim Semiconductor MAX77686/802 PMIC Support"
 	depends on I2C=y
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 0f230a6..97910ed 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -123,6 +123,7 @@ obj-$(CONFIG_MFD_DA9063)	+= da9063.o
 obj-$(CONFIG_MFD_DA9150)	+= da9150-core.o
 
 obj-$(CONFIG_MFD_MAX14577)	+= max14577.o
+obj-$(CONFIG_MFD_MAX77620)	+= max77620.o
 obj-$(CONFIG_MFD_MAX77686)	+= max77686.o
 obj-$(CONFIG_MFD_MAX77693)	+= max77693.o
 obj-$(CONFIG_MFD_MAX77843)	+= max77843.o
diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c
new file mode 100644
index 0000000..5f59279
--- /dev/null
+++ b/drivers/mfd/max77620.c
@@ -0,0 +1,926 @@
+/*
+ * Maxim MAX77620 MFD Driver
+ *
+ * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ *
+ * Author:
+ *		Laxman Dewangan <ldewangan@nvidia.com>
+ *		Chaitanya Bandi <bandik@nvidia.com>
+ *		Mallikarjun Kasoju <mkasoju@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/ratelimit.h>
+#include <linux/kthread.h>
+#include <linux/mfd/core.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+
+#include <linux/mfd/max77620.h>
+
+static struct resource gpio_resources[] = {
+	{
+		.start	= MAX77620_IRQ_TOP_GPIO,
+		.end	= MAX77620_IRQ_TOP_GPIO,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static struct resource rtc_resources[] = {
+	{
+		.start	= MAX77620_IRQ_TOP_RTC,
+		.end	= MAX77620_IRQ_TOP_RTC,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static struct resource thermal_resources[] = {
+	{
+		.start	= MAX77620_IRQ_LBT_TJALRM1,
+		.end	= MAX77620_IRQ_LBT_TJALRM1,
+		.flags  = IORESOURCE_IRQ,
+	},
+	{
+		.start	= MAX77620_IRQ_LBT_TJALRM2,
+		.end	= MAX77620_IRQ_LBT_TJALRM2,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static const struct regmap_irq max77620_top_irqs[] = {
+	[MAX77620_IRQ_TOP_GLBL] = {
+		.mask = MAX77620_IRQ_TOP_GLBL_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_SD] = {
+		.mask = MAX77620_IRQ_TOP_SD_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_LDO] = {
+		.mask = MAX77620_IRQ_TOP_LDO_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_GPIO] = {
+		.mask = MAX77620_IRQ_TOP_GPIO_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_RTC] = {
+		.mask = MAX77620_IRQ_TOP_RTC_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_32K] = {
+		.mask = MAX77620_IRQ_TOP_32K_MASK,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_TOP_ONOFF] = {
+		.mask = MAX77620_IRQ_TOP_ONOFF_MASK,
+		.reg_offset = 0,
+	},
+
+	[MAX77620_IRQ_LBT_MBATLOW] = {
+		.mask = MAX77620_IRQ_LBM_MASK,
+		.reg_offset = 1,
+	},
+	[MAX77620_IRQ_LBT_TJALRM1] = {
+		.mask = MAX77620_IRQ_TJALRM1_MASK,
+		.reg_offset = 1,
+	},
+	[MAX77620_IRQ_LBT_TJALRM2] = {
+		.mask = MAX77620_IRQ_TJALRM2_MASK,
+		.reg_offset = 1,
+	},
+
+};
+
+static const char * const max77620_nverc[] = {
+	"Shutdown-pin",
+	"System WatchDog Timer",
+	"Hard Reset",
+	"Junction Temp Overload",
+	"Main-Battery Low",
+	"Main-Battery overvoltage Lockout",
+	"Main-Battery undervoltage Lockout",
+	"Reset input",
+};
+
+enum max77660_ids {
+	MAX77620_PMIC_ID,
+	MAX77620_GPIO_ID,
+	MAX77620_RTC_ID,
+	MAX77620_PINCTRL_ID,
+	MAX77620_CLK_ID,
+	MAX77620_POWER_OFF_ID,
+	MAX77620_WDT_ID,
+	MAX77620_THERMAL_ID,
+};
+
+#define MAX77620_SUB_MODULE_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max77620-"#_name,			\
+		.num_resources	= ARRAY_SIZE(_name##_resources), \
+		.resources	= &_name##_resources[0],	\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX20024_SUB_MODULE_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max20024-"#_name,			\
+		.num_resources	= ARRAY_SIZE(_name##_resources), \
+		.resources	= &_name##_resources[0],	\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX77620_SUB_MODULE_NO_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max77620-"#_name,			\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+#define MAX20024_SUB_MODULE_NO_RES(_name, _id)			\
+	[MAX77620_##_id##_ID] = {				\
+		.name = "max20024-"#_name,			\
+		.id = MAX77620_##_id##_ID,			\
+	}
+
+static struct mfd_cell max77620_children[] = {
+	MAX77620_SUB_MODULE_RES(gpio, GPIO),
+	MAX77620_SUB_MODULE_NO_RES(pmic, PMIC),
+	MAX77620_SUB_MODULE_RES(rtc, RTC),
+	MAX77620_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
+	MAX77620_SUB_MODULE_NO_RES(clk, CLK),
+	MAX77620_SUB_MODULE_NO_RES(power-off, POWER_OFF),
+	MAX77620_SUB_MODULE_NO_RES(wdt, WDT),
+	MAX77620_SUB_MODULE_RES(thermal, THERMAL),
+};
+
+static struct mfd_cell max20024_children[] = {
+	MAX20024_SUB_MODULE_RES(gpio, GPIO),
+	MAX20024_SUB_MODULE_NO_RES(pmic, PMIC),
+	MAX20024_SUB_MODULE_RES(rtc, RTC),
+	MAX20024_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
+	MAX20024_SUB_MODULE_NO_RES(clk, CLK),
+	MAX20024_SUB_MODULE_NO_RES(power-off, POWER_OFF),
+	MAX20024_SUB_MODULE_NO_RES(wdt, WDT),
+	MAX20024_SUB_MODULE_RES(thermal, THERMAL),
+};
+
+struct max77620_sub_modules {
+	struct mfd_cell *cells;
+	int ncells;
+	u32 id;
+};
+
+static const struct max77620_sub_modules max77620_cells = {
+	.cells = max77620_children,
+	.ncells = ARRAY_SIZE(max77620_children),
+	.id = MAX77620,
+};
+
+static const struct max77620_sub_modules  max20024_cells = {
+	.cells = max20024_children,
+	.ncells = ARRAY_SIZE(max20024_children),
+	.id = MAX20024,
+};
+
+static const struct of_device_id max77620_of_match[] = {
+	{
+		.compatible = "maxim,max77620",
+		.data = &max77620_cells,
+	}, {
+		.compatible = "maxim,max20024",
+		.data = &max20024_cells,
+	}, {
+	},
+};
+MODULE_DEVICE_TABLE(of, max77620_of_match);
+
+static struct regmap_irq_chip max77620_top_irq_chip = {
+	.name = "max77620-top",
+	.irqs = max77620_top_irqs,
+	.num_irqs = ARRAY_SIZE(max77620_top_irqs),
+	.num_regs = 2,
+	.status_base = MAX77620_REG_IRQTOP,
+	.mask_base = MAX77620_REG_IRQTOPM,
+};
+
+static const struct regmap_range max77620_readable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+};
+
+static const struct regmap_access_table max77620_readable_table = {
+	.yes_ranges = max77620_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max77620_readable_ranges),
+};
+
+static const struct regmap_range max20024_readable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+	regmap_reg_range(MAX20024_REG_MAX_ADD, MAX20024_REG_MAX_ADD),
+};
+
+static const struct regmap_access_table max20024_readable_table = {
+	.yes_ranges = max20024_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max20024_readable_ranges),
+};
+
+static const struct regmap_range max77620_writable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
+};
+
+static const struct regmap_access_table max77620_writable_table = {
+	.yes_ranges = max77620_writable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max77620_writable_ranges),
+};
+
+static const struct regmap_range max77620_cacheable_ranges[] = {
+	regmap_reg_range(MAX77620_REG_SD0_CFG, MAX77620_REG_LDO_CFG3),
+	regmap_reg_range(MAX77620_REG_FPS_CFG0, MAX77620_REG_FPS_SD3),
+};
+
+static const struct regmap_access_table max77620_volatile_table = {
+	.no_ranges = max77620_cacheable_ranges,
+	.n_no_ranges = ARRAY_SIZE(max77620_cacheable_ranges),
+};
+
+static struct regmap_config max77620_regmap_config[] = {
+	[MAX77620_PWR_SLAVE] = {
+		.reg_bits = 8,
+		.val_bits = 8,
+		.max_register = MAX77620_REG_DVSSD4 + 1,
+		.cache_type = REGCACHE_RBTREE,
+		.rd_table = &max77620_readable_table,
+		.wr_table = &max77620_writable_table,
+		.volatile_table = &max77620_volatile_table,
+	},
+	[MAX77620_RTC_SLAVE] = {
+		.reg_bits = 8,
+		.val_bits = 8,
+		.max_register = 0x1b,
+	},
+};
+
+static int max77620_slave_address[MAX77620_NUM_SLAVES] = {
+	MAX77620_PWR_I2C_ADDR,
+	MAX77620_RTC_I2C_ADDR,
+};
+
+static int max77620_initialise_fps(struct max77620_chip *chip,
+			struct device *dev)
+{
+	struct device_node *node;
+	struct device_node *child;
+	u32 reg, pval;
+	int ret;
+	int time_period = 40;
+	int input_enable = 2;
+	bool enable_fps = false;
+	unsigned int mask;
+	unsigned int config;
+	int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
+	int i;
+
+	node = of_get_child_by_name(dev->of_node, "fps");
+	if (!node)
+		goto skip_fps;
+
+	for (reg = 0; reg < 3; ++reg) {
+		chip->active_fps_period[reg] = -1;
+		chip->suspend_fps_period[reg] = -1;
+	}
+
+	for_each_child_of_node(node, child) {
+		ret = of_property_read_u32(child, "reg", &reg);
+		if (ret) {
+			dev_err(dev, "node %s does not have reg property\n",
+					child->name);
+			continue;
+		}
+		if (reg > 2) {
+			dev_err(dev, "FPS%d is not supported\n", reg);
+			continue;
+		}
+
+		mask = 0;
+		ret = of_property_read_u32(child,
+				"maxim,active-fps-time-period", &pval);
+		if (!ret) {
+			time_period = min(pval, 5120U);
+			mask |= MAX77620_FPS_TIME_PERIOD_MASK;
+			chip->active_fps_period[reg] = time_period;
+		}
+
+		ret = of_property_read_u32(child,
+					"maxim,suspend-fps-time-period", &pval);
+		if (!ret)
+			chip->suspend_fps_period[reg] = min(pval, 5120U);
+
+		ret = of_property_read_u32(child, "maxim,fps-enable-input",
+						&pval);
+		if (!ret) {
+			if (pval > 2) {
+				dev_err(dev,
+				    "FPS enable-input %u is not supported\n",
+					pval);
+			} else {
+				input_enable = pval;
+				mask |= MAX77620_FPS_EN_SRC_MASK;
+			}
+		}
+
+		if (input_enable == 2) {
+			enable_fps = of_property_read_bool(child,
+						"maxim,fps-sw-enable");
+			mask |= MAX77620_FPS_ENFPS_MASK;
+		}
+
+		if (!chip->sleep_enable)
+			chip->sleep_enable = of_property_read_bool(child,
+						"maxim,enable-sleep");
+		if (!chip->enable_global_lpm)
+			chip->enable_global_lpm = of_property_read_bool(child,
+						"maxim,enable-global-lpm");
+
+		for (i = 0; i < 0x7; ++i) {
+			int x = base_fps_time * BIT(i);
+
+			if (x >= time_period)
+				break;
+		}
+		config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
+		config |= (input_enable & 0x3) << MAX77620_FPS_EN_SRC_SHIFT;
+		if (enable_fps)
+			config |= 1;
+		ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+				MAX77620_REG_FPS_CFG0 + reg, mask, config);
+		if (ret < 0) {
+			dev_err(dev, "Reg 0x%02x write failed: %d\n",
+				MAX77620_REG_FPS_CFG0 + reg, ret);
+			return ret;
+		}
+	}
+
+	config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2,
+			MAX77620_ONOFFCNFG2_SLP_LPM_MSK, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 update failed: %d\n", ret);
+		return ret;
+	}
+
+skip_fps:
+	/* Enable wake on EN0 pin */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
+			MAX77620_ONOFFCNFG2_WK_EN0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	if (!chip->sleep_enable)
+		chip->sleep_enable = of_property_read_bool(dev->of_node,
+						"maxim,enable-sleep");
+
+	/* For MAX20024, SLPEN will be POR reset if CLRSE is b11 */
+	if ((chip->id == MAX20024) && chip->sleep_enable) {
+		config = MAX77620_ONOFFCNFG1_SLPEN | MAX20024_ONOFFCNFG1_CLRSE;
+		ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, config, config);
+		if (ret < 0) {
+			dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static int max77620_init_backup_battery_charging(struct max77620_chip *chip,
+		struct device *dev)
+{
+	struct device_node *np;
+	u32 pval;
+	u8 config;
+	int charging_current;
+	int charging_voltage;
+	int resistor;
+	int ret;
+
+	np = of_get_child_by_name(dev->of_node, "backup-battery");
+	if (!np) {
+		dev_info(dev, "Backup battery charging support disabled\n");
+		max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_ENABLE, 0);
+		return 0;
+	}
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-charging-current", &pval);
+	charging_current = (!ret) ? pval : 50;
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-charging-voltage", &pval);
+	charging_voltage = (!ret) ? pval : 2500000;
+	charging_voltage /= 1000;
+
+	ret = of_property_read_u32(np,
+			"maxim,backup-battery-output-resister", &pval);
+	resistor = (!ret) ? pval : 1000;
+
+	config = MAX77620_CNFGBBC_ENABLE;
+	if (charging_current <= 50)
+		config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 100)
+		config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 200)
+		config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 400)
+		config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else if (charging_current <= 600)
+		config |= 1 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+	else
+		config |= 2 << MAX77620_CNFGBBC_CURRENT_SHIFT;
+
+	if (charging_current > 100)
+		config |= MAX77620_CNFGBBC_LOW_CURRENT_ENABLE;
+
+	if (charging_voltage <= 2500)
+		config |= 0 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else if (charging_voltage <= 3000)
+		config |= 1 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else if (charging_voltage <= 3300)
+		config |= 2 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+	else
+		config |= 3 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
+
+	if (resistor <= 100)
+		config |= 0 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 1000)
+		config |= 1 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 3000)
+		config |= 2 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+	else if (resistor <= 6000)
+		config |= 3 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
+
+	ret = max77620_reg_write(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGBBC, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg 0x%02x write failed: %d\n",
+			MAX77620_REG_CNFGBBC, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_init_low_battery_monitor(struct max77620_chip *chip,
+		struct device *dev)
+{
+	struct device_node *np;
+	bool pval;
+	u8 mask = 0;
+	u8 val = 0;
+	int ret;
+
+
+	np = of_get_child_by_name(dev->of_node, "low-battery-monitor");
+	if (!np)
+		return 0;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-dac-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
+		val |= MAX77620_CNFGGLBL1_LBDAC_EN;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-dac-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-shutdown-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_MPPLD;
+		val |= MAX77620_CNFGGLBL1_MPPLD;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-shutdown-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_MPPLD;
+
+	pval = of_property_read_bool(np, "maxim,low-battery-reset-enable");
+	if (pval) {
+		mask |= MAX77620_CNFGGLBL1_LBRSTEN;
+		val |= MAX77620_CNFGGLBL1_LBRSTEN;
+	}
+	pval = of_property_read_bool(np, "maxim,low-battery-reset-disable");
+	if (pval)
+		mask |= MAX77620_CNFGGLBL1_LBRSTEN;
+
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_CNFGGLBL1, mask, val);
+	if (ret < 0) {
+		dev_err(dev, "Reg CNFGGLBL1 update failed: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_initialise_chip(struct max77620_chip *chip,
+			struct device *dev)
+{
+	struct device_node *node = dev->of_node;
+	u32 mrt_time = 0;
+	u8 reg_val;
+	int ret;
+
+	of_property_read_u32(node, "maxim,hard-power-off-time", &mrt_time);
+	if (!mrt_time)
+		return 0;
+
+	mrt_time = (mrt_time > 12) ? 12 : mrt_time;
+	if (mrt_time <= 6)
+		reg_val = mrt_time - 2;
+	else
+		reg_val = (mrt_time - 6) / 2 + 4;
+
+	reg_val <<= MAX77620_ONOFFCNFG1_MRT_SHIFT;
+
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_MRT_MASK,
+			reg_val);
+	if (ret < 0)
+		dev_err(dev, "Reg 0x%02x update failed: %d\n",
+			MAX77620_REG_ONOFFCNFG1, reg_val);
+	return ret;
+}
+
+static int max77620_read_es_version(struct max77620_chip *chip)
+{
+	int ret;
+	u8 val;
+	u8 cid;
+	int i;
+	u8 cid_val[6];
+
+	for (i = MAX77620_REG_CID0; i <= MAX77620_REG_CID5; ++i) {
+		ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
+				i, &cid);
+		if (ret < 0) {
+			dev_err(chip->dev, "CID%d register read failed: %d\n",
+					i - MAX77620_REG_CID0, ret);
+			return ret;
+		}
+		dev_info(chip->dev, "CID%d: 0x%02x\n",
+			i - MAX77620_REG_CID0, cid);
+		cid_val[i - MAX77620_REG_CID0] = cid;
+	}
+
+	/* CID4 is OTP Version */
+	dev_info(chip->dev, "MAX77620 PMIC OTP Version: 0x%02X\n", cid_val[4]);
+
+	/* CID5 is ES version */
+	chip->es_minor_version = MAX77620_CID5_DIDM(cid_val[5]);
+	chip->es_major_version = 1;
+	dev_info(chip->dev, "MAX77620 PMIC ES version: %d.%d\n",
+				chip->es_major_version, chip->es_minor_version);
+
+	/* Read NVERC register */
+	ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_NVERC, &val);
+	if (ret < 0) {
+		dev_err(chip->dev, "NVERC read failed: %d\n", ret);
+		return ret;
+	}
+	dev_info(chip->dev, "NVERC = 0x%02x\n", val);
+	for (i = 0; i < 8; ++i) {
+		if (val & BIT(i))
+			dev_info(chip->dev, "NVERC: %s\n", max77620_nverc[i]);
+	}
+	return ret;
+}
+
+static irqreturn_t max77620_mbattlow_irq(int irq, void *data)
+{
+	struct max77620_chip *max77620 = data;
+
+	dev_info(max77620->dev, "MBATTLOW interrupt occurred\n");
+
+	return IRQ_HANDLED;
+}
+
+static int max77620_probe(struct i2c_client *client,
+			  const struct i2c_device_id *id)
+{
+	struct device_node *node = client->dev.of_node;
+	const struct max77620_sub_modules *children;
+	struct max77620_chip *chip;
+	int i = 0;
+	int ret = 0;
+	const struct of_device_id *match;
+
+	if (!node) {
+		dev_err(&client->dev, "Device is not from DT\n");
+		return -ENODEV;
+	}
+
+	match = of_match_device(max77620_of_match, &client->dev);
+	children = match->data;
+	if (!children)
+		return -ENODEV;
+
+	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
+	if (!chip)
+		return -ENOMEM;
+
+	i2c_set_clientdata(client, chip);
+	chip->dev = &client->dev;
+	chip->irq_base = -1;
+	chip->chip_irq = client->irq;
+	chip->id = children->id;
+
+	if (chip->id == MAX20024) {
+		max77620_regmap_config[MAX77620_PWR_SLAVE].rd_table =
+					&max20024_readable_table;
+		max77620_regmap_config[MAX77620_PWR_SLAVE].max_register =
+				MAX20024_REG_MAX_ADD + 1;
+	}
+
+	mutex_init(&chip->mutex_config);
+
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (max77620_slave_address[i] == client->addr)
+			chip->clients[i] = client;
+		else
+			chip->clients[i] = i2c_new_dummy(client->adapter,
+						max77620_slave_address[i]);
+		if (!chip->clients[i]) {
+			dev_err(&client->dev, "can't attach client %d\n", i);
+			ret = -ENOMEM;
+			goto fail_client_reg;
+		}
+
+		chip->clients[i]->dev.of_node = node;
+		i2c_set_clientdata(chip->clients[i], chip);
+		max77620_regmap_config[i].lock_arg = chip;
+		chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
+		(const struct regmap_config *)&max77620_regmap_config[i]);
+		if (IS_ERR(chip->rmap[i])) {
+			ret = PTR_ERR(chip->rmap[i]);
+			dev_err(&client->dev,
+				"regmap %d init failed, err %d\n", i, ret);
+			goto fail_client_reg;
+		}
+	}
+
+	ret = max77620_read_es_version(chip);
+	if (ret < 0) {
+		dev_err(chip->dev, "Chip revision init failed: %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = max77620_initialise_chip(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "Chip initialisation failed: %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
+		chip->chip_irq, IRQF_ONESHOT | IRQF_SHARED, chip->irq_base,
+		&max77620_top_irq_chip, &chip->top_irq_data);
+	if (ret < 0) {
+		dev_err(chip->dev, "Failed to add top irq_chip %d\n", ret);
+		goto fail_client_reg;
+	}
+
+	ret = max77620_initialise_fps(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "FPS initialisation failed: %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	ret = max77620_init_backup_battery_charging(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev,
+			"Backup battery charging init failed: %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	ret = max77620_init_low_battery_monitor(chip, &client->dev);
+	if (ret < 0) {
+		dev_err(&client->dev, "Low battery monitor init failed: %d\n",
+			ret);
+		goto fail_free_irq;
+	}
+
+	ret =  mfd_add_devices(&client->dev, -1, children->cells,
+			children->ncells, NULL, 0,
+			regmap_irq_get_domain(chip->top_irq_data));
+	if (ret < 0) {
+		dev_err(&client->dev, "mfd add dev fail %d\n", ret);
+		goto fail_free_irq;
+	}
+
+	chip->irq_mbattlow = max77620_irq_get_virq(chip->dev,
+					MAX77620_IRQ_LBT_MBATLOW);
+	if (chip->irq_mbattlow) {
+		ret = devm_request_threaded_irq(chip->dev, chip->irq_mbattlow,
+			NULL, max77620_mbattlow_irq,
+			IRQF_ONESHOT, dev_name(chip->dev),
+			chip);
+		if (ret < 0)
+			dev_err(&client->dev, "request irq %d failed: %d\n",
+			chip->irq_mbattlow, ret);
+	}
+
+	dev_info(&client->dev, "max77620 probe successfully\n");
+	return 0;
+
+fail_free_irq:
+	regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
+
+fail_client_reg:
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (!chip->clients[i] || chip->clients[i] == client)
+			continue;
+		i2c_unregister_device(chip->clients[i]);
+	}
+	return ret;
+}
+
+static int max77620_remove(struct i2c_client *client)
+{
+
+	struct max77620_chip *chip = i2c_get_clientdata(client);
+	int i;
+
+	mfd_remove_devices(chip->dev);
+	regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
+
+	for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
+		if (chip->clients[i] != client)
+			i2c_unregister_device(chip->clients[i]);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_set_fps_period(struct max77620_chip *chip,
+	int fps_id, int time_period)
+{
+	unsigned int config;
+	struct device *dev = chip->dev;
+	int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
+	int ret;
+	int i;
+
+	for (i = 0; i < 0x7; ++i) {
+		int x = base_fps_time * BIT(i);
+
+		if (x >= time_period)
+			break;
+	}
+	config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
+	ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_FPS_CFG0 + fps_id,
+			MAX77620_FPS_TIME_PERIOD_MASK, config);
+	if (ret < 0) {
+		dev_err(dev, "Reg 0x%02x write failed: %d\n",
+			MAX77620_REG_FPS_CFG0 + fps_id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_i2c_suspend(struct device *dev)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	unsigned int config;
+	int fps;
+	int ret;
+
+	for (fps = 0; fps < 2; ++fps) {
+		if (chip->suspend_fps_period[fps] < 0)
+			continue;
+
+		ret = max77620_set_fps_period(chip, fps,
+				chip->suspend_fps_period[fps]);
+		if (ret < 0)
+			dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
+	}
+
+	/*
+	 * For MAX20024: No need to configure SLPEN on suspend as
+	 * it will be configured on Init.
+	 */
+	if (chip->id == MAX20024)
+		return 0;
+
+	config = (chip->sleep_enable) ? MAX77620_ONOFFCNFG1_SLPEN : 0;
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SLPEN,
+			config);
+	if (ret < 0)
+		dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
+
+	/* Disable WK_EN0 */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+			MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0, 0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int max77620_i2c_resume(struct device *dev)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	int ret;
+	int fps;
+
+	for (fps = 0; fps < 2; ++fps) {
+		if (chip->active_fps_period[fps] < 0)
+			continue;
+
+		ret = max77620_set_fps_period(chip, fps,
+				chip->active_fps_period[fps]);
+		if (ret < 0)
+			dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
+	}
+
+	/*
+	 * For MAX20024: No need to configure WKEN0 on resume as
+	 * it is configured on Init.
+	 */
+	if (chip->id == MAX20024)
+		return 0;
+
+	/* Enable WK_EN0 */
+	ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
+		MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
+		MAX77620_ONOFFCNFG2_WK_EN0);
+	if (ret < 0) {
+		dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+#endif
+
+static const struct i2c_device_id max77620_id[] = {
+	{"max77620", 0},
+	{"max20024", 1},
+	{},
+};
+MODULE_DEVICE_TABLE(i2c, max77620_id);
+
+static const struct dev_pm_ops max77620_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_i2c_suspend, max77620_i2c_resume)
+};
+
+static struct i2c_driver max77620_driver = {
+	.driver = {
+		.name = "max77620",
+		.owner = THIS_MODULE,
+		.pm = &max77620_pm_ops,
+		.of_match_table = max77620_of_match,
+	},
+	.probe = max77620_probe,
+	.remove = max77620_remove,
+	.id_table = max77620_id,
+};
+
+static int __init max77620_init(void)
+{
+	return i2c_add_driver(&max77620_driver);
+}
+subsys_initcall(max77620_init);
+
+static void __exit max77620_exit(void)
+{
+	i2c_del_driver(&max77620_driver);
+}
+module_exit(max77620_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 Multi Function Device Core Driver");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
+MODULE_ALIAS("i2c:max77620");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
new file mode 100644
index 0000000..9d712b2
--- /dev/null
+++ b/include/linux/mfd/max77620.h
@@ -0,0 +1,503 @@
+/*
+ * max77620.h: Defining registers address and its bit definitions
+ *	of MAX77620 and	MAX20024
+ *
+ * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _LINUX_MFD_MAX77620_H_
+#define _LINUX_MFD_MAX77620_H_
+
+#include <linux/irq.h>
+#include <linux/i2c.h>
+#include <linux/mfd/core.h>
+#include <linux/regmap.h>
+#include <linux/regulator/machine.h>
+#include <linux/mutex.h>
+
+/* RTC Registers */
+#define MAX77620_REG_RTCINT			0x00
+#define MAX77620_REG_RTCINTM			0x01
+#define MAX77620_REG_RTCCNTLM			0x02
+#define MAX77620_REG_RTCCNTL			0x03
+#define MAX77620_REG_RTCUPDATE0			0x04
+#define MAX77620_REG_RTCUPDATE1			0x05
+#define MAX77620_REG_RTCSMPL			0x06
+#define MAX77620_REG_RTCSEC			0x07
+#define MAX77620_REG_RTCMIN			0x08
+#define MAX77620_REG_RTCHOUR			0x09
+#define MAX77620_REG_RTCDOW			0x0A
+#define MAX77620_REG_RTCMONTH			0x0B
+#define MAX77620_REG_RTCYEAR			0x0C
+#define MAX77620_REG_RTCDOM			0x0D
+#define MAX77620_REG_RTCSECA1			0x0E
+#define MAX77620_REG_RTCMINA1			0x0F
+#define MAX77620_REG_RTCHOURA1			0x10
+#define MAX77620_REG_RTCDOWA1			0x11
+#define MAX77620_REG_RTCMONTHA1			0x12
+#define MAX77620_REG_RTCYEARA1			0x13
+#define MAX77620_REG_RTCDOMA1			0x14
+#define MAX77620_REG_RTCSECA2			0x15
+#define MAX77620_REG_RTCMINA2			0x16
+#define MAX77620_REG_RTCHOURA2			0x17
+#define MAX77620_REG_RTCDOWA2			0x18
+#define MAX77620_REG_RTCMONTHA2			0x19
+#define MAX77620_REG_RTCYEARA2			0x1A
+#define MAX77620_REG_RTCDOMA2			0x1B
+
+/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
+#define MAX77620_REG_CNFGGLBL1			0x00
+#define MAX77620_REG_CNFGGLBL2			0x01
+#define MAX77620_REG_CNFGGLBL3			0x02
+#define MAX77620_REG_CNFG1_32K			0x03
+#define MAX77620_REG_CNFGBBC			0x04
+#define MAX77620_REG_IRQTOP			0x05
+#define MAX77620_REG_INTLBT			0x06
+#define MAX77620_REG_IRQSD			0x07
+#define MAX77620_REG_IRQ_LVL2_L0_7		0x08
+#define MAX77620_REG_IRQ_LVL2_L8		0x09
+#define MAX77620_REG_IRQ_LVL2_GPIO		0x0A
+#define MAX77620_REG_ONOFFIRQ			0x0B
+#define MAX77620_REG_NVERC			0x0C
+#define MAX77620_REG_IRQTOPM			0x0D
+#define MAX77620_REG_INTENLBT			0x0E
+#define MAX77620_REG_IRQMASKSD			0x0F
+#define MAX77620_REG_IRQ_MSK_L0_7		0x10
+#define MAX77620_REG_IRQ_MSK_L8			0x11
+#define MAX77620_REG_ONOFFIRQM			0x12
+#define MAX77620_REG_STATLBT			0x13
+#define MAX77620_REG_STATSD			0x14
+#define MAX77620_REG_ONOFFSTAT			0x15
+
+/* SD and LDO Registers */
+#define MAX77620_REG_SD0			0x16
+#define MAX77620_REG_SD1			0x17
+#define MAX77620_REG_SD2			0x18
+#define MAX77620_REG_SD3			0x19
+#define MAX77620_REG_SD4			0x1A
+#define MAX77620_REG_DVSSD0			0x1B
+#define MAX77620_REG_DVSSD1			0x1C
+#define MAX77620_REG_SD0_CFG			0x1D
+#define MAX77620_REG_SD1_CFG			0x1E
+#define MAX77620_REG_SD2_CFG			0x1F
+#define MAX77620_REG_SD3_CFG			0x20
+#define MAX77620_REG_SD4_CFG			0x21
+#define MAX77620_REG_SD_CFG2			0x22
+#define MAX77620_REG_LDO0_CFG			0x23
+#define MAX77620_REG_LDO0_CFG2			0x24
+#define MAX77620_REG_LDO1_CFG			0x25
+#define MAX77620_REG_LDO1_CFG2			0x26
+#define MAX77620_REG_LDO2_CFG			0x27
+#define MAX77620_REG_LDO2_CFG2			0x28
+#define MAX77620_REG_LDO3_CFG			0x29
+#define MAX77620_REG_LDO3_CFG2			0x2A
+#define MAX77620_REG_LDO4_CFG			0x2B
+#define MAX77620_REG_LDO4_CFG2			0x2C
+#define MAX77620_REG_LDO5_CFG			0x2D
+#define MAX77620_REG_LDO5_CFG2			0x2E
+#define MAX77620_REG_LDO6_CFG			0x2F
+#define MAX77620_REG_LDO6_CFG2			0x30
+#define MAX77620_REG_LDO7_CFG			0x31
+#define MAX77620_REG_LDO7_CFG2			0x32
+#define MAX77620_REG_LDO8_CFG			0x33
+#define MAX77620_REG_LDO8_CFG2			0x34
+#define MAX77620_REG_LDO_CFG3			0x35
+
+#define MAX77620_LDO_SLEW_RATE_MASK		0x1
+
+/* LDO Configuration 3 */
+#define MAX77620_TRACK4_MASK			BIT(5)
+#define MAX77620_TRACK4_SHIFT			5
+
+/* Voltage */
+#define  MAX77620_SDX_VOLT_MASK			0xFF
+#define  MAX77620_SD0_VOLT_MASK			0x3F
+#define  MAX77620_SD1_VOLT_MASK			0x7F
+#define MAX77620_LDO_VOLT_MASK			0x3F
+
+#define MAX77620_REG_GPIO0			0x36
+#define MAX77620_REG_GPIO1			0x37
+#define MAX77620_REG_GPIO2			0x38
+#define MAX77620_REG_GPIO3			0x39
+#define MAX77620_REG_GPIO4			0x3A
+#define MAX77620_REG_GPIO5			0x3B
+#define MAX77620_REG_GPIO6			0x3C
+#define MAX77620_REG_GPIO7			0x3D
+#define MAX77620_REG_PUE_GPIO			0x3E
+#define MAX77620_REG_PDE_GPIO			0x3F
+#define MAX77620_REG_AME_GPIO			0x40
+#define MAX77620_REG_ONOFFCNFG1			0x41
+#define MAX77620_REG_ONOFFCNFG2			0x42
+
+/* FPS Registers */
+#define MAX77620_REG_FPS_CFG0			0x43
+#define MAX77620_REG_FPS_CFG1			0x44
+#define MAX77620_REG_FPS_CFG2			0x45
+#define MAX77620_REG_FPS_LDO0			0x46
+#define MAX77620_REG_FPS_LDO1			0x47
+#define MAX77620_REG_FPS_LDO2			0x48
+#define MAX77620_REG_FPS_LDO3			0x49
+#define MAX77620_REG_FPS_LDO4			0x4A
+#define MAX77620_REG_FPS_LDO5			0x4B
+#define MAX77620_REG_FPS_LDO6			0x4C
+#define MAX77620_REG_FPS_LDO7			0x4D
+#define MAX77620_REG_FPS_LDO8			0x4E
+#define MAX77620_REG_FPS_SD0			0x4F
+#define MAX77620_REG_FPS_SD1			0x50
+#define MAX77620_REG_FPS_SD2			0x51
+#define MAX77620_REG_FPS_SD3			0x52
+#define MAX77620_REG_FPS_SD4			0x53
+#define MAX77620_REG_FPS_NONE			0
+
+#define MAX77620_FPS_SRC_MASK			0xC0
+#define MAX77620_FPS_SRC_SHIFT			6
+#define MAX77620_FPS_PU_PERIOD_MASK		0x38
+#define MAX77620_FPS_PU_PERIOD_SHIFT		3
+#define MAX77620_FPS_PD_PERIOD_MASK		0x07
+#define MAX77620_FPS_PD_PERIOD_SHIFT		0
+#define MAX77620_FPS_TIME_PERIOD_MASK		0x38
+#define MAX77620_FPS_TIME_PERIOD_SHIFT		3
+#define MAX77620_FPS_EN_SRC_MASK		0x06
+#define MAX77620_FPS_EN_SRC_SHIFT		1
+#define MAX77620_FPS_ENFPS_MASK			0x01
+
+#define MAX77620_REG_FPS_GPIO1			0x54
+#define MAX77620_REG_FPS_GPIO2			0x55
+#define MAX77620_REG_FPS_GPIO3			0x56
+#define MAX77620_REG_FPS_RSO			0x57
+#define MAX77620_REG_CID0			0x58
+#define MAX77620_REG_CID1			0x59
+#define MAX77620_REG_CID2			0x5A
+#define MAX77620_REG_CID3			0x5B
+#define MAX77620_REG_CID4			0x5C
+#define MAX77620_REG_CID5			0x5D
+
+#define MAX77620_REG_DVSSD4			0x5E
+#define MAX20024_REG_MAX_ADD			0x70
+
+#define MAX77620_CID_DIDM_MASK			0xF0
+#define MAX77620_CID_DIDM_SHIFT			4
+
+/* CNCG2SD */
+#define MAX77620_SD_CNF2_ROVS_EN_SD1		BIT(1)
+#define MAX77620_SD_CNF2_ROVS_EN_SD0		BIT(2)
+
+/* Device Identification Metal */
+#define MAX77620_CID5_DIDM(n)			(((n) >> 4) & 0xF)
+/* Device Indentification OTP */
+#define MAX77620_CID5_DIDO(n)			((n) & 0xF)
+
+/* SD CNFG1 */
+#define MAX77620_SD_SR_MASK			0xC0
+#define MAX77620_SD_SR_SHIFT			6
+#define MAX77620_SD_POWER_MODE_MASK		0x30
+#define MAX77620_SD_POWER_MODE_SHIFT		4
+#define MAX77620_SD_CFG1_ADE_MASK		BIT(3)
+#define MAX77620_SD_CFG1_ADE_DISABLE		0
+#define MAX77620_SD_CFG1_ADE_ENABLE		BIT(3)
+#define MAX77620_SD_FPWM_MASK			0x04
+#define MAX77620_SD_FPWM_SHIFT			2
+#define MAX77620_SD_FSRADE_MASK			0x01
+#define MAX77620_SD_FSRADE_SHIFT		0
+#define MAX77620_SD_CFG1_FPWM_SD_MASK		BIT(2)
+#define MAX77620_SD_CFG1_FPWM_SD_SKIP		0
+#define MAX77620_SD_CFG1_FPWM_SD_FPWM		BIT(2)
+#define MAX77620_SD_CFG1_FSRADE_SD_MASK		BIT(0)
+#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE	0
+#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE	BIT(0)
+
+/* LDO_CNFG2 */
+#define MAX77620_LDO_POWER_MODE_MASK		0xC0
+#define MAX77620_LDO_POWER_MODE_SHIFT		6
+#define MAX77620_LDO_CFG2_ADE_MASK		BIT(1)
+#define MAX77620_LDO_CFG2_ADE_DISABLE		0
+#define MAX77620_LDO_CFG2_ADE_ENABLE		BIT(1)
+#define MAX77620_LDO_CFG2_SS_MASK		BIT(0)
+#define MAX77620_LDO_CFG2_SS_FAST		BIT(0)
+#define MAX77620_LDO_CFG2_SS_SLOW		0
+
+#define MAX77620_IRQ_TOP_GLBL_MASK		BIT(7)
+#define MAX77620_IRQ_TOP_SD_MASK		BIT(6)
+#define MAX77620_IRQ_TOP_LDO_MASK		BIT(5)
+#define MAX77620_IRQ_TOP_GPIO_MASK		BIT(4)
+#define MAX77620_IRQ_TOP_RTC_MASK		BIT(3)
+#define MAX77620_IRQ_TOP_32K_MASK		BIT(2)
+#define MAX77620_IRQ_TOP_ONOFF_MASK		BIT(1)
+
+#define MAX77620_IRQ_LBM_MASK			BIT(3)
+#define MAX77620_IRQ_TJALRM1_MASK		BIT(2)
+#define MAX77620_IRQ_TJALRM2_MASK		BIT(1)
+
+#define MAX77620_PWR_I2C_ADDR			0x3c
+#define MAX77620_RTC_I2C_ADDR			0x68
+
+#define MAX77620_CNFG_GPIO_DRV_MASK		BIT(0)
+#define MAX77620_CNFG_GPIO_DRV_PUSHPULL		BIT(0)
+#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN	0
+#define MAX77620_CNFG_GPIO_DIR_MASK		BIT(1)
+#define MAX77620_CNFG_GPIO_DIR_INPUT		BIT(1)
+#define MAX77620_CNFG_GPIO_DIR_OUTPUT		0
+#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK	BIT(2)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK	BIT(3)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH	BIT(3)
+#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW	0
+#define MAX77620_CNFG_GPIO_INT_MASK		(0x3 << 4)
+#define MAX77620_CNFG_GPIO_INT_FALLING		BIT(4)
+#define MAX77620_CNFG_GPIO_INT_RISING		BIT(5)
+#define MAX77620_CNFG_GPIO_DBNC_MASK		(0x3 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_None		(0x0 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_8ms		(0x1 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_16ms		(0x2 << 6)
+#define MAX77620_CNFG_GPIO_DBNC_32ms		(0x3 << 6)
+
+#define MAX77620_IRQ_LVL2_GPIO_EDGE0		BIT(0)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE1		BIT(1)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE2		BIT(2)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE3		BIT(3)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE4		BIT(4)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE5		BIT(5)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE6		BIT(6)
+#define MAX77620_IRQ_LVL2_GPIO_EDGE7		BIT(7)
+
+#define MAX77620_CNFG1_32K_OUT0_EN		BIT(2)
+
+#define MAX77620_ONOFFCNFG1_SFT_RST		BIT(7)
+#define MAX77620_ONOFFCNFG1_MRT_MASK		0x38
+#define MAX77620_ONOFFCNFG1_MRT_SHIFT		0x3
+#define MAX77620_ONOFFCNFG1_SLPEN		BIT(2)
+#define MAX77620_ONOFFCNFG1_PWR_OFF		BIT(1)
+#define MAX20024_ONOFFCNFG1_CLRSE		0x18
+
+#define MAX77620_ONOFFCNFG2_SFT_RST_WK		BIT(7)
+#define MAX77620_ONOFFCNFG2_WD_RST_WK		BIT(6)
+#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK		BIT(5)
+#define MAX77620_ONOFFCNFG2_WK_EN0		BIT(0)
+
+#define	MAX77620_GLBLM_MASK			BIT(0)
+
+#define MAX77620_WDTC_MASK			0x3
+#define MAX77620_WDTOFFC			BIT(4)
+#define MAX77620_WDTSLPC			BIT(3)
+#define MAX77620_WDTEN				BIT(2)
+
+#define MAX77620_TWD_MASK			0x3
+#define MAX77620_TWD_2s				0x0
+#define MAX77620_TWD_16s			0x1
+#define MAX77620_TWD_64s			0x2
+#define MAX77620_TWD_128s			0x3
+
+#define MAX77620_CNFGGLBL1_LBDAC_EN		BIT(7)
+#define MAX77620_CNFGGLBL1_MPPLD		BIT(6)
+#define MAX77620_CNFGGLBL1_LBHYST		(BIT(5) | BIT(4))
+#define MAX77620_CNFGGLBL1_LBDAC		0x0E
+#define MAX77620_CNFGGLBL1_LBRSTEN		BIT(0)
+
+/* CNFG BBC registers */
+#define MAX77620_CNFGBBC_ENABLE			BIT(0)
+#define MAX77620_CNFGBBC_CURRENT_MASK		0x06
+#define MAX77620_CNFGBBC_CURRENT_SHIFT		1
+#define MAX77620_CNFGBBC_VOLTAGE_MASK		0x18
+#define MAX77620_CNFGBBC_VOLTAGE_SHIFT		3
+#define MAX77620_CNFGBBC_LOW_CURRENT_ENABLE	BIT(5)
+#define MAX77620_CNFGBBC_RESISTOR_MASK		0xC0
+#define MAX77620_CNFGBBC_RESISTOR_SHIFT		6
+
+/* I2c Slave Id */
+enum {
+	MAX77620_PWR_SLAVE,
+	MAX77620_RTC_SLAVE,
+	MAX77620_NUM_SLAVES,
+};
+
+/* GPIOs */
+enum {
+	MAX77620_GPIO0,
+	MAX77620_GPIO1,
+	MAX77620_GPIO2,
+	MAX77620_GPIO3,
+	MAX77620_GPIO4,
+	MAX77620_GPIO5,
+	MAX77620_GPIO6,
+	MAX77620_GPIO7,
+
+	MAX77620_GPIO_NR,
+};
+
+/* Interrupts */
+enum {
+	MAX77620_IRQ_TOP_GLBL,		/* Low-Battery */
+	MAX77620_IRQ_TOP_SD,		/* SD power fail */
+	MAX77620_IRQ_TOP_LDO,		/* LDO power fail */
+	MAX77620_IRQ_TOP_GPIO,		/* TOP GPIO internal int to MAX77620 */
+	MAX77620_IRQ_TOP_RTC,		/* RTC */
+	MAX77620_IRQ_TOP_32K,		/* 32kHz oscillator */
+	MAX77620_IRQ_TOP_ONOFF,		/* ON/OFF oscillator */
+
+	MAX77620_IRQ_LBT_MBATLOW,	/* Thermal alarm status, > 120C */
+	MAX77620_IRQ_LBT_TJALRM1,	/* Thermal alarm status, > 120C */
+	MAX77620_IRQ_LBT_TJALRM2,	/* Thermal alarm status, > 140C */
+
+	MAX77620_IRQ_GPIO0,		/* GPIO0 edge detection */
+	MAX77620_IRQ_GPIO1,		/* GPIO1 edge detection */
+	MAX77620_IRQ_GPIO2,		/* GPIO2 edge detection */
+	MAX77620_IRQ_GPIO3,		/* GPIO3 edge detection */
+	MAX77620_IRQ_GPIO4,		/* GPIO4 edge detection */
+	MAX77620_IRQ_GPIO5,		/* GPIO5 edge detection */
+	MAX77620_IRQ_GPIO6,		/* GPIO6 edge detection */
+	MAX77620_IRQ_GPIO7,		/* GPIO7 edge detection */
+
+	MAX77620_IRQ_ONOFF_MRWRN,	/* Hard power off warnning */
+	MAX77620_IRQ_ONOFF_EN0_1SEC,	/* EN0 active for 1s */
+	MAX77620_IRQ_ONOFF_EN0_F,	/* EN0 falling */
+	MAX77620_IRQ_ONOFF_EN0_R,	/* EN0 rising */
+	MAX77620_IRQ_ONOFF_LID_F,	/* LID falling */
+	MAX77620_IRQ_ONOFF_LID_R,	/* LID rising */
+	MAX77620_IRQ_ONOFF_ACOK_F,	/* ACOK falling */
+	MAX77620_IRQ_ONOFF_ACOK_R,	/* ACOK rising */
+
+	MAX77620_IRQ_NVER,		/* Non-Volatile Event Recorder */
+	MAX77620_IRQ_NR,
+};
+
+enum max77620_regulators {
+	MAX77620_REGULATOR_ID_SD0,
+	MAX77620_REGULATOR_ID_SD1,
+	MAX77620_REGULATOR_ID_SD2,
+	MAX77620_REGULATOR_ID_SD3,
+	MAX77620_REGULATOR_ID_SD4,
+	MAX77620_REGULATOR_ID_LDO0,
+	MAX77620_REGULATOR_ID_LDO1,
+	MAX77620_REGULATOR_ID_LDO2,
+	MAX77620_REGULATOR_ID_LDO3,
+	MAX77620_REGULATOR_ID_LDO4,
+	MAX77620_REGULATOR_ID_LDO5,
+	MAX77620_REGULATOR_ID_LDO6,
+	MAX77620_REGULATOR_ID_LDO7,
+	MAX77620_REGULATOR_ID_LDO8,
+	MAX77620_NUM_REGS,
+};
+
+/* FPS Source */
+enum max77620_regulator_fps_src {
+	FPS_SRC_0,
+	FPS_SRC_1,
+	FPS_SRC_2,
+	FPS_SRC_NONE,
+	FPS_SRC_DEF,
+};
+
+/* Regulator types */
+enum max77620_regulator_type {
+	MAX77620_REGULATOR_TYPE_SD,
+	MAX77620_REGULATOR_TYPE_LDO_N,
+	MAX77620_REGULATOR_TYPE_LDO_P,
+};
+
+enum max77620_chip_id {
+	MAX77620,
+	MAX20024,
+};
+
+struct max77620_chip {
+	struct device *dev;
+
+	struct i2c_client *clients[MAX77620_NUM_SLAVES];
+	struct regmap *rmap[MAX77620_NUM_SLAVES];
+
+	int chip_irq;
+	int irq_base;
+	int irq_mbattlow;
+
+	struct mutex mutex_config;
+	bool sleep_enable;
+	bool enable_global_lpm;
+	int active_fps_period[3];
+	int suspend_fps_period[3];
+
+	int es_minor_version;
+	int es_major_version;
+
+	struct regmap_irq_chip_data *top_irq_data;
+	struct regmap_irq_chip_data *gpio_irq_data;
+
+	/* chip id */
+	u32 id;
+};
+
+static inline int max77620_irq_get_virq(struct device *dev, int irq)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_irq_get_virq(chip->top_irq_data, irq);
+}
+
+static inline int max77620_reg_write(struct device *dev, int sid,
+		unsigned int reg, u8 val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_write(chip->rmap[sid], reg, val);
+}
+
+static inline int max77620_reg_writes(struct device *dev, int sid,
+		unsigned int reg, int len, void *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	int ret = 0;
+	u8 *src = (u8 *)val;
+	int i;
+
+	/* Device does not support bulk write */
+	for (i = 0; i < len; i++) {
+		ret = regmap_write(chip->rmap[sid], reg, *src++);
+		if (ret < 0)
+			break;
+		reg++;
+	}
+	if (ret < 0)
+		dev_err(chip->dev, "%s() failed: %d\n", __func__, ret);
+	return ret;
+}
+
+static inline int max77620_reg_read(struct device *dev, int sid,
+		unsigned int reg, u8 *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+	unsigned int ival;
+	int ret;
+
+	ret = regmap_read(chip->rmap[sid], reg, &ival);
+	if (ret < 0) {
+		dev_err(dev, "failed reading from reg 0x%02x\n", reg);
+		return ret;
+	}
+	*val = ival;
+	return ret;
+}
+
+static inline int max77620_reg_reads(struct device *dev, int sid,
+		unsigned int reg, int len, void *val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_bulk_read(chip->rmap[sid], reg, val, len);
+}
+
+static inline int max77620_reg_update(struct device *dev, int sid,
+		unsigned int reg, unsigned int mask, unsigned int val)
+{
+	struct max77620_chip *chip = dev_get_drvdata(dev);
+
+	return regmap_update_bits(chip->rmap[sid], reg, mask, val);
+}
+
+#endif /* _LINUX_MFD_MAX77620_H_ */
-- 
2.1.4

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* [PATCH 3/6] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
  2016-01-07 14:38 ` Laxman Dewangan
  (?)
@ 2016-01-07 14:38   ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins
which also act as the special function in alternate mode. Also
there is configuration like push-pull, open drain, FPS timing
etc for these pins.

Add pincontrol driver to configure these parameters through
pincontrol APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/pinctrl/Kconfig            |  10 +
 drivers/pinctrl/Makefile           |   1 +
 drivers/pinctrl/pinctrl-max77620.c | 700 +++++++++++++++++++++++++++++++++++++
 3 files changed, 711 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-max77620.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 99a4c10..b6d2d23 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -227,6 +227,16 @@ config PINCTRL_COH901
 	  COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
 	  ports of 8 GPIO pins each.
 
+config PINCTRL_MAX77620
+	bool "MAX77620/MAX20024 Pincontrol support"
+	depends on MFD_MAX77620
+	select GENERIC_PINCONF
+	help
+	  Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
+	  This PMIC has 8 GPIO pins that work as GPIO as well as special
+	  function in alternate mode. This driver also configure push-pull,
+	  open drain, FPS slots etc.
+
 config PINCTRL_PALMAS
 	bool "Pinctrl driver for the PALMAS Series MFD devices"
 	depends on OF && MFD_PALMAS
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index bf1b5ca..72833e3 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_PINCTRL_AMD)	+= pinctrl-amd.o
 obj-$(CONFIG_PINCTRL_DIGICOLOR)	+= pinctrl-digicolor.o
 obj-$(CONFIG_PINCTRL_FALCON)	+= pinctrl-falcon.o
 obj-$(CONFIG_PINCTRL_MESON)	+= meson/
+obj-$(CONFIG_PINCTRL_MAX77620)	+= pinctrl-max77620.o
 obj-$(CONFIG_PINCTRL_PALMAS)	+= pinctrl-palmas.o
 obj-$(CONFIG_PINCTRL_PISTACHIO)	+= pinctrl-pistachio.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP)	+= pinctrl-rockchip.o
diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c
new file mode 100644
index 0000000..dc0584f
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-max77620.c
@@ -0,0 +1,700 @@
+/*
+ * MAX77620 pin control driver.
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author:
+ *	Chaitanya Bandi <bandik@nvidia.com>
+ *	Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/max77620.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+
+#include "core.h"
+#include "pinconf.h"
+#include "pinctrl-utils.h"
+
+#define MAX77620_PIN_NUM 8
+
+enum max77620_pin_ppdrv {
+	MAX77620_PIN_UNCONFIG_DRV,
+	MAX77620_PIN_OD_DRV,
+	MAX77620_PIN_PP_DRV,
+};
+
+enum max77620_pinconf_param {
+	MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1,
+	MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+	MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
+	MAX77620_SUSPEND_FPS_SOURCE,
+	MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+	MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
+};
+
+struct max77620_pin_function {
+	const char *name;
+	const char * const *groups;
+	unsigned ngroups;
+	int mux_option;
+};
+
+struct max77620_cfg_param {
+	const char *property;
+	enum max77620_pinconf_param param;
+};
+
+static const struct pinconf_generic_params max77620_cfg_params[] = {
+	{
+		.property = "maxim,active-fps-source",
+		.param = MAX77620_ACTIVE_FPS_SOURCE,
+	}, {
+		.property = "maxim,active-fps-power-up-slot",
+		.param = MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+	}, {
+		.property = "maxim,active-fps-power-down-slot",
+		.param = MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
+	}, {
+		.property = "maxim,suspend-fps-source",
+		.param = MAX77620_SUSPEND_FPS_SOURCE,
+	}, {
+		.property = "maxim,suspend-fps-power-up-slot",
+		.param = MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+	}, {
+		.property = "maxim,suspend-fps-power-down-slot",
+		.param = MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
+	},
+};
+
+enum max77620_alternate_pinmux_option {
+	MAX77620_PINMUX_GPIO				= 0,
+	MAX77620_PINMUX_LOW_POWER_MODE_CONTROL_IN	= 1,
+	MAX77620_PINMUX_FLEXIBLE_POWER_SEQUENCER_OUT	= 2,
+	MAX77620_PINMUX_32K_OUT1			= 3,
+	MAX77620_PINMUX_SD0_DYNAMIC_VOLTAGE_SCALING_IN	= 4,
+	MAX77620_PINMUX_SD1_DYNAMIC_VOLTAGE_SCALING_IN	= 5,
+	MAX77620_PINMUX_REFERENCE_OUT			= 6,
+};
+
+struct max77620_pingroup {
+	const char *name;
+	const unsigned pins[1];
+	unsigned npins;
+	enum max77620_alternate_pinmux_option alt_option;
+};
+
+struct max77620_pin_info {
+	enum max77620_pin_ppdrv drv_type;
+	int pull_config;
+};
+
+struct max77620_fps_config {
+	int active_fps_src;
+	int active_power_up_slots;
+	int active_power_down_slots;
+	int suspend_fps_src;
+	int suspend_power_up_slots;
+	int suspend_power_down_slots;
+};
+
+struct max77620_pctrl_info {
+	struct device *dev;
+	struct pinctrl_dev *pctl;
+	struct max77620_chip *max77620;
+	int pins_current_opt[MAX77620_GPIO_NR];
+	const struct max77620_pin_function *functions;
+	unsigned num_functions;
+	const struct max77620_pingroup *pin_groups;
+	int num_pin_groups;
+	const struct pinctrl_pin_desc *pins;
+	unsigned num_pins;
+	struct max77620_pin_info pin_info[MAX77620_PIN_NUM];
+	struct max77620_fps_config fps_config[MAX77620_PIN_NUM];
+};
+
+static const struct pinctrl_pin_desc max77620_pins_desc[] = {
+	PINCTRL_PIN(MAX77620_GPIO0, "gpio0"),
+	PINCTRL_PIN(MAX77620_GPIO1, "gpio1"),
+	PINCTRL_PIN(MAX77620_GPIO2, "gpio2"),
+	PINCTRL_PIN(MAX77620_GPIO3, "gpio3"),
+	PINCTRL_PIN(MAX77620_GPIO4, "gpio4"),
+	PINCTRL_PIN(MAX77620_GPIO5, "gpio5"),
+	PINCTRL_PIN(MAX77620_GPIO6, "gpio6"),
+	PINCTRL_PIN(MAX77620_GPIO7, "gpio7"),
+};
+
+static const char * const gpio_groups[] = {
+	"gpio0",
+	"gpio1",
+	"gpio2",
+	"gpio3",
+	"gpio4",
+	"gpio5",
+	"gpio6",
+	"gpio7",
+};
+
+#define FUNCTION_GROUP(fname, mux)			\
+	{						\
+		.name = #fname,				\
+		.groups = gpio_groups,			\
+		.ngroups = ARRAY_SIZE(gpio_groups),	\
+		.mux_option = MAX77620_PINMUX_##mux,	\
+	}
+
+static const struct max77620_pin_function max77620_pin_function[] = {
+	FUNCTION_GROUP(gpio, GPIO),
+	FUNCTION_GROUP(lpm-control-in, LOW_POWER_MODE_CONTROL_IN),
+	FUNCTION_GROUP(fps-out, FLEXIBLE_POWER_SEQUENCER_OUT),
+	FUNCTION_GROUP(32k-out1, 32K_OUT1),
+	FUNCTION_GROUP(sd0-dvs-in, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
+	FUNCTION_GROUP(sd1-dvs-in, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
+	FUNCTION_GROUP(reference-out, REFERENCE_OUT),
+};
+
+#define MAX77620_PINGROUP(pg_name, pin_id, option) \
+	{								\
+		.name = #pg_name,					\
+		.pins = {MAX77620_##pin_id},				\
+		.npins = 1,						\
+		.alt_option = MAX77620_PINMUX_##option,			\
+	}
+
+static const struct max77620_pingroup max77620_pingroups[] = {
+	MAX77620_PINGROUP(gpio0, GPIO0, LOW_POWER_MODE_CONTROL_IN),
+	MAX77620_PINGROUP(gpio1, GPIO1, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio2, GPIO2, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio3, GPIO3, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio4, GPIO4, 32K_OUT1),
+	MAX77620_PINGROUP(gpio5, GPIO5, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
+	MAX77620_PINGROUP(gpio6, GPIO6, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
+	MAX77620_PINGROUP(gpio7, GPIO7, REFERENCE_OUT),
+};
+
+static int max77620_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->num_pin_groups;
+}
+
+static const char *max77620_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+		unsigned group)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->pin_groups[group].name;
+}
+
+static int max77620_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+		unsigned group, const unsigned **pins, unsigned *num_pins)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	*pins = mpci->pin_groups[group].pins;
+	*num_pins = mpci->pin_groups[group].npins;
+	return 0;
+}
+
+static const struct pinctrl_ops max77620_pinctrl_ops = {
+	.get_groups_count = max77620_pinctrl_get_groups_count,
+	.get_group_name = max77620_pinctrl_get_group_name,
+	.get_group_pins = max77620_pinctrl_get_group_pins,
+	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+	.dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int max77620_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->num_functions;
+}
+
+static const char *max77620_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
+			unsigned function)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->functions[function].name;
+}
+
+static int max77620_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
+		unsigned function, const char * const **groups,
+		unsigned * const num_groups)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	*groups = mpci->functions[function].groups;
+	*num_groups = mpci->functions[function].ngroups;
+	return 0;
+}
+
+static int max77620_pinctrl_enable(struct pinctrl_dev *pctldev,
+		unsigned function, unsigned group)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	if (function == MAX77620_PINMUX_GPIO) {
+		max77620_reg_update(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_AME_GPIO,
+			1 << group, 0);
+	} else if (function == mpci->pin_groups[group].alt_option) {
+		max77620_reg_update(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_AME_GPIO,
+			1 << group, 1 << group);
+	} else {
+		dev_err(mpci->dev, "GPIO %u doesn't have function %u\n",
+				group, function);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static const struct pinmux_ops max77620_pinmux_ops = {
+	.get_functions_count	= max77620_pinctrl_get_funcs_count,
+	.get_function_name	= max77620_pinctrl_get_func_name,
+	.get_function_groups	= max77620_pinctrl_get_func_groups,
+	.set_mux		= max77620_pinctrl_enable,
+};
+
+static int max77620_pinconf_get(struct pinctrl_dev *pctldev,
+			unsigned pin, unsigned long *config)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+	enum pin_config_param param = pinconf_to_config_param(*config);
+	u8 val;
+	int arg = 0;
+	int ret;
+
+	switch (param) {
+	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+		if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV)
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_DRIVE_PUSH_PULL:
+		if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV)
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_PUE_GPIO, &val);
+		if (ret < 0) {
+			dev_err(mpci->dev,
+				"Reg PUE_GPIO read failed: %d\n", ret);
+			return ret;
+		}
+		if (val & BIT(pin))
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_PDE_GPIO, &val);
+		if (ret < 0) {
+			dev_err(mpci->dev,
+				"Reg PDE_GPIO read failed: %d\n", ret);
+			return ret;
+		}
+		if (val & BIT(pin))
+			arg = 1;
+		break;
+
+	default:
+		dev_err(mpci->dev, "Properties not supported\n");
+		return -ENOTSUPP;
+	}
+
+	*config = pinconf_to_config_packed(param, (u16)arg);
+	return 0;
+}
+
+static int max77620_get_default_fps(struct max77620_pctrl_info *mpci,
+	int addr, int *fps)
+{
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, addr, &val);
+	if (ret < 0) {
+		dev_err(mpci->dev, "Reg PUE_GPIO read failed: %d\n", ret);
+		return ret;
+	}
+	val = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+	*fps = val;
+	return 0;
+}
+
+static int max77620_set_fps_param(struct max77620_pctrl_info *mpci,
+	int pin, int param)
+{
+	struct max77620_fps_config *fps_config = &mpci->fps_config[pin];
+	int addr, ret;
+	int param_val;
+	int mask, shift;
+
+	if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+		return 0;
+
+	addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+	switch (param) {
+	case MAX77620_ACTIVE_FPS_SOURCE:
+	case MAX77620_SUSPEND_FPS_SOURCE:
+		mask = MAX77620_FPS_SRC_MASK;
+		shift = MAX77620_FPS_SRC_SHIFT;
+		param_val = fps_config->active_fps_src;
+		if (param == MAX77620_SUSPEND_FPS_SOURCE)
+			param_val = fps_config->suspend_fps_src;
+		break;
+
+	case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
+	case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
+		mask = MAX77620_FPS_PU_PERIOD_MASK;
+		shift = MAX77620_FPS_PU_PERIOD_SHIFT;
+		param_val = fps_config->active_power_up_slots;
+		if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
+			param_val = fps_config->suspend_power_up_slots;
+		break;
+
+	case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
+	case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
+		mask = MAX77620_FPS_PD_PERIOD_MASK;
+		shift = MAX77620_FPS_PD_PERIOD_SHIFT;
+		param_val = fps_config->active_power_down_slots;
+		if (param == MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS)
+			param_val = fps_config->suspend_power_down_slots;
+		break;
+
+	default:
+		return -EINVAL;
+	};
+
+	if (param_val < 0)
+		return 0;
+
+	ret = max77620_reg_update(mpci->max77620->dev,
+		MAX77620_PWR_SLAVE, addr, mask, param_val << shift);
+	if (ret < 0) {
+		dev_err(mpci->dev,
+			"Reg 0x%02x update failed %d\n", addr, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
+		unsigned pin, unsigned long *configs,
+		unsigned num_configs)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+	struct max77620_fps_config *fps_config;
+	int param;
+	u16 param_val;
+	unsigned int val;
+	unsigned int pu_val;
+	unsigned int pd_val;
+	int addr, ret;
+	int i;
+
+	for (i = 0; i < num_configs; i++) {
+		param = pinconf_to_config_param(configs[i]);
+		param_val = pinconf_to_config_argument(configs[i]);
+
+		switch (param) {
+		case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+			val = param_val ? 0 : 1;
+			max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_GPIO0 + pin,
+				MAX77620_CNFG_GPIO_DRV_MASK, val);
+			mpci->pin_info[pin].drv_type = val ?
+				MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
+			break;
+
+		case PIN_CONFIG_DRIVE_PUSH_PULL:
+			val = param_val ? 1 : 0;
+			max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_GPIO0 + pin,
+				MAX77620_CNFG_GPIO_DRV_MASK, val);
+			mpci->pin_info[pin].drv_type = val ?
+				MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
+			break;
+
+		case MAX77620_ACTIVE_FPS_SOURCE:
+		case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
+		case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
+			if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+				return -EINVAL;
+
+			fps_config = &mpci->fps_config[pin];
+
+			if ((param == MAX77620_ACTIVE_FPS_SOURCE) &&
+				(param_val == FPS_SRC_DEF)) {
+				addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+				ret = max77620_get_default_fps(mpci,
+					addr, &fps_config->active_fps_src);
+				if (ret < 0)
+					return ret;
+				break;
+			}
+
+			if (param == MAX77620_ACTIVE_FPS_SOURCE)
+				fps_config->active_fps_src = param_val;
+			else if (param == MAX77620_ACTIVE_FPS_POWER_ON_SLOTS)
+				fps_config->active_power_up_slots = param_val;
+			else
+				fps_config->active_power_down_slots = param_val;
+
+			ret = max77620_set_fps_param(mpci, pin, param);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"Pin-%d Param %d config failed: %d\n",
+					pin, param, ret);
+				return ret;
+			}
+			break;
+
+		case MAX77620_SUSPEND_FPS_SOURCE:
+		case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
+		case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
+			if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+				return -EINVAL;
+
+			fps_config = &mpci->fps_config[pin];
+
+			if ((param == MAX77620_SUSPEND_FPS_SOURCE) &&
+				(param_val == FPS_SRC_DEF)) {
+				addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+				ret = max77620_get_default_fps(mpci,
+					addr, &fps_config->suspend_fps_src);
+				if (ret < 0)
+					return ret;
+				break;
+			}
+
+			if (param == MAX77620_SUSPEND_FPS_SOURCE)
+				fps_config->suspend_fps_src = param_val;
+			else if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
+				fps_config->suspend_power_up_slots = param_val;
+			else
+				fps_config->suspend_power_down_slots =
+								param_val;
+			break;
+
+		case PIN_CONFIG_BIAS_PULL_UP:
+		case PIN_CONFIG_BIAS_PULL_DOWN:
+			pu_val = (param == PIN_CONFIG_BIAS_PULL_UP) ?
+							BIT(pin) : 0;
+			pd_val = (param == PIN_CONFIG_BIAS_PULL_DOWN) ?
+							BIT(pin) : 0;
+
+			ret = max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_PUE_GPIO,
+				BIT(pin), pu_val);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"PUE_GPIO update failed: %d\n", ret);
+				return ret;
+			}
+
+			ret = max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_PDE_GPIO,
+				BIT(pin), pd_val);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"PDE_GPIO update failed: %d\n", ret);
+				return ret;
+			}
+			break;
+
+		default:
+			dev_err(mpci->dev, "Properties not supported\n");
+			return -ENOTSUPP;
+
+		}
+	}
+
+	return 0;
+}
+
+static const struct pinconf_ops max77620_pinconf_ops = {
+	.pin_config_get = max77620_pinconf_get,
+	.pin_config_set = max77620_pinconf_set,
+};
+
+static struct pinctrl_desc max77620_pinctrl_desc = {
+	.pctlops = &max77620_pinctrl_ops,
+	.pmxops = &max77620_pinmux_ops,
+	.confops = &max77620_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+static int max77620_pinctrl_probe(struct platform_device *pdev)
+{
+	struct max77620_pctrl_info *mpci;
+	struct max77620_chip *max77620 = dev_get_drvdata(pdev->dev.parent);
+	int i;
+
+	mpci = devm_kzalloc(&pdev->dev, sizeof(*mpci), GFP_KERNEL);
+	if (!mpci)
+		return -ENOMEM;
+
+	mpci->dev = &pdev->dev;
+	mpci->dev->of_node = pdev->dev.parent->of_node;
+	mpci->max77620 = max77620;
+
+	mpci->pins = max77620_pins_desc;
+	mpci->num_pins = ARRAY_SIZE(max77620_pins_desc);
+	mpci->functions = max77620_pin_function;
+	mpci->num_functions = ARRAY_SIZE(max77620_pin_function);
+	mpci->pin_groups = max77620_pingroups;
+	mpci->num_pin_groups = ARRAY_SIZE(max77620_pingroups);
+	platform_set_drvdata(pdev, mpci);
+
+	max77620_pinctrl_desc.name = dev_name(&pdev->dev);
+	max77620_pinctrl_desc.pins = max77620_pins_desc;
+	max77620_pinctrl_desc.npins = ARRAY_SIZE(max77620_pins_desc);
+	max77620_pinctrl_desc.num_custom_params =
+				ARRAY_SIZE(max77620_cfg_params);
+	max77620_pinctrl_desc.custom_params = max77620_cfg_params;
+
+	for (i = 0; i < MAX77620_PIN_NUM; ++i) {
+		mpci->fps_config[i].active_fps_src = -1;
+		mpci->fps_config[i].active_power_up_slots = -1;
+		mpci->fps_config[i].active_power_down_slots = -1;
+		mpci->fps_config[i].suspend_fps_src = -1;
+		mpci->fps_config[i].suspend_power_up_slots = -1;
+		mpci->fps_config[i].suspend_power_down_slots = -1;
+	}
+
+	mpci->pctl = pinctrl_register(&max77620_pinctrl_desc,
+					&pdev->dev, mpci);
+	if (!mpci->pctl) {
+		dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int max77620_pinctrl_remove(struct platform_device *pdev)
+{
+	struct max77620_pctrl_info *mpci = platform_get_drvdata(pdev);
+
+	pinctrl_unregister(mpci->pctl);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_pinctrl_suspend(struct device *dev)
+{
+	struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
+	int pin, p;
+	int ret;
+	int param[] = {MAX77620_SUSPEND_FPS_SOURCE,
+			MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+			MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS};
+
+	for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
+		if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+			continue;
+		for (p = 0; p < 3; ++p) {
+			ret = max77620_set_fps_param(mpci,
+					pin, param[p]);
+			if (ret < 0)
+				dev_err(dev, "Pin-%d config %d failed: %d\n",
+					pin, param[p], ret);
+		}
+	}
+	return 0;
+};
+
+static int max77620_pinctrl_resume(struct device *dev)
+{
+	struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
+	int pin, p;
+	int ret;
+	int param[] = {MAX77620_ACTIVE_FPS_SOURCE,
+			MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+			MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS};
+
+	for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
+		if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+			continue;
+		for (p = 0; p < 3; ++p) {
+			ret = max77620_set_fps_param(mpci, pin, param[p]);
+			if (ret < 0)
+				dev_err(dev, "Pin-%d config %d failed: %d\n",
+					pin, param[p], ret);
+		}
+	}
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_pinctrl_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_pinctrl_suspend,
+			max77620_pinctrl_resume)
+};
+
+static struct platform_device_id max77620_pinctrl_devtype[] = {
+	{
+		.name = "max77620-pinctrl",
+	}, {
+		.name = "max20024-pinctrl",
+	},
+};
+
+static struct platform_driver max77620_pinctrl_driver = {
+	.driver = {
+		.name = "max77620-pinctrl",
+		.owner = THIS_MODULE,
+		.pm = &max77620_pinctrl_pm_ops,
+	},
+	.probe = max77620_pinctrl_probe,
+	.remove = max77620_pinctrl_remove,
+	.id_table = max77620_pinctrl_devtype,
+};
+
+static int __init max77620_pinctrl_init(void)
+{
+	return platform_driver_register(&max77620_pinctrl_driver);
+}
+subsys_initcall(max77620_pinctrl_init);
+
+static void __exit max77620_pinctrl_exit(void)
+{
+	platform_driver_unregister(&max77620_pinctrl_driver);
+}
+module_exit(max77620_pinctrl_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 pin control driver");
+MODULE_AUTHOR("Chaitanya Bandi<bandik@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-pinctrl");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 3/6] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins
which also act as the special function in alternate mode. Also
there is configuration like push-pull, open drain, FPS timing
etc for these pins.

Add pincontrol driver to configure these parameters through
pincontrol APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/pinctrl/Kconfig            |  10 +
 drivers/pinctrl/Makefile           |   1 +
 drivers/pinctrl/pinctrl-max77620.c | 700 +++++++++++++++++++++++++++++++++++++
 3 files changed, 711 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-max77620.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 99a4c10..b6d2d23 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -227,6 +227,16 @@ config PINCTRL_COH901
 	  COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
 	  ports of 8 GPIO pins each.
 
+config PINCTRL_MAX77620
+	bool "MAX77620/MAX20024 Pincontrol support"
+	depends on MFD_MAX77620
+	select GENERIC_PINCONF
+	help
+	  Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
+	  This PMIC has 8 GPIO pins that work as GPIO as well as special
+	  function in alternate mode. This driver also configure push-pull,
+	  open drain, FPS slots etc.
+
 config PINCTRL_PALMAS
 	bool "Pinctrl driver for the PALMAS Series MFD devices"
 	depends on OF && MFD_PALMAS
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index bf1b5ca..72833e3 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_PINCTRL_AMD)	+= pinctrl-amd.o
 obj-$(CONFIG_PINCTRL_DIGICOLOR)	+= pinctrl-digicolor.o
 obj-$(CONFIG_PINCTRL_FALCON)	+= pinctrl-falcon.o
 obj-$(CONFIG_PINCTRL_MESON)	+= meson/
+obj-$(CONFIG_PINCTRL_MAX77620)	+= pinctrl-max77620.o
 obj-$(CONFIG_PINCTRL_PALMAS)	+= pinctrl-palmas.o
 obj-$(CONFIG_PINCTRL_PISTACHIO)	+= pinctrl-pistachio.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP)	+= pinctrl-rockchip.o
diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c
new file mode 100644
index 0000000..dc0584f
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-max77620.c
@@ -0,0 +1,700 @@
+/*
+ * MAX77620 pin control driver.
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author:
+ *	Chaitanya Bandi <bandik@nvidia.com>
+ *	Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/max77620.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+
+#include "core.h"
+#include "pinconf.h"
+#include "pinctrl-utils.h"
+
+#define MAX77620_PIN_NUM 8
+
+enum max77620_pin_ppdrv {
+	MAX77620_PIN_UNCONFIG_DRV,
+	MAX77620_PIN_OD_DRV,
+	MAX77620_PIN_PP_DRV,
+};
+
+enum max77620_pinconf_param {
+	MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1,
+	MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+	MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
+	MAX77620_SUSPEND_FPS_SOURCE,
+	MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+	MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
+};
+
+struct max77620_pin_function {
+	const char *name;
+	const char * const *groups;
+	unsigned ngroups;
+	int mux_option;
+};
+
+struct max77620_cfg_param {
+	const char *property;
+	enum max77620_pinconf_param param;
+};
+
+static const struct pinconf_generic_params max77620_cfg_params[] = {
+	{
+		.property = "maxim,active-fps-source",
+		.param = MAX77620_ACTIVE_FPS_SOURCE,
+	}, {
+		.property = "maxim,active-fps-power-up-slot",
+		.param = MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+	}, {
+		.property = "maxim,active-fps-power-down-slot",
+		.param = MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
+	}, {
+		.property = "maxim,suspend-fps-source",
+		.param = MAX77620_SUSPEND_FPS_SOURCE,
+	}, {
+		.property = "maxim,suspend-fps-power-up-slot",
+		.param = MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+	}, {
+		.property = "maxim,suspend-fps-power-down-slot",
+		.param = MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
+	},
+};
+
+enum max77620_alternate_pinmux_option {
+	MAX77620_PINMUX_GPIO				= 0,
+	MAX77620_PINMUX_LOW_POWER_MODE_CONTROL_IN	= 1,
+	MAX77620_PINMUX_FLEXIBLE_POWER_SEQUENCER_OUT	= 2,
+	MAX77620_PINMUX_32K_OUT1			= 3,
+	MAX77620_PINMUX_SD0_DYNAMIC_VOLTAGE_SCALING_IN	= 4,
+	MAX77620_PINMUX_SD1_DYNAMIC_VOLTAGE_SCALING_IN	= 5,
+	MAX77620_PINMUX_REFERENCE_OUT			= 6,
+};
+
+struct max77620_pingroup {
+	const char *name;
+	const unsigned pins[1];
+	unsigned npins;
+	enum max77620_alternate_pinmux_option alt_option;
+};
+
+struct max77620_pin_info {
+	enum max77620_pin_ppdrv drv_type;
+	int pull_config;
+};
+
+struct max77620_fps_config {
+	int active_fps_src;
+	int active_power_up_slots;
+	int active_power_down_slots;
+	int suspend_fps_src;
+	int suspend_power_up_slots;
+	int suspend_power_down_slots;
+};
+
+struct max77620_pctrl_info {
+	struct device *dev;
+	struct pinctrl_dev *pctl;
+	struct max77620_chip *max77620;
+	int pins_current_opt[MAX77620_GPIO_NR];
+	const struct max77620_pin_function *functions;
+	unsigned num_functions;
+	const struct max77620_pingroup *pin_groups;
+	int num_pin_groups;
+	const struct pinctrl_pin_desc *pins;
+	unsigned num_pins;
+	struct max77620_pin_info pin_info[MAX77620_PIN_NUM];
+	struct max77620_fps_config fps_config[MAX77620_PIN_NUM];
+};
+
+static const struct pinctrl_pin_desc max77620_pins_desc[] = {
+	PINCTRL_PIN(MAX77620_GPIO0, "gpio0"),
+	PINCTRL_PIN(MAX77620_GPIO1, "gpio1"),
+	PINCTRL_PIN(MAX77620_GPIO2, "gpio2"),
+	PINCTRL_PIN(MAX77620_GPIO3, "gpio3"),
+	PINCTRL_PIN(MAX77620_GPIO4, "gpio4"),
+	PINCTRL_PIN(MAX77620_GPIO5, "gpio5"),
+	PINCTRL_PIN(MAX77620_GPIO6, "gpio6"),
+	PINCTRL_PIN(MAX77620_GPIO7, "gpio7"),
+};
+
+static const char * const gpio_groups[] = {
+	"gpio0",
+	"gpio1",
+	"gpio2",
+	"gpio3",
+	"gpio4",
+	"gpio5",
+	"gpio6",
+	"gpio7",
+};
+
+#define FUNCTION_GROUP(fname, mux)			\
+	{						\
+		.name = #fname,				\
+		.groups = gpio_groups,			\
+		.ngroups = ARRAY_SIZE(gpio_groups),	\
+		.mux_option = MAX77620_PINMUX_##mux,	\
+	}
+
+static const struct max77620_pin_function max77620_pin_function[] = {
+	FUNCTION_GROUP(gpio, GPIO),
+	FUNCTION_GROUP(lpm-control-in, LOW_POWER_MODE_CONTROL_IN),
+	FUNCTION_GROUP(fps-out, FLEXIBLE_POWER_SEQUENCER_OUT),
+	FUNCTION_GROUP(32k-out1, 32K_OUT1),
+	FUNCTION_GROUP(sd0-dvs-in, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
+	FUNCTION_GROUP(sd1-dvs-in, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
+	FUNCTION_GROUP(reference-out, REFERENCE_OUT),
+};
+
+#define MAX77620_PINGROUP(pg_name, pin_id, option) \
+	{								\
+		.name = #pg_name,					\
+		.pins = {MAX77620_##pin_id},				\
+		.npins = 1,						\
+		.alt_option = MAX77620_PINMUX_##option,			\
+	}
+
+static const struct max77620_pingroup max77620_pingroups[] = {
+	MAX77620_PINGROUP(gpio0, GPIO0, LOW_POWER_MODE_CONTROL_IN),
+	MAX77620_PINGROUP(gpio1, GPIO1, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio2, GPIO2, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio3, GPIO3, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio4, GPIO4, 32K_OUT1),
+	MAX77620_PINGROUP(gpio5, GPIO5, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
+	MAX77620_PINGROUP(gpio6, GPIO6, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
+	MAX77620_PINGROUP(gpio7, GPIO7, REFERENCE_OUT),
+};
+
+static int max77620_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->num_pin_groups;
+}
+
+static const char *max77620_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+		unsigned group)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->pin_groups[group].name;
+}
+
+static int max77620_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+		unsigned group, const unsigned **pins, unsigned *num_pins)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	*pins = mpci->pin_groups[group].pins;
+	*num_pins = mpci->pin_groups[group].npins;
+	return 0;
+}
+
+static const struct pinctrl_ops max77620_pinctrl_ops = {
+	.get_groups_count = max77620_pinctrl_get_groups_count,
+	.get_group_name = max77620_pinctrl_get_group_name,
+	.get_group_pins = max77620_pinctrl_get_group_pins,
+	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+	.dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int max77620_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->num_functions;
+}
+
+static const char *max77620_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
+			unsigned function)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->functions[function].name;
+}
+
+static int max77620_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
+		unsigned function, const char * const **groups,
+		unsigned * const num_groups)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	*groups = mpci->functions[function].groups;
+	*num_groups = mpci->functions[function].ngroups;
+	return 0;
+}
+
+static int max77620_pinctrl_enable(struct pinctrl_dev *pctldev,
+		unsigned function, unsigned group)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	if (function == MAX77620_PINMUX_GPIO) {
+		max77620_reg_update(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_AME_GPIO,
+			1 << group, 0);
+	} else if (function == mpci->pin_groups[group].alt_option) {
+		max77620_reg_update(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_AME_GPIO,
+			1 << group, 1 << group);
+	} else {
+		dev_err(mpci->dev, "GPIO %u doesn't have function %u\n",
+				group, function);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static const struct pinmux_ops max77620_pinmux_ops = {
+	.get_functions_count	= max77620_pinctrl_get_funcs_count,
+	.get_function_name	= max77620_pinctrl_get_func_name,
+	.get_function_groups	= max77620_pinctrl_get_func_groups,
+	.set_mux		= max77620_pinctrl_enable,
+};
+
+static int max77620_pinconf_get(struct pinctrl_dev *pctldev,
+			unsigned pin, unsigned long *config)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+	enum pin_config_param param = pinconf_to_config_param(*config);
+	u8 val;
+	int arg = 0;
+	int ret;
+
+	switch (param) {
+	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+		if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV)
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_DRIVE_PUSH_PULL:
+		if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV)
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_PUE_GPIO, &val);
+		if (ret < 0) {
+			dev_err(mpci->dev,
+				"Reg PUE_GPIO read failed: %d\n", ret);
+			return ret;
+		}
+		if (val & BIT(pin))
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_PDE_GPIO, &val);
+		if (ret < 0) {
+			dev_err(mpci->dev,
+				"Reg PDE_GPIO read failed: %d\n", ret);
+			return ret;
+		}
+		if (val & BIT(pin))
+			arg = 1;
+		break;
+
+	default:
+		dev_err(mpci->dev, "Properties not supported\n");
+		return -ENOTSUPP;
+	}
+
+	*config = pinconf_to_config_packed(param, (u16)arg);
+	return 0;
+}
+
+static int max77620_get_default_fps(struct max77620_pctrl_info *mpci,
+	int addr, int *fps)
+{
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, addr, &val);
+	if (ret < 0) {
+		dev_err(mpci->dev, "Reg PUE_GPIO read failed: %d\n", ret);
+		return ret;
+	}
+	val = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+	*fps = val;
+	return 0;
+}
+
+static int max77620_set_fps_param(struct max77620_pctrl_info *mpci,
+	int pin, int param)
+{
+	struct max77620_fps_config *fps_config = &mpci->fps_config[pin];
+	int addr, ret;
+	int param_val;
+	int mask, shift;
+
+	if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+		return 0;
+
+	addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+	switch (param) {
+	case MAX77620_ACTIVE_FPS_SOURCE:
+	case MAX77620_SUSPEND_FPS_SOURCE:
+		mask = MAX77620_FPS_SRC_MASK;
+		shift = MAX77620_FPS_SRC_SHIFT;
+		param_val = fps_config->active_fps_src;
+		if (param == MAX77620_SUSPEND_FPS_SOURCE)
+			param_val = fps_config->suspend_fps_src;
+		break;
+
+	case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
+	case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
+		mask = MAX77620_FPS_PU_PERIOD_MASK;
+		shift = MAX77620_FPS_PU_PERIOD_SHIFT;
+		param_val = fps_config->active_power_up_slots;
+		if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
+			param_val = fps_config->suspend_power_up_slots;
+		break;
+
+	case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
+	case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
+		mask = MAX77620_FPS_PD_PERIOD_MASK;
+		shift = MAX77620_FPS_PD_PERIOD_SHIFT;
+		param_val = fps_config->active_power_down_slots;
+		if (param == MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS)
+			param_val = fps_config->suspend_power_down_slots;
+		break;
+
+	default:
+		return -EINVAL;
+	};
+
+	if (param_val < 0)
+		return 0;
+
+	ret = max77620_reg_update(mpci->max77620->dev,
+		MAX77620_PWR_SLAVE, addr, mask, param_val << shift);
+	if (ret < 0) {
+		dev_err(mpci->dev,
+			"Reg 0x%02x update failed %d\n", addr, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
+		unsigned pin, unsigned long *configs,
+		unsigned num_configs)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+	struct max77620_fps_config *fps_config;
+	int param;
+	u16 param_val;
+	unsigned int val;
+	unsigned int pu_val;
+	unsigned int pd_val;
+	int addr, ret;
+	int i;
+
+	for (i = 0; i < num_configs; i++) {
+		param = pinconf_to_config_param(configs[i]);
+		param_val = pinconf_to_config_argument(configs[i]);
+
+		switch (param) {
+		case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+			val = param_val ? 0 : 1;
+			max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_GPIO0 + pin,
+				MAX77620_CNFG_GPIO_DRV_MASK, val);
+			mpci->pin_info[pin].drv_type = val ?
+				MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
+			break;
+
+		case PIN_CONFIG_DRIVE_PUSH_PULL:
+			val = param_val ? 1 : 0;
+			max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_GPIO0 + pin,
+				MAX77620_CNFG_GPIO_DRV_MASK, val);
+			mpci->pin_info[pin].drv_type = val ?
+				MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
+			break;
+
+		case MAX77620_ACTIVE_FPS_SOURCE:
+		case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
+		case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
+			if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+				return -EINVAL;
+
+			fps_config = &mpci->fps_config[pin];
+
+			if ((param == MAX77620_ACTIVE_FPS_SOURCE) &&
+				(param_val == FPS_SRC_DEF)) {
+				addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+				ret = max77620_get_default_fps(mpci,
+					addr, &fps_config->active_fps_src);
+				if (ret < 0)
+					return ret;
+				break;
+			}
+
+			if (param == MAX77620_ACTIVE_FPS_SOURCE)
+				fps_config->active_fps_src = param_val;
+			else if (param == MAX77620_ACTIVE_FPS_POWER_ON_SLOTS)
+				fps_config->active_power_up_slots = param_val;
+			else
+				fps_config->active_power_down_slots = param_val;
+
+			ret = max77620_set_fps_param(mpci, pin, param);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"Pin-%d Param %d config failed: %d\n",
+					pin, param, ret);
+				return ret;
+			}
+			break;
+
+		case MAX77620_SUSPEND_FPS_SOURCE:
+		case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
+		case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
+			if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+				return -EINVAL;
+
+			fps_config = &mpci->fps_config[pin];
+
+			if ((param == MAX77620_SUSPEND_FPS_SOURCE) &&
+				(param_val == FPS_SRC_DEF)) {
+				addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+				ret = max77620_get_default_fps(mpci,
+					addr, &fps_config->suspend_fps_src);
+				if (ret < 0)
+					return ret;
+				break;
+			}
+
+			if (param == MAX77620_SUSPEND_FPS_SOURCE)
+				fps_config->suspend_fps_src = param_val;
+			else if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
+				fps_config->suspend_power_up_slots = param_val;
+			else
+				fps_config->suspend_power_down_slots =
+								param_val;
+			break;
+
+		case PIN_CONFIG_BIAS_PULL_UP:
+		case PIN_CONFIG_BIAS_PULL_DOWN:
+			pu_val = (param == PIN_CONFIG_BIAS_PULL_UP) ?
+							BIT(pin) : 0;
+			pd_val = (param == PIN_CONFIG_BIAS_PULL_DOWN) ?
+							BIT(pin) : 0;
+
+			ret = max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_PUE_GPIO,
+				BIT(pin), pu_val);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"PUE_GPIO update failed: %d\n", ret);
+				return ret;
+			}
+
+			ret = max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_PDE_GPIO,
+				BIT(pin), pd_val);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"PDE_GPIO update failed: %d\n", ret);
+				return ret;
+			}
+			break;
+
+		default:
+			dev_err(mpci->dev, "Properties not supported\n");
+			return -ENOTSUPP;
+
+		}
+	}
+
+	return 0;
+}
+
+static const struct pinconf_ops max77620_pinconf_ops = {
+	.pin_config_get = max77620_pinconf_get,
+	.pin_config_set = max77620_pinconf_set,
+};
+
+static struct pinctrl_desc max77620_pinctrl_desc = {
+	.pctlops = &max77620_pinctrl_ops,
+	.pmxops = &max77620_pinmux_ops,
+	.confops = &max77620_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+static int max77620_pinctrl_probe(struct platform_device *pdev)
+{
+	struct max77620_pctrl_info *mpci;
+	struct max77620_chip *max77620 = dev_get_drvdata(pdev->dev.parent);
+	int i;
+
+	mpci = devm_kzalloc(&pdev->dev, sizeof(*mpci), GFP_KERNEL);
+	if (!mpci)
+		return -ENOMEM;
+
+	mpci->dev = &pdev->dev;
+	mpci->dev->of_node = pdev->dev.parent->of_node;
+	mpci->max77620 = max77620;
+
+	mpci->pins = max77620_pins_desc;
+	mpci->num_pins = ARRAY_SIZE(max77620_pins_desc);
+	mpci->functions = max77620_pin_function;
+	mpci->num_functions = ARRAY_SIZE(max77620_pin_function);
+	mpci->pin_groups = max77620_pingroups;
+	mpci->num_pin_groups = ARRAY_SIZE(max77620_pingroups);
+	platform_set_drvdata(pdev, mpci);
+
+	max77620_pinctrl_desc.name = dev_name(&pdev->dev);
+	max77620_pinctrl_desc.pins = max77620_pins_desc;
+	max77620_pinctrl_desc.npins = ARRAY_SIZE(max77620_pins_desc);
+	max77620_pinctrl_desc.num_custom_params =
+				ARRAY_SIZE(max77620_cfg_params);
+	max77620_pinctrl_desc.custom_params = max77620_cfg_params;
+
+	for (i = 0; i < MAX77620_PIN_NUM; ++i) {
+		mpci->fps_config[i].active_fps_src = -1;
+		mpci->fps_config[i].active_power_up_slots = -1;
+		mpci->fps_config[i].active_power_down_slots = -1;
+		mpci->fps_config[i].suspend_fps_src = -1;
+		mpci->fps_config[i].suspend_power_up_slots = -1;
+		mpci->fps_config[i].suspend_power_down_slots = -1;
+	}
+
+	mpci->pctl = pinctrl_register(&max77620_pinctrl_desc,
+					&pdev->dev, mpci);
+	if (!mpci->pctl) {
+		dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int max77620_pinctrl_remove(struct platform_device *pdev)
+{
+	struct max77620_pctrl_info *mpci = platform_get_drvdata(pdev);
+
+	pinctrl_unregister(mpci->pctl);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_pinctrl_suspend(struct device *dev)
+{
+	struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
+	int pin, p;
+	int ret;
+	int param[] = {MAX77620_SUSPEND_FPS_SOURCE,
+			MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+			MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS};
+
+	for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
+		if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+			continue;
+		for (p = 0; p < 3; ++p) {
+			ret = max77620_set_fps_param(mpci,
+					pin, param[p]);
+			if (ret < 0)
+				dev_err(dev, "Pin-%d config %d failed: %d\n",
+					pin, param[p], ret);
+		}
+	}
+	return 0;
+};
+
+static int max77620_pinctrl_resume(struct device *dev)
+{
+	struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
+	int pin, p;
+	int ret;
+	int param[] = {MAX77620_ACTIVE_FPS_SOURCE,
+			MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+			MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS};
+
+	for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
+		if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+			continue;
+		for (p = 0; p < 3; ++p) {
+			ret = max77620_set_fps_param(mpci, pin, param[p]);
+			if (ret < 0)
+				dev_err(dev, "Pin-%d config %d failed: %d\n",
+					pin, param[p], ret);
+		}
+	}
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_pinctrl_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_pinctrl_suspend,
+			max77620_pinctrl_resume)
+};
+
+static struct platform_device_id max77620_pinctrl_devtype[] = {
+	{
+		.name = "max77620-pinctrl",
+	}, {
+		.name = "max20024-pinctrl",
+	},
+};
+
+static struct platform_driver max77620_pinctrl_driver = {
+	.driver = {
+		.name = "max77620-pinctrl",
+		.owner = THIS_MODULE,
+		.pm = &max77620_pinctrl_pm_ops,
+	},
+	.probe = max77620_pinctrl_probe,
+	.remove = max77620_pinctrl_remove,
+	.id_table = max77620_pinctrl_devtype,
+};
+
+static int __init max77620_pinctrl_init(void)
+{
+	return platform_driver_register(&max77620_pinctrl_driver);
+}
+subsys_initcall(max77620_pinctrl_init);
+
+static void __exit max77620_pinctrl_exit(void)
+{
+	platform_driver_unregister(&max77620_pinctrl_driver);
+}
+module_exit(max77620_pinctrl_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 pin control driver");
+MODULE_AUTHOR("Chaitanya Bandi<bandik@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-pinctrl");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 3/6] pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins
which also act as the special function in alternate mode. Also
there is configuration like push-pull, open drain, FPS timing
etc for these pins.

Add pincontrol driver to configure these parameters through
pincontrol APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/pinctrl/Kconfig            |  10 +
 drivers/pinctrl/Makefile           |   1 +
 drivers/pinctrl/pinctrl-max77620.c | 700 +++++++++++++++++++++++++++++++++++++
 3 files changed, 711 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-max77620.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 99a4c10..b6d2d23 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -227,6 +227,16 @@ config PINCTRL_COH901
 	  COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
 	  ports of 8 GPIO pins each.
 
+config PINCTRL_MAX77620
+	bool "MAX77620/MAX20024 Pincontrol support"
+	depends on MFD_MAX77620
+	select GENERIC_PINCONF
+	help
+	  Say Yes here to enable Pin control support for Maxim PMIC MAX77620.
+	  This PMIC has 8 GPIO pins that work as GPIO as well as special
+	  function in alternate mode. This driver also configure push-pull,
+	  open drain, FPS slots etc.
+
 config PINCTRL_PALMAS
 	bool "Pinctrl driver for the PALMAS Series MFD devices"
 	depends on OF && MFD_PALMAS
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index bf1b5ca..72833e3 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_PINCTRL_AMD)	+= pinctrl-amd.o
 obj-$(CONFIG_PINCTRL_DIGICOLOR)	+= pinctrl-digicolor.o
 obj-$(CONFIG_PINCTRL_FALCON)	+= pinctrl-falcon.o
 obj-$(CONFIG_PINCTRL_MESON)	+= meson/
+obj-$(CONFIG_PINCTRL_MAX77620)	+= pinctrl-max77620.o
 obj-$(CONFIG_PINCTRL_PALMAS)	+= pinctrl-palmas.o
 obj-$(CONFIG_PINCTRL_PISTACHIO)	+= pinctrl-pistachio.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP)	+= pinctrl-rockchip.o
diff --git a/drivers/pinctrl/pinctrl-max77620.c b/drivers/pinctrl/pinctrl-max77620.c
new file mode 100644
index 0000000..dc0584f
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-max77620.c
@@ -0,0 +1,700 @@
+/*
+ * MAX77620 pin control driver.
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author:
+ *	Chaitanya Bandi <bandik@nvidia.com>
+ *	Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/max77620.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+
+#include "core.h"
+#include "pinconf.h"
+#include "pinctrl-utils.h"
+
+#define MAX77620_PIN_NUM 8
+
+enum max77620_pin_ppdrv {
+	MAX77620_PIN_UNCONFIG_DRV,
+	MAX77620_PIN_OD_DRV,
+	MAX77620_PIN_PP_DRV,
+};
+
+enum max77620_pinconf_param {
+	MAX77620_ACTIVE_FPS_SOURCE = PIN_CONFIG_END + 1,
+	MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+	MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
+	MAX77620_SUSPEND_FPS_SOURCE,
+	MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+	MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
+};
+
+struct max77620_pin_function {
+	const char *name;
+	const char * const *groups;
+	unsigned ngroups;
+	int mux_option;
+};
+
+struct max77620_cfg_param {
+	const char *property;
+	enum max77620_pinconf_param param;
+};
+
+static const struct pinconf_generic_params max77620_cfg_params[] = {
+	{
+		.property = "maxim,active-fps-source",
+		.param = MAX77620_ACTIVE_FPS_SOURCE,
+	}, {
+		.property = "maxim,active-fps-power-up-slot",
+		.param = MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+	}, {
+		.property = "maxim,active-fps-power-down-slot",
+		.param = MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS,
+	}, {
+		.property = "maxim,suspend-fps-source",
+		.param = MAX77620_SUSPEND_FPS_SOURCE,
+	}, {
+		.property = "maxim,suspend-fps-power-up-slot",
+		.param = MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+	}, {
+		.property = "maxim,suspend-fps-power-down-slot",
+		.param = MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS,
+	},
+};
+
+enum max77620_alternate_pinmux_option {
+	MAX77620_PINMUX_GPIO				= 0,
+	MAX77620_PINMUX_LOW_POWER_MODE_CONTROL_IN	= 1,
+	MAX77620_PINMUX_FLEXIBLE_POWER_SEQUENCER_OUT	= 2,
+	MAX77620_PINMUX_32K_OUT1			= 3,
+	MAX77620_PINMUX_SD0_DYNAMIC_VOLTAGE_SCALING_IN	= 4,
+	MAX77620_PINMUX_SD1_DYNAMIC_VOLTAGE_SCALING_IN	= 5,
+	MAX77620_PINMUX_REFERENCE_OUT			= 6,
+};
+
+struct max77620_pingroup {
+	const char *name;
+	const unsigned pins[1];
+	unsigned npins;
+	enum max77620_alternate_pinmux_option alt_option;
+};
+
+struct max77620_pin_info {
+	enum max77620_pin_ppdrv drv_type;
+	int pull_config;
+};
+
+struct max77620_fps_config {
+	int active_fps_src;
+	int active_power_up_slots;
+	int active_power_down_slots;
+	int suspend_fps_src;
+	int suspend_power_up_slots;
+	int suspend_power_down_slots;
+};
+
+struct max77620_pctrl_info {
+	struct device *dev;
+	struct pinctrl_dev *pctl;
+	struct max77620_chip *max77620;
+	int pins_current_opt[MAX77620_GPIO_NR];
+	const struct max77620_pin_function *functions;
+	unsigned num_functions;
+	const struct max77620_pingroup *pin_groups;
+	int num_pin_groups;
+	const struct pinctrl_pin_desc *pins;
+	unsigned num_pins;
+	struct max77620_pin_info pin_info[MAX77620_PIN_NUM];
+	struct max77620_fps_config fps_config[MAX77620_PIN_NUM];
+};
+
+static const struct pinctrl_pin_desc max77620_pins_desc[] = {
+	PINCTRL_PIN(MAX77620_GPIO0, "gpio0"),
+	PINCTRL_PIN(MAX77620_GPIO1, "gpio1"),
+	PINCTRL_PIN(MAX77620_GPIO2, "gpio2"),
+	PINCTRL_PIN(MAX77620_GPIO3, "gpio3"),
+	PINCTRL_PIN(MAX77620_GPIO4, "gpio4"),
+	PINCTRL_PIN(MAX77620_GPIO5, "gpio5"),
+	PINCTRL_PIN(MAX77620_GPIO6, "gpio6"),
+	PINCTRL_PIN(MAX77620_GPIO7, "gpio7"),
+};
+
+static const char * const gpio_groups[] = {
+	"gpio0",
+	"gpio1",
+	"gpio2",
+	"gpio3",
+	"gpio4",
+	"gpio5",
+	"gpio6",
+	"gpio7",
+};
+
+#define FUNCTION_GROUP(fname, mux)			\
+	{						\
+		.name = #fname,				\
+		.groups = gpio_groups,			\
+		.ngroups = ARRAY_SIZE(gpio_groups),	\
+		.mux_option = MAX77620_PINMUX_##mux,	\
+	}
+
+static const struct max77620_pin_function max77620_pin_function[] = {
+	FUNCTION_GROUP(gpio, GPIO),
+	FUNCTION_GROUP(lpm-control-in, LOW_POWER_MODE_CONTROL_IN),
+	FUNCTION_GROUP(fps-out, FLEXIBLE_POWER_SEQUENCER_OUT),
+	FUNCTION_GROUP(32k-out1, 32K_OUT1),
+	FUNCTION_GROUP(sd0-dvs-in, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
+	FUNCTION_GROUP(sd1-dvs-in, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
+	FUNCTION_GROUP(reference-out, REFERENCE_OUT),
+};
+
+#define MAX77620_PINGROUP(pg_name, pin_id, option) \
+	{								\
+		.name = #pg_name,					\
+		.pins = {MAX77620_##pin_id},				\
+		.npins = 1,						\
+		.alt_option = MAX77620_PINMUX_##option,			\
+	}
+
+static const struct max77620_pingroup max77620_pingroups[] = {
+	MAX77620_PINGROUP(gpio0, GPIO0, LOW_POWER_MODE_CONTROL_IN),
+	MAX77620_PINGROUP(gpio1, GPIO1, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio2, GPIO2, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio3, GPIO3, FLEXIBLE_POWER_SEQUENCER_OUT),
+	MAX77620_PINGROUP(gpio4, GPIO4, 32K_OUT1),
+	MAX77620_PINGROUP(gpio5, GPIO5, SD0_DYNAMIC_VOLTAGE_SCALING_IN),
+	MAX77620_PINGROUP(gpio6, GPIO6, SD1_DYNAMIC_VOLTAGE_SCALING_IN),
+	MAX77620_PINGROUP(gpio7, GPIO7, REFERENCE_OUT),
+};
+
+static int max77620_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->num_pin_groups;
+}
+
+static const char *max77620_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+		unsigned group)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->pin_groups[group].name;
+}
+
+static int max77620_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+		unsigned group, const unsigned **pins, unsigned *num_pins)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	*pins = mpci->pin_groups[group].pins;
+	*num_pins = mpci->pin_groups[group].npins;
+	return 0;
+}
+
+static const struct pinctrl_ops max77620_pinctrl_ops = {
+	.get_groups_count = max77620_pinctrl_get_groups_count,
+	.get_group_name = max77620_pinctrl_get_group_name,
+	.get_group_pins = max77620_pinctrl_get_group_pins,
+	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+	.dt_free_map = pinctrl_utils_dt_free_map,
+};
+
+static int max77620_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->num_functions;
+}
+
+static const char *max77620_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
+			unsigned function)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	return mpci->functions[function].name;
+}
+
+static int max77620_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
+		unsigned function, const char * const **groups,
+		unsigned * const num_groups)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	*groups = mpci->functions[function].groups;
+	*num_groups = mpci->functions[function].ngroups;
+	return 0;
+}
+
+static int max77620_pinctrl_enable(struct pinctrl_dev *pctldev,
+		unsigned function, unsigned group)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+
+	if (function == MAX77620_PINMUX_GPIO) {
+		max77620_reg_update(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_AME_GPIO,
+			1 << group, 0);
+	} else if (function == mpci->pin_groups[group].alt_option) {
+		max77620_reg_update(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_AME_GPIO,
+			1 << group, 1 << group);
+	} else {
+		dev_err(mpci->dev, "GPIO %u doesn't have function %u\n",
+				group, function);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static const struct pinmux_ops max77620_pinmux_ops = {
+	.get_functions_count	= max77620_pinctrl_get_funcs_count,
+	.get_function_name	= max77620_pinctrl_get_func_name,
+	.get_function_groups	= max77620_pinctrl_get_func_groups,
+	.set_mux		= max77620_pinctrl_enable,
+};
+
+static int max77620_pinconf_get(struct pinctrl_dev *pctldev,
+			unsigned pin, unsigned long *config)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+	enum pin_config_param param = pinconf_to_config_param(*config);
+	u8 val;
+	int arg = 0;
+	int ret;
+
+	switch (param) {
+	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+		if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV)
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_DRIVE_PUSH_PULL:
+		if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV)
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_PUE_GPIO, &val);
+		if (ret < 0) {
+			dev_err(mpci->dev,
+				"Reg PUE_GPIO read failed: %d\n", ret);
+			return ret;
+		}
+		if (val & BIT(pin))
+			arg = 1;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, MAX77620_REG_PDE_GPIO, &val);
+		if (ret < 0) {
+			dev_err(mpci->dev,
+				"Reg PDE_GPIO read failed: %d\n", ret);
+			return ret;
+		}
+		if (val & BIT(pin))
+			arg = 1;
+		break;
+
+	default:
+		dev_err(mpci->dev, "Properties not supported\n");
+		return -ENOTSUPP;
+	}
+
+	*config = pinconf_to_config_packed(param, (u16)arg);
+	return 0;
+}
+
+static int max77620_get_default_fps(struct max77620_pctrl_info *mpci,
+	int addr, int *fps)
+{
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(mpci->max77620->dev,
+			MAX77620_PWR_SLAVE, addr, &val);
+	if (ret < 0) {
+		dev_err(mpci->dev, "Reg PUE_GPIO read failed: %d\n", ret);
+		return ret;
+	}
+	val = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+	*fps = val;
+	return 0;
+}
+
+static int max77620_set_fps_param(struct max77620_pctrl_info *mpci,
+	int pin, int param)
+{
+	struct max77620_fps_config *fps_config = &mpci->fps_config[pin];
+	int addr, ret;
+	int param_val;
+	int mask, shift;
+
+	if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+		return 0;
+
+	addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+	switch (param) {
+	case MAX77620_ACTIVE_FPS_SOURCE:
+	case MAX77620_SUSPEND_FPS_SOURCE:
+		mask = MAX77620_FPS_SRC_MASK;
+		shift = MAX77620_FPS_SRC_SHIFT;
+		param_val = fps_config->active_fps_src;
+		if (param == MAX77620_SUSPEND_FPS_SOURCE)
+			param_val = fps_config->suspend_fps_src;
+		break;
+
+	case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
+	case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
+		mask = MAX77620_FPS_PU_PERIOD_MASK;
+		shift = MAX77620_FPS_PU_PERIOD_SHIFT;
+		param_val = fps_config->active_power_up_slots;
+		if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
+			param_val = fps_config->suspend_power_up_slots;
+		break;
+
+	case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
+	case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
+		mask = MAX77620_FPS_PD_PERIOD_MASK;
+		shift = MAX77620_FPS_PD_PERIOD_SHIFT;
+		param_val = fps_config->active_power_down_slots;
+		if (param == MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS)
+			param_val = fps_config->suspend_power_down_slots;
+		break;
+
+	default:
+		return -EINVAL;
+	};
+
+	if (param_val < 0)
+		return 0;
+
+	ret = max77620_reg_update(mpci->max77620->dev,
+		MAX77620_PWR_SLAVE, addr, mask, param_val << shift);
+	if (ret < 0) {
+		dev_err(mpci->dev,
+			"Reg 0x%02x update failed %d\n", addr, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
+		unsigned pin, unsigned long *configs,
+		unsigned num_configs)
+{
+	struct max77620_pctrl_info *mpci = pinctrl_dev_get_drvdata(pctldev);
+	struct max77620_fps_config *fps_config;
+	int param;
+	u16 param_val;
+	unsigned int val;
+	unsigned int pu_val;
+	unsigned int pd_val;
+	int addr, ret;
+	int i;
+
+	for (i = 0; i < num_configs; i++) {
+		param = pinconf_to_config_param(configs[i]);
+		param_val = pinconf_to_config_argument(configs[i]);
+
+		switch (param) {
+		case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+			val = param_val ? 0 : 1;
+			max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_GPIO0 + pin,
+				MAX77620_CNFG_GPIO_DRV_MASK, val);
+			mpci->pin_info[pin].drv_type = val ?
+				MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
+			break;
+
+		case PIN_CONFIG_DRIVE_PUSH_PULL:
+			val = param_val ? 1 : 0;
+			max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_GPIO0 + pin,
+				MAX77620_CNFG_GPIO_DRV_MASK, val);
+			mpci->pin_info[pin].drv_type = val ?
+				MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
+			break;
+
+		case MAX77620_ACTIVE_FPS_SOURCE:
+		case MAX77620_ACTIVE_FPS_POWER_ON_SLOTS:
+		case MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS:
+			if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+				return -EINVAL;
+
+			fps_config = &mpci->fps_config[pin];
+
+			if ((param == MAX77620_ACTIVE_FPS_SOURCE) &&
+				(param_val == FPS_SRC_DEF)) {
+				addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+				ret = max77620_get_default_fps(mpci,
+					addr, &fps_config->active_fps_src);
+				if (ret < 0)
+					return ret;
+				break;
+			}
+
+			if (param == MAX77620_ACTIVE_FPS_SOURCE)
+				fps_config->active_fps_src = param_val;
+			else if (param == MAX77620_ACTIVE_FPS_POWER_ON_SLOTS)
+				fps_config->active_power_up_slots = param_val;
+			else
+				fps_config->active_power_down_slots = param_val;
+
+			ret = max77620_set_fps_param(mpci, pin, param);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"Pin-%d Param %d config failed: %d\n",
+					pin, param, ret);
+				return ret;
+			}
+			break;
+
+		case MAX77620_SUSPEND_FPS_SOURCE:
+		case MAX77620_SUSPEND_FPS_POWER_ON_SLOTS:
+		case MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS:
+			if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+				return -EINVAL;
+
+			fps_config = &mpci->fps_config[pin];
+
+			if ((param == MAX77620_SUSPEND_FPS_SOURCE) &&
+				(param_val == FPS_SRC_DEF)) {
+				addr = MAX77620_REG_FPS_GPIO1 + pin - 1;
+				ret = max77620_get_default_fps(mpci,
+					addr, &fps_config->suspend_fps_src);
+				if (ret < 0)
+					return ret;
+				break;
+			}
+
+			if (param == MAX77620_SUSPEND_FPS_SOURCE)
+				fps_config->suspend_fps_src = param_val;
+			else if (param == MAX77620_SUSPEND_FPS_POWER_ON_SLOTS)
+				fps_config->suspend_power_up_slots = param_val;
+			else
+				fps_config->suspend_power_down_slots =
+								param_val;
+			break;
+
+		case PIN_CONFIG_BIAS_PULL_UP:
+		case PIN_CONFIG_BIAS_PULL_DOWN:
+			pu_val = (param == PIN_CONFIG_BIAS_PULL_UP) ?
+							BIT(pin) : 0;
+			pd_val = (param == PIN_CONFIG_BIAS_PULL_DOWN) ?
+							BIT(pin) : 0;
+
+			ret = max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_PUE_GPIO,
+				BIT(pin), pu_val);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"PUE_GPIO update failed: %d\n", ret);
+				return ret;
+			}
+
+			ret = max77620_reg_update(mpci->max77620->dev,
+				MAX77620_PWR_SLAVE, MAX77620_REG_PDE_GPIO,
+				BIT(pin), pd_val);
+			if (ret < 0) {
+				dev_err(mpci->dev,
+					"PDE_GPIO update failed: %d\n", ret);
+				return ret;
+			}
+			break;
+
+		default:
+			dev_err(mpci->dev, "Properties not supported\n");
+			return -ENOTSUPP;
+
+		}
+	}
+
+	return 0;
+}
+
+static const struct pinconf_ops max77620_pinconf_ops = {
+	.pin_config_get = max77620_pinconf_get,
+	.pin_config_set = max77620_pinconf_set,
+};
+
+static struct pinctrl_desc max77620_pinctrl_desc = {
+	.pctlops = &max77620_pinctrl_ops,
+	.pmxops = &max77620_pinmux_ops,
+	.confops = &max77620_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+static int max77620_pinctrl_probe(struct platform_device *pdev)
+{
+	struct max77620_pctrl_info *mpci;
+	struct max77620_chip *max77620 = dev_get_drvdata(pdev->dev.parent);
+	int i;
+
+	mpci = devm_kzalloc(&pdev->dev, sizeof(*mpci), GFP_KERNEL);
+	if (!mpci)
+		return -ENOMEM;
+
+	mpci->dev = &pdev->dev;
+	mpci->dev->of_node = pdev->dev.parent->of_node;
+	mpci->max77620 = max77620;
+
+	mpci->pins = max77620_pins_desc;
+	mpci->num_pins = ARRAY_SIZE(max77620_pins_desc);
+	mpci->functions = max77620_pin_function;
+	mpci->num_functions = ARRAY_SIZE(max77620_pin_function);
+	mpci->pin_groups = max77620_pingroups;
+	mpci->num_pin_groups = ARRAY_SIZE(max77620_pingroups);
+	platform_set_drvdata(pdev, mpci);
+
+	max77620_pinctrl_desc.name = dev_name(&pdev->dev);
+	max77620_pinctrl_desc.pins = max77620_pins_desc;
+	max77620_pinctrl_desc.npins = ARRAY_SIZE(max77620_pins_desc);
+	max77620_pinctrl_desc.num_custom_params =
+				ARRAY_SIZE(max77620_cfg_params);
+	max77620_pinctrl_desc.custom_params = max77620_cfg_params;
+
+	for (i = 0; i < MAX77620_PIN_NUM; ++i) {
+		mpci->fps_config[i].active_fps_src = -1;
+		mpci->fps_config[i].active_power_up_slots = -1;
+		mpci->fps_config[i].active_power_down_slots = -1;
+		mpci->fps_config[i].suspend_fps_src = -1;
+		mpci->fps_config[i].suspend_power_up_slots = -1;
+		mpci->fps_config[i].suspend_power_down_slots = -1;
+	}
+
+	mpci->pctl = pinctrl_register(&max77620_pinctrl_desc,
+					&pdev->dev, mpci);
+	if (!mpci->pctl) {
+		dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int max77620_pinctrl_remove(struct platform_device *pdev)
+{
+	struct max77620_pctrl_info *mpci = platform_get_drvdata(pdev);
+
+	pinctrl_unregister(mpci->pctl);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_pinctrl_suspend(struct device *dev)
+{
+	struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
+	int pin, p;
+	int ret;
+	int param[] = {MAX77620_SUSPEND_FPS_SOURCE,
+			MAX77620_SUSPEND_FPS_POWER_ON_SLOTS,
+			MAX77620_SUSPEND_FPS_POWER_DOWN_SLOTS};
+
+	for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
+		if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+			continue;
+		for (p = 0; p < 3; ++p) {
+			ret = max77620_set_fps_param(mpci,
+					pin, param[p]);
+			if (ret < 0)
+				dev_err(dev, "Pin-%d config %d failed: %d\n",
+					pin, param[p], ret);
+		}
+	}
+	return 0;
+};
+
+static int max77620_pinctrl_resume(struct device *dev)
+{
+	struct max77620_pctrl_info *mpci = dev_get_drvdata(dev);
+	int pin, p;
+	int ret;
+	int param[] = {MAX77620_ACTIVE_FPS_SOURCE,
+			MAX77620_ACTIVE_FPS_POWER_ON_SLOTS,
+			MAX77620_ACTIVE_FPS_POWER_DOWN_SLOTS};
+
+	for (pin = 0; pin < MAX77620_PIN_NUM; ++pin) {
+		if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO3))
+			continue;
+		for (p = 0; p < 3; ++p) {
+			ret = max77620_set_fps_param(mpci, pin, param[p]);
+			if (ret < 0)
+				dev_err(dev, "Pin-%d config %d failed: %d\n",
+					pin, param[p], ret);
+		}
+	}
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_pinctrl_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_pinctrl_suspend,
+			max77620_pinctrl_resume)
+};
+
+static struct platform_device_id max77620_pinctrl_devtype[] = {
+	{
+		.name = "max77620-pinctrl",
+	}, {
+		.name = "max20024-pinctrl",
+	},
+};
+
+static struct platform_driver max77620_pinctrl_driver = {
+	.driver = {
+		.name = "max77620-pinctrl",
+		.owner = THIS_MODULE,
+		.pm = &max77620_pinctrl_pm_ops,
+	},
+	.probe = max77620_pinctrl_probe,
+	.remove = max77620_pinctrl_remove,
+	.id_table = max77620_pinctrl_devtype,
+};
+
+static int __init max77620_pinctrl_init(void)
+{
+	return platform_driver_register(&max77620_pinctrl_driver);
+}
+subsys_initcall(max77620_pinctrl_init);
+
+static void __exit max77620_pinctrl_exit(void)
+{
+	platform_driver_unregister(&max77620_pinctrl_driver);
+}
+module_exit(max77620_pinctrl_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 pin control driver");
+MODULE_AUTHOR("Chaitanya Bandi<bandik@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan<ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-pinctrl");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

-- 
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^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 4/6] gpio: max77620: add gpio driver for MAX77620/MAX20024
  2016-01-07 14:38 ` Laxman Dewangan
  (?)
@ 2016-01-07 14:38   ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO
pins. It also supports interrupts from these pins.

Add GPIO driver for these pins to control via GPIO APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/gpio/Kconfig         |   9 ++
 drivers/gpio/Makefile        |   1 +
 drivers/gpio/gpio-max77620.c | 330 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 340 insertions(+)
 create mode 100644 drivers/gpio/gpio-max77620.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f2b7160..b96a80c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -797,6 +797,15 @@ config GPIO_LP3943
 	  LP3943 can be used as a GPIO expander which provides up to 16 GPIOs.
 	  Open drain outputs are required for this usage.
 
+config GPIO_MAX77620
+	bool "GPIO support for PMIC MAX77620 and MAX20024"
+	depends on MFD_MAX77620
+	help
+	  GPIO driver for MAX77620 and MAX20024 PMIC from Maxim Semiconductor.
+	  MAX77620 PMIC has 8 pins that can be configured as GPIOs. The
+	  driver also provides interrupt support for each of the gpios.
+	  Say yes here to enable the max77620 to be used as gpio controller.
+
 config GPIO_MSIC
 	bool "Intel MSIC mixed signal gpio support"
 	depends on MFD_INTEL_MSIC
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index ece7d7c..f676a2d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_GPIO_MAX730X)	+= gpio-max730x.o
 obj-$(CONFIG_GPIO_MAX7300)	+= gpio-max7300.o
 obj-$(CONFIG_GPIO_MAX7301)	+= gpio-max7301.o
 obj-$(CONFIG_GPIO_MAX732X)	+= gpio-max732x.o
+obj-$(CONFIG_GPIO_MAX77620)	+= gpio-max77620.o
 obj-$(CONFIG_GPIO_MB86S7X)	+= gpio-mb86s7x.o
 obj-$(CONFIG_GPIO_MC33880)	+= gpio-mc33880.o
 obj-$(CONFIG_GPIO_MC9S08DZ60)	+= gpio-mc9s08dz60.o
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
new file mode 100644
index 0000000..2d5fe1c
--- /dev/null
+++ b/drivers/gpio/gpio-max77620.c
@@ -0,0 +1,330 @@
+/*
+ * MAXIM MAX77620 GPIO driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/errno.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/max77620.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define GPIO_REG_ADDR(offset) (MAX77620_REG_GPIO0 + offset)
+
+struct max77620_gpio {
+	struct gpio_chip	gpio_chip;
+	struct device		*parent;
+	struct device		*dev;
+	int			gpio_irq;
+	int			irq_base;
+	int			gpio_base;
+};
+
+static const struct regmap_irq max77620_gpio_irqs[] = {
+	[MAX77620_IRQ_GPIO0 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE0,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO1 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE1,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO2 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE2,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO3 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE3,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO4 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE4,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO5 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE5,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO6 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE6,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO7 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE7,
+		.reg_offset = 0,
+	},
+};
+
+static struct regmap_irq_chip max77620_gpio_irq_chip = {
+	.name = "max77620-gpio",
+	.irqs = max77620_gpio_irqs,
+	.num_irqs = ARRAY_SIZE(max77620_gpio_irqs),
+	.num_regs = 1,
+	.irq_reg_stride = 1,
+	.status_base = MAX77620_REG_IRQ_LVL2_GPIO,
+};
+
+static inline struct max77620_gpio *to_max77620_gpio(struct gpio_chip *gpio)
+{
+	return container_of(gpio, struct max77620_gpio, gpio_chip);
+}
+
+static int max77620_gpio_dir_input(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	int ret;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DIR_MASK,
+				MAX77620_CNFG_GPIO_DIR_INPUT);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx dir update failed: %d\n", ret);
+	return ret;
+}
+
+static int max77620_gpio_get(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				GPIO_REG_ADDR(offset), &val);
+	if (ret < 0) {
+		dev_err(dev, "CNFG_GPIOx read failed: %d\n", ret);
+		return ret;
+	}
+
+	return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
+}
+
+static int max77620_gpio_dir_output(struct gpio_chip *gpio, unsigned offset,
+				int value)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	if (value)
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH;
+	else
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			GPIO_REG_ADDR(offset),
+			MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+	if (ret < 0) {
+		dev_err(dev, "CNFG_GPIOx val update failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DIR_MASK,
+				MAX77620_CNFG_GPIO_DIR_OUTPUT);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx dir update failed: %d\n", ret);
+	return ret;
+}
+
+static int max77620_gpio_set_debounce(struct gpio_chip *gpio,
+		unsigned offset, unsigned debounce)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	switch (debounce) {
+	case 0:
+		val = MAX77620_CNFG_GPIO_DBNC_None;
+		break;
+	case 1 ... 8:
+		val = MAX77620_CNFG_GPIO_DBNC_8ms;
+		break;
+	case 9 ... 16:
+		val = MAX77620_CNFG_GPIO_DBNC_16ms;
+		break;
+	case 17 ... 32:
+		val = MAX77620_CNFG_GPIO_DBNC_32ms;
+		break;
+	default:
+		dev_err(dev, "Illegal value %u\n", debounce);
+		return -EINVAL;
+	}
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DBNC_MASK, val);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx debounce update failed: %d\n", ret);
+	return ret;
+}
+
+static void max77620_gpio_set(struct gpio_chip *gpio, unsigned offset,
+			int value)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	if (value)
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH;
+	else
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			GPIO_REG_ADDR(offset),
+			MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx val update failed: %d\n", ret);
+}
+
+static int max77620_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
+
+	return regmap_irq_get_virq(chip->gpio_irq_data, offset);
+}
+
+static void max77620_gpio_irq_remove(struct max77620_gpio *mgpio)
+{
+	struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
+
+	regmap_del_irq_chip(mgpio->gpio_irq, chip->gpio_irq_data);
+	chip->gpio_irq_data = NULL;
+}
+
+static int max77620_gpio_probe(struct platform_device *pdev)
+{
+	struct max77620_gpio *mgpio;
+	struct max77620_chip *chip =  dev_get_drvdata(pdev->dev.parent);
+	int ret;
+	int gpio_irq;
+
+	gpio_irq = platform_get_irq(pdev, 0);
+	if (gpio_irq <= 0) {
+		dev_err(&pdev->dev, "Gpio irq not available %d\n", gpio_irq);
+		return -ENODEV;
+	}
+
+	mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL);
+	if (!mgpio)
+		return -ENOMEM;
+
+	mgpio->parent = pdev->dev.parent;
+	mgpio->dev = &pdev->dev;
+	mgpio->gpio_irq = gpio_irq;
+
+	mgpio->gpio_chip.owner = THIS_MODULE;
+	mgpio->gpio_chip.label = pdev->name;
+	mgpio->gpio_chip.parent = &pdev->dev;
+	mgpio->gpio_chip.direction_input = max77620_gpio_dir_input;
+	mgpio->gpio_chip.get = max77620_gpio_get;
+	mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
+	mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce;
+	mgpio->gpio_chip.set = max77620_gpio_set;
+	mgpio->gpio_chip.to_irq = max77620_gpio_to_irq;
+	mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
+	mgpio->gpio_chip.can_sleep = 1;
+	mgpio->gpio_chip.base = -1;
+	mgpio->irq_base = -1;
+#ifdef CONFIG_OF_GPIO
+	mgpio->gpio_chip.of_node = pdev->dev.parent->of_node;
+#endif
+
+	platform_set_drvdata(pdev, mgpio);
+
+	ret = gpiochip_add(&mgpio->gpio_chip);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "gpio_init: Failed to add max77620_gpio\n");
+		return ret;
+	}
+	mgpio->gpio_base = mgpio->gpio_chip.base;
+
+	ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
+		mgpio->gpio_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
+		mgpio->irq_base,
+		&max77620_gpio_irq_chip, &chip->gpio_irq_data);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Failed to add gpio irq_chip %d\n", ret);
+		goto fail;
+	}
+
+	dev_info(&pdev->dev, "max77620 gpio successfully initialized\n");
+	return 0;
+
+fail:
+	gpiochip_remove(&mgpio->gpio_chip);
+	return ret;
+}
+
+static int max77620_gpio_remove(struct platform_device *pdev)
+{
+	struct max77620_gpio *mgpio = platform_get_drvdata(pdev);
+
+	max77620_gpio_irq_remove(mgpio);
+
+	gpiochip_remove(&mgpio->gpio_chip);
+
+	return 0;
+}
+
+static struct platform_device_id max77620_gpio_devtype[] = {
+	{
+		.name = "max77620-gpio",
+	},
+	{
+		.name = "max20024-gpio",
+	},
+};
+
+static struct platform_driver max77620_gpio_driver = {
+	.driver.name	= "max77620-gpio",
+	.driver.owner	= THIS_MODULE,
+	.probe		= max77620_gpio_probe,
+	.remove		= max77620_gpio_remove,
+	.id_table	= max77620_gpio_devtype,
+};
+
+static int __init max77620_gpio_init(void)
+{
+	return platform_driver_register(&max77620_gpio_driver);
+}
+subsys_initcall(max77620_gpio_init);
+
+static void __exit max77620_gpio_exit(void)
+{
+	platform_driver_unregister(&max77620_gpio_driver);
+}
+module_exit(max77620_gpio_exit);
+
+MODULE_DESCRIPTION("GPIO interface for MAX77620 and MAX20024 PMIC");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_ALIAS("platform:max77620-gpio");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 4/6] gpio: max77620: add gpio driver for MAX77620/MAX20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO
pins. It also supports interrupts from these pins.

Add GPIO driver for these pins to control via GPIO APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/gpio/Kconfig         |   9 ++
 drivers/gpio/Makefile        |   1 +
 drivers/gpio/gpio-max77620.c | 330 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 340 insertions(+)
 create mode 100644 drivers/gpio/gpio-max77620.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f2b7160..b96a80c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -797,6 +797,15 @@ config GPIO_LP3943
 	  LP3943 can be used as a GPIO expander which provides up to 16 GPIOs.
 	  Open drain outputs are required for this usage.
 
+config GPIO_MAX77620
+	bool "GPIO support for PMIC MAX77620 and MAX20024"
+	depends on MFD_MAX77620
+	help
+	  GPIO driver for MAX77620 and MAX20024 PMIC from Maxim Semiconductor.
+	  MAX77620 PMIC has 8 pins that can be configured as GPIOs. The
+	  driver also provides interrupt support for each of the gpios.
+	  Say yes here to enable the max77620 to be used as gpio controller.
+
 config GPIO_MSIC
 	bool "Intel MSIC mixed signal gpio support"
 	depends on MFD_INTEL_MSIC
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index ece7d7c..f676a2d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_GPIO_MAX730X)	+= gpio-max730x.o
 obj-$(CONFIG_GPIO_MAX7300)	+= gpio-max7300.o
 obj-$(CONFIG_GPIO_MAX7301)	+= gpio-max7301.o
 obj-$(CONFIG_GPIO_MAX732X)	+= gpio-max732x.o
+obj-$(CONFIG_GPIO_MAX77620)	+= gpio-max77620.o
 obj-$(CONFIG_GPIO_MB86S7X)	+= gpio-mb86s7x.o
 obj-$(CONFIG_GPIO_MC33880)	+= gpio-mc33880.o
 obj-$(CONFIG_GPIO_MC9S08DZ60)	+= gpio-mc9s08dz60.o
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
new file mode 100644
index 0000000..2d5fe1c
--- /dev/null
+++ b/drivers/gpio/gpio-max77620.c
@@ -0,0 +1,330 @@
+/*
+ * MAXIM MAX77620 GPIO driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/errno.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/max77620.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define GPIO_REG_ADDR(offset) (MAX77620_REG_GPIO0 + offset)
+
+struct max77620_gpio {
+	struct gpio_chip	gpio_chip;
+	struct device		*parent;
+	struct device		*dev;
+	int			gpio_irq;
+	int			irq_base;
+	int			gpio_base;
+};
+
+static const struct regmap_irq max77620_gpio_irqs[] = {
+	[MAX77620_IRQ_GPIO0 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE0,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO1 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE1,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO2 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE2,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO3 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE3,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO4 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE4,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO5 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE5,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO6 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE6,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO7 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE7,
+		.reg_offset = 0,
+	},
+};
+
+static struct regmap_irq_chip max77620_gpio_irq_chip = {
+	.name = "max77620-gpio",
+	.irqs = max77620_gpio_irqs,
+	.num_irqs = ARRAY_SIZE(max77620_gpio_irqs),
+	.num_regs = 1,
+	.irq_reg_stride = 1,
+	.status_base = MAX77620_REG_IRQ_LVL2_GPIO,
+};
+
+static inline struct max77620_gpio *to_max77620_gpio(struct gpio_chip *gpio)
+{
+	return container_of(gpio, struct max77620_gpio, gpio_chip);
+}
+
+static int max77620_gpio_dir_input(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	int ret;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DIR_MASK,
+				MAX77620_CNFG_GPIO_DIR_INPUT);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx dir update failed: %d\n", ret);
+	return ret;
+}
+
+static int max77620_gpio_get(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				GPIO_REG_ADDR(offset), &val);
+	if (ret < 0) {
+		dev_err(dev, "CNFG_GPIOx read failed: %d\n", ret);
+		return ret;
+	}
+
+	return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
+}
+
+static int max77620_gpio_dir_output(struct gpio_chip *gpio, unsigned offset,
+				int value)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	if (value)
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH;
+	else
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			GPIO_REG_ADDR(offset),
+			MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+	if (ret < 0) {
+		dev_err(dev, "CNFG_GPIOx val update failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DIR_MASK,
+				MAX77620_CNFG_GPIO_DIR_OUTPUT);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx dir update failed: %d\n", ret);
+	return ret;
+}
+
+static int max77620_gpio_set_debounce(struct gpio_chip *gpio,
+		unsigned offset, unsigned debounce)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	switch (debounce) {
+	case 0:
+		val = MAX77620_CNFG_GPIO_DBNC_None;
+		break;
+	case 1 ... 8:
+		val = MAX77620_CNFG_GPIO_DBNC_8ms;
+		break;
+	case 9 ... 16:
+		val = MAX77620_CNFG_GPIO_DBNC_16ms;
+		break;
+	case 17 ... 32:
+		val = MAX77620_CNFG_GPIO_DBNC_32ms;
+		break;
+	default:
+		dev_err(dev, "Illegal value %u\n", debounce);
+		return -EINVAL;
+	}
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DBNC_MASK, val);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx debounce update failed: %d\n", ret);
+	return ret;
+}
+
+static void max77620_gpio_set(struct gpio_chip *gpio, unsigned offset,
+			int value)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	if (value)
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH;
+	else
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			GPIO_REG_ADDR(offset),
+			MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx val update failed: %d\n", ret);
+}
+
+static int max77620_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
+
+	return regmap_irq_get_virq(chip->gpio_irq_data, offset);
+}
+
+static void max77620_gpio_irq_remove(struct max77620_gpio *mgpio)
+{
+	struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
+
+	regmap_del_irq_chip(mgpio->gpio_irq, chip->gpio_irq_data);
+	chip->gpio_irq_data = NULL;
+}
+
+static int max77620_gpio_probe(struct platform_device *pdev)
+{
+	struct max77620_gpio *mgpio;
+	struct max77620_chip *chip =  dev_get_drvdata(pdev->dev.parent);
+	int ret;
+	int gpio_irq;
+
+	gpio_irq = platform_get_irq(pdev, 0);
+	if (gpio_irq <= 0) {
+		dev_err(&pdev->dev, "Gpio irq not available %d\n", gpio_irq);
+		return -ENODEV;
+	}
+
+	mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL);
+	if (!mgpio)
+		return -ENOMEM;
+
+	mgpio->parent = pdev->dev.parent;
+	mgpio->dev = &pdev->dev;
+	mgpio->gpio_irq = gpio_irq;
+
+	mgpio->gpio_chip.owner = THIS_MODULE;
+	mgpio->gpio_chip.label = pdev->name;
+	mgpio->gpio_chip.parent = &pdev->dev;
+	mgpio->gpio_chip.direction_input = max77620_gpio_dir_input;
+	mgpio->gpio_chip.get = max77620_gpio_get;
+	mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
+	mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce;
+	mgpio->gpio_chip.set = max77620_gpio_set;
+	mgpio->gpio_chip.to_irq = max77620_gpio_to_irq;
+	mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
+	mgpio->gpio_chip.can_sleep = 1;
+	mgpio->gpio_chip.base = -1;
+	mgpio->irq_base = -1;
+#ifdef CONFIG_OF_GPIO
+	mgpio->gpio_chip.of_node = pdev->dev.parent->of_node;
+#endif
+
+	platform_set_drvdata(pdev, mgpio);
+
+	ret = gpiochip_add(&mgpio->gpio_chip);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "gpio_init: Failed to add max77620_gpio\n");
+		return ret;
+	}
+	mgpio->gpio_base = mgpio->gpio_chip.base;
+
+	ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
+		mgpio->gpio_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
+		mgpio->irq_base,
+		&max77620_gpio_irq_chip, &chip->gpio_irq_data);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Failed to add gpio irq_chip %d\n", ret);
+		goto fail;
+	}
+
+	dev_info(&pdev->dev, "max77620 gpio successfully initialized\n");
+	return 0;
+
+fail:
+	gpiochip_remove(&mgpio->gpio_chip);
+	return ret;
+}
+
+static int max77620_gpio_remove(struct platform_device *pdev)
+{
+	struct max77620_gpio *mgpio = platform_get_drvdata(pdev);
+
+	max77620_gpio_irq_remove(mgpio);
+
+	gpiochip_remove(&mgpio->gpio_chip);
+
+	return 0;
+}
+
+static struct platform_device_id max77620_gpio_devtype[] = {
+	{
+		.name = "max77620-gpio",
+	},
+	{
+		.name = "max20024-gpio",
+	},
+};
+
+static struct platform_driver max77620_gpio_driver = {
+	.driver.name	= "max77620-gpio",
+	.driver.owner	= THIS_MODULE,
+	.probe		= max77620_gpio_probe,
+	.remove		= max77620_gpio_remove,
+	.id_table	= max77620_gpio_devtype,
+};
+
+static int __init max77620_gpio_init(void)
+{
+	return platform_driver_register(&max77620_gpio_driver);
+}
+subsys_initcall(max77620_gpio_init);
+
+static void __exit max77620_gpio_exit(void)
+{
+	platform_driver_unregister(&max77620_gpio_driver);
+}
+module_exit(max77620_gpio_exit);
+
+MODULE_DESCRIPTION("GPIO interface for MAX77620 and MAX20024 PMIC");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_ALIAS("platform:max77620-gpio");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 4/6] gpio: max77620: add gpio driver for MAX77620/MAX20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO
pins. It also supports interrupts from these pins.

Add GPIO driver for these pins to control via GPIO APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/gpio/Kconfig         |   9 ++
 drivers/gpio/Makefile        |   1 +
 drivers/gpio/gpio-max77620.c | 330 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 340 insertions(+)
 create mode 100644 drivers/gpio/gpio-max77620.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f2b7160..b96a80c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -797,6 +797,15 @@ config GPIO_LP3943
 	  LP3943 can be used as a GPIO expander which provides up to 16 GPIOs.
 	  Open drain outputs are required for this usage.
 
+config GPIO_MAX77620
+	bool "GPIO support for PMIC MAX77620 and MAX20024"
+	depends on MFD_MAX77620
+	help
+	  GPIO driver for MAX77620 and MAX20024 PMIC from Maxim Semiconductor.
+	  MAX77620 PMIC has 8 pins that can be configured as GPIOs. The
+	  driver also provides interrupt support for each of the gpios.
+	  Say yes here to enable the max77620 to be used as gpio controller.
+
 config GPIO_MSIC
 	bool "Intel MSIC mixed signal gpio support"
 	depends on MFD_INTEL_MSIC
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index ece7d7c..f676a2d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_GPIO_MAX730X)	+= gpio-max730x.o
 obj-$(CONFIG_GPIO_MAX7300)	+= gpio-max7300.o
 obj-$(CONFIG_GPIO_MAX7301)	+= gpio-max7301.o
 obj-$(CONFIG_GPIO_MAX732X)	+= gpio-max732x.o
+obj-$(CONFIG_GPIO_MAX77620)	+= gpio-max77620.o
 obj-$(CONFIG_GPIO_MB86S7X)	+= gpio-mb86s7x.o
 obj-$(CONFIG_GPIO_MC33880)	+= gpio-mc33880.o
 obj-$(CONFIG_GPIO_MC9S08DZ60)	+= gpio-mc9s08dz60.o
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
new file mode 100644
index 0000000..2d5fe1c
--- /dev/null
+++ b/drivers/gpio/gpio-max77620.c
@@ -0,0 +1,330 @@
+/*
+ * MAXIM MAX77620 GPIO driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/errno.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/max77620.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define GPIO_REG_ADDR(offset) (MAX77620_REG_GPIO0 + offset)
+
+struct max77620_gpio {
+	struct gpio_chip	gpio_chip;
+	struct device		*parent;
+	struct device		*dev;
+	int			gpio_irq;
+	int			irq_base;
+	int			gpio_base;
+};
+
+static const struct regmap_irq max77620_gpio_irqs[] = {
+	[MAX77620_IRQ_GPIO0 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE0,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO1 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE1,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO2 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE2,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO3 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE3,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO4 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE4,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO5 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE5,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO6 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE6,
+		.reg_offset = 0,
+	},
+	[MAX77620_IRQ_GPIO7 - MAX77620_IRQ_GPIO0] = {
+		.mask = MAX77620_IRQ_LVL2_GPIO_EDGE7,
+		.reg_offset = 0,
+	},
+};
+
+static struct regmap_irq_chip max77620_gpio_irq_chip = {
+	.name = "max77620-gpio",
+	.irqs = max77620_gpio_irqs,
+	.num_irqs = ARRAY_SIZE(max77620_gpio_irqs),
+	.num_regs = 1,
+	.irq_reg_stride = 1,
+	.status_base = MAX77620_REG_IRQ_LVL2_GPIO,
+};
+
+static inline struct max77620_gpio *to_max77620_gpio(struct gpio_chip *gpio)
+{
+	return container_of(gpio, struct max77620_gpio, gpio_chip);
+}
+
+static int max77620_gpio_dir_input(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	int ret;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DIR_MASK,
+				MAX77620_CNFG_GPIO_DIR_INPUT);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx dir update failed: %d\n", ret);
+	return ret;
+}
+
+static int max77620_gpio_get(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				GPIO_REG_ADDR(offset), &val);
+	if (ret < 0) {
+		dev_err(dev, "CNFG_GPIOx read failed: %d\n", ret);
+		return ret;
+	}
+
+	return !!(val & MAX77620_CNFG_GPIO_INPUT_VAL_MASK);
+}
+
+static int max77620_gpio_dir_output(struct gpio_chip *gpio, unsigned offset,
+				int value)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	if (value)
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH;
+	else
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			GPIO_REG_ADDR(offset),
+			MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+	if (ret < 0) {
+		dev_err(dev, "CNFG_GPIOx val update failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DIR_MASK,
+				MAX77620_CNFG_GPIO_DIR_OUTPUT);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx dir update failed: %d\n", ret);
+	return ret;
+}
+
+static int max77620_gpio_set_debounce(struct gpio_chip *gpio,
+		unsigned offset, unsigned debounce)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	switch (debounce) {
+	case 0:
+		val = MAX77620_CNFG_GPIO_DBNC_None;
+		break;
+	case 1 ... 8:
+		val = MAX77620_CNFG_GPIO_DBNC_8ms;
+		break;
+	case 9 ... 16:
+		val = MAX77620_CNFG_GPIO_DBNC_16ms;
+		break;
+	case 17 ... 32:
+		val = MAX77620_CNFG_GPIO_DBNC_32ms;
+		break;
+	default:
+		dev_err(dev, "Illegal value %u\n", debounce);
+		return -EINVAL;
+	}
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		GPIO_REG_ADDR(offset), MAX77620_CNFG_GPIO_DBNC_MASK, val);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx debounce update failed: %d\n", ret);
+	return ret;
+}
+
+static void max77620_gpio_set(struct gpio_chip *gpio, unsigned offset,
+			int value)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct device *dev = mgpio->dev;
+	struct device *parent = mgpio->parent;
+	u8 val;
+	int ret;
+
+	if (value)
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH;
+	else
+		val = MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			GPIO_REG_ADDR(offset),
+			MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+	if (ret < 0)
+		dev_err(dev, "CNFG_GPIOx val update failed: %d\n", ret);
+}
+
+static int max77620_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)
+{
+	struct max77620_gpio *mgpio = to_max77620_gpio(gpio);
+	struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
+
+	return regmap_irq_get_virq(chip->gpio_irq_data, offset);
+}
+
+static void max77620_gpio_irq_remove(struct max77620_gpio *mgpio)
+{
+	struct max77620_chip *chip = dev_get_drvdata(mgpio->dev->parent);
+
+	regmap_del_irq_chip(mgpio->gpio_irq, chip->gpio_irq_data);
+	chip->gpio_irq_data = NULL;
+}
+
+static int max77620_gpio_probe(struct platform_device *pdev)
+{
+	struct max77620_gpio *mgpio;
+	struct max77620_chip *chip =  dev_get_drvdata(pdev->dev.parent);
+	int ret;
+	int gpio_irq;
+
+	gpio_irq = platform_get_irq(pdev, 0);
+	if (gpio_irq <= 0) {
+		dev_err(&pdev->dev, "Gpio irq not available %d\n", gpio_irq);
+		return -ENODEV;
+	}
+
+	mgpio = devm_kzalloc(&pdev->dev, sizeof(*mgpio), GFP_KERNEL);
+	if (!mgpio)
+		return -ENOMEM;
+
+	mgpio->parent = pdev->dev.parent;
+	mgpio->dev = &pdev->dev;
+	mgpio->gpio_irq = gpio_irq;
+
+	mgpio->gpio_chip.owner = THIS_MODULE;
+	mgpio->gpio_chip.label = pdev->name;
+	mgpio->gpio_chip.parent = &pdev->dev;
+	mgpio->gpio_chip.direction_input = max77620_gpio_dir_input;
+	mgpio->gpio_chip.get = max77620_gpio_get;
+	mgpio->gpio_chip.direction_output = max77620_gpio_dir_output;
+	mgpio->gpio_chip.set_debounce = max77620_gpio_set_debounce;
+	mgpio->gpio_chip.set = max77620_gpio_set;
+	mgpio->gpio_chip.to_irq = max77620_gpio_to_irq;
+	mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
+	mgpio->gpio_chip.can_sleep = 1;
+	mgpio->gpio_chip.base = -1;
+	mgpio->irq_base = -1;
+#ifdef CONFIG_OF_GPIO
+	mgpio->gpio_chip.of_node = pdev->dev.parent->of_node;
+#endif
+
+	platform_set_drvdata(pdev, mgpio);
+
+	ret = gpiochip_add(&mgpio->gpio_chip);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "gpio_init: Failed to add max77620_gpio\n");
+		return ret;
+	}
+	mgpio->gpio_base = mgpio->gpio_chip.base;
+
+	ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
+		mgpio->gpio_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
+		mgpio->irq_base,
+		&max77620_gpio_irq_chip, &chip->gpio_irq_data);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Failed to add gpio irq_chip %d\n", ret);
+		goto fail;
+	}
+
+	dev_info(&pdev->dev, "max77620 gpio successfully initialized\n");
+	return 0;
+
+fail:
+	gpiochip_remove(&mgpio->gpio_chip);
+	return ret;
+}
+
+static int max77620_gpio_remove(struct platform_device *pdev)
+{
+	struct max77620_gpio *mgpio = platform_get_drvdata(pdev);
+
+	max77620_gpio_irq_remove(mgpio);
+
+	gpiochip_remove(&mgpio->gpio_chip);
+
+	return 0;
+}
+
+static struct platform_device_id max77620_gpio_devtype[] = {
+	{
+		.name = "max77620-gpio",
+	},
+	{
+		.name = "max20024-gpio",
+	},
+};
+
+static struct platform_driver max77620_gpio_driver = {
+	.driver.name	= "max77620-gpio",
+	.driver.owner	= THIS_MODULE,
+	.probe		= max77620_gpio_probe,
+	.remove		= max77620_gpio_remove,
+	.id_table	= max77620_gpio_devtype,
+};
+
+static int __init max77620_gpio_init(void)
+{
+	return platform_driver_register(&max77620_gpio_driver);
+}
+subsys_initcall(max77620_gpio_init);
+
+static void __exit max77620_gpio_exit(void)
+{
+	platform_driver_unregister(&max77620_gpio_driver);
+}
+module_exit(max77620_gpio_exit);
+
+MODULE_DESCRIPTION("GPIO interface for MAX77620 and MAX20024 PMIC");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_ALIAS("platform:max77620-gpio");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

-- 
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^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-07 14:38 ` Laxman Dewangan
  (?)
@ 2016-01-07 14:38   ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
RTC  module. This support for setting alarm and time.

Add RTC driver to access this chip's RTC module via RTC
APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/rtc/Kconfig        |   9 +
 drivers/rtc/Makefile       |   1 +
 drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 584 insertions(+)
 create mode 100644 drivers/rtc/rtc-max77620.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 376322f..8723bf8 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -315,6 +315,15 @@ config RTC_DRV_MAX8997
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-max8997.
 
+config RTC_DRV_MAX77620
+	tristate "Maxim MAX77620/MAX20024"
+	depends on MFD_MAX77620
+	help
+	  If you say yes here you will get support for the
+	  RTC of Maxim MAX77620/MAX20024 PMIC.
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-max77620.
+
 config RTC_DRV_MAX77686
 	tristate "Maxim MAX77686"
 	depends on MFD_MAX77686
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 62d61b2..da5db0a 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -85,6 +85,7 @@ obj-$(CONFIG_RTC_DRV_M48T59)	+= rtc-m48t59.o
 obj-$(CONFIG_RTC_DRV_M48T86)	+= rtc-m48t86.o
 obj-$(CONFIG_RTC_DRV_MAX6900)	+= rtc-max6900.o
 obj-$(CONFIG_RTC_DRV_MAX6902)	+= rtc-max6902.o
+obj-$(CONFIG_RTC_DRV_MAX77620)	+= rtc-max77620.o
 obj-$(CONFIG_RTC_DRV_MAX77686)	+= rtc-max77686.o
 obj-$(CONFIG_RTC_DRV_MAX77802)	+= rtc-max77802.o
 obj-$(CONFIG_RTC_DRV_MAX8907)	+= rtc-max8907.o
diff --git a/drivers/rtc/rtc-max77620.c b/drivers/rtc/rtc-max77620.c
new file mode 100644
index 0000000..645c661
--- /dev/null
+++ b/drivers/rtc/rtc-max77620.c
@@ -0,0 +1,574 @@
+/*
+ * Max77620 RTC driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/rtc.h>
+#include <linux/mfd/max77620.h>
+
+#define MAX77620_RTC60S_MASK		BIT(0)
+#define MAX77620_RTCA1_MASK		BIT(1)
+#define MAX77620_RTCA2_MASK		BIT(2)
+#define MAX77620_RTC_SMPL_MASK		BIT(3)
+#define MAX77620_RTC_RTC1S_MASK		BIT(4)
+#define MAX77620_RTC_ALL_IRQ_MASK	0x1F
+
+#define MAX77620_BCDM_MASK		BIT(0)
+#define MAX77620_HRMODEM_MASK		BIT(1)
+
+#define WB_UPDATE_MASK			BIT(0)
+#define FLAG_AUTO_CLEAR_MASK		BIT(1)
+#define FREEZE_SEC_MASK			BIT(2)
+#define RTC_WAKE_MASK			BIT(3)
+#define RB_UPDATE_MASK			BIT(4)
+
+#define MAX77620_UDF_MASK		BIT(0)
+#define MAX77620_RBUDF_MASK		BIT(1)
+
+#define SEC_MASK			0x7F
+#define MIN_MASK			0x7F
+#define HOUR_MASK			0x3F
+#define WEEKDAY_MASK			0x7F
+#define MONTH_MASK			0x1F
+#define YEAR_MASK			0xFF
+#define MONTHDAY_MASK			0x3F
+
+#define ALARM_EN_MASK			0x80
+#define ALARM_EN_SHIFT			7
+
+#define RTC_YEAR_BASE			100
+#define RTC_YEAR_MAX			99
+
+#define ONOFF_WK_ALARM1_MASK		BIT(2)
+
+enum {
+	RTC_SEC,
+	RTC_MIN,
+	RTC_HOUR,
+	RTC_WEEKDAY,
+	RTC_MONTH,
+	RTC_YEAR,
+	RTC_MONTHDAY,
+	RTC_NR
+};
+
+struct max77620_rtc {
+	struct rtc_device *rtc;
+	struct device *dev;
+
+	struct mutex io_lock;
+	int irq;
+	u8 irq_mask;
+};
+
+static inline struct device *_to_parent(struct max77620_rtc *rtc)
+{
+	return rtc->dev->parent;
+}
+
+static inline int max77620_rtc_update_buffer(struct max77620_rtc *rtc,
+					     int write)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 val =  FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
+	int ret;
+
+	if (write)
+		val |= WB_UPDATE_MASK;
+	else
+		val |= RB_UPDATE_MASK;
+
+	dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
+		write, MAX77620_REG_RTCUPDATE0, val);
+	ret = max77620_reg_write(parent, MAX77620_RTC_SLAVE,
+						MAX77620_REG_RTCUPDATE0, val);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCUPDATE0 read failed: %d\n", ret);
+		return ret;
+	}
+
+	/* Must wait 16ms for buffer update */
+	usleep_range(16000, 17000);
+
+	return 0;
+}
+
+static inline int max77620_rtc_write(struct max77620_rtc *rtc, u8 addr,
+				     void *values, u32 len, int update_buffer)
+{
+	struct device *parent = _to_parent(rtc);
+	int ret;
+
+	mutex_lock(&rtc->io_lock);
+
+	ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE,
+						addr, len, values);
+	if (ret < 0)
+		goto out;
+
+	if (update_buffer)
+		ret = max77620_rtc_update_buffer(rtc, 1);
+
+out:
+	mutex_unlock(&rtc->io_lock);
+	return ret;
+}
+
+static inline int max77620_rtc_read(struct max77620_rtc *rtc, u8 addr,
+				    void *values, u32 len, int update_buffer)
+{
+	struct device *parent = _to_parent(rtc);
+	int ret;
+
+	mutex_lock(&rtc->io_lock);
+
+	if (update_buffer) {
+		ret = max77620_rtc_update_buffer(rtc, 0);
+		if (ret < 0)
+			goto out;
+	}
+
+	ret = max77620_reg_reads(parent, MAX77620_RTC_SLAVE, addr, len, values);
+out:
+	mutex_unlock(&rtc->io_lock);
+	return ret;
+}
+
+static inline int max77620_rtc_reg_to_tm(struct max77620_rtc *rtc, u8 *buf,
+					 struct rtc_time *tm)
+{
+	int wday = buf[RTC_WEEKDAY] & WEEKDAY_MASK;
+
+	if (unlikely(!wday)) {
+		dev_err(rtc->dev,
+			"rtc_reg_to_tm: Invalid day of week, %d\n", wday);
+		return -EINVAL;
+	}
+
+	tm->tm_sec = (int)(buf[RTC_SEC] & SEC_MASK);
+	tm->tm_min = (int)(buf[RTC_MIN] & MIN_MASK);
+	tm->tm_hour = (int)(buf[RTC_HOUR] & HOUR_MASK);
+	tm->tm_mday = (int)(buf[RTC_MONTHDAY] & MONTHDAY_MASK);
+	tm->tm_mon = (int)(buf[RTC_MONTH] & MONTH_MASK) - 1;
+	tm->tm_year = (int)(buf[RTC_YEAR] & YEAR_MASK) + RTC_YEAR_BASE;
+	tm->tm_wday = ffs(wday) - 1;
+
+	return 0;
+}
+
+static inline int max77620_rtc_tm_to_reg(struct max77620_rtc *rtc, u8 *buf,
+					 struct rtc_time *tm, int alarm)
+{
+	u8 alarm_mask = alarm ? ALARM_EN_MASK : 0;
+
+	if (unlikely((tm->tm_year < RTC_YEAR_BASE) ||
+			(tm->tm_year > RTC_YEAR_BASE + RTC_YEAR_MAX))) {
+		dev_err(rtc->dev,
+			"rtc_tm_to_reg: Invalid year, %d\n", tm->tm_year);
+		return -EINVAL;
+	}
+
+	buf[RTC_SEC] = tm->tm_sec | alarm_mask;
+	buf[RTC_MIN] = tm->tm_min | alarm_mask;
+	buf[RTC_HOUR] = tm->tm_hour | alarm_mask;
+	buf[RTC_MONTHDAY] = tm->tm_mday | alarm_mask;
+	buf[RTC_MONTH] = (tm->tm_mon + 1) | alarm_mask;
+	buf[RTC_YEAR] = (tm->tm_year - RTC_YEAR_BASE) | alarm_mask;
+
+	/* The wday is configured only when disabled alarm. */
+	if (!alarm)
+		buf[RTC_WEEKDAY] = (1 << tm->tm_wday);
+	else {
+	/* Configure its default reset value 0x01, and not enable it. */
+		buf[RTC_WEEKDAY] = 0x01;
+	}
+	return 0;
+}
+
+static inline int max77620_rtc_irq_mask(struct max77620_rtc *rtc, u8 irq)
+{
+	u8 irq_mask = rtc->irq_mask | irq;
+	int ret = 0;
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "rtc_irq_mask: Failed to set rtc irq mask\n");
+		goto out;
+	}
+	rtc->irq_mask = irq_mask;
+
+out:
+	return ret;
+}
+
+static inline int max77620_rtc_irq_unmask(struct max77620_rtc *rtc, u8 irq)
+{
+	u8 irq_mask = rtc->irq_mask & ~irq;
+	int ret = 0;
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev,
+			"rtc_irq_unmask: Failed to set rtc irq mask\n");
+		goto out;
+	}
+	rtc->irq_mask = irq_mask;
+
+out:
+	return ret;
+}
+
+static inline int max77620_rtc_do_irq(struct max77620_rtc *rtc)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 irq_status;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_RTC_SLAVE,
+					MAX77620_REG_RTCINT, &irq_status);
+	if (ret < 0) {
+		dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
+		return ret;
+	}
+
+	dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
+		rtc->irq_mask, irq_status);
+
+	if (!(rtc->irq_mask & MAX77620_RTCA1_MASK) &&
+			(irq_status & MAX77620_RTCA1_MASK))
+		rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
+
+	if (!(rtc->irq_mask & MAX77620_RTC_RTC1S_MASK) &&
+			(irq_status & MAX77620_RTC_RTC1S_MASK))
+		rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
+
+	return ret;
+}
+
+static irqreturn_t max77620_rtc_irq(int irq, void *data)
+{
+	struct max77620_rtc *rtc = (struct max77620_rtc *)data;
+
+	max77620_rtc_do_irq(rtc);
+
+	return IRQ_HANDLED;
+}
+
+static int max77620_rtc_alarm_irq_enable(struct device *dev,
+					 unsigned int enabled)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	int ret = 0;
+
+	if (rtc->irq < 0)
+		return -ENXIO;
+
+	/* Handle pending interrupt */
+	ret = max77620_rtc_do_irq(rtc);
+	if (ret < 0)
+		goto out;
+
+	/* Config alarm interrupt */
+	if (enabled) {
+		ret = max77620_rtc_irq_unmask(rtc, MAX77620_RTCA1_MASK);
+		if (ret < 0)
+			goto out;
+	} else {
+		ret = max77620_rtc_irq_mask(rtc, MAX77620_RTCA1_MASK);
+		if (ret < 0)
+			goto out;
+	}
+out:
+	return ret;
+}
+
+static int max77620_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSEC, buf, sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSEC read failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_reg_to_tm(rtc, buf, tm);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Time format to Reg format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return max77620_rtc_write(rtc, MAX77620_REG_RTCSEC,
+					buf, sizeof(buf), 1);
+}
+
+static int max77620_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSECA1,
+					buf, sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSECA1 read failed: %d\n", ret);
+		return ret;
+	}
+
+
+	buf[RTC_YEAR] &= ~ALARM_EN_MASK;
+	ret = max77620_rtc_reg_to_tm(rtc, buf, &alrm->time);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	if (rtc->irq_mask & MAX77620_RTCA1_MASK)
+		alrm->enabled = 0;
+	else
+		alrm->enabled = 1;
+
+	return 0;
+}
+
+static int max77620_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_tm_to_reg(rtc, buf, &alrm->time, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Time format to reg format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCSECA1, buf,
+			sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSECA1 write failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_alarm_irq_enable(dev, alrm->enabled);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Enable rtc alarm failed: %d\n", ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static const struct rtc_class_ops max77620_rtc_ops = {
+	.read_time = max77620_rtc_read_time,
+	.set_time = max77620_rtc_set_time,
+	.read_alarm = max77620_rtc_read_alarm,
+	.set_alarm = max77620_rtc_set_alarm,
+	.alarm_irq_enable = max77620_rtc_alarm_irq_enable,
+};
+
+static int max77620_rtc_preinit(struct max77620_rtc *rtc)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 val;
+	int ret;
+
+	/* Mask all interrupts */
+	rtc->irq_mask = 0xFF;
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM,
+						&rtc->irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
+		return ret;
+	}
+
+	max77620_rtc_read(rtc, MAX77620_REG_RTCINT, &val, 1, 0);
+
+	/* Configure Binary mode and 24hour mode */
+	val = MAX77620_HRMODEM_MASK;
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCCNTL, &val, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
+		return ret;
+	}
+
+	/* It should be disabled alarm wakeup to wakeup from sleep
+	 * by EN1 input signal.
+	 */
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		MAX77620_REG_ONOFFCNFG2, ONOFF_WK_ALARM1_MASK, 0);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int max77620_rtc_probe(struct platform_device *pdev)
+{
+	static struct max77620_rtc *rtc;
+	int ret = 0;
+
+	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	dev_set_drvdata(&pdev->dev, rtc);
+	rtc->dev = &pdev->dev;
+	mutex_init(&rtc->io_lock);
+
+	ret = max77620_rtc_preinit(rtc);
+	if (ret) {
+		dev_err(&pdev->dev, "probe: Failed to rtc preinit\n");
+		goto fail_preinit;
+	}
+
+	device_init_wakeup(&pdev->dev, 1);
+
+	rtc->rtc = devm_rtc_device_register(&pdev->dev, "max77620-rtc",
+				       &max77620_rtc_ops, THIS_MODULE);
+	if (IS_ERR(rtc->rtc)) {
+		dev_err(&pdev->dev, "probe: Failed to register rtc\n");
+		ret = PTR_ERR(rtc->rtc);
+		goto fail_preinit;
+	}
+
+	rtc->irq = platform_get_irq(pdev, 0);
+	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+			max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
+			"max77620-rtc", rtc);
+	if (ret < 0) {
+		dev_err(rtc->dev, "probe: Failed to request irq %d\n",
+			rtc->irq);
+		rtc->irq = -1;
+		goto fail_preinit;
+	}
+
+	device_init_wakeup(rtc->dev, 1);
+	enable_irq_wake(rtc->irq);
+
+	return 0;
+
+fail_preinit:
+	mutex_destroy(&rtc->io_lock);
+	return ret;
+}
+
+static int max77620_rtc_remove(struct platform_device *pdev)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(&pdev->dev);
+
+	mutex_destroy(&rtc->io_lock);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_rtc_suspend(struct device *dev)
+{
+	struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev)) {
+		int ret;
+		struct rtc_wkalrm alm;
+
+		enable_irq_wake(max77620_rtc->irq);
+		ret = max77620_rtc_read_alarm(dev, &alm);
+		if (!ret)
+			dev_info(dev, "%s() alrm %d time %d %d %d %d %d %d\n",
+				__func__, alm.enabled,
+				alm.time.tm_year, alm.time.tm_mon,
+				alm.time.tm_mday, alm.time.tm_hour,
+				alm.time.tm_min, alm.time.tm_sec);
+	}
+
+	return 0;
+}
+
+static int max77620_rtc_resume(struct device *dev)
+{
+	struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev)) {
+		struct rtc_time tm;
+		int ret;
+
+		disable_irq_wake(max77620_rtc->irq);
+		ret = max77620_rtc_read_time(dev, &tm);
+		if (!ret)
+			dev_info(dev, "%s() %d %d %d %d %d %d\n",
+				__func__, tm.tm_year, tm.tm_mon, tm.tm_mday,
+				tm.tm_hour, tm.tm_min, tm.tm_sec);
+	}
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_rtc_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_rtc_suspend, max77620_rtc_resume)
+};
+
+static struct platform_device_id max77620_rtc_devtype[] = {
+	{
+		.name = "max77620-rtc",
+	},
+	{
+		.name = "max20024-rtc",
+	},
+};
+
+static struct platform_driver max77620_rtc_driver = {
+	.probe = max77620_rtc_probe,
+	.remove = max77620_rtc_remove,
+	.id_table = max77620_rtc_devtype,
+	.driver = {
+			.name = "max77620-rtc",
+			.owner = THIS_MODULE,
+			.pm = &max77620_rtc_pm_ops,
+	},
+};
+
+module_platform_driver(max77620_rtc_driver);
+
+MODULE_DESCRIPTION("max77620 RTC driver");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-rtc");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
RTC  module. This support for setting alarm and time.

Add RTC driver to access this chip's RTC module via RTC
APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/rtc/Kconfig        |   9 +
 drivers/rtc/Makefile       |   1 +
 drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 584 insertions(+)
 create mode 100644 drivers/rtc/rtc-max77620.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 376322f..8723bf8 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -315,6 +315,15 @@ config RTC_DRV_MAX8997
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-max8997.
 
+config RTC_DRV_MAX77620
+	tristate "Maxim MAX77620/MAX20024"
+	depends on MFD_MAX77620
+	help
+	  If you say yes here you will get support for the
+	  RTC of Maxim MAX77620/MAX20024 PMIC.
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-max77620.
+
 config RTC_DRV_MAX77686
 	tristate "Maxim MAX77686"
 	depends on MFD_MAX77686
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 62d61b2..da5db0a 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -85,6 +85,7 @@ obj-$(CONFIG_RTC_DRV_M48T59)	+= rtc-m48t59.o
 obj-$(CONFIG_RTC_DRV_M48T86)	+= rtc-m48t86.o
 obj-$(CONFIG_RTC_DRV_MAX6900)	+= rtc-max6900.o
 obj-$(CONFIG_RTC_DRV_MAX6902)	+= rtc-max6902.o
+obj-$(CONFIG_RTC_DRV_MAX77620)	+= rtc-max77620.o
 obj-$(CONFIG_RTC_DRV_MAX77686)	+= rtc-max77686.o
 obj-$(CONFIG_RTC_DRV_MAX77802)	+= rtc-max77802.o
 obj-$(CONFIG_RTC_DRV_MAX8907)	+= rtc-max8907.o
diff --git a/drivers/rtc/rtc-max77620.c b/drivers/rtc/rtc-max77620.c
new file mode 100644
index 0000000..645c661
--- /dev/null
+++ b/drivers/rtc/rtc-max77620.c
@@ -0,0 +1,574 @@
+/*
+ * Max77620 RTC driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/rtc.h>
+#include <linux/mfd/max77620.h>
+
+#define MAX77620_RTC60S_MASK		BIT(0)
+#define MAX77620_RTCA1_MASK		BIT(1)
+#define MAX77620_RTCA2_MASK		BIT(2)
+#define MAX77620_RTC_SMPL_MASK		BIT(3)
+#define MAX77620_RTC_RTC1S_MASK		BIT(4)
+#define MAX77620_RTC_ALL_IRQ_MASK	0x1F
+
+#define MAX77620_BCDM_MASK		BIT(0)
+#define MAX77620_HRMODEM_MASK		BIT(1)
+
+#define WB_UPDATE_MASK			BIT(0)
+#define FLAG_AUTO_CLEAR_MASK		BIT(1)
+#define FREEZE_SEC_MASK			BIT(2)
+#define RTC_WAKE_MASK			BIT(3)
+#define RB_UPDATE_MASK			BIT(4)
+
+#define MAX77620_UDF_MASK		BIT(0)
+#define MAX77620_RBUDF_MASK		BIT(1)
+
+#define SEC_MASK			0x7F
+#define MIN_MASK			0x7F
+#define HOUR_MASK			0x3F
+#define WEEKDAY_MASK			0x7F
+#define MONTH_MASK			0x1F
+#define YEAR_MASK			0xFF
+#define MONTHDAY_MASK			0x3F
+
+#define ALARM_EN_MASK			0x80
+#define ALARM_EN_SHIFT			7
+
+#define RTC_YEAR_BASE			100
+#define RTC_YEAR_MAX			99
+
+#define ONOFF_WK_ALARM1_MASK		BIT(2)
+
+enum {
+	RTC_SEC,
+	RTC_MIN,
+	RTC_HOUR,
+	RTC_WEEKDAY,
+	RTC_MONTH,
+	RTC_YEAR,
+	RTC_MONTHDAY,
+	RTC_NR
+};
+
+struct max77620_rtc {
+	struct rtc_device *rtc;
+	struct device *dev;
+
+	struct mutex io_lock;
+	int irq;
+	u8 irq_mask;
+};
+
+static inline struct device *_to_parent(struct max77620_rtc *rtc)
+{
+	return rtc->dev->parent;
+}
+
+static inline int max77620_rtc_update_buffer(struct max77620_rtc *rtc,
+					     int write)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 val =  FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
+	int ret;
+
+	if (write)
+		val |= WB_UPDATE_MASK;
+	else
+		val |= RB_UPDATE_MASK;
+
+	dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
+		write, MAX77620_REG_RTCUPDATE0, val);
+	ret = max77620_reg_write(parent, MAX77620_RTC_SLAVE,
+						MAX77620_REG_RTCUPDATE0, val);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCUPDATE0 read failed: %d\n", ret);
+		return ret;
+	}
+
+	/* Must wait 16ms for buffer update */
+	usleep_range(16000, 17000);
+
+	return 0;
+}
+
+static inline int max77620_rtc_write(struct max77620_rtc *rtc, u8 addr,
+				     void *values, u32 len, int update_buffer)
+{
+	struct device *parent = _to_parent(rtc);
+	int ret;
+
+	mutex_lock(&rtc->io_lock);
+
+	ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE,
+						addr, len, values);
+	if (ret < 0)
+		goto out;
+
+	if (update_buffer)
+		ret = max77620_rtc_update_buffer(rtc, 1);
+
+out:
+	mutex_unlock(&rtc->io_lock);
+	return ret;
+}
+
+static inline int max77620_rtc_read(struct max77620_rtc *rtc, u8 addr,
+				    void *values, u32 len, int update_buffer)
+{
+	struct device *parent = _to_parent(rtc);
+	int ret;
+
+	mutex_lock(&rtc->io_lock);
+
+	if (update_buffer) {
+		ret = max77620_rtc_update_buffer(rtc, 0);
+		if (ret < 0)
+			goto out;
+	}
+
+	ret = max77620_reg_reads(parent, MAX77620_RTC_SLAVE, addr, len, values);
+out:
+	mutex_unlock(&rtc->io_lock);
+	return ret;
+}
+
+static inline int max77620_rtc_reg_to_tm(struct max77620_rtc *rtc, u8 *buf,
+					 struct rtc_time *tm)
+{
+	int wday = buf[RTC_WEEKDAY] & WEEKDAY_MASK;
+
+	if (unlikely(!wday)) {
+		dev_err(rtc->dev,
+			"rtc_reg_to_tm: Invalid day of week, %d\n", wday);
+		return -EINVAL;
+	}
+
+	tm->tm_sec = (int)(buf[RTC_SEC] & SEC_MASK);
+	tm->tm_min = (int)(buf[RTC_MIN] & MIN_MASK);
+	tm->tm_hour = (int)(buf[RTC_HOUR] & HOUR_MASK);
+	tm->tm_mday = (int)(buf[RTC_MONTHDAY] & MONTHDAY_MASK);
+	tm->tm_mon = (int)(buf[RTC_MONTH] & MONTH_MASK) - 1;
+	tm->tm_year = (int)(buf[RTC_YEAR] & YEAR_MASK) + RTC_YEAR_BASE;
+	tm->tm_wday = ffs(wday) - 1;
+
+	return 0;
+}
+
+static inline int max77620_rtc_tm_to_reg(struct max77620_rtc *rtc, u8 *buf,
+					 struct rtc_time *tm, int alarm)
+{
+	u8 alarm_mask = alarm ? ALARM_EN_MASK : 0;
+
+	if (unlikely((tm->tm_year < RTC_YEAR_BASE) ||
+			(tm->tm_year > RTC_YEAR_BASE + RTC_YEAR_MAX))) {
+		dev_err(rtc->dev,
+			"rtc_tm_to_reg: Invalid year, %d\n", tm->tm_year);
+		return -EINVAL;
+	}
+
+	buf[RTC_SEC] = tm->tm_sec | alarm_mask;
+	buf[RTC_MIN] = tm->tm_min | alarm_mask;
+	buf[RTC_HOUR] = tm->tm_hour | alarm_mask;
+	buf[RTC_MONTHDAY] = tm->tm_mday | alarm_mask;
+	buf[RTC_MONTH] = (tm->tm_mon + 1) | alarm_mask;
+	buf[RTC_YEAR] = (tm->tm_year - RTC_YEAR_BASE) | alarm_mask;
+
+	/* The wday is configured only when disabled alarm. */
+	if (!alarm)
+		buf[RTC_WEEKDAY] = (1 << tm->tm_wday);
+	else {
+	/* Configure its default reset value 0x01, and not enable it. */
+		buf[RTC_WEEKDAY] = 0x01;
+	}
+	return 0;
+}
+
+static inline int max77620_rtc_irq_mask(struct max77620_rtc *rtc, u8 irq)
+{
+	u8 irq_mask = rtc->irq_mask | irq;
+	int ret = 0;
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "rtc_irq_mask: Failed to set rtc irq mask\n");
+		goto out;
+	}
+	rtc->irq_mask = irq_mask;
+
+out:
+	return ret;
+}
+
+static inline int max77620_rtc_irq_unmask(struct max77620_rtc *rtc, u8 irq)
+{
+	u8 irq_mask = rtc->irq_mask & ~irq;
+	int ret = 0;
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev,
+			"rtc_irq_unmask: Failed to set rtc irq mask\n");
+		goto out;
+	}
+	rtc->irq_mask = irq_mask;
+
+out:
+	return ret;
+}
+
+static inline int max77620_rtc_do_irq(struct max77620_rtc *rtc)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 irq_status;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_RTC_SLAVE,
+					MAX77620_REG_RTCINT, &irq_status);
+	if (ret < 0) {
+		dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
+		return ret;
+	}
+
+	dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
+		rtc->irq_mask, irq_status);
+
+	if (!(rtc->irq_mask & MAX77620_RTCA1_MASK) &&
+			(irq_status & MAX77620_RTCA1_MASK))
+		rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
+
+	if (!(rtc->irq_mask & MAX77620_RTC_RTC1S_MASK) &&
+			(irq_status & MAX77620_RTC_RTC1S_MASK))
+		rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
+
+	return ret;
+}
+
+static irqreturn_t max77620_rtc_irq(int irq, void *data)
+{
+	struct max77620_rtc *rtc = (struct max77620_rtc *)data;
+
+	max77620_rtc_do_irq(rtc);
+
+	return IRQ_HANDLED;
+}
+
+static int max77620_rtc_alarm_irq_enable(struct device *dev,
+					 unsigned int enabled)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	int ret = 0;
+
+	if (rtc->irq < 0)
+		return -ENXIO;
+
+	/* Handle pending interrupt */
+	ret = max77620_rtc_do_irq(rtc);
+	if (ret < 0)
+		goto out;
+
+	/* Config alarm interrupt */
+	if (enabled) {
+		ret = max77620_rtc_irq_unmask(rtc, MAX77620_RTCA1_MASK);
+		if (ret < 0)
+			goto out;
+	} else {
+		ret = max77620_rtc_irq_mask(rtc, MAX77620_RTCA1_MASK);
+		if (ret < 0)
+			goto out;
+	}
+out:
+	return ret;
+}
+
+static int max77620_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSEC, buf, sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSEC read failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_reg_to_tm(rtc, buf, tm);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Time format to Reg format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return max77620_rtc_write(rtc, MAX77620_REG_RTCSEC,
+					buf, sizeof(buf), 1);
+}
+
+static int max77620_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSECA1,
+					buf, sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSECA1 read failed: %d\n", ret);
+		return ret;
+	}
+
+
+	buf[RTC_YEAR] &= ~ALARM_EN_MASK;
+	ret = max77620_rtc_reg_to_tm(rtc, buf, &alrm->time);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	if (rtc->irq_mask & MAX77620_RTCA1_MASK)
+		alrm->enabled = 0;
+	else
+		alrm->enabled = 1;
+
+	return 0;
+}
+
+static int max77620_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_tm_to_reg(rtc, buf, &alrm->time, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Time format to reg format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCSECA1, buf,
+			sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSECA1 write failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_alarm_irq_enable(dev, alrm->enabled);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Enable rtc alarm failed: %d\n", ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static const struct rtc_class_ops max77620_rtc_ops = {
+	.read_time = max77620_rtc_read_time,
+	.set_time = max77620_rtc_set_time,
+	.read_alarm = max77620_rtc_read_alarm,
+	.set_alarm = max77620_rtc_set_alarm,
+	.alarm_irq_enable = max77620_rtc_alarm_irq_enable,
+};
+
+static int max77620_rtc_preinit(struct max77620_rtc *rtc)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 val;
+	int ret;
+
+	/* Mask all interrupts */
+	rtc->irq_mask = 0xFF;
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM,
+						&rtc->irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
+		return ret;
+	}
+
+	max77620_rtc_read(rtc, MAX77620_REG_RTCINT, &val, 1, 0);
+
+	/* Configure Binary mode and 24hour mode */
+	val = MAX77620_HRMODEM_MASK;
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCCNTL, &val, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
+		return ret;
+	}
+
+	/* It should be disabled alarm wakeup to wakeup from sleep
+	 * by EN1 input signal.
+	 */
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		MAX77620_REG_ONOFFCNFG2, ONOFF_WK_ALARM1_MASK, 0);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int max77620_rtc_probe(struct platform_device *pdev)
+{
+	static struct max77620_rtc *rtc;
+	int ret = 0;
+
+	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	dev_set_drvdata(&pdev->dev, rtc);
+	rtc->dev = &pdev->dev;
+	mutex_init(&rtc->io_lock);
+
+	ret = max77620_rtc_preinit(rtc);
+	if (ret) {
+		dev_err(&pdev->dev, "probe: Failed to rtc preinit\n");
+		goto fail_preinit;
+	}
+
+	device_init_wakeup(&pdev->dev, 1);
+
+	rtc->rtc = devm_rtc_device_register(&pdev->dev, "max77620-rtc",
+				       &max77620_rtc_ops, THIS_MODULE);
+	if (IS_ERR(rtc->rtc)) {
+		dev_err(&pdev->dev, "probe: Failed to register rtc\n");
+		ret = PTR_ERR(rtc->rtc);
+		goto fail_preinit;
+	}
+
+	rtc->irq = platform_get_irq(pdev, 0);
+	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+			max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
+			"max77620-rtc", rtc);
+	if (ret < 0) {
+		dev_err(rtc->dev, "probe: Failed to request irq %d\n",
+			rtc->irq);
+		rtc->irq = -1;
+		goto fail_preinit;
+	}
+
+	device_init_wakeup(rtc->dev, 1);
+	enable_irq_wake(rtc->irq);
+
+	return 0;
+
+fail_preinit:
+	mutex_destroy(&rtc->io_lock);
+	return ret;
+}
+
+static int max77620_rtc_remove(struct platform_device *pdev)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(&pdev->dev);
+
+	mutex_destroy(&rtc->io_lock);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_rtc_suspend(struct device *dev)
+{
+	struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev)) {
+		int ret;
+		struct rtc_wkalrm alm;
+
+		enable_irq_wake(max77620_rtc->irq);
+		ret = max77620_rtc_read_alarm(dev, &alm);
+		if (!ret)
+			dev_info(dev, "%s() alrm %d time %d %d %d %d %d %d\n",
+				__func__, alm.enabled,
+				alm.time.tm_year, alm.time.tm_mon,
+				alm.time.tm_mday, alm.time.tm_hour,
+				alm.time.tm_min, alm.time.tm_sec);
+	}
+
+	return 0;
+}
+
+static int max77620_rtc_resume(struct device *dev)
+{
+	struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev)) {
+		struct rtc_time tm;
+		int ret;
+
+		disable_irq_wake(max77620_rtc->irq);
+		ret = max77620_rtc_read_time(dev, &tm);
+		if (!ret)
+			dev_info(dev, "%s() %d %d %d %d %d %d\n",
+				__func__, tm.tm_year, tm.tm_mon, tm.tm_mday,
+				tm.tm_hour, tm.tm_min, tm.tm_sec);
+	}
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_rtc_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_rtc_suspend, max77620_rtc_resume)
+};
+
+static struct platform_device_id max77620_rtc_devtype[] = {
+	{
+		.name = "max77620-rtc",
+	},
+	{
+		.name = "max20024-rtc",
+	},
+};
+
+static struct platform_driver max77620_rtc_driver = {
+	.probe = max77620_rtc_probe,
+	.remove = max77620_rtc_remove,
+	.id_table = max77620_rtc_devtype,
+	.driver = {
+			.name = "max77620-rtc",
+			.owner = THIS_MODULE,
+			.pm = &max77620_rtc_pm_ops,
+	},
+};
+
+module_platform_driver(max77620_rtc_driver);
+
+MODULE_DESCRIPTION("max77620 RTC driver");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-rtc");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Chaitanya Bandi

Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
RTC  module. This support for setting alarm and time.

Add RTC driver to access this chip's RTC module via RTC
APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/rtc/Kconfig        |   9 +
 drivers/rtc/Makefile       |   1 +
 drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 584 insertions(+)
 create mode 100644 drivers/rtc/rtc-max77620.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 376322f..8723bf8 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -315,6 +315,15 @@ config RTC_DRV_MAX8997
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-max8997.
 
+config RTC_DRV_MAX77620
+	tristate "Maxim MAX77620/MAX20024"
+	depends on MFD_MAX77620
+	help
+	  If you say yes here you will get support for the
+	  RTC of Maxim MAX77620/MAX20024 PMIC.
+	  This driver can also be built as a module. If so, the module
+	  will be called rtc-max77620.
+
 config RTC_DRV_MAX77686
 	tristate "Maxim MAX77686"
 	depends on MFD_MAX77686
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 62d61b2..da5db0a 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -85,6 +85,7 @@ obj-$(CONFIG_RTC_DRV_M48T59)	+= rtc-m48t59.o
 obj-$(CONFIG_RTC_DRV_M48T86)	+= rtc-m48t86.o
 obj-$(CONFIG_RTC_DRV_MAX6900)	+= rtc-max6900.o
 obj-$(CONFIG_RTC_DRV_MAX6902)	+= rtc-max6902.o
+obj-$(CONFIG_RTC_DRV_MAX77620)	+= rtc-max77620.o
 obj-$(CONFIG_RTC_DRV_MAX77686)	+= rtc-max77686.o
 obj-$(CONFIG_RTC_DRV_MAX77802)	+= rtc-max77802.o
 obj-$(CONFIG_RTC_DRV_MAX8907)	+= rtc-max8907.o
diff --git a/drivers/rtc/rtc-max77620.c b/drivers/rtc/rtc-max77620.c
new file mode 100644
index 0000000..645c661
--- /dev/null
+++ b/drivers/rtc/rtc-max77620.c
@@ -0,0 +1,574 @@
+/*
+ * Max77620 RTC driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/rtc.h>
+#include <linux/mfd/max77620.h>
+
+#define MAX77620_RTC60S_MASK		BIT(0)
+#define MAX77620_RTCA1_MASK		BIT(1)
+#define MAX77620_RTCA2_MASK		BIT(2)
+#define MAX77620_RTC_SMPL_MASK		BIT(3)
+#define MAX77620_RTC_RTC1S_MASK		BIT(4)
+#define MAX77620_RTC_ALL_IRQ_MASK	0x1F
+
+#define MAX77620_BCDM_MASK		BIT(0)
+#define MAX77620_HRMODEM_MASK		BIT(1)
+
+#define WB_UPDATE_MASK			BIT(0)
+#define FLAG_AUTO_CLEAR_MASK		BIT(1)
+#define FREEZE_SEC_MASK			BIT(2)
+#define RTC_WAKE_MASK			BIT(3)
+#define RB_UPDATE_MASK			BIT(4)
+
+#define MAX77620_UDF_MASK		BIT(0)
+#define MAX77620_RBUDF_MASK		BIT(1)
+
+#define SEC_MASK			0x7F
+#define MIN_MASK			0x7F
+#define HOUR_MASK			0x3F
+#define WEEKDAY_MASK			0x7F
+#define MONTH_MASK			0x1F
+#define YEAR_MASK			0xFF
+#define MONTHDAY_MASK			0x3F
+
+#define ALARM_EN_MASK			0x80
+#define ALARM_EN_SHIFT			7
+
+#define RTC_YEAR_BASE			100
+#define RTC_YEAR_MAX			99
+
+#define ONOFF_WK_ALARM1_MASK		BIT(2)
+
+enum {
+	RTC_SEC,
+	RTC_MIN,
+	RTC_HOUR,
+	RTC_WEEKDAY,
+	RTC_MONTH,
+	RTC_YEAR,
+	RTC_MONTHDAY,
+	RTC_NR
+};
+
+struct max77620_rtc {
+	struct rtc_device *rtc;
+	struct device *dev;
+
+	struct mutex io_lock;
+	int irq;
+	u8 irq_mask;
+};
+
+static inline struct device *_to_parent(struct max77620_rtc *rtc)
+{
+	return rtc->dev->parent;
+}
+
+static inline int max77620_rtc_update_buffer(struct max77620_rtc *rtc,
+					     int write)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 val =  FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
+	int ret;
+
+	if (write)
+		val |= WB_UPDATE_MASK;
+	else
+		val |= RB_UPDATE_MASK;
+
+	dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
+		write, MAX77620_REG_RTCUPDATE0, val);
+	ret = max77620_reg_write(parent, MAX77620_RTC_SLAVE,
+						MAX77620_REG_RTCUPDATE0, val);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCUPDATE0 read failed: %d\n", ret);
+		return ret;
+	}
+
+	/* Must wait 16ms for buffer update */
+	usleep_range(16000, 17000);
+
+	return 0;
+}
+
+static inline int max77620_rtc_write(struct max77620_rtc *rtc, u8 addr,
+				     void *values, u32 len, int update_buffer)
+{
+	struct device *parent = _to_parent(rtc);
+	int ret;
+
+	mutex_lock(&rtc->io_lock);
+
+	ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE,
+						addr, len, values);
+	if (ret < 0)
+		goto out;
+
+	if (update_buffer)
+		ret = max77620_rtc_update_buffer(rtc, 1);
+
+out:
+	mutex_unlock(&rtc->io_lock);
+	return ret;
+}
+
+static inline int max77620_rtc_read(struct max77620_rtc *rtc, u8 addr,
+				    void *values, u32 len, int update_buffer)
+{
+	struct device *parent = _to_parent(rtc);
+	int ret;
+
+	mutex_lock(&rtc->io_lock);
+
+	if (update_buffer) {
+		ret = max77620_rtc_update_buffer(rtc, 0);
+		if (ret < 0)
+			goto out;
+	}
+
+	ret = max77620_reg_reads(parent, MAX77620_RTC_SLAVE, addr, len, values);
+out:
+	mutex_unlock(&rtc->io_lock);
+	return ret;
+}
+
+static inline int max77620_rtc_reg_to_tm(struct max77620_rtc *rtc, u8 *buf,
+					 struct rtc_time *tm)
+{
+	int wday = buf[RTC_WEEKDAY] & WEEKDAY_MASK;
+
+	if (unlikely(!wday)) {
+		dev_err(rtc->dev,
+			"rtc_reg_to_tm: Invalid day of week, %d\n", wday);
+		return -EINVAL;
+	}
+
+	tm->tm_sec = (int)(buf[RTC_SEC] & SEC_MASK);
+	tm->tm_min = (int)(buf[RTC_MIN] & MIN_MASK);
+	tm->tm_hour = (int)(buf[RTC_HOUR] & HOUR_MASK);
+	tm->tm_mday = (int)(buf[RTC_MONTHDAY] & MONTHDAY_MASK);
+	tm->tm_mon = (int)(buf[RTC_MONTH] & MONTH_MASK) - 1;
+	tm->tm_year = (int)(buf[RTC_YEAR] & YEAR_MASK) + RTC_YEAR_BASE;
+	tm->tm_wday = ffs(wday) - 1;
+
+	return 0;
+}
+
+static inline int max77620_rtc_tm_to_reg(struct max77620_rtc *rtc, u8 *buf,
+					 struct rtc_time *tm, int alarm)
+{
+	u8 alarm_mask = alarm ? ALARM_EN_MASK : 0;
+
+	if (unlikely((tm->tm_year < RTC_YEAR_BASE) ||
+			(tm->tm_year > RTC_YEAR_BASE + RTC_YEAR_MAX))) {
+		dev_err(rtc->dev,
+			"rtc_tm_to_reg: Invalid year, %d\n", tm->tm_year);
+		return -EINVAL;
+	}
+
+	buf[RTC_SEC] = tm->tm_sec | alarm_mask;
+	buf[RTC_MIN] = tm->tm_min | alarm_mask;
+	buf[RTC_HOUR] = tm->tm_hour | alarm_mask;
+	buf[RTC_MONTHDAY] = tm->tm_mday | alarm_mask;
+	buf[RTC_MONTH] = (tm->tm_mon + 1) | alarm_mask;
+	buf[RTC_YEAR] = (tm->tm_year - RTC_YEAR_BASE) | alarm_mask;
+
+	/* The wday is configured only when disabled alarm. */
+	if (!alarm)
+		buf[RTC_WEEKDAY] = (1 << tm->tm_wday);
+	else {
+	/* Configure its default reset value 0x01, and not enable it. */
+		buf[RTC_WEEKDAY] = 0x01;
+	}
+	return 0;
+}
+
+static inline int max77620_rtc_irq_mask(struct max77620_rtc *rtc, u8 irq)
+{
+	u8 irq_mask = rtc->irq_mask | irq;
+	int ret = 0;
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "rtc_irq_mask: Failed to set rtc irq mask\n");
+		goto out;
+	}
+	rtc->irq_mask = irq_mask;
+
+out:
+	return ret;
+}
+
+static inline int max77620_rtc_irq_unmask(struct max77620_rtc *rtc, u8 irq)
+{
+	u8 irq_mask = rtc->irq_mask & ~irq;
+	int ret = 0;
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev,
+			"rtc_irq_unmask: Failed to set rtc irq mask\n");
+		goto out;
+	}
+	rtc->irq_mask = irq_mask;
+
+out:
+	return ret;
+}
+
+static inline int max77620_rtc_do_irq(struct max77620_rtc *rtc)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 irq_status;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_RTC_SLAVE,
+					MAX77620_REG_RTCINT, &irq_status);
+	if (ret < 0) {
+		dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
+		return ret;
+	}
+
+	dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
+		rtc->irq_mask, irq_status);
+
+	if (!(rtc->irq_mask & MAX77620_RTCA1_MASK) &&
+			(irq_status & MAX77620_RTCA1_MASK))
+		rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
+
+	if (!(rtc->irq_mask & MAX77620_RTC_RTC1S_MASK) &&
+			(irq_status & MAX77620_RTC_RTC1S_MASK))
+		rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
+
+	return ret;
+}
+
+static irqreturn_t max77620_rtc_irq(int irq, void *data)
+{
+	struct max77620_rtc *rtc = (struct max77620_rtc *)data;
+
+	max77620_rtc_do_irq(rtc);
+
+	return IRQ_HANDLED;
+}
+
+static int max77620_rtc_alarm_irq_enable(struct device *dev,
+					 unsigned int enabled)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	int ret = 0;
+
+	if (rtc->irq < 0)
+		return -ENXIO;
+
+	/* Handle pending interrupt */
+	ret = max77620_rtc_do_irq(rtc);
+	if (ret < 0)
+		goto out;
+
+	/* Config alarm interrupt */
+	if (enabled) {
+		ret = max77620_rtc_irq_unmask(rtc, MAX77620_RTCA1_MASK);
+		if (ret < 0)
+			goto out;
+	} else {
+		ret = max77620_rtc_irq_mask(rtc, MAX77620_RTCA1_MASK);
+		if (ret < 0)
+			goto out;
+	}
+out:
+	return ret;
+}
+
+static int max77620_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSEC, buf, sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSEC read failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_reg_to_tm(rtc, buf, tm);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Time format to Reg format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	return max77620_rtc_write(rtc, MAX77620_REG_RTCSEC,
+					buf, sizeof(buf), 1);
+}
+
+static int max77620_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSECA1,
+					buf, sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSECA1 read failed: %d\n", ret);
+		return ret;
+	}
+
+
+	buf[RTC_YEAR] &= ~ALARM_EN_MASK;
+	ret = max77620_rtc_reg_to_tm(rtc, buf, &alrm->time);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	if (rtc->irq_mask & MAX77620_RTCA1_MASK)
+		alrm->enabled = 0;
+	else
+		alrm->enabled = 1;
+
+	return 0;
+}
+
+static int max77620_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(dev);
+	u8 buf[RTC_NR];
+	int ret;
+
+	ret = max77620_rtc_tm_to_reg(rtc, buf, &alrm->time, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Time format to reg format conv failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCSECA1, buf,
+			sizeof(buf), 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Reg RTCSECA1 write failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = max77620_rtc_alarm_irq_enable(dev, alrm->enabled);
+	if (ret < 0) {
+		dev_err(rtc->dev, "Enable rtc alarm failed: %d\n", ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static const struct rtc_class_ops max77620_rtc_ops = {
+	.read_time = max77620_rtc_read_time,
+	.set_time = max77620_rtc_set_time,
+	.read_alarm = max77620_rtc_read_alarm,
+	.set_alarm = max77620_rtc_set_alarm,
+	.alarm_irq_enable = max77620_rtc_alarm_irq_enable,
+};
+
+static int max77620_rtc_preinit(struct max77620_rtc *rtc)
+{
+	struct device *parent = _to_parent(rtc);
+	u8 val;
+	int ret;
+
+	/* Mask all interrupts */
+	rtc->irq_mask = 0xFF;
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM,
+						&rtc->irq_mask, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
+		return ret;
+	}
+
+	max77620_rtc_read(rtc, MAX77620_REG_RTCINT, &val, 1, 0);
+
+	/* Configure Binary mode and 24hour mode */
+	val = MAX77620_HRMODEM_MASK;
+	ret = max77620_rtc_write(rtc, MAX77620_REG_RTCCNTL, &val, 1, 1);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
+		return ret;
+	}
+
+	/* It should be disabled alarm wakeup to wakeup from sleep
+	 * by EN1 input signal.
+	 */
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+		MAX77620_REG_ONOFFCNFG2, ONOFF_WK_ALARM1_MASK, 0);
+	if (ret < 0) {
+		dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int max77620_rtc_probe(struct platform_device *pdev)
+{
+	static struct max77620_rtc *rtc;
+	int ret = 0;
+
+	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	dev_set_drvdata(&pdev->dev, rtc);
+	rtc->dev = &pdev->dev;
+	mutex_init(&rtc->io_lock);
+
+	ret = max77620_rtc_preinit(rtc);
+	if (ret) {
+		dev_err(&pdev->dev, "probe: Failed to rtc preinit\n");
+		goto fail_preinit;
+	}
+
+	device_init_wakeup(&pdev->dev, 1);
+
+	rtc->rtc = devm_rtc_device_register(&pdev->dev, "max77620-rtc",
+				       &max77620_rtc_ops, THIS_MODULE);
+	if (IS_ERR(rtc->rtc)) {
+		dev_err(&pdev->dev, "probe: Failed to register rtc\n");
+		ret = PTR_ERR(rtc->rtc);
+		goto fail_preinit;
+	}
+
+	rtc->irq = platform_get_irq(pdev, 0);
+	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+			max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
+			"max77620-rtc", rtc);
+	if (ret < 0) {
+		dev_err(rtc->dev, "probe: Failed to request irq %d\n",
+			rtc->irq);
+		rtc->irq = -1;
+		goto fail_preinit;
+	}
+
+	device_init_wakeup(rtc->dev, 1);
+	enable_irq_wake(rtc->irq);
+
+	return 0;
+
+fail_preinit:
+	mutex_destroy(&rtc->io_lock);
+	return ret;
+}
+
+static int max77620_rtc_remove(struct platform_device *pdev)
+{
+	struct max77620_rtc *rtc = dev_get_drvdata(&pdev->dev);
+
+	mutex_destroy(&rtc->io_lock);
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_rtc_suspend(struct device *dev)
+{
+	struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev)) {
+		int ret;
+		struct rtc_wkalrm alm;
+
+		enable_irq_wake(max77620_rtc->irq);
+		ret = max77620_rtc_read_alarm(dev, &alm);
+		if (!ret)
+			dev_info(dev, "%s() alrm %d time %d %d %d %d %d %d\n",
+				__func__, alm.enabled,
+				alm.time.tm_year, alm.time.tm_mon,
+				alm.time.tm_mday, alm.time.tm_hour,
+				alm.time.tm_min, alm.time.tm_sec);
+	}
+
+	return 0;
+}
+
+static int max77620_rtc_resume(struct device *dev)
+{
+	struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev)) {
+		struct rtc_time tm;
+		int ret;
+
+		disable_irq_wake(max77620_rtc->irq);
+		ret = max77620_rtc_read_time(dev, &tm);
+		if (!ret)
+			dev_info(dev, "%s() %d %d %d %d %d %d\n",
+				__func__, tm.tm_year, tm.tm_mon, tm.tm_mday,
+				tm.tm_hour, tm.tm_min, tm.tm_sec);
+	}
+
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_rtc_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_rtc_suspend, max77620_rtc_resume)
+};
+
+static struct platform_device_id max77620_rtc_devtype[] = {
+	{
+		.name = "max77620-rtc",
+	},
+	{
+		.name = "max20024-rtc",
+	},
+};
+
+static struct platform_driver max77620_rtc_driver = {
+	.probe = max77620_rtc_probe,
+	.remove = max77620_rtc_remove,
+	.id_table = max77620_rtc_devtype,
+	.driver = {
+			.name = "max77620-rtc",
+			.owner = THIS_MODULE,
+			.pm = &max77620_rtc_pm_ops,
+	},
+};
+
+module_platform_driver(max77620_rtc_driver);
+
+MODULE_DESCRIPTION("max77620 RTC driver");
+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-rtc");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

-- 
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^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
  2016-01-07 14:38 ` Laxman Dewangan
  (?)
@ 2016-01-07 14:38   ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Mallikarjun Kasoju

MAXIM Semiconductor's PMIC, MAX77620 and MAX20024 have the
multiple DCDC and LDOs. This supplies the power to different
components of the system.
Also these rails has configuration for ramp time, flexible
power sequence, slew rate etc.

Add regulator driver to access these rails via regulator APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/regulator/Kconfig              |    9 +
 drivers/regulator/Makefile             |    1 +
 drivers/regulator/max77620-regulator.c | 1062 ++++++++++++++++++++++++++++++++
 3 files changed, 1072 insertions(+)
 create mode 100644 drivers/regulator/max77620-regulator.c

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 8155e80..b92214b 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -343,6 +343,15 @@ config REGULATOR_MAX1586
 	  regulator via I2C bus. The provided regulator is suitable
 	  for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
 
+config REGULATOR_MAX77620
+	tristate "Maxim 77620/MAX20024 voltage regulator"
+	depends on MFD_MAX77620
+	help
+	  This driver controls Maxim MAX77620 voltage output regulator
+	  via I2C bus. The provided regulator is suitable for Tegra
+	  chip to control Step-Down DC-DC and LDOs. Say Y here to
+	  enable the regulator driver.
+
 config REGULATOR_MAX8649
 	tristate "Maxim 8649 voltage regulator"
 	depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 980b194..2564c00 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_REGULATOR_LP8755) += lp8755.o
 obj-$(CONFIG_REGULATOR_LTC3589) += ltc3589.o
 obj-$(CONFIG_REGULATOR_MAX14577) += max14577.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
+obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o
 obj-$(CONFIG_REGULATOR_MAX8649)	+= max8649.o
 obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
 obj-$(CONFIG_REGULATOR_MAX8907) += max8907-regulator.o
diff --git a/drivers/regulator/max77620-regulator.c b/drivers/regulator/max77620-regulator.c
new file mode 100644
index 0000000..c1b18b9
--- /dev/null
+++ b/drivers/regulator/max77620-regulator.c
@@ -0,0 +1,1062 @@
+/*
+ * Maxim MAX77620 Regulator driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author: Mallikarjun Kasoju <mkasoju@nvidia.com>
+ *	Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/max77620.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/of.h>
+#include <linux/regulator/of_regulator.h>
+
+#define max77620_rails(_name)	"max77620-"#_name
+
+/* Power Mode */
+#define MAX77620_POWER_MODE_NORMAL		3
+#define MAX77620_POWER_MODE_LPM			2
+#define MAX77620_POWER_MODE_GLPM		1
+#define MAX77620_POWER_MODE_DISABLE		0
+
+/* SD Slew Rate */
+#define MAX77620_SD_SR_13_75			0
+#define MAX77620_SD_SR_27_5			1
+#define MAX77620_SD_SR_55			2
+#define MAX77620_SD_SR_100			3
+
+#define MAX77620_FPS_SRC_NUM			3
+
+struct max77620_regulator_info {
+	u8 type;
+	u32 min_uV;
+	u32 max_uV;
+	u32 step_uV;
+	u8 fps_addr;
+	u8 volt_addr;
+	u8 cfg_addr;
+	u8 volt_mask;
+	u8 power_mode_mask;
+	u8 power_mode_shift;
+	u8 remote_sense_addr;
+	u8 remote_sense_mask;
+	struct regulator_desc desc;
+};
+
+struct max77620_regulator_pdata {
+	bool glpm_enable;
+	bool en2_ctrl_sd0;
+	bool sd_fsrade_disable;
+	bool disable_remote_sense_on_suspend;
+	struct regulator_init_data *reg_idata;
+	int active_fps_src;
+	int active_fps_pd_slot;
+	int active_fps_pu_slot;
+	int suspend_fps_src;
+	int suspend_fps_pd_slot;
+	int suspend_fps_pu_slot;
+	int sleep_mode;
+	int current_mode;
+	int normal_mode;
+};
+
+struct max77620_regulator {
+	struct device *dev;
+	struct max77620_chip *max77620_chip;
+	struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
+	struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
+	struct regulator_dev *rdev[MAX77620_NUM_REGS];
+	int enable_power_mode[MAX77620_NUM_REGS];
+	int current_power_mode[MAX77620_NUM_REGS];
+	int active_fps_src[MAX77620_NUM_REGS];
+};
+
+#define fps_src_name(fps_src)	\
+	(fps_src == FPS_SRC_0 ? "FPS_SRC_0" :	\
+	fps_src == FPS_SRC_1 ? "FPS_SRC_1" :	\
+	fps_src == FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
+
+static int  max77620_regulator_get_fps_src(struct max77620_regulator *reg,
+		 int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+			  rinfo->fps_addr, &val);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+				   rinfo->fps_addr, ret);
+		return ret;
+	}
+	ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+	return ret;
+}
+
+static int max77620_regulator_set_fps_src(struct max77620_regulator *reg,
+		       int fps_src, int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	int ret;
+
+	switch (fps_src) {
+	case FPS_SRC_0:
+	case FPS_SRC_1:
+	case FPS_SRC_2:
+	case FPS_SRC_NONE:
+		break;
+
+	case FPS_SRC_DEF:
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+			rinfo->fps_addr, &val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+				rinfo->fps_addr, ret);
+			return ret;
+		}
+		ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+		reg->active_fps_src[id] = ret;
+		return 0;
+
+	default:
+		dev_err(reg->dev, "Invalid FPS %d for regulator %d\n",
+			fps_src, id);
+		return -EINVAL;
+	}
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			rinfo->fps_addr, MAX77620_FPS_SRC_MASK,
+			fps_src << MAX77620_FPS_SRC_SHIFT);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x update failed %d\n",
+			rinfo->fps_addr, ret);
+		return ret;
+	}
+	reg->active_fps_src[id] = fps_src;
+	return 0;
+}
+
+static int max77620_regulator_set_fps_slots(struct max77620_regulator *reg,
+			int id, bool is_suspend)
+{
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	unsigned int val = 0;
+	unsigned int mask = 0;
+	int pu = rpdata->active_fps_pu_slot;
+	int pd = rpdata->active_fps_pd_slot;
+	int ret = 0;
+
+	if (is_suspend) {
+		pu = rpdata->suspend_fps_pu_slot;
+		pd = rpdata->suspend_fps_pd_slot;
+	}
+
+	/* FPS power up period setting */
+	if (pu >= 0) {
+		val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
+		mask |= MAX77620_FPS_PU_PERIOD_MASK;
+	}
+
+	/* FPS power down period setting */
+	if (pd >= 0) {
+		val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
+		mask |= MAX77620_FPS_PD_PERIOD_MASK;
+	}
+
+	if (mask) {
+		ret =  max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->fps_addr, mask, val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed, %d\n",
+				rinfo->fps_addr, ret);
+			return ret;
+		}
+	}
+	return ret;
+}
+
+static int max77620_regulator_set_power_mode(struct max77620_regulator *reg,
+	int power_mode, int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	int ret;
+	struct device *parent = reg->max77620_chip->dev;
+	u8 mask = rinfo->power_mode_mask;
+	u8 shift = rinfo->power_mode_shift;
+	u8 addr = rinfo->volt_addr;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+		addr = rinfo->cfg_addr;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			addr, mask, power_mode << shift);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator mode set failed. ret %d\n", ret);
+		return ret;
+	}
+	reg->current_power_mode[id] = power_mode;
+	return ret;
+}
+
+static int max77620_regulator_get_power_mode(struct max77620_regulator *reg,
+			int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	u8 mask = rinfo->power_mode_mask;
+	u8 shift = rinfo->power_mode_shift;
+	u8 addr = rinfo->volt_addr;
+	int ret;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+		addr = rinfo->cfg_addr;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE, addr, &val);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+			addr, ret);
+		return ret;
+	}
+
+	return (val & mask) >> shift;
+}
+
+static int max77620_regulator_enable(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 0;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 0;
+
+	ret = max77620_regulator_set_power_mode(reg, reg->enable_power_mode[id],
+					id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode config failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_regulator_disable(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 0;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 0;
+
+	ret =  max77620_regulator_set_power_mode(reg,
+			MAX77620_POWER_MODE_DISABLE, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode config failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret = 1;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 1;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 1;
+
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode read failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	if (ret != MAX77620_POWER_MODE_DISABLE)
+		return 1;
+
+	return 0;
+}
+
+static int max77620_regulator_set_mode(struct regulator_dev *rdev,
+				       unsigned int mode)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct device *parent = reg->max77620_chip->dev;
+	int power_mode;
+	int ret;
+	bool fpwm = false;
+
+	switch (mode) {
+	case REGULATOR_MODE_FAST:
+		fpwm = true;
+		power_mode = MAX77620_POWER_MODE_NORMAL;
+		break;
+
+	case REGULATOR_MODE_NORMAL:
+		power_mode = MAX77620_POWER_MODE_NORMAL;
+		break;
+
+	case REGULATOR_MODE_IDLE:
+	case REGULATOR_MODE_STANDBY:
+		if (rpdata->glpm_enable)
+			power_mode = MAX77620_POWER_MODE_GLPM;
+		else
+			power_mode = MAX77620_POWER_MODE_LPM;
+		break;
+
+	default:
+		dev_err(reg->dev, "The regulator id %d mode %d not supported\n",
+			id, mode);
+		return -EINVAL;
+	}
+
+	if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
+		goto skip_fpwm;
+
+	if (fpwm)
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_FPWM_MASK,
+				MAX77620_SD_FPWM_MASK);
+	else
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_FPWM_MASK, 0);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+				rinfo->cfg_addr, ret);
+		return ret;
+	}
+	rpdata->current_mode = mode;
+
+skip_fpwm:
+	ret =  max77620_regulator_set_power_mode(reg, power_mode, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Power mode of regualtor %d failed %d\n",
+				id, ret);
+		return ret;
+	}
+	reg->enable_power_mode[id] = power_mode;
+	return 0;
+}
+
+static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	struct device *parent = reg->max77620_chip->dev;
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	int fpwm = 0;
+	int ret;
+	int pm_mode, reg_mode;
+	u8 val;
+
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0)
+		return 0;
+	pm_mode = ret;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x read failed: %d\n",
+				rinfo->cfg_addr, ret);
+			return ret;
+		}
+		fpwm = !!(val & MAX77620_SD_FPWM_MASK);
+	}
+
+	switch (pm_mode) {
+	case MAX77620_POWER_MODE_NORMAL:
+	case MAX77620_POWER_MODE_DISABLE:
+		if (fpwm)
+			reg_mode = REGULATOR_MODE_FAST;
+		else
+			reg_mode = REGULATOR_MODE_NORMAL;
+		break;
+	case MAX77620_POWER_MODE_LPM:
+	case MAX77620_POWER_MODE_GLPM:
+		reg_mode = REGULATOR_MODE_IDLE;
+		break;
+	default:
+		return 0;
+	}
+	return reg_mode;
+}
+
+static int max77620_regulator_set_sleep_mode(struct regulator_dev *rdev,
+				       unsigned int mode)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+
+	rpdata->sleep_mode = mode;
+	return 0;
+}
+
+static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
+				       int ramp_delay)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	int ret, val;
+	int retval;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		if (ramp_delay <= 13750) {
+			val = 0;
+			retval = 13750;
+		} else if (ramp_delay <= 27500) {
+			val = 1;
+			retval = 27500;
+		} else if (ramp_delay <= 55000) {
+			val = 2;
+			retval = 55000;
+		} else {
+			val = 3;
+			retval = 100000;
+		}
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_SR_MASK,
+				val << MAX77620_SD_SR_SHIFT);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+	} else {
+		if (ramp_delay <= 5000) {
+			val = 1;
+			retval = 5000;
+		} else {
+			val = 0;
+			retval = 100000;
+		}
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_LDO_SLEW_RATE_MASK,
+				val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+	}
+	return retval;
+}
+
+static struct regulator_ops max77620_regulator_ops = {
+	.is_enabled = max77620_regulator_is_enabled,
+	.enable = max77620_regulator_enable,
+	.disable = max77620_regulator_disable,
+	.list_voltage = regulator_list_voltage_linear,
+	.map_voltage = regulator_map_voltage_linear,
+	.get_voltage_sel = regulator_get_voltage_sel_regmap,
+	.set_voltage_sel = regulator_set_voltage_sel_regmap,
+	.set_mode = max77620_regulator_set_mode,
+	.get_mode = max77620_regulator_get_mode,
+	.set_ramp_delay = max77620_regulator_set_ramp_delay,
+	.set_voltage_time_sel = regulator_set_voltage_time_sel,
+};
+
+#define MAX77620_SD_CNF2_ROVS_EN_NONE	0
+#define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV,	\
+		_step_uV, _rs_add, _rs_mask)				\
+	[MAX77620_REGULATOR_ID_##_id] = {			\
+		.type = MAX77620_REGULATOR_TYPE_SD,			\
+		.volt_mask =  MAX77620_##_volt_mask##_VOLT_MASK,	\
+		.volt_addr = MAX77620_REG_##_id,		\
+		.cfg_addr = MAX77620_REG_##_id##_CFG,		\
+		.fps_addr = MAX77620_REG_FPS_##_id,		\
+		.remote_sense_addr = _rs_add,			\
+		.remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
+		.min_uV = _min_uV,				\
+		.max_uV = _max_uV,				\
+		.step_uV = _step_uV,				\
+		.power_mode_mask = MAX77620_SD_POWER_MODE_MASK,		\
+		.power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT,	\
+		.desc = {					\
+			.name = max77620_rails(_name),		\
+			.supply_name = _sname,			\
+			.id = MAX77620_REGULATOR_ID_##_id,	\
+			.ops = &max77620_regulator_ops,		\
+			.n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
+			.min_uV = _min_uV,	\
+			.uV_step = _step_uV,	\
+			.enable_time = 500,	\
+			.vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK,	\
+			.vsel_reg = MAX77620_REG_##_id,	\
+			.type = REGULATOR_VOLTAGE,	\
+			.owner = THIS_MODULE,	\
+		},						\
+	}
+
+#define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
+	[MAX77620_REGULATOR_ID_##_id] = {			\
+		.type = MAX77620_REGULATOR_TYPE_LDO_##_type,		\
+		.volt_mask = MAX77620_LDO_VOLT_MASK,			\
+		.volt_addr = MAX77620_REG_##_id##_CFG,		\
+		.cfg_addr = MAX77620_REG_##_id##_CFG2,		\
+		.fps_addr = MAX77620_REG_FPS_##_id,		\
+		.remote_sense_addr = 0xFF,			\
+		.min_uV = _min_uV,				\
+		.max_uV = _max_uV,				\
+		.step_uV = _step_uV,				\
+		.power_mode_mask = MAX77620_LDO_POWER_MODE_MASK,	\
+		.power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT,	\
+		.desc = {					\
+			.name = max77620_rails(_name),		\
+			.supply_name = _sname,			\
+			.id = MAX77620_REGULATOR_ID_##_id,	\
+			.ops = &max77620_regulator_ops,		\
+			.n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
+			.min_uV = _min_uV,	\
+			.uV_step = _step_uV,	\
+			.enable_time = 500,	\
+			.vsel_mask = MAX77620_LDO_VOLT_MASK,	\
+			.vsel_reg = MAX77620_REG_##_id##_CFG, \
+			.type = REGULATOR_VOLTAGE,		\
+			.owner = THIS_MODULE,			\
+		},						\
+	}
+
+static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
+	RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
+	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
+	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+
+	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
+	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
+	RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
+};
+
+static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
+	RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
+	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
+	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+
+	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
+	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
+	RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
+};
+
+static struct of_regulator_match max77620_regulator_matches[] = {
+	{ .name = "sd0", },
+	{ .name = "sd1", },
+	{ .name = "sd2", },
+	{ .name = "sd3", },
+	{ .name = "sd4", },
+	{ .name = "ldo0", },
+	{ .name = "ldo1", },
+	{ .name = "ldo2", },
+	{ .name = "ldo3", },
+	{ .name = "ldo4", },
+	{ .name = "ldo5", },
+	{ .name = "ldo6", },
+	{ .name = "ldo7", },
+	{ .name = "ldo8", },
+};
+
+static int max77620_regulator_preinit(struct max77620_regulator *reg, int id)
+{
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	struct regulator_init_data *ridata = reg->reg_pdata[id].reg_idata;
+	struct regulator_desc *rdesc = &max77620_regs_info[id].desc;
+	int init_uv;
+	u8 val, mask;
+	int ret;
+
+	if (!ridata)
+		return 0;
+
+	/* Update power mode */
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0)
+		return ret;
+	reg->current_power_mode[id] = ret;
+	reg->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
+
+	if (rpdata->active_fps_src == FPS_SRC_DEF) {
+		ret = max77620_regulator_get_fps_src(reg, id);
+		if (ret < 0)
+			return ret;
+		rpdata->active_fps_src = ret;
+	}
+
+	/*
+	 * If rails are externally control of FPS control then enable it
+	 * always.
+	 */
+	if ((rpdata->active_fps_src != FPS_SRC_NONE) &&
+		(reg->current_power_mode[id] != reg->enable_power_mode[id])) {
+		ret = max77620_regulator_set_power_mode(reg,
+				reg->enable_power_mode[id], id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode config failed %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+
+	/* Enable rail before changing FPS to NONE to avoid glitch */
+	if (ridata && ridata->constraints.boot_on &&
+		(rpdata->active_fps_src == FPS_SRC_NONE)) {
+		init_uv = ridata->constraints.min_uV;
+		if (init_uv && (init_uv == ridata->constraints.max_uV)) {
+			val = (init_uv - rdesc->min_uV) / rdesc->uV_step;
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+					rdesc->vsel_reg, rdesc->vsel_mask, val);
+			if (ret < 0) {
+				dev_err(reg->dev,
+					"Reg 0x%02x update failed: %d\n",
+					rdesc->vsel_reg, ret);
+				return ret;
+			}
+		}
+
+		ret = max77620_regulator_set_power_mode(reg,
+				reg->enable_power_mode[id], id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode config failed %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+
+	ret = max77620_regulator_set_fps_src(reg, rpdata->active_fps_src, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "preinit: Failed to set FPSSRC to %d\n",
+			rpdata->active_fps_src);
+		return ret;
+	}
+
+	ret = max77620_regulator_set_fps_slots(reg, id, false);
+	if (ret < 0) {
+		dev_err(reg->dev, "preinit: Failed to set FPS Slots\n");
+		return ret;
+	}
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		int slew_rate;
+		u8 val_u8;
+
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val_u8);
+		if (ret < 0) {
+			dev_err(reg->dev, "Register 0x%02x read failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+
+		slew_rate = (val_u8 >> MAX77620_SD_SR_SHIFT) & 0x3;
+		switch (slew_rate) {
+		case 0:
+			slew_rate = 13750;
+			break;
+		case 1:
+			slew_rate = 27500;
+			break;
+		case 2:
+			slew_rate = 55000;
+			break;
+		case 3:
+			slew_rate = 100000;
+			break;
+		}
+		rinfo->desc.ramp_delay = slew_rate;
+
+		mask = MAX77620_SD_FSRADE_MASK;
+		val = 0;
+		if (rpdata->sd_fsrade_disable)
+			val |= MAX77620_SD_FSRADE_MASK;
+
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, mask, val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+				rinfo->cfg_addr, ret);
+			return ret;
+		}
+	} else {
+		int slew_rate;
+		u8 val_u8;
+
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val_u8);
+		if (ret < 0) {
+			dev_err(reg->dev, "Register 0x%02x read failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+		slew_rate = (val_u8) & 0x1;
+		switch (slew_rate) {
+		case 0:
+			slew_rate = 100000;
+			break;
+		case 1:
+			slew_rate = 5000;
+			break;
+		}
+		rinfo->desc.ramp_delay = slew_rate;
+	}
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0) {
+		ret = max77620_regulator_set_power_mode(reg,
+				MAX77620_POWER_MODE_NORMAL, id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode set failed: %d\n",
+				id, ret);
+			return ret;
+		}
+		ret = max77620_regulator_set_fps_src(reg, FPS_SRC_0, id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d fps src set failed: %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static int max77620_get_regulator_dt_data(struct platform_device *pdev,
+		struct max77620_regulator *max77620_regs)
+{
+	struct device_node *np;
+	u32 prop;
+	int id;
+	int ret;
+
+	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
+	if (!np) {
+		dev_err(&pdev->dev, "Device is not having regulators node\n");
+		return -ENODEV;
+	}
+	pdev->dev.of_node = np;
+
+	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
+			ARRAY_SIZE(max77620_regulator_matches));
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	for (id = 0; id < ARRAY_SIZE(max77620_regulator_matches); ++id) {
+		struct device_node *reg_node;
+		struct max77620_regulator_pdata *reg_pdata =
+					&max77620_regs->reg_pdata[id];
+
+		reg_node = max77620_regulator_matches[id].of_node;
+		reg_pdata->reg_idata = max77620_regulator_matches[id].init_data;
+
+		if (!reg_pdata->reg_idata)
+			continue;
+
+		reg_pdata->glpm_enable = of_property_read_bool(reg_node,
+					"maxim,enable-group-low-power");
+
+		reg_pdata->en2_ctrl_sd0 = of_property_read_bool(reg_node,
+					"maxim,enable-sd0-en2-control");
+
+		reg_pdata->sd_fsrade_disable = of_property_read_bool(reg_node,
+					"maxim,disable-active-discharge");
+
+		reg_pdata->disable_remote_sense_on_suspend =
+				of_property_read_bool(reg_node,
+				"maxim,disable-remote-sense-on-suspend");
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-source", &prop);
+		if (!ret)
+			reg_pdata->active_fps_src = prop;
+		else
+			reg_pdata->active_fps_src = FPS_SRC_DEF;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-power-up-slot", &prop);
+		if (!ret)
+			reg_pdata->active_fps_pu_slot = prop;
+		else
+			reg_pdata->active_fps_pu_slot = -1;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-power-down-slot", &prop);
+		if (!ret)
+			reg_pdata->active_fps_pd_slot = prop;
+		else
+			reg_pdata->active_fps_pd_slot = -1;
+
+		reg_pdata->suspend_fps_src = -1;
+		reg_pdata->suspend_fps_pu_slot = -1;
+		reg_pdata->suspend_fps_pd_slot = -1;
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-source", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_src = prop;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-power-up-slot", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_pu_slot = prop;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-power-down-slot", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_pd_slot = prop;
+	}
+	return 0;
+}
+
+static int max77620_regulator_probe(struct platform_device *pdev)
+{
+	struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
+	struct regulator_desc *rdesc;
+	struct max77620_regulator *pmic;
+	struct regulator_config config = { };
+	struct max77620_regulator_info *regulator_info;
+	int ret = 0;
+	int id;
+
+	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
+	if (!pmic)
+		return -ENOMEM;
+
+	max77620_get_regulator_dt_data(pdev, pmic);
+
+	platform_set_drvdata(pdev, pmic);
+	pmic->max77620_chip = max77620_chip;
+	pmic->dev = &pdev->dev;
+
+	if (max77620_chip->id == MAX77620)
+		regulator_info = max77620_regs_info;
+	else
+		regulator_info = max20024_regs_info;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+
+		if ((max77620_chip->id == MAX77620) &&
+			(id == MAX77620_REGULATOR_ID_SD4))
+			continue;
+
+		rdesc = &regulator_info[id].desc;
+		pmic->rinfo[id] = &max77620_regs_info[id];
+		pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
+
+		config.regmap = max77620_chip->rmap[MAX77620_PWR_SLAVE];
+		config.dev = &pdev->dev;
+		config.init_data = pmic->reg_pdata[id].reg_idata;
+		config.driver_data = pmic;
+		config.of_node = max77620_regulator_matches[id].of_node;
+
+		ret = max77620_regulator_preinit(pmic, id);
+		if (ret < 0) {
+			dev_err(&pdev->dev, "Preinit regualtor %s failed: %d\n",
+				rdesc->name, ret);
+			return ret;
+		}
+
+		pmic->rdev[id] = devm_regulator_register(&pdev->dev,
+						rdesc, &config);
+		if (IS_ERR(pmic->rdev[id])) {
+			ret = PTR_ERR(pmic->rdev[id]);
+			dev_err(&pdev->dev,
+				"regulator %s register failed: %d\n",
+				rdesc->name, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_regulator_suspend(struct device *dev)
+{
+	struct max77620_regulator *pmic = dev_get_drvdata(dev);
+	struct max77620_regulator_pdata *reg_pdata;
+	struct max77620_regulator_info *rinfo;
+	struct device *parent = pmic->dev->parent;
+	int id;
+	int ret;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+		reg_pdata = &pmic->reg_pdata[id];
+		rinfo = pmic->rinfo[id];
+		if (!reg_pdata || !rinfo)
+			continue;
+
+		if (reg_pdata->disable_remote_sense_on_suspend &&
+				(rinfo->remote_sense_addr != 0xFF)) {
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->remote_sense_addr,
+				rinfo->remote_sense_mask, 0);
+			if (ret < 0)
+				dev_err(dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->remote_sense_addr, ret);
+		}
+
+		if (reg_pdata->sleep_mode &&
+				(rinfo->type == MAX77620_REGULATOR_TYPE_SD)) {
+			reg_pdata->normal_mode = reg_pdata->current_mode;
+			ret = max77620_regulator_set_sleep_mode(pmic->rdev[id],
+						reg_pdata->sleep_mode);
+			if (ret < 0)
+				dev_err(dev,
+					"Regulator %d sleep mode failed: %d\n",
+					id, ret);
+		}
+
+		max77620_regulator_set_fps_slots(pmic, id, true);
+		if (reg_pdata->suspend_fps_src >= 0)
+			max77620_regulator_set_fps_src(pmic,
+				reg_pdata->suspend_fps_src, id);
+	}
+	return 0;
+}
+
+static int max77620_regulator_resume(struct device *dev)
+{
+	struct max77620_regulator *pmic = dev_get_drvdata(dev);
+	struct max77620_regulator_pdata *reg_pdata;
+	struct max77620_regulator_info *rinfo;
+	struct device *parent = pmic->dev->parent;
+	int id;
+	int ret;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+		reg_pdata = &pmic->reg_pdata[id];
+		rinfo = pmic->rinfo[id];
+		if (!reg_pdata || !rinfo)
+			continue;
+
+		if (reg_pdata->disable_remote_sense_on_suspend &&
+				(rinfo->remote_sense_addr != 0xFF)) {
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->remote_sense_addr,
+				rinfo->remote_sense_mask,
+				rinfo->remote_sense_mask);
+			if (ret < 0)
+				dev_err(dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->remote_sense_addr, ret);
+		}
+
+		if (reg_pdata->sleep_mode &&
+				(rinfo->type == MAX77620_REGULATOR_TYPE_SD)) {
+			ret = max77620_regulator_set_sleep_mode(pmic->rdev[id],
+						reg_pdata->normal_mode);
+			if (ret < 0)
+				dev_err(dev,
+					"Regulator %d normal mode failed: %d\n",
+					id, ret);
+		}
+
+		max77620_regulator_set_fps_slots(pmic, id, false);
+		if (reg_pdata->active_fps_src >= 0)
+			max77620_regulator_set_fps_src(pmic,
+				reg_pdata->active_fps_src, id);
+	}
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_regulator_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
+			max77620_regulator_resume)
+};
+
+static struct platform_device_id max77620_regulator_devtype[] = {
+	{
+		.name = "max77620-pmic",
+	},
+	{
+		.name = "max20024-pmic",
+	},
+};
+
+static struct platform_driver max77620_regulator_driver = {
+	.probe = max77620_regulator_probe,
+	.id_table = max77620_regulator_devtype,
+	.driver = {
+		.name = "max77620-pmic",
+		.owner = THIS_MODULE,
+		.pm = &max77620_regulator_pm_ops,
+	},
+};
+
+static int __init max77620_regulator_init(void)
+{
+	return platform_driver_register(&max77620_regulator_driver);
+}
+subsys_initcall(max77620_regulator_init);
+
+static void __exit max77620_reg_exit(void)
+{
+	platform_driver_unregister(&max77620_regulator_driver);
+}
+module_exit(max77620_reg_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
+MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-pmic");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Mallikarjun Kasoju

MAXIM Semiconductor's PMIC, MAX77620 and MAX20024 have the
multiple DCDC and LDOs. This supplies the power to different
components of the system.
Also these rails has configuration for ramp time, flexible
power sequence, slew rate etc.

Add regulator driver to access these rails via regulator APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/regulator/Kconfig              |    9 +
 drivers/regulator/Makefile             |    1 +
 drivers/regulator/max77620-regulator.c | 1062 ++++++++++++++++++++++++++++++++
 3 files changed, 1072 insertions(+)
 create mode 100644 drivers/regulator/max77620-regulator.c

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 8155e80..b92214b 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -343,6 +343,15 @@ config REGULATOR_MAX1586
 	  regulator via I2C bus. The provided regulator is suitable
 	  for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
 
+config REGULATOR_MAX77620
+	tristate "Maxim 77620/MAX20024 voltage regulator"
+	depends on MFD_MAX77620
+	help
+	  This driver controls Maxim MAX77620 voltage output regulator
+	  via I2C bus. The provided regulator is suitable for Tegra
+	  chip to control Step-Down DC-DC and LDOs. Say Y here to
+	  enable the regulator driver.
+
 config REGULATOR_MAX8649
 	tristate "Maxim 8649 voltage regulator"
 	depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 980b194..2564c00 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_REGULATOR_LP8755) += lp8755.o
 obj-$(CONFIG_REGULATOR_LTC3589) += ltc3589.o
 obj-$(CONFIG_REGULATOR_MAX14577) += max14577.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
+obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o
 obj-$(CONFIG_REGULATOR_MAX8649)	+= max8649.o
 obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
 obj-$(CONFIG_REGULATOR_MAX8907) += max8907-regulator.o
diff --git a/drivers/regulator/max77620-regulator.c b/drivers/regulator/max77620-regulator.c
new file mode 100644
index 0000000..c1b18b9
--- /dev/null
+++ b/drivers/regulator/max77620-regulator.c
@@ -0,0 +1,1062 @@
+/*
+ * Maxim MAX77620 Regulator driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author: Mallikarjun Kasoju <mkasoju@nvidia.com>
+ *	Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/max77620.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/of.h>
+#include <linux/regulator/of_regulator.h>
+
+#define max77620_rails(_name)	"max77620-"#_name
+
+/* Power Mode */
+#define MAX77620_POWER_MODE_NORMAL		3
+#define MAX77620_POWER_MODE_LPM			2
+#define MAX77620_POWER_MODE_GLPM		1
+#define MAX77620_POWER_MODE_DISABLE		0
+
+/* SD Slew Rate */
+#define MAX77620_SD_SR_13_75			0
+#define MAX77620_SD_SR_27_5			1
+#define MAX77620_SD_SR_55			2
+#define MAX77620_SD_SR_100			3
+
+#define MAX77620_FPS_SRC_NUM			3
+
+struct max77620_regulator_info {
+	u8 type;
+	u32 min_uV;
+	u32 max_uV;
+	u32 step_uV;
+	u8 fps_addr;
+	u8 volt_addr;
+	u8 cfg_addr;
+	u8 volt_mask;
+	u8 power_mode_mask;
+	u8 power_mode_shift;
+	u8 remote_sense_addr;
+	u8 remote_sense_mask;
+	struct regulator_desc desc;
+};
+
+struct max77620_regulator_pdata {
+	bool glpm_enable;
+	bool en2_ctrl_sd0;
+	bool sd_fsrade_disable;
+	bool disable_remote_sense_on_suspend;
+	struct regulator_init_data *reg_idata;
+	int active_fps_src;
+	int active_fps_pd_slot;
+	int active_fps_pu_slot;
+	int suspend_fps_src;
+	int suspend_fps_pd_slot;
+	int suspend_fps_pu_slot;
+	int sleep_mode;
+	int current_mode;
+	int normal_mode;
+};
+
+struct max77620_regulator {
+	struct device *dev;
+	struct max77620_chip *max77620_chip;
+	struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
+	struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
+	struct regulator_dev *rdev[MAX77620_NUM_REGS];
+	int enable_power_mode[MAX77620_NUM_REGS];
+	int current_power_mode[MAX77620_NUM_REGS];
+	int active_fps_src[MAX77620_NUM_REGS];
+};
+
+#define fps_src_name(fps_src)	\
+	(fps_src == FPS_SRC_0 ? "FPS_SRC_0" :	\
+	fps_src == FPS_SRC_1 ? "FPS_SRC_1" :	\
+	fps_src == FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
+
+static int  max77620_regulator_get_fps_src(struct max77620_regulator *reg,
+		 int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+			  rinfo->fps_addr, &val);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+				   rinfo->fps_addr, ret);
+		return ret;
+	}
+	ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+	return ret;
+}
+
+static int max77620_regulator_set_fps_src(struct max77620_regulator *reg,
+		       int fps_src, int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	int ret;
+
+	switch (fps_src) {
+	case FPS_SRC_0:
+	case FPS_SRC_1:
+	case FPS_SRC_2:
+	case FPS_SRC_NONE:
+		break;
+
+	case FPS_SRC_DEF:
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+			rinfo->fps_addr, &val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+				rinfo->fps_addr, ret);
+			return ret;
+		}
+		ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+		reg->active_fps_src[id] = ret;
+		return 0;
+
+	default:
+		dev_err(reg->dev, "Invalid FPS %d for regulator %d\n",
+			fps_src, id);
+		return -EINVAL;
+	}
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			rinfo->fps_addr, MAX77620_FPS_SRC_MASK,
+			fps_src << MAX77620_FPS_SRC_SHIFT);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x update failed %d\n",
+			rinfo->fps_addr, ret);
+		return ret;
+	}
+	reg->active_fps_src[id] = fps_src;
+	return 0;
+}
+
+static int max77620_regulator_set_fps_slots(struct max77620_regulator *reg,
+			int id, bool is_suspend)
+{
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	unsigned int val = 0;
+	unsigned int mask = 0;
+	int pu = rpdata->active_fps_pu_slot;
+	int pd = rpdata->active_fps_pd_slot;
+	int ret = 0;
+
+	if (is_suspend) {
+		pu = rpdata->suspend_fps_pu_slot;
+		pd = rpdata->suspend_fps_pd_slot;
+	}
+
+	/* FPS power up period setting */
+	if (pu >= 0) {
+		val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
+		mask |= MAX77620_FPS_PU_PERIOD_MASK;
+	}
+
+	/* FPS power down period setting */
+	if (pd >= 0) {
+		val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
+		mask |= MAX77620_FPS_PD_PERIOD_MASK;
+	}
+
+	if (mask) {
+		ret =  max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->fps_addr, mask, val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed, %d\n",
+				rinfo->fps_addr, ret);
+			return ret;
+		}
+	}
+	return ret;
+}
+
+static int max77620_regulator_set_power_mode(struct max77620_regulator *reg,
+	int power_mode, int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	int ret;
+	struct device *parent = reg->max77620_chip->dev;
+	u8 mask = rinfo->power_mode_mask;
+	u8 shift = rinfo->power_mode_shift;
+	u8 addr = rinfo->volt_addr;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+		addr = rinfo->cfg_addr;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			addr, mask, power_mode << shift);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator mode set failed. ret %d\n", ret);
+		return ret;
+	}
+	reg->current_power_mode[id] = power_mode;
+	return ret;
+}
+
+static int max77620_regulator_get_power_mode(struct max77620_regulator *reg,
+			int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	u8 mask = rinfo->power_mode_mask;
+	u8 shift = rinfo->power_mode_shift;
+	u8 addr = rinfo->volt_addr;
+	int ret;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+		addr = rinfo->cfg_addr;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE, addr, &val);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+			addr, ret);
+		return ret;
+	}
+
+	return (val & mask) >> shift;
+}
+
+static int max77620_regulator_enable(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 0;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 0;
+
+	ret = max77620_regulator_set_power_mode(reg, reg->enable_power_mode[id],
+					id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode config failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_regulator_disable(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 0;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 0;
+
+	ret =  max77620_regulator_set_power_mode(reg,
+			MAX77620_POWER_MODE_DISABLE, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode config failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret = 1;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 1;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 1;
+
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode read failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	if (ret != MAX77620_POWER_MODE_DISABLE)
+		return 1;
+
+	return 0;
+}
+
+static int max77620_regulator_set_mode(struct regulator_dev *rdev,
+				       unsigned int mode)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct device *parent = reg->max77620_chip->dev;
+	int power_mode;
+	int ret;
+	bool fpwm = false;
+
+	switch (mode) {
+	case REGULATOR_MODE_FAST:
+		fpwm = true;
+		power_mode = MAX77620_POWER_MODE_NORMAL;
+		break;
+
+	case REGULATOR_MODE_NORMAL:
+		power_mode = MAX77620_POWER_MODE_NORMAL;
+		break;
+
+	case REGULATOR_MODE_IDLE:
+	case REGULATOR_MODE_STANDBY:
+		if (rpdata->glpm_enable)
+			power_mode = MAX77620_POWER_MODE_GLPM;
+		else
+			power_mode = MAX77620_POWER_MODE_LPM;
+		break;
+
+	default:
+		dev_err(reg->dev, "The regulator id %d mode %d not supported\n",
+			id, mode);
+		return -EINVAL;
+	}
+
+	if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
+		goto skip_fpwm;
+
+	if (fpwm)
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_FPWM_MASK,
+				MAX77620_SD_FPWM_MASK);
+	else
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_FPWM_MASK, 0);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+				rinfo->cfg_addr, ret);
+		return ret;
+	}
+	rpdata->current_mode = mode;
+
+skip_fpwm:
+	ret =  max77620_regulator_set_power_mode(reg, power_mode, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Power mode of regualtor %d failed %d\n",
+				id, ret);
+		return ret;
+	}
+	reg->enable_power_mode[id] = power_mode;
+	return 0;
+}
+
+static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	struct device *parent = reg->max77620_chip->dev;
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	int fpwm = 0;
+	int ret;
+	int pm_mode, reg_mode;
+	u8 val;
+
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0)
+		return 0;
+	pm_mode = ret;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x read failed: %d\n",
+				rinfo->cfg_addr, ret);
+			return ret;
+		}
+		fpwm = !!(val & MAX77620_SD_FPWM_MASK);
+	}
+
+	switch (pm_mode) {
+	case MAX77620_POWER_MODE_NORMAL:
+	case MAX77620_POWER_MODE_DISABLE:
+		if (fpwm)
+			reg_mode = REGULATOR_MODE_FAST;
+		else
+			reg_mode = REGULATOR_MODE_NORMAL;
+		break;
+	case MAX77620_POWER_MODE_LPM:
+	case MAX77620_POWER_MODE_GLPM:
+		reg_mode = REGULATOR_MODE_IDLE;
+		break;
+	default:
+		return 0;
+	}
+	return reg_mode;
+}
+
+static int max77620_regulator_set_sleep_mode(struct regulator_dev *rdev,
+				       unsigned int mode)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+
+	rpdata->sleep_mode = mode;
+	return 0;
+}
+
+static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
+				       int ramp_delay)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	int ret, val;
+	int retval;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		if (ramp_delay <= 13750) {
+			val = 0;
+			retval = 13750;
+		} else if (ramp_delay <= 27500) {
+			val = 1;
+			retval = 27500;
+		} else if (ramp_delay <= 55000) {
+			val = 2;
+			retval = 55000;
+		} else {
+			val = 3;
+			retval = 100000;
+		}
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_SR_MASK,
+				val << MAX77620_SD_SR_SHIFT);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+	} else {
+		if (ramp_delay <= 5000) {
+			val = 1;
+			retval = 5000;
+		} else {
+			val = 0;
+			retval = 100000;
+		}
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_LDO_SLEW_RATE_MASK,
+				val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+	}
+	return retval;
+}
+
+static struct regulator_ops max77620_regulator_ops = {
+	.is_enabled = max77620_regulator_is_enabled,
+	.enable = max77620_regulator_enable,
+	.disable = max77620_regulator_disable,
+	.list_voltage = regulator_list_voltage_linear,
+	.map_voltage = regulator_map_voltage_linear,
+	.get_voltage_sel = regulator_get_voltage_sel_regmap,
+	.set_voltage_sel = regulator_set_voltage_sel_regmap,
+	.set_mode = max77620_regulator_set_mode,
+	.get_mode = max77620_regulator_get_mode,
+	.set_ramp_delay = max77620_regulator_set_ramp_delay,
+	.set_voltage_time_sel = regulator_set_voltage_time_sel,
+};
+
+#define MAX77620_SD_CNF2_ROVS_EN_NONE	0
+#define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV,	\
+		_step_uV, _rs_add, _rs_mask)				\
+	[MAX77620_REGULATOR_ID_##_id] = {			\
+		.type = MAX77620_REGULATOR_TYPE_SD,			\
+		.volt_mask =  MAX77620_##_volt_mask##_VOLT_MASK,	\
+		.volt_addr = MAX77620_REG_##_id,		\
+		.cfg_addr = MAX77620_REG_##_id##_CFG,		\
+		.fps_addr = MAX77620_REG_FPS_##_id,		\
+		.remote_sense_addr = _rs_add,			\
+		.remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
+		.min_uV = _min_uV,				\
+		.max_uV = _max_uV,				\
+		.step_uV = _step_uV,				\
+		.power_mode_mask = MAX77620_SD_POWER_MODE_MASK,		\
+		.power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT,	\
+		.desc = {					\
+			.name = max77620_rails(_name),		\
+			.supply_name = _sname,			\
+			.id = MAX77620_REGULATOR_ID_##_id,	\
+			.ops = &max77620_regulator_ops,		\
+			.n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
+			.min_uV = _min_uV,	\
+			.uV_step = _step_uV,	\
+			.enable_time = 500,	\
+			.vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK,	\
+			.vsel_reg = MAX77620_REG_##_id,	\
+			.type = REGULATOR_VOLTAGE,	\
+			.owner = THIS_MODULE,	\
+		},						\
+	}
+
+#define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
+	[MAX77620_REGULATOR_ID_##_id] = {			\
+		.type = MAX77620_REGULATOR_TYPE_LDO_##_type,		\
+		.volt_mask = MAX77620_LDO_VOLT_MASK,			\
+		.volt_addr = MAX77620_REG_##_id##_CFG,		\
+		.cfg_addr = MAX77620_REG_##_id##_CFG2,		\
+		.fps_addr = MAX77620_REG_FPS_##_id,		\
+		.remote_sense_addr = 0xFF,			\
+		.min_uV = _min_uV,				\
+		.max_uV = _max_uV,				\
+		.step_uV = _step_uV,				\
+		.power_mode_mask = MAX77620_LDO_POWER_MODE_MASK,	\
+		.power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT,	\
+		.desc = {					\
+			.name = max77620_rails(_name),		\
+			.supply_name = _sname,			\
+			.id = MAX77620_REGULATOR_ID_##_id,	\
+			.ops = &max77620_regulator_ops,		\
+			.n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
+			.min_uV = _min_uV,	\
+			.uV_step = _step_uV,	\
+			.enable_time = 500,	\
+			.vsel_mask = MAX77620_LDO_VOLT_MASK,	\
+			.vsel_reg = MAX77620_REG_##_id##_CFG, \
+			.type = REGULATOR_VOLTAGE,		\
+			.owner = THIS_MODULE,			\
+		},						\
+	}
+
+static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
+	RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
+	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
+	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+
+	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
+	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
+	RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
+};
+
+static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
+	RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
+	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
+	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+
+	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
+	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
+	RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
+};
+
+static struct of_regulator_match max77620_regulator_matches[] = {
+	{ .name = "sd0", },
+	{ .name = "sd1", },
+	{ .name = "sd2", },
+	{ .name = "sd3", },
+	{ .name = "sd4", },
+	{ .name = "ldo0", },
+	{ .name = "ldo1", },
+	{ .name = "ldo2", },
+	{ .name = "ldo3", },
+	{ .name = "ldo4", },
+	{ .name = "ldo5", },
+	{ .name = "ldo6", },
+	{ .name = "ldo7", },
+	{ .name = "ldo8", },
+};
+
+static int max77620_regulator_preinit(struct max77620_regulator *reg, int id)
+{
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	struct regulator_init_data *ridata = reg->reg_pdata[id].reg_idata;
+	struct regulator_desc *rdesc = &max77620_regs_info[id].desc;
+	int init_uv;
+	u8 val, mask;
+	int ret;
+
+	if (!ridata)
+		return 0;
+
+	/* Update power mode */
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0)
+		return ret;
+	reg->current_power_mode[id] = ret;
+	reg->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
+
+	if (rpdata->active_fps_src == FPS_SRC_DEF) {
+		ret = max77620_regulator_get_fps_src(reg, id);
+		if (ret < 0)
+			return ret;
+		rpdata->active_fps_src = ret;
+	}
+
+	/*
+	 * If rails are externally control of FPS control then enable it
+	 * always.
+	 */
+	if ((rpdata->active_fps_src != FPS_SRC_NONE) &&
+		(reg->current_power_mode[id] != reg->enable_power_mode[id])) {
+		ret = max77620_regulator_set_power_mode(reg,
+				reg->enable_power_mode[id], id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode config failed %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+
+	/* Enable rail before changing FPS to NONE to avoid glitch */
+	if (ridata && ridata->constraints.boot_on &&
+		(rpdata->active_fps_src == FPS_SRC_NONE)) {
+		init_uv = ridata->constraints.min_uV;
+		if (init_uv && (init_uv == ridata->constraints.max_uV)) {
+			val = (init_uv - rdesc->min_uV) / rdesc->uV_step;
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+					rdesc->vsel_reg, rdesc->vsel_mask, val);
+			if (ret < 0) {
+				dev_err(reg->dev,
+					"Reg 0x%02x update failed: %d\n",
+					rdesc->vsel_reg, ret);
+				return ret;
+			}
+		}
+
+		ret = max77620_regulator_set_power_mode(reg,
+				reg->enable_power_mode[id], id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode config failed %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+
+	ret = max77620_regulator_set_fps_src(reg, rpdata->active_fps_src, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "preinit: Failed to set FPSSRC to %d\n",
+			rpdata->active_fps_src);
+		return ret;
+	}
+
+	ret = max77620_regulator_set_fps_slots(reg, id, false);
+	if (ret < 0) {
+		dev_err(reg->dev, "preinit: Failed to set FPS Slots\n");
+		return ret;
+	}
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		int slew_rate;
+		u8 val_u8;
+
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val_u8);
+		if (ret < 0) {
+			dev_err(reg->dev, "Register 0x%02x read failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+
+		slew_rate = (val_u8 >> MAX77620_SD_SR_SHIFT) & 0x3;
+		switch (slew_rate) {
+		case 0:
+			slew_rate = 13750;
+			break;
+		case 1:
+			slew_rate = 27500;
+			break;
+		case 2:
+			slew_rate = 55000;
+			break;
+		case 3:
+			slew_rate = 100000;
+			break;
+		}
+		rinfo->desc.ramp_delay = slew_rate;
+
+		mask = MAX77620_SD_FSRADE_MASK;
+		val = 0;
+		if (rpdata->sd_fsrade_disable)
+			val |= MAX77620_SD_FSRADE_MASK;
+
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, mask, val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+				rinfo->cfg_addr, ret);
+			return ret;
+		}
+	} else {
+		int slew_rate;
+		u8 val_u8;
+
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val_u8);
+		if (ret < 0) {
+			dev_err(reg->dev, "Register 0x%02x read failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+		slew_rate = (val_u8) & 0x1;
+		switch (slew_rate) {
+		case 0:
+			slew_rate = 100000;
+			break;
+		case 1:
+			slew_rate = 5000;
+			break;
+		}
+		rinfo->desc.ramp_delay = slew_rate;
+	}
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0) {
+		ret = max77620_regulator_set_power_mode(reg,
+				MAX77620_POWER_MODE_NORMAL, id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode set failed: %d\n",
+				id, ret);
+			return ret;
+		}
+		ret = max77620_regulator_set_fps_src(reg, FPS_SRC_0, id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d fps src set failed: %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static int max77620_get_regulator_dt_data(struct platform_device *pdev,
+		struct max77620_regulator *max77620_regs)
+{
+	struct device_node *np;
+	u32 prop;
+	int id;
+	int ret;
+
+	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
+	if (!np) {
+		dev_err(&pdev->dev, "Device is not having regulators node\n");
+		return -ENODEV;
+	}
+	pdev->dev.of_node = np;
+
+	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
+			ARRAY_SIZE(max77620_regulator_matches));
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	for (id = 0; id < ARRAY_SIZE(max77620_regulator_matches); ++id) {
+		struct device_node *reg_node;
+		struct max77620_regulator_pdata *reg_pdata =
+					&max77620_regs->reg_pdata[id];
+
+		reg_node = max77620_regulator_matches[id].of_node;
+		reg_pdata->reg_idata = max77620_regulator_matches[id].init_data;
+
+		if (!reg_pdata->reg_idata)
+			continue;
+
+		reg_pdata->glpm_enable = of_property_read_bool(reg_node,
+					"maxim,enable-group-low-power");
+
+		reg_pdata->en2_ctrl_sd0 = of_property_read_bool(reg_node,
+					"maxim,enable-sd0-en2-control");
+
+		reg_pdata->sd_fsrade_disable = of_property_read_bool(reg_node,
+					"maxim,disable-active-discharge");
+
+		reg_pdata->disable_remote_sense_on_suspend =
+				of_property_read_bool(reg_node,
+				"maxim,disable-remote-sense-on-suspend");
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-source", &prop);
+		if (!ret)
+			reg_pdata->active_fps_src = prop;
+		else
+			reg_pdata->active_fps_src = FPS_SRC_DEF;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-power-up-slot", &prop);
+		if (!ret)
+			reg_pdata->active_fps_pu_slot = prop;
+		else
+			reg_pdata->active_fps_pu_slot = -1;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-power-down-slot", &prop);
+		if (!ret)
+			reg_pdata->active_fps_pd_slot = prop;
+		else
+			reg_pdata->active_fps_pd_slot = -1;
+
+		reg_pdata->suspend_fps_src = -1;
+		reg_pdata->suspend_fps_pu_slot = -1;
+		reg_pdata->suspend_fps_pd_slot = -1;
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-source", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_src = prop;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-power-up-slot", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_pu_slot = prop;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-power-down-slot", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_pd_slot = prop;
+	}
+	return 0;
+}
+
+static int max77620_regulator_probe(struct platform_device *pdev)
+{
+	struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
+	struct regulator_desc *rdesc;
+	struct max77620_regulator *pmic;
+	struct regulator_config config = { };
+	struct max77620_regulator_info *regulator_info;
+	int ret = 0;
+	int id;
+
+	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
+	if (!pmic)
+		return -ENOMEM;
+
+	max77620_get_regulator_dt_data(pdev, pmic);
+
+	platform_set_drvdata(pdev, pmic);
+	pmic->max77620_chip = max77620_chip;
+	pmic->dev = &pdev->dev;
+
+	if (max77620_chip->id == MAX77620)
+		regulator_info = max77620_regs_info;
+	else
+		regulator_info = max20024_regs_info;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+
+		if ((max77620_chip->id == MAX77620) &&
+			(id == MAX77620_REGULATOR_ID_SD4))
+			continue;
+
+		rdesc = &regulator_info[id].desc;
+		pmic->rinfo[id] = &max77620_regs_info[id];
+		pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
+
+		config.regmap = max77620_chip->rmap[MAX77620_PWR_SLAVE];
+		config.dev = &pdev->dev;
+		config.init_data = pmic->reg_pdata[id].reg_idata;
+		config.driver_data = pmic;
+		config.of_node = max77620_regulator_matches[id].of_node;
+
+		ret = max77620_regulator_preinit(pmic, id);
+		if (ret < 0) {
+			dev_err(&pdev->dev, "Preinit regualtor %s failed: %d\n",
+				rdesc->name, ret);
+			return ret;
+		}
+
+		pmic->rdev[id] = devm_regulator_register(&pdev->dev,
+						rdesc, &config);
+		if (IS_ERR(pmic->rdev[id])) {
+			ret = PTR_ERR(pmic->rdev[id]);
+			dev_err(&pdev->dev,
+				"regulator %s register failed: %d\n",
+				rdesc->name, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_regulator_suspend(struct device *dev)
+{
+	struct max77620_regulator *pmic = dev_get_drvdata(dev);
+	struct max77620_regulator_pdata *reg_pdata;
+	struct max77620_regulator_info *rinfo;
+	struct device *parent = pmic->dev->parent;
+	int id;
+	int ret;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+		reg_pdata = &pmic->reg_pdata[id];
+		rinfo = pmic->rinfo[id];
+		if (!reg_pdata || !rinfo)
+			continue;
+
+		if (reg_pdata->disable_remote_sense_on_suspend &&
+				(rinfo->remote_sense_addr != 0xFF)) {
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->remote_sense_addr,
+				rinfo->remote_sense_mask, 0);
+			if (ret < 0)
+				dev_err(dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->remote_sense_addr, ret);
+		}
+
+		if (reg_pdata->sleep_mode &&
+				(rinfo->type == MAX77620_REGULATOR_TYPE_SD)) {
+			reg_pdata->normal_mode = reg_pdata->current_mode;
+			ret = max77620_regulator_set_sleep_mode(pmic->rdev[id],
+						reg_pdata->sleep_mode);
+			if (ret < 0)
+				dev_err(dev,
+					"Regulator %d sleep mode failed: %d\n",
+					id, ret);
+		}
+
+		max77620_regulator_set_fps_slots(pmic, id, true);
+		if (reg_pdata->suspend_fps_src >= 0)
+			max77620_regulator_set_fps_src(pmic,
+				reg_pdata->suspend_fps_src, id);
+	}
+	return 0;
+}
+
+static int max77620_regulator_resume(struct device *dev)
+{
+	struct max77620_regulator *pmic = dev_get_drvdata(dev);
+	struct max77620_regulator_pdata *reg_pdata;
+	struct max77620_regulator_info *rinfo;
+	struct device *parent = pmic->dev->parent;
+	int id;
+	int ret;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+		reg_pdata = &pmic->reg_pdata[id];
+		rinfo = pmic->rinfo[id];
+		if (!reg_pdata || !rinfo)
+			continue;
+
+		if (reg_pdata->disable_remote_sense_on_suspend &&
+				(rinfo->remote_sense_addr != 0xFF)) {
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->remote_sense_addr,
+				rinfo->remote_sense_mask,
+				rinfo->remote_sense_mask);
+			if (ret < 0)
+				dev_err(dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->remote_sense_addr, ret);
+		}
+
+		if (reg_pdata->sleep_mode &&
+				(rinfo->type == MAX77620_REGULATOR_TYPE_SD)) {
+			ret = max77620_regulator_set_sleep_mode(pmic->rdev[id],
+						reg_pdata->normal_mode);
+			if (ret < 0)
+				dev_err(dev,
+					"Regulator %d normal mode failed: %d\n",
+					id, ret);
+		}
+
+		max77620_regulator_set_fps_slots(pmic, id, false);
+		if (reg_pdata->active_fps_src >= 0)
+			max77620_regulator_set_fps_src(pmic,
+				reg_pdata->active_fps_src, id);
+	}
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_regulator_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
+			max77620_regulator_resume)
+};
+
+static struct platform_device_id max77620_regulator_devtype[] = {
+	{
+		.name = "max77620-pmic",
+	},
+	{
+		.name = "max20024-pmic",
+	},
+};
+
+static struct platform_driver max77620_regulator_driver = {
+	.probe = max77620_regulator_probe,
+	.id_table = max77620_regulator_devtype,
+	.driver = {
+		.name = "max77620-pmic",
+		.owner = THIS_MODULE,
+		.pm = &max77620_regulator_pm_ops,
+	},
+};
+
+static int __init max77620_regulator_init(void)
+{
+	return platform_driver_register(&max77620_regulator_driver);
+}
+subsys_initcall(max77620_regulator_init);
+
+static void __exit max77620_reg_exit(void)
+{
+	platform_driver_unregister(&max77620_regulator_driver);
+}
+module_exit(max77620_reg_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
+MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-pmic");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4


^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
@ 2016-01-07 14:38   ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-07 14:38 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Laxman Dewangan, Mallikarjun Kasoju

MAXIM Semiconductor's PMIC, MAX77620 and MAX20024 have the
multiple DCDC and LDOs. This supplies the power to different
components of the system.
Also these rails has configuration for ramp time, flexible
power sequence, slew rate etc.

Add regulator driver to access these rails via regulator APIs.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
---
 drivers/regulator/Kconfig              |    9 +
 drivers/regulator/Makefile             |    1 +
 drivers/regulator/max77620-regulator.c | 1062 ++++++++++++++++++++++++++++++++
 3 files changed, 1072 insertions(+)
 create mode 100644 drivers/regulator/max77620-regulator.c

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 8155e80..b92214b 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -343,6 +343,15 @@ config REGULATOR_MAX1586
 	  regulator via I2C bus. The provided regulator is suitable
 	  for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
 
+config REGULATOR_MAX77620
+	tristate "Maxim 77620/MAX20024 voltage regulator"
+	depends on MFD_MAX77620
+	help
+	  This driver controls Maxim MAX77620 voltage output regulator
+	  via I2C bus. The provided regulator is suitable for Tegra
+	  chip to control Step-Down DC-DC and LDOs. Say Y here to
+	  enable the regulator driver.
+
 config REGULATOR_MAX8649
 	tristate "Maxim 8649 voltage regulator"
 	depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 980b194..2564c00 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_REGULATOR_LP8755) += lp8755.o
 obj-$(CONFIG_REGULATOR_LTC3589) += ltc3589.o
 obj-$(CONFIG_REGULATOR_MAX14577) += max14577.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
+obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o
 obj-$(CONFIG_REGULATOR_MAX8649)	+= max8649.o
 obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
 obj-$(CONFIG_REGULATOR_MAX8907) += max8907-regulator.o
diff --git a/drivers/regulator/max77620-regulator.c b/drivers/regulator/max77620-regulator.c
new file mode 100644
index 0000000..c1b18b9
--- /dev/null
+++ b/drivers/regulator/max77620-regulator.c
@@ -0,0 +1,1062 @@
+/*
+ * Maxim MAX77620 Regulator driver
+ *
+ * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author: Mallikarjun Kasoju <mkasoju@nvidia.com>
+ *	Laxman Dewangan <ldewangan@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/max77620.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/of.h>
+#include <linux/regulator/of_regulator.h>
+
+#define max77620_rails(_name)	"max77620-"#_name
+
+/* Power Mode */
+#define MAX77620_POWER_MODE_NORMAL		3
+#define MAX77620_POWER_MODE_LPM			2
+#define MAX77620_POWER_MODE_GLPM		1
+#define MAX77620_POWER_MODE_DISABLE		0
+
+/* SD Slew Rate */
+#define MAX77620_SD_SR_13_75			0
+#define MAX77620_SD_SR_27_5			1
+#define MAX77620_SD_SR_55			2
+#define MAX77620_SD_SR_100			3
+
+#define MAX77620_FPS_SRC_NUM			3
+
+struct max77620_regulator_info {
+	u8 type;
+	u32 min_uV;
+	u32 max_uV;
+	u32 step_uV;
+	u8 fps_addr;
+	u8 volt_addr;
+	u8 cfg_addr;
+	u8 volt_mask;
+	u8 power_mode_mask;
+	u8 power_mode_shift;
+	u8 remote_sense_addr;
+	u8 remote_sense_mask;
+	struct regulator_desc desc;
+};
+
+struct max77620_regulator_pdata {
+	bool glpm_enable;
+	bool en2_ctrl_sd0;
+	bool sd_fsrade_disable;
+	bool disable_remote_sense_on_suspend;
+	struct regulator_init_data *reg_idata;
+	int active_fps_src;
+	int active_fps_pd_slot;
+	int active_fps_pu_slot;
+	int suspend_fps_src;
+	int suspend_fps_pd_slot;
+	int suspend_fps_pu_slot;
+	int sleep_mode;
+	int current_mode;
+	int normal_mode;
+};
+
+struct max77620_regulator {
+	struct device *dev;
+	struct max77620_chip *max77620_chip;
+	struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
+	struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
+	struct regulator_dev *rdev[MAX77620_NUM_REGS];
+	int enable_power_mode[MAX77620_NUM_REGS];
+	int current_power_mode[MAX77620_NUM_REGS];
+	int active_fps_src[MAX77620_NUM_REGS];
+};
+
+#define fps_src_name(fps_src)	\
+	(fps_src == FPS_SRC_0 ? "FPS_SRC_0" :	\
+	fps_src == FPS_SRC_1 ? "FPS_SRC_1" :	\
+	fps_src == FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
+
+static int  max77620_regulator_get_fps_src(struct max77620_regulator *reg,
+		 int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	int ret;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+			  rinfo->fps_addr, &val);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+				   rinfo->fps_addr, ret);
+		return ret;
+	}
+	ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+	return ret;
+}
+
+static int max77620_regulator_set_fps_src(struct max77620_regulator *reg,
+		       int fps_src, int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	int ret;
+
+	switch (fps_src) {
+	case FPS_SRC_0:
+	case FPS_SRC_1:
+	case FPS_SRC_2:
+	case FPS_SRC_NONE:
+		break;
+
+	case FPS_SRC_DEF:
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+			rinfo->fps_addr, &val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+				rinfo->fps_addr, ret);
+			return ret;
+		}
+		ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
+		reg->active_fps_src[id] = ret;
+		return 0;
+
+	default:
+		dev_err(reg->dev, "Invalid FPS %d for regulator %d\n",
+			fps_src, id);
+		return -EINVAL;
+	}
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			rinfo->fps_addr, MAX77620_FPS_SRC_MASK,
+			fps_src << MAX77620_FPS_SRC_SHIFT);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x update failed %d\n",
+			rinfo->fps_addr, ret);
+		return ret;
+	}
+	reg->active_fps_src[id] = fps_src;
+	return 0;
+}
+
+static int max77620_regulator_set_fps_slots(struct max77620_regulator *reg,
+			int id, bool is_suspend)
+{
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	unsigned int val = 0;
+	unsigned int mask = 0;
+	int pu = rpdata->active_fps_pu_slot;
+	int pd = rpdata->active_fps_pd_slot;
+	int ret = 0;
+
+	if (is_suspend) {
+		pu = rpdata->suspend_fps_pu_slot;
+		pd = rpdata->suspend_fps_pd_slot;
+	}
+
+	/* FPS power up period setting */
+	if (pu >= 0) {
+		val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
+		mask |= MAX77620_FPS_PU_PERIOD_MASK;
+	}
+
+	/* FPS power down period setting */
+	if (pd >= 0) {
+		val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
+		mask |= MAX77620_FPS_PD_PERIOD_MASK;
+	}
+
+	if (mask) {
+		ret =  max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->fps_addr, mask, val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed, %d\n",
+				rinfo->fps_addr, ret);
+			return ret;
+		}
+	}
+	return ret;
+}
+
+static int max77620_regulator_set_power_mode(struct max77620_regulator *reg,
+	int power_mode, int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	int ret;
+	struct device *parent = reg->max77620_chip->dev;
+	u8 mask = rinfo->power_mode_mask;
+	u8 shift = rinfo->power_mode_shift;
+	u8 addr = rinfo->volt_addr;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+		addr = rinfo->cfg_addr;
+
+	ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+			addr, mask, power_mode << shift);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator mode set failed. ret %d\n", ret);
+		return ret;
+	}
+	reg->current_power_mode[id] = power_mode;
+	return ret;
+}
+
+static int max77620_regulator_get_power_mode(struct max77620_regulator *reg,
+			int id)
+{
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	u8 val;
+	u8 mask = rinfo->power_mode_mask;
+	u8 shift = rinfo->power_mode_shift;
+	u8 addr = rinfo->volt_addr;
+	int ret;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
+		addr = rinfo->cfg_addr;
+
+	ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE, addr, &val);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x read failed %d\n",
+			addr, ret);
+		return ret;
+	}
+
+	return (val & mask) >> shift;
+}
+
+static int max77620_regulator_enable(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 0;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 0;
+
+	ret = max77620_regulator_set_power_mode(reg, reg->enable_power_mode[id],
+					id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode config failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_regulator_disable(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 0;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 0;
+
+	ret =  max77620_regulator_set_power_mode(reg,
+			MAX77620_POWER_MODE_DISABLE, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode config failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	int ret = 1;
+
+	if (reg->active_fps_src[id] != FPS_SRC_NONE)
+		return 1;
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0)
+		return 1;
+
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Regulator %d power mode read failed: %d\n",
+				id, ret);
+		return ret;
+	}
+	if (ret != MAX77620_POWER_MODE_DISABLE)
+		return 1;
+
+	return 0;
+}
+
+static int max77620_regulator_set_mode(struct regulator_dev *rdev,
+				       unsigned int mode)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct device *parent = reg->max77620_chip->dev;
+	int power_mode;
+	int ret;
+	bool fpwm = false;
+
+	switch (mode) {
+	case REGULATOR_MODE_FAST:
+		fpwm = true;
+		power_mode = MAX77620_POWER_MODE_NORMAL;
+		break;
+
+	case REGULATOR_MODE_NORMAL:
+		power_mode = MAX77620_POWER_MODE_NORMAL;
+		break;
+
+	case REGULATOR_MODE_IDLE:
+	case REGULATOR_MODE_STANDBY:
+		if (rpdata->glpm_enable)
+			power_mode = MAX77620_POWER_MODE_GLPM;
+		else
+			power_mode = MAX77620_POWER_MODE_LPM;
+		break;
+
+	default:
+		dev_err(reg->dev, "The regulator id %d mode %d not supported\n",
+			id, mode);
+		return -EINVAL;
+	}
+
+	if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
+		goto skip_fpwm;
+
+	if (fpwm)
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_FPWM_MASK,
+				MAX77620_SD_FPWM_MASK);
+	else
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_FPWM_MASK, 0);
+	if (ret < 0) {
+		dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+				rinfo->cfg_addr, ret);
+		return ret;
+	}
+	rpdata->current_mode = mode;
+
+skip_fpwm:
+	ret =  max77620_regulator_set_power_mode(reg, power_mode, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "Power mode of regualtor %d failed %d\n",
+				id, ret);
+		return ret;
+	}
+	reg->enable_power_mode[id] = power_mode;
+	return 0;
+}
+
+static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	struct device *parent = reg->max77620_chip->dev;
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	int fpwm = 0;
+	int ret;
+	int pm_mode, reg_mode;
+	u8 val;
+
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0)
+		return 0;
+	pm_mode = ret;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x read failed: %d\n",
+				rinfo->cfg_addr, ret);
+			return ret;
+		}
+		fpwm = !!(val & MAX77620_SD_FPWM_MASK);
+	}
+
+	switch (pm_mode) {
+	case MAX77620_POWER_MODE_NORMAL:
+	case MAX77620_POWER_MODE_DISABLE:
+		if (fpwm)
+			reg_mode = REGULATOR_MODE_FAST;
+		else
+			reg_mode = REGULATOR_MODE_NORMAL;
+		break;
+	case MAX77620_POWER_MODE_LPM:
+	case MAX77620_POWER_MODE_GLPM:
+		reg_mode = REGULATOR_MODE_IDLE;
+		break;
+	default:
+		return 0;
+	}
+	return reg_mode;
+}
+
+static int max77620_regulator_set_sleep_mode(struct regulator_dev *rdev,
+				       unsigned int mode)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+
+	rpdata->sleep_mode = mode;
+	return 0;
+}
+
+static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
+				       int ramp_delay)
+{
+	struct max77620_regulator *reg = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	int ret, val;
+	int retval;
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		if (ramp_delay <= 13750) {
+			val = 0;
+			retval = 13750;
+		} else if (ramp_delay <= 27500) {
+			val = 1;
+			retval = 27500;
+		} else if (ramp_delay <= 55000) {
+			val = 2;
+			retval = 55000;
+		} else {
+			val = 3;
+			retval = 100000;
+		}
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_SD_SR_MASK,
+				val << MAX77620_SD_SR_SHIFT);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+	} else {
+		if (ramp_delay <= 5000) {
+			val = 1;
+			retval = 5000;
+		} else {
+			val = 0;
+			retval = 100000;
+		}
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, MAX77620_LDO_SLEW_RATE_MASK,
+				val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+	}
+	return retval;
+}
+
+static struct regulator_ops max77620_regulator_ops = {
+	.is_enabled = max77620_regulator_is_enabled,
+	.enable = max77620_regulator_enable,
+	.disable = max77620_regulator_disable,
+	.list_voltage = regulator_list_voltage_linear,
+	.map_voltage = regulator_map_voltage_linear,
+	.get_voltage_sel = regulator_get_voltage_sel_regmap,
+	.set_voltage_sel = regulator_set_voltage_sel_regmap,
+	.set_mode = max77620_regulator_set_mode,
+	.get_mode = max77620_regulator_get_mode,
+	.set_ramp_delay = max77620_regulator_set_ramp_delay,
+	.set_voltage_time_sel = regulator_set_voltage_time_sel,
+};
+
+#define MAX77620_SD_CNF2_ROVS_EN_NONE	0
+#define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV,	\
+		_step_uV, _rs_add, _rs_mask)				\
+	[MAX77620_REGULATOR_ID_##_id] = {			\
+		.type = MAX77620_REGULATOR_TYPE_SD,			\
+		.volt_mask =  MAX77620_##_volt_mask##_VOLT_MASK,	\
+		.volt_addr = MAX77620_REG_##_id,		\
+		.cfg_addr = MAX77620_REG_##_id##_CFG,		\
+		.fps_addr = MAX77620_REG_FPS_##_id,		\
+		.remote_sense_addr = _rs_add,			\
+		.remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
+		.min_uV = _min_uV,				\
+		.max_uV = _max_uV,				\
+		.step_uV = _step_uV,				\
+		.power_mode_mask = MAX77620_SD_POWER_MODE_MASK,		\
+		.power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT,	\
+		.desc = {					\
+			.name = max77620_rails(_name),		\
+			.supply_name = _sname,			\
+			.id = MAX77620_REGULATOR_ID_##_id,	\
+			.ops = &max77620_regulator_ops,		\
+			.n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
+			.min_uV = _min_uV,	\
+			.uV_step = _step_uV,	\
+			.enable_time = 500,	\
+			.vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK,	\
+			.vsel_reg = MAX77620_REG_##_id,	\
+			.type = REGULATOR_VOLTAGE,	\
+			.owner = THIS_MODULE,	\
+		},						\
+	}
+
+#define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
+	[MAX77620_REGULATOR_ID_##_id] = {			\
+		.type = MAX77620_REGULATOR_TYPE_LDO_##_type,		\
+		.volt_mask = MAX77620_LDO_VOLT_MASK,			\
+		.volt_addr = MAX77620_REG_##_id##_CFG,		\
+		.cfg_addr = MAX77620_REG_##_id##_CFG2,		\
+		.fps_addr = MAX77620_REG_FPS_##_id,		\
+		.remote_sense_addr = 0xFF,			\
+		.min_uV = _min_uV,				\
+		.max_uV = _max_uV,				\
+		.step_uV = _step_uV,				\
+		.power_mode_mask = MAX77620_LDO_POWER_MODE_MASK,	\
+		.power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT,	\
+		.desc = {					\
+			.name = max77620_rails(_name),		\
+			.supply_name = _sname,			\
+			.id = MAX77620_REGULATOR_ID_##_id,	\
+			.ops = &max77620_regulator_ops,		\
+			.n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
+			.min_uV = _min_uV,	\
+			.uV_step = _step_uV,	\
+			.enable_time = 500,	\
+			.vsel_mask = MAX77620_LDO_VOLT_MASK,	\
+			.vsel_reg = MAX77620_REG_##_id##_CFG, \
+			.type = REGULATOR_VOLTAGE,		\
+			.owner = THIS_MODULE,			\
+		},						\
+	}
+
+static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
+	RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
+	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
+	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+
+	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
+	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
+	RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
+};
+
+static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
+	RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
+	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
+	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+	RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
+
+	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
+	RAIL_LDO(LDO2, ldo2, "in-ldo2",   P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
+	RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
+	RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
+	RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
+};
+
+static struct of_regulator_match max77620_regulator_matches[] = {
+	{ .name = "sd0", },
+	{ .name = "sd1", },
+	{ .name = "sd2", },
+	{ .name = "sd3", },
+	{ .name = "sd4", },
+	{ .name = "ldo0", },
+	{ .name = "ldo1", },
+	{ .name = "ldo2", },
+	{ .name = "ldo3", },
+	{ .name = "ldo4", },
+	{ .name = "ldo5", },
+	{ .name = "ldo6", },
+	{ .name = "ldo7", },
+	{ .name = "ldo8", },
+};
+
+static int max77620_regulator_preinit(struct max77620_regulator *reg, int id)
+{
+	struct max77620_regulator_pdata *rpdata = &reg->reg_pdata[id];
+	struct max77620_regulator_info *rinfo = reg->rinfo[id];
+	struct device *parent = reg->max77620_chip->dev;
+	struct regulator_init_data *ridata = reg->reg_pdata[id].reg_idata;
+	struct regulator_desc *rdesc = &max77620_regs_info[id].desc;
+	int init_uv;
+	u8 val, mask;
+	int ret;
+
+	if (!ridata)
+		return 0;
+
+	/* Update power mode */
+	ret = max77620_regulator_get_power_mode(reg, id);
+	if (ret < 0)
+		return ret;
+	reg->current_power_mode[id] = ret;
+	reg->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
+
+	if (rpdata->active_fps_src == FPS_SRC_DEF) {
+		ret = max77620_regulator_get_fps_src(reg, id);
+		if (ret < 0)
+			return ret;
+		rpdata->active_fps_src = ret;
+	}
+
+	/*
+	 * If rails are externally control of FPS control then enable it
+	 * always.
+	 */
+	if ((rpdata->active_fps_src != FPS_SRC_NONE) &&
+		(reg->current_power_mode[id] != reg->enable_power_mode[id])) {
+		ret = max77620_regulator_set_power_mode(reg,
+				reg->enable_power_mode[id], id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode config failed %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+
+	/* Enable rail before changing FPS to NONE to avoid glitch */
+	if (ridata && ridata->constraints.boot_on &&
+		(rpdata->active_fps_src == FPS_SRC_NONE)) {
+		init_uv = ridata->constraints.min_uV;
+		if (init_uv && (init_uv == ridata->constraints.max_uV)) {
+			val = (init_uv - rdesc->min_uV) / rdesc->uV_step;
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+					rdesc->vsel_reg, rdesc->vsel_mask, val);
+			if (ret < 0) {
+				dev_err(reg->dev,
+					"Reg 0x%02x update failed: %d\n",
+					rdesc->vsel_reg, ret);
+				return ret;
+			}
+		}
+
+		ret = max77620_regulator_set_power_mode(reg,
+				reg->enable_power_mode[id], id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode config failed %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+
+	ret = max77620_regulator_set_fps_src(reg, rpdata->active_fps_src, id);
+	if (ret < 0) {
+		dev_err(reg->dev, "preinit: Failed to set FPSSRC to %d\n",
+			rpdata->active_fps_src);
+		return ret;
+	}
+
+	ret = max77620_regulator_set_fps_slots(reg, id, false);
+	if (ret < 0) {
+		dev_err(reg->dev, "preinit: Failed to set FPS Slots\n");
+		return ret;
+	}
+
+	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
+		int slew_rate;
+		u8 val_u8;
+
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val_u8);
+		if (ret < 0) {
+			dev_err(reg->dev, "Register 0x%02x read failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+
+		slew_rate = (val_u8 >> MAX77620_SD_SR_SHIFT) & 0x3;
+		switch (slew_rate) {
+		case 0:
+			slew_rate = 13750;
+			break;
+		case 1:
+			slew_rate = 27500;
+			break;
+		case 2:
+			slew_rate = 55000;
+			break;
+		case 3:
+			slew_rate = 100000;
+			break;
+		}
+		rinfo->desc.ramp_delay = slew_rate;
+
+		mask = MAX77620_SD_FSRADE_MASK;
+		val = 0;
+		if (rpdata->sd_fsrade_disable)
+			val |= MAX77620_SD_FSRADE_MASK;
+
+		ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, mask, val);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg 0x%02x update failed: %d\n",
+				rinfo->cfg_addr, ret);
+			return ret;
+		}
+	} else {
+		int slew_rate;
+		u8 val_u8;
+
+		ret = max77620_reg_read(parent, MAX77620_PWR_SLAVE,
+				rinfo->cfg_addr, &val_u8);
+		if (ret < 0) {
+			dev_err(reg->dev, "Register 0x%02x read failed: %d\n",
+					rinfo->cfg_addr, ret);
+			return ret;
+		}
+		slew_rate = (val_u8) & 0x1;
+		switch (slew_rate) {
+		case 0:
+			slew_rate = 100000;
+			break;
+		case 1:
+			slew_rate = 5000;
+			break;
+		}
+		rinfo->desc.ramp_delay = slew_rate;
+	}
+
+	if ((id == MAX77620_REGULATOR_ID_SD0) && rpdata->en2_ctrl_sd0) {
+		ret = max77620_regulator_set_power_mode(reg,
+				MAX77620_POWER_MODE_NORMAL, id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d pm mode set failed: %d\n",
+				id, ret);
+			return ret;
+		}
+		ret = max77620_regulator_set_fps_src(reg, FPS_SRC_0, id);
+		if (ret < 0) {
+			dev_err(reg->dev, "Reg %d fps src set failed: %d\n",
+				id, ret);
+			return ret;
+		}
+	}
+	return 0;
+}
+
+static int max77620_get_regulator_dt_data(struct platform_device *pdev,
+		struct max77620_regulator *max77620_regs)
+{
+	struct device_node *np;
+	u32 prop;
+	int id;
+	int ret;
+
+	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
+	if (!np) {
+		dev_err(&pdev->dev, "Device is not having regulators node\n");
+		return -ENODEV;
+	}
+	pdev->dev.of_node = np;
+
+	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
+			ARRAY_SIZE(max77620_regulator_matches));
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
+			ret);
+		return ret;
+	}
+
+	for (id = 0; id < ARRAY_SIZE(max77620_regulator_matches); ++id) {
+		struct device_node *reg_node;
+		struct max77620_regulator_pdata *reg_pdata =
+					&max77620_regs->reg_pdata[id];
+
+		reg_node = max77620_regulator_matches[id].of_node;
+		reg_pdata->reg_idata = max77620_regulator_matches[id].init_data;
+
+		if (!reg_pdata->reg_idata)
+			continue;
+
+		reg_pdata->glpm_enable = of_property_read_bool(reg_node,
+					"maxim,enable-group-low-power");
+
+		reg_pdata->en2_ctrl_sd0 = of_property_read_bool(reg_node,
+					"maxim,enable-sd0-en2-control");
+
+		reg_pdata->sd_fsrade_disable = of_property_read_bool(reg_node,
+					"maxim,disable-active-discharge");
+
+		reg_pdata->disable_remote_sense_on_suspend =
+				of_property_read_bool(reg_node,
+				"maxim,disable-remote-sense-on-suspend");
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-source", &prop);
+		if (!ret)
+			reg_pdata->active_fps_src = prop;
+		else
+			reg_pdata->active_fps_src = FPS_SRC_DEF;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-power-up-slot", &prop);
+		if (!ret)
+			reg_pdata->active_fps_pu_slot = prop;
+		else
+			reg_pdata->active_fps_pu_slot = -1;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,active-fps-power-down-slot", &prop);
+		if (!ret)
+			reg_pdata->active_fps_pd_slot = prop;
+		else
+			reg_pdata->active_fps_pd_slot = -1;
+
+		reg_pdata->suspend_fps_src = -1;
+		reg_pdata->suspend_fps_pu_slot = -1;
+		reg_pdata->suspend_fps_pd_slot = -1;
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-source", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_src = prop;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-power-up-slot", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_pu_slot = prop;
+
+		ret = of_property_read_u32(reg_node,
+				"maxim,suspend-fps-power-down-slot", &prop);
+		if (!ret)
+			reg_pdata->suspend_fps_pd_slot = prop;
+	}
+	return 0;
+}
+
+static int max77620_regulator_probe(struct platform_device *pdev)
+{
+	struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
+	struct regulator_desc *rdesc;
+	struct max77620_regulator *pmic;
+	struct regulator_config config = { };
+	struct max77620_regulator_info *regulator_info;
+	int ret = 0;
+	int id;
+
+	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
+	if (!pmic)
+		return -ENOMEM;
+
+	max77620_get_regulator_dt_data(pdev, pmic);
+
+	platform_set_drvdata(pdev, pmic);
+	pmic->max77620_chip = max77620_chip;
+	pmic->dev = &pdev->dev;
+
+	if (max77620_chip->id == MAX77620)
+		regulator_info = max77620_regs_info;
+	else
+		regulator_info = max20024_regs_info;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+
+		if ((max77620_chip->id == MAX77620) &&
+			(id == MAX77620_REGULATOR_ID_SD4))
+			continue;
+
+		rdesc = &regulator_info[id].desc;
+		pmic->rinfo[id] = &max77620_regs_info[id];
+		pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
+
+		config.regmap = max77620_chip->rmap[MAX77620_PWR_SLAVE];
+		config.dev = &pdev->dev;
+		config.init_data = pmic->reg_pdata[id].reg_idata;
+		config.driver_data = pmic;
+		config.of_node = max77620_regulator_matches[id].of_node;
+
+		ret = max77620_regulator_preinit(pmic, id);
+		if (ret < 0) {
+			dev_err(&pdev->dev, "Preinit regualtor %s failed: %d\n",
+				rdesc->name, ret);
+			return ret;
+		}
+
+		pmic->rdev[id] = devm_regulator_register(&pdev->dev,
+						rdesc, &config);
+		if (IS_ERR(pmic->rdev[id])) {
+			ret = PTR_ERR(pmic->rdev[id]);
+			dev_err(&pdev->dev,
+				"regulator %s register failed: %d\n",
+				rdesc->name, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int max77620_regulator_suspend(struct device *dev)
+{
+	struct max77620_regulator *pmic = dev_get_drvdata(dev);
+	struct max77620_regulator_pdata *reg_pdata;
+	struct max77620_regulator_info *rinfo;
+	struct device *parent = pmic->dev->parent;
+	int id;
+	int ret;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+		reg_pdata = &pmic->reg_pdata[id];
+		rinfo = pmic->rinfo[id];
+		if (!reg_pdata || !rinfo)
+			continue;
+
+		if (reg_pdata->disable_remote_sense_on_suspend &&
+				(rinfo->remote_sense_addr != 0xFF)) {
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->remote_sense_addr,
+				rinfo->remote_sense_mask, 0);
+			if (ret < 0)
+				dev_err(dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->remote_sense_addr, ret);
+		}
+
+		if (reg_pdata->sleep_mode &&
+				(rinfo->type == MAX77620_REGULATOR_TYPE_SD)) {
+			reg_pdata->normal_mode = reg_pdata->current_mode;
+			ret = max77620_regulator_set_sleep_mode(pmic->rdev[id],
+						reg_pdata->sleep_mode);
+			if (ret < 0)
+				dev_err(dev,
+					"Regulator %d sleep mode failed: %d\n",
+					id, ret);
+		}
+
+		max77620_regulator_set_fps_slots(pmic, id, true);
+		if (reg_pdata->suspend_fps_src >= 0)
+			max77620_regulator_set_fps_src(pmic,
+				reg_pdata->suspend_fps_src, id);
+	}
+	return 0;
+}
+
+static int max77620_regulator_resume(struct device *dev)
+{
+	struct max77620_regulator *pmic = dev_get_drvdata(dev);
+	struct max77620_regulator_pdata *reg_pdata;
+	struct max77620_regulator_info *rinfo;
+	struct device *parent = pmic->dev->parent;
+	int id;
+	int ret;
+
+	for (id = 0; id < MAX77620_NUM_REGS; ++id) {
+		reg_pdata = &pmic->reg_pdata[id];
+		rinfo = pmic->rinfo[id];
+		if (!reg_pdata || !rinfo)
+			continue;
+
+		if (reg_pdata->disable_remote_sense_on_suspend &&
+				(rinfo->remote_sense_addr != 0xFF)) {
+			ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
+				rinfo->remote_sense_addr,
+				rinfo->remote_sense_mask,
+				rinfo->remote_sense_mask);
+			if (ret < 0)
+				dev_err(dev, "Reg 0x%02x update failed: %d\n",
+					rinfo->remote_sense_addr, ret);
+		}
+
+		if (reg_pdata->sleep_mode &&
+				(rinfo->type == MAX77620_REGULATOR_TYPE_SD)) {
+			ret = max77620_regulator_set_sleep_mode(pmic->rdev[id],
+						reg_pdata->normal_mode);
+			if (ret < 0)
+				dev_err(dev,
+					"Regulator %d normal mode failed: %d\n",
+					id, ret);
+		}
+
+		max77620_regulator_set_fps_slots(pmic, id, false);
+		if (reg_pdata->active_fps_src >= 0)
+			max77620_regulator_set_fps_src(pmic,
+				reg_pdata->active_fps_src, id);
+	}
+	return 0;
+}
+#endif
+
+static const struct dev_pm_ops max77620_regulator_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
+			max77620_regulator_resume)
+};
+
+static struct platform_device_id max77620_regulator_devtype[] = {
+	{
+		.name = "max77620-pmic",
+	},
+	{
+		.name = "max20024-pmic",
+	},
+};
+
+static struct platform_driver max77620_regulator_driver = {
+	.probe = max77620_regulator_probe,
+	.id_table = max77620_regulator_devtype,
+	.driver = {
+		.name = "max77620-pmic",
+		.owner = THIS_MODULE,
+		.pm = &max77620_regulator_pm_ops,
+	},
+};
+
+static int __init max77620_regulator_init(void)
+{
+	return platform_driver_register(&max77620_regulator_driver);
+}
+subsys_initcall(max77620_regulator_init);
+
+static void __exit max77620_reg_exit(void)
+{
+	platform_driver_unregister(&max77620_regulator_driver);
+}
+module_exit(max77620_reg_exit);
+
+MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
+MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_ALIAS("platform:max77620-pmic");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

-- 
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Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply related	[flat|nested] 103+ messages in thread

* [PATCH] mfd: max77620: fix platform_no_drv_owner.cocci warnings
  2016-01-07 14:38   ` Laxman Dewangan
  (?)
@ 2016-01-07 15:56     ` kbuild test robot
  -1 siblings, 0 replies; 103+ messages in thread
From: kbuild test robot @ 2016-01-07 15:56 UTC (permalink / raw)
  Cc: kbuild-all, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Laxman Dewangan,
	Chaitanya Bandi, Mallikarjun Kasoju

drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

CC: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---

 max77620.c |    1 -
 1 file changed, 1 deletion(-)

--- a/drivers/mfd/max77620.c
+++ b/drivers/mfd/max77620.c
@@ -897,7 +897,6 @@ static const struct dev_pm_ops max77620_
 static struct i2c_driver max77620_driver = {
 	.driver = {
 		.name = "max77620",
-		.owner = THIS_MODULE,
 		.pm = &max77620_pm_ops,
 		.of_match_table = max77620_of_match,
 	},

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-07 14:38   ` Laxman Dewangan
  (?)
@ 2016-01-07 15:56     ` kbuild test robot
  -1 siblings, 0 replies; 103+ messages in thread
From: kbuild test robot @ 2016-01-07 15:56 UTC (permalink / raw)
  Cc: kbuild-all, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Laxman Dewangan,
	Chaitanya Bandi, Mallikarjun Kasoju

Hi Laxman,

[auto build test WARNING on pinctrl/for-next]
[also build test WARNING on v4.4-rc8 next-20160107]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Laxman-Dewangan/Add-support-for-MAXIM-MAX77620-MAX20024-PMIC/20160107-225450
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next


coccinelle warnings: (new ones prefixed by >>)

>> drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

Please review and possibly fold the followup patch.

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [PATCH] mfd: max77620: fix platform_no_drv_owner.cocci warnings
@ 2016-01-07 15:56     ` kbuild test robot
  0 siblings, 0 replies; 103+ messages in thread
From: kbuild test robot @ 2016-01-07 15:56 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: kbuild-all, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Laxman Dewangan,
	Chaitanya Bandi, Mallikarjun Kasoju

drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

CC: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---

 max77620.c |    1 -
 1 file changed, 1 deletion(-)

--- a/drivers/mfd/max77620.c
+++ b/drivers/mfd/max77620.c
@@ -897,7 +897,6 @@ static const struct dev_pm_ops max77620_
 static struct i2c_driver max77620_driver = {
 	.driver = {
 		.name = "max77620",
-		.owner = THIS_MODULE,
 		.pm = &max77620_pm_ops,
 		.of_match_table = max77620_of_match,
 	},

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-07 15:56     ` kbuild test robot
  0 siblings, 0 replies; 103+ messages in thread
From: kbuild test robot @ 2016-01-07 15:56 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: kbuild-all, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Laxman Dewangan,
	Chaitanya Bandi, Mallikarjun Kasoju

Hi Laxman,

[auto build test WARNING on pinctrl/for-next]
[also build test WARNING on v4.4-rc8 next-20160107]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Laxman-Dewangan/Add-support-for-MAXIM-MAX77620-MAX20024-PMIC/20160107-225450
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next


coccinelle warnings: (new ones prefixed by >>)

>> drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

Please review and possibly fold the followup patch.

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-07 15:56     ` kbuild test robot
  0 siblings, 0 replies; 103+ messages in thread
From: kbuild test robot @ 2016-01-07 15:56 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: kbuild-all, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Laxman Dewangan,
	Chaitanya Bandi, Mallikarjun Kasoju

Hi Laxman,

[auto build test WARNING on pinctrl/for-next]
[also build test WARNING on v4.4-rc8 next-20160107]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Laxman-Dewangan/Add-support-for-MAXIM-MAX77620-MAX20024-PMIC/20160107-225450
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next


coccinelle warnings: (new ones prefixed by >>)

>> drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

Please review and possibly fold the followup patch.

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
You received this message because you are subscribed to the Google Groups "rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] [PATCH] mfd: max77620: fix platform_no_drv_owner.cocci warnings
@ 2016-01-07 15:56     ` kbuild test robot
  0 siblings, 0 replies; 103+ messages in thread
From: kbuild test robot @ 2016-01-07 15:56 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: kbuild-all, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Laxman Dewangan,
	Chaitanya Bandi, Mallikarjun Kasoju

drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

CC: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
---

 max77620.c |    1 -
 1 file changed, 1 deletion(-)

--- a/drivers/mfd/max77620.c
+++ b/drivers/mfd/max77620.c
@@ -897,7 +897,6 @@ static const struct dev_pm_ops max77620_
 static struct i2c_driver max77620_driver = {
 	.driver = {
 		.name = "max77620",
-		.owner = THIS_MODULE,
 		.pm = &max77620_pm_ops,
 		.of_match_table = max77620_of_match,
 	},

-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
You received this message because you are subscribed to the Google Groups "rtc-linux" group.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  2016-01-07 14:38   ` Laxman Dewangan
@ 2016-01-07 23:12     ` Rob Herring
  -1 siblings, 0 replies; 103+ messages in thread
From: Rob Herring @ 2016-01-07 23:12 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: pawel.moll, mark.rutland, ijc+devicetree, galak, linus.walleij,
	gnurou, lee.jones, broonie, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding

On Thu, Jan 07, 2016 at 08:08:39PM +0530, Laxman Dewangan wrote:
> The MAXIM PMIC MAX77620 and MAX20024 are power management IC
> which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
> watchdog etc.
> 
> Add DT binding document for the different functionality of
> this device.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> ---
>  Documentation/devicetree/bindings/mfd/max77620.txt | 383 +++++++++++++++++++++
>  include/dt-bindings/mfd/max77620.h                 |  38 ++
>  2 files changed, 421 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
>  create mode 100644 include/dt-bindings/mfd/max77620.h
> 
> diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documentation/devicetree/bindings/mfd/max77620.txt
> new file mode 100644
> index 0000000..09cff4a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/max77620.txt
> @@ -0,0 +1,383 @@
> +* MAX77620 Power management IC from Maxim Semiconductor.
> +
> +Required properties:
> +-------------------
> +- compatible: Must be one of
> +		"maxim,max77620" or
> +		"maxim,max20024".
> +- reg: I2C device address.
> +- interrupt-controller: MAX77620 has internal interrupt controller which
> +  takes the interrupt request from internal sub-blocks like RTC,
> +  regulators, GPIOs as well as external input.
> +- #interrupt-cells: Should be set to 2 for IRQ number and flags.
> +  The first cell is the IRQ number. IRQ numbers for different interrupt
> +  source of MAX77620 are defined at dt-bindings/mfd/max77620.h
> +  The second cell is the flags, encoded as the trigger masks from binding
> +  document interrupts.txt, using dt-bindings/irq.
> +
> +Optional properties:
> +-------------------
> +This device also supports the power OFF of system.
> +Following properties are used for this purpose:
> +- system-power-controller: Boolean, This device will be use as
> +	system power controller and used for power OFF of system.
> +	Host issue necessary command to PMIC.
> +
> +
> +Optional submodule and their properties:
> +=======================================
> +
> +Flexible power sequence configuration
> +====================================
> +This sub-node configures the Flexible Power Sequnece(FPS) for power ON slot,
> +power OFF slot and slot period of the device. Device has 3 FPS as FPS0,
> +FPS1 and FPS2. The details of FPS configuration is provided through
> +subnode "fps". The details of FPS0, FPS1, FPS2 are provided through the
> +child node under this subnodes. The FPS number is provided via reg property.
> +
> +The property for fps child nodes as:
> +Required properties:
> +	-reg: FPS number like 0, 1, 2 for FPS0, FPS1 and FPS2 respectively.
> +Optinal properties:
> +	-maxim,active-fps-time-period: Active state FPS time period.
> +	-maxim,suspend-fps-time-period: Suspend state FPS time period.

What are the units?

> +	-maxim,fps-enable-input: FPS enable source like EN0, EN1 or SW. The
> +			macros are defined on dt-bindings/mfd/max77620.h for
> +			different enable source.
> +				FPS_EN_SRC_EN0 for EN0 enable source.
> +				FPS_EN_SRC_EN1 for En1 enable source.
> +				FPS_EN_SRC_SW for SW based control.
> +	-maxim,fps-sw-enable: Boolean, applicable if enable input is SW.
> +			If this property present then enable the FPS else
> +			disable FPS.
> +	-maxim,enable-sleep: Enable sleep when the external control goes from
> +			HIGH to LOW.

Boolean?

> +	-maxim,enable-global-lpm: Enable global LPM when the external control
> +			goes from HIGH to LOW.

Boolean?

> +
> +Pinmux and GPIO:
> +===============
> +Device has 8 GPIO pins which can be configured as GPIO as well as the
> +special IO functions.
> +
> +Please refer to pinctrl-bindings.txt for details of the common pinctrl
> +bindings used by client devices, including the meaning of the phrase
> +"pin configuration node".
> +
> +Following are properties which is needed if GPIO and pinmux functionality
> +is required:
> +    Required properties:
> +    -------------------
> +	- gpio-controller: Marks the device node as a GPIO controller.
> +	- #gpio-cells: Number of GPIO cells. Refer to binding document
> +			gpio/gpio.txt
> +
> +    Optional properties:
> +    --------------------
> +	Following properties are require if pin control setting is required
> +	at boot.
> +	- pinctrl-names: A pinctrl state named "default" be defined, using
> +		the bindings in pinctrl/pinctrl-binding.txt.
> +	- pinctrl[0...n]: Properties to contain the phandle that refer to
> +		different nodes of pin control settings. These nodes
> +		represents the pin control setting of state 0 to state n.
> +		Each of these nodes contains different subnodes to
> +		represents some desired configuration for a list of pins.
> +		This configuration can include the mux function to select
> +		on those pin(s), and various pin configuration parameters,
> +		such as pull-up, open drain.
> +
> +		Each subnode have following properties:
> +		Required properties:
> +		    - pins: List of pins. Valid values of pins properties
> +				are: gpio0, gpio1, gpio2, gpio3, gpio4,
> +				gpio5, gpio6, gpio7
> +
> +		Optional properties:
> +			function, drive-push-pull, drive-open-drain,
> +			bias-pull-up, bias-pull-down.
> +				Definitions are in the pinmux dt binding
> +			devicetree/bindings/pinctrl/pinctrl-bindings.txt
> +			Absence of properties will leave the configuration
> +			on default.
> +
> +			Valid values for function properties are:
> +				gpio, lpm-control-in, fps-out, 32k-out,
> +				sd0-dvs-in, sd1-dvs-in, reference-out
> +			Theres is also customised property for the GPIO1,
> +				GPIO2 and GPIO3.
> +			- maxim,active-fps-source: FPS source for the gpios in
> +				active state of the GPIO. Valid values are
> +				FPS_SRC_0, FPS_SRC_1, FPS_SRC_2 and
> +				FPS_SRC_NONE. Absence of this property will
> +				leave the pin on default.
> +			- maxim,active-fps-power-up-slot: Power up slot on
> +				given FPS for acive state.Valid values are 0
> +				to 7.
> +			- maxim,active-fps-power-down-slot: Power down slot
> +				on given FPS for active state. Valid values
> +				are 0 t  7.
> +			- maxim,suspend-fps-source: Suspend state FPS source.
> +			- maxim,suspend-fps-power-down-slot: Suspend state
> +				power down slot.
> +			- maxim,suspend-fps-power-up-slot: Suspend state power
> +				up slot.
> +
> +Regulators:
> +===========
> +Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The node "regulators"
> +is require if regulator functionality is needed.
> +
> +Following are properties of regulator subnode.
> +
> +    Optional properties:
> +    -------------------
> +	The input supply of regulators are the optional properties on the
> +	regulator node. The input supply of these regulators are provided
> +	through following properties:
> +		in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
> +		in-sd1-supply: Input supply for SD1.
> +		in-sd2-supply: Input supply for SD2.
> +		in-sd3-supply: Input supply for SD3.
> +		in-ldo0-1-supply: Input supply for LDO0 and LDO1.
> +		in-ldo2-supply: Input supply for LDO2.
> +		in-ldo3-5-supply: Input supply for LDO3 and LDO5
> +		in-ldo4-6-supply: Input supply for LDO4 and LDO6.
> +		in-ldo7-8-supply: Input supply for LDO7 and LDO8.
> +
> +
> +    Optional sub nodes for regulators:
> +    ---------------------------------
> +	The subnodes name is the name of regulator and it must be one of:
> +	sd[0-3], ldo[0-8]
> +
> +	Each sub-node should contain the constraints and initialization
> +	information for that regulator. See regulator.txt for a description
> +	of standard properties for these sub-nodes.
> +	Additional optional custom properties  are listed below.
> +		maxim,active-fps-source: FPS source. The macros are defined at
> +			dt-bindings/mfd/max77620.h
> +		maxim,shutdown-fps-source: Same as maxim,fps-source, but it
> +			will apply during shutdown of system.
> +		maxim,active-fps-power-up-slot: Active state Power up slot for
> +			rail on given FPS.
> +		maxim,active-fps-power-down-slot: Active state Power down slot
> +			for rail on given FPS.
> +		maxim,suspend-fps-source: Suspend state FPS source of rail.
> +		maxim,suspend-fps-power-up-slot: Suspend state FPS power
> +			up slot.
> +		maxim,suspend-fps-power-down-slot: Suspend state FPS power
> +			down slot.
> +		maxim,enable-group-low-power: Enable Group low power mode.
> +		maxim,enable-sd0-en2-control: Enable EN2 pincontrol for SD0.
> +			This property is only applicable for SD0.
> +		maxim,disable-remote-sense-on-suspend: Boolean, disable
> +			remote sense on suspend and re-enable on resume.
> +			If this property is not there then no change on
> +			configuration.
> +
> +Backup Battery:
> +==============
> +This sub-node configure charging backup battery of the device. Device
> +has support of charging the backup battery. The subnode name is
> +"backup-battery".
> +
> +The property for backup-battery child nodes as:
> +Presense of this child node will enable the backup battery charging.
> +
> +Optinal properties:
> +	-maxim,backup-battery-charging-current: Charging current setting.
> +			The device supports 50/100/200/400/600/800uA.
> +			If this property is unavailable then it will
> +			charge with 50uA.

Add units suffix (-microamp).

> +	-maxim,backup-battery-charging-voltage: Charging Voltage Limit Setting.
> +			Device supports 2500000/3000000/3300000/350000uV.
> +			Default will be set to 2500mV. The voltage will be roundoff
> +			to nearest lower side if other than above is configured.

Add units suffix (-microvolt).

> +	-maxim,backup-battery-output-resister: Output resistor on Ohm.
> +			Device supports 100/1000/3000/6000 Ohms.

Add units suffix.

> +
> +Low-Battery Monitor:
> +==================
> +This sub-node configure low battery monitor configuration registers.
> +Device has support for low-battery monitor configuration through
> +child DT node "low-battery-monitor".
> +
> +Optinal properties:
> +	- maxim,low-battery-dac-enable: Enable low battery DAC.
> +	- maxim,low-battery-dac-disable: Disable low battery DAC.
> +	- maxim,low-battery-shutdown-enable: Enable low battery shutdown.
> +	- maxim,low-battery-shutdown-disable: Disable low battery shutdown.
> +	- maxim,low-battery-reset-enable: Enable low battery reset.
> +	- maxim,low-battery-reset-disable: Disable low battery reset.

Why not boolean? Not present means keep default value? I'd prefer 
boolean or tristate of not present, 0 to disable, or 1 to enable.

Rob


^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-07 23:12     ` Rob Herring
  0 siblings, 0 replies; 103+ messages in thread
From: Rob Herring @ 2016-01-07 23:12 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: pawel.moll, mark.rutland, ijc+devicetree, galak, linus.walleij,
	gnurou, lee.jones, broonie, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding

On Thu, Jan 07, 2016 at 08:08:39PM +0530, Laxman Dewangan wrote:
> The MAXIM PMIC MAX77620 and MAX20024 are power management IC
> which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
> watchdog etc.
> 
> Add DT binding document for the different functionality of
> this device.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> ---
>  Documentation/devicetree/bindings/mfd/max77620.txt | 383 +++++++++++++++++++++
>  include/dt-bindings/mfd/max77620.h                 |  38 ++
>  2 files changed, 421 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt
>  create mode 100644 include/dt-bindings/mfd/max77620.h
> 
> diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documentation/devicetree/bindings/mfd/max77620.txt
> new file mode 100644
> index 0000000..09cff4a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/max77620.txt
> @@ -0,0 +1,383 @@
> +* MAX77620 Power management IC from Maxim Semiconductor.
> +
> +Required properties:
> +-------------------
> +- compatible: Must be one of
> +		"maxim,max77620" or
> +		"maxim,max20024".
> +- reg: I2C device address.
> +- interrupt-controller: MAX77620 has internal interrupt controller which
> +  takes the interrupt request from internal sub-blocks like RTC,
> +  regulators, GPIOs as well as external input.
> +- #interrupt-cells: Should be set to 2 for IRQ number and flags.
> +  The first cell is the IRQ number. IRQ numbers for different interrupt
> +  source of MAX77620 are defined at dt-bindings/mfd/max77620.h
> +  The second cell is the flags, encoded as the trigger masks from binding
> +  document interrupts.txt, using dt-bindings/irq.
> +
> +Optional properties:
> +-------------------
> +This device also supports the power OFF of system.
> +Following properties are used for this purpose:
> +- system-power-controller: Boolean, This device will be use as
> +	system power controller and used for power OFF of system.
> +	Host issue necessary command to PMIC.
> +
> +
> +Optional submodule and their properties:
> +=======================================
> +
> +Flexible power sequence configuration
> +====================================
> +This sub-node configures the Flexible Power Sequnece(FPS) for power ON slot,
> +power OFF slot and slot period of the device. Device has 3 FPS as FPS0,
> +FPS1 and FPS2. The details of FPS configuration is provided through
> +subnode "fps". The details of FPS0, FPS1, FPS2 are provided through the
> +child node under this subnodes. The FPS number is provided via reg property.
> +
> +The property for fps child nodes as:
> +Required properties:
> +	-reg: FPS number like 0, 1, 2 for FPS0, FPS1 and FPS2 respectively.
> +Optinal properties:
> +	-maxim,active-fps-time-period: Active state FPS time period.
> +	-maxim,suspend-fps-time-period: Suspend state FPS time period.

What are the units?

> +	-maxim,fps-enable-input: FPS enable source like EN0, EN1 or SW. The
> +			macros are defined on dt-bindings/mfd/max77620.h for
> +			different enable source.
> +				FPS_EN_SRC_EN0 for EN0 enable source.
> +				FPS_EN_SRC_EN1 for En1 enable source.
> +				FPS_EN_SRC_SW for SW based control.
> +	-maxim,fps-sw-enable: Boolean, applicable if enable input is SW.
> +			If this property present then enable the FPS else
> +			disable FPS.
> +	-maxim,enable-sleep: Enable sleep when the external control goes from
> +			HIGH to LOW.

Boolean?

> +	-maxim,enable-global-lpm: Enable global LPM when the external control
> +			goes from HIGH to LOW.

Boolean?

> +
> +Pinmux and GPIO:
> +===============
> +Device has 8 GPIO pins which can be configured as GPIO as well as the
> +special IO functions.
> +
> +Please refer to pinctrl-bindings.txt for details of the common pinctrl
> +bindings used by client devices, including the meaning of the phrase
> +"pin configuration node".
> +
> +Following are properties which is needed if GPIO and pinmux functionality
> +is required:
> +    Required properties:
> +    -------------------
> +	- gpio-controller: Marks the device node as a GPIO controller.
> +	- #gpio-cells: Number of GPIO cells. Refer to binding document
> +			gpio/gpio.txt
> +
> +    Optional properties:
> +    --------------------
> +	Following properties are require if pin control setting is required
> +	at boot.
> +	- pinctrl-names: A pinctrl state named "default" be defined, using
> +		the bindings in pinctrl/pinctrl-binding.txt.
> +	- pinctrl[0...n]: Properties to contain the phandle that refer to
> +		different nodes of pin control settings. These nodes
> +		represents the pin control setting of state 0 to state n.
> +		Each of these nodes contains different subnodes to
> +		represents some desired configuration for a list of pins.
> +		This configuration can include the mux function to select
> +		on those pin(s), and various pin configuration parameters,
> +		such as pull-up, open drain.
> +
> +		Each subnode have following properties:
> +		Required properties:
> +		    - pins: List of pins. Valid values of pins properties
> +				are: gpio0, gpio1, gpio2, gpio3, gpio4,
> +				gpio5, gpio6, gpio7
> +
> +		Optional properties:
> +			function, drive-push-pull, drive-open-drain,
> +			bias-pull-up, bias-pull-down.
> +				Definitions are in the pinmux dt binding
> +			devicetree/bindings/pinctrl/pinctrl-bindings.txt
> +			Absence of properties will leave the configuration
> +			on default.
> +
> +			Valid values for function properties are:
> +				gpio, lpm-control-in, fps-out, 32k-out,
> +				sd0-dvs-in, sd1-dvs-in, reference-out
> +			Theres is also customised property for the GPIO1,
> +				GPIO2 and GPIO3.
> +			- maxim,active-fps-source: FPS source for the gpios in
> +				active state of the GPIO. Valid values are
> +				FPS_SRC_0, FPS_SRC_1, FPS_SRC_2 and
> +				FPS_SRC_NONE. Absence of this property will
> +				leave the pin on default.
> +			- maxim,active-fps-power-up-slot: Power up slot on
> +				given FPS for acive state.Valid values are 0
> +				to 7.
> +			- maxim,active-fps-power-down-slot: Power down slot
> +				on given FPS for active state. Valid values
> +				are 0 t  7.
> +			- maxim,suspend-fps-source: Suspend state FPS source.
> +			- maxim,suspend-fps-power-down-slot: Suspend state
> +				power down slot.
> +			- maxim,suspend-fps-power-up-slot: Suspend state power
> +				up slot.
> +
> +Regulators:
> +===========
> +Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The node "regulators"
> +is require if regulator functionality is needed.
> +
> +Following are properties of regulator subnode.
> +
> +    Optional properties:
> +    -------------------
> +	The input supply of regulators are the optional properties on the
> +	regulator node. The input supply of these regulators are provided
> +	through following properties:
> +		in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
> +		in-sd1-supply: Input supply for SD1.
> +		in-sd2-supply: Input supply for SD2.
> +		in-sd3-supply: Input supply for SD3.
> +		in-ldo0-1-supply: Input supply for LDO0 and LDO1.
> +		in-ldo2-supply: Input supply for LDO2.
> +		in-ldo3-5-supply: Input supply for LDO3 and LDO5
> +		in-ldo4-6-supply: Input supply for LDO4 and LDO6.
> +		in-ldo7-8-supply: Input supply for LDO7 and LDO8.
> +
> +
> +    Optional sub nodes for regulators:
> +    ---------------------------------
> +	The subnodes name is the name of regulator and it must be one of:
> +	sd[0-3], ldo[0-8]
> +
> +	Each sub-node should contain the constraints and initialization
> +	information for that regulator. See regulator.txt for a description
> +	of standard properties for these sub-nodes.
> +	Additional optional custom properties  are listed below.
> +		maxim,active-fps-source: FPS source. The macros are defined at
> +			dt-bindings/mfd/max77620.h
> +		maxim,shutdown-fps-source: Same as maxim,fps-source, but it
> +			will apply during shutdown of system.
> +		maxim,active-fps-power-up-slot: Active state Power up slot for
> +			rail on given FPS.
> +		maxim,active-fps-power-down-slot: Active state Power down slot
> +			for rail on given FPS.
> +		maxim,suspend-fps-source: Suspend state FPS source of rail.
> +		maxim,suspend-fps-power-up-slot: Suspend state FPS power
> +			up slot.
> +		maxim,suspend-fps-power-down-slot: Suspend state FPS power
> +			down slot.
> +		maxim,enable-group-low-power: Enable Group low power mode.
> +		maxim,enable-sd0-en2-control: Enable EN2 pincontrol for SD0.
> +			This property is only applicable for SD0.
> +		maxim,disable-remote-sense-on-suspend: Boolean, disable
> +			remote sense on suspend and re-enable on resume.
> +			If this property is not there then no change on
> +			configuration.
> +
> +Backup Battery:
> +==============
> +This sub-node configure charging backup battery of the device. Device
> +has support of charging the backup battery. The subnode name is
> +"backup-battery".
> +
> +The property for backup-battery child nodes as:
> +Presense of this child node will enable the backup battery charging.
> +
> +Optinal properties:
> +	-maxim,backup-battery-charging-current: Charging current setting.
> +			The device supports 50/100/200/400/600/800uA.
> +			If this property is unavailable then it will
> +			charge with 50uA.

Add units suffix (-microamp).

> +	-maxim,backup-battery-charging-voltage: Charging Voltage Limit Setting.
> +			Device supports 2500000/3000000/3300000/350000uV.
> +			Default will be set to 2500mV. The voltage will be roundoff
> +			to nearest lower side if other than above is configured.

Add units suffix (-microvolt).

> +	-maxim,backup-battery-output-resister: Output resistor on Ohm.
> +			Device supports 100/1000/3000/6000 Ohms.

Add units suffix.

> +
> +Low-Battery Monitor:
> +==================
> +This sub-node configure low battery monitor configuration registers.
> +Device has support for low-battery monitor configuration through
> +child DT node "low-battery-monitor".
> +
> +Optinal properties:
> +	- maxim,low-battery-dac-enable: Enable low battery DAC.
> +	- maxim,low-battery-dac-disable: Disable low battery DAC.
> +	- maxim,low-battery-shutdown-enable: Enable low battery shutdown.
> +	- maxim,low-battery-shutdown-disable: Disable low battery shutdown.
> +	- maxim,low-battery-reset-enable: Enable low battery reset.
> +	- maxim,low-battery-reset-disable: Disable low battery reset.

Why not boolean? Not present means keep default value? I'd prefer 
boolean or tristate of not present, 0 to disable, or 1 to enable.

Rob

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-07 14:38   ` Laxman Dewangan
@ 2016-01-08  1:07     ` Linux Kernel
  -1 siblings, 0 replies; 103+ messages in thread
From: Linux Kernel @ 2016-01-08  1:07 UTC (permalink / raw)
  To: Laxman Dewangan, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, broonie,
	a.zummo, alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Chaitanya Bandi

Hi,

On Thursday 07 January 2016 08:08 PM, Laxman Dewangan wrote:

> Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> RTC  module. This support for setting alarm and time.
>
> Add RTC driver to access this chip's RTC module via RTC
> APIs.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> ---
>   drivers/rtc/Kconfig        |   9 +
>   drivers/rtc/Makefile       |   1 +
>   drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
>   3 files changed, 584 insertions(+)
>   create mode 100644 drivers/rtc/rtc-max77620.c
>
(...)

> +static struct platform_driver max77620_rtc_driver = {
> +	.probe = max77620_rtc_probe,
> +	.remove = max77620_rtc_remove,
> +	.id_table = max77620_rtc_devtype,
> +	.driver = {
> +			.name = "max77620-rtc",
> +			.owner = THIS_MODULE,

Drop this line, .owner will be populated by driver core.

> +			.pm = &max77620_rtc_pm_ops,
> +	},
> +};
> +
> +module_platform_driver(max77620_rtc_driver);
> +
> +MODULE_DESCRIPTION("max77620 RTC driver");
> +MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> +MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> +MODULE_ALIAS("platform:max77620-rtc");
> +MODULE_LICENSE("GPL v2");

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08  1:07     ` Linux Kernel
  0 siblings, 0 replies; 103+ messages in thread
From: Linux Kernel @ 2016-01-08  1:07 UTC (permalink / raw)
  To: Laxman Dewangan, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, broonie,
	a.zummo, alexandre.belloni
  Cc: lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Chaitanya Bandi

Hi,

On Thursday 07 January 2016 08:08 PM, Laxman Dewangan wrote:

> Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> RTC  module. This support for setting alarm and time.
>
> Add RTC driver to access this chip's RTC module via RTC
> APIs.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> ---
>   drivers/rtc/Kconfig        |   9 +
>   drivers/rtc/Makefile       |   1 +
>   drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
>   3 files changed, 584 insertions(+)
>   create mode 100644 drivers/rtc/rtc-max77620.c
>
(...)

> +static struct platform_driver max77620_rtc_driver = {
> +	.probe = max77620_rtc_probe,
> +	.remove = max77620_rtc_remove,
> +	.id_table = max77620_rtc_devtype,
> +	.driver = {
> +			.name = "max77620-rtc",
> +			.owner = THIS_MODULE,

Drop this line, .owner will be populated by driver core.

> +			.pm = &max77620_rtc_pm_ops,
> +	},
> +};
> +
> +module_platform_driver(max77620_rtc_driver);
> +
> +MODULE_DESCRIPTION("max77620 RTC driver");
> +MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> +MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> +MODULE_ALIAS("platform:max77620-rtc");
> +MODULE_LICENSE("GPL v2");

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-07 14:38   ` Laxman Dewangan
@ 2016-01-08  1:35     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08  1:35 UTC (permalink / raw)
  To: rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> MAX77620/MAX20024 are Power Management IC from the MAXIM.
> It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> watchdog, clock etc.
>
> Add MFD drier to provides common support for accessing the
> device; additional drivers is developed on respected subsystem
> in order to use the functionality of the device.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

The Testing and Reviewed are statements (see SubmittingPatches) so
they should be made explicitly by people. As this is v1 how they could
make a public statement so far?

> ---
>  drivers/mfd/Kconfig          |  15 +
>  drivers/mfd/Makefile         |   1 +
>  drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
>  include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
>  4 files changed, 1445 insertions(+)
>  create mode 100644 drivers/mfd/max77620.c
>  create mode 100644 include/linux/mfd/max77620.h
>
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 9581ebb..edeb85c 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -492,6 +492,21 @@ config MFD_MAX14577
>           additional drivers must be enabled in order to use the functionality
>           of the device.
>
> +config MFD_MAX77620
> +       bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support"
> +       depends on I2C=y
> +       depends on OF
> +       select MFD_CORE
> +       select REGMAP_I2C
> +       select REGMAP_IRQ
> +       select IRQ_DOMAIN
> +       help
> +         Say yes here to add support for Maxim Semiconductor MAX77620 and
> +         MAX20024 which are Power Management IC with General purpose pins,
> +         RTC, regulators, clock generator, watchdog etc. This driver
> +         provides common support for accessing the device; additional drivers
> +         must be enabled in order to use the functionality of the device.
> +
>  config MFD_MAX77686
>         bool "Maxim Semiconductor MAX77686/802 PMIC Support"
>         depends on I2C=y
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 0f230a6..97910ed 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -123,6 +123,7 @@ obj-$(CONFIG_MFD_DA9063)    += da9063.o
>  obj-$(CONFIG_MFD_DA9150)       += da9150-core.o
>
>  obj-$(CONFIG_MFD_MAX14577)     += max14577.o
> +obj-$(CONFIG_MFD_MAX77620)     += max77620.o
>  obj-$(CONFIG_MFD_MAX77686)     += max77686.o
>  obj-$(CONFIG_MFD_MAX77693)     += max77693.o
>  obj-$(CONFIG_MFD_MAX77843)     += max77843.o
> diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c
> new file mode 100644
> index 0000000..5f59279
> --- /dev/null
> +++ b/drivers/mfd/max77620.c
> @@ -0,0 +1,926 @@
> +/*
> + * Maxim MAX77620 MFD Driver
> + *
> + * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
> + *
> + * Author:
> + *             Laxman Dewangan <ldewangan@nvidia.com>
> + *             Chaitanya Bandi <bandik@nvidia.com>
> + *             Mallikarjun Kasoju <mkasoju@nvidia.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/i2c.h>
> +#include <linux/slab.h>
> +#include <linux/ratelimit.h>
> +#include <linux/kthread.h>
> +#include <linux/mfd/core.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/delay.h>
> +#include <linux/uaccess.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_platform.h>

So many includes. Do you really need ratelimit, kthread, delay,
uaccess, of_platform?

> +
> +#include <linux/mfd/max77620.h>
> +
> +static struct resource gpio_resources[] = {
> +       {
> +               .start  = MAX77620_IRQ_TOP_GPIO,
> +               .end    = MAX77620_IRQ_TOP_GPIO,
> +               .flags  = IORESOURCE_IRQ,
> +       }
> +};
> +
> +static struct resource rtc_resources[] = {
> +       {
> +               .start  = MAX77620_IRQ_TOP_RTC,
> +               .end    = MAX77620_IRQ_TOP_RTC,
> +               .flags  = IORESOURCE_IRQ,
> +       }
> +};
> +
> +static struct resource thermal_resources[] = {
> +       {
> +               .start  = MAX77620_IRQ_LBT_TJALRM1,
> +               .end    = MAX77620_IRQ_LBT_TJALRM1,
> +               .flags  = IORESOURCE_IRQ,
> +       },
> +       {
> +               .start  = MAX77620_IRQ_LBT_TJALRM2,
> +               .end    = MAX77620_IRQ_LBT_TJALRM2,
> +               .flags  = IORESOURCE_IRQ,
> +       }
> +};
> +
> +static const struct regmap_irq max77620_top_irqs[] = {
> +       [MAX77620_IRQ_TOP_GLBL] = {
> +               .mask = MAX77620_IRQ_TOP_GLBL_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_SD] = {
> +               .mask = MAX77620_IRQ_TOP_SD_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_LDO] = {
> +               .mask = MAX77620_IRQ_TOP_LDO_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_GPIO] = {
> +               .mask = MAX77620_IRQ_TOP_GPIO_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_RTC] = {
> +               .mask = MAX77620_IRQ_TOP_RTC_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_32K] = {
> +               .mask = MAX77620_IRQ_TOP_32K_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_ONOFF] = {
> +               .mask = MAX77620_IRQ_TOP_ONOFF_MASK,
> +               .reg_offset = 0,
> +       },
> +
> +       [MAX77620_IRQ_LBT_MBATLOW] = {
> +               .mask = MAX77620_IRQ_LBM_MASK,
> +               .reg_offset = 1,
> +       },
> +       [MAX77620_IRQ_LBT_TJALRM1] = {
> +               .mask = MAX77620_IRQ_TJALRM1_MASK,
> +               .reg_offset = 1,
> +       },
> +       [MAX77620_IRQ_LBT_TJALRM2] = {
> +               .mask = MAX77620_IRQ_TJALRM2_MASK,
> +               .reg_offset = 1,
> +       },
> +
> +};
> +
> +static const char * const max77620_nverc[] = {
> +       "Shutdown-pin",
> +       "System WatchDog Timer",
> +       "Hard Reset",
> +       "Junction Temp Overload",
> +       "Main-Battery Low",
> +       "Main-Battery overvoltage Lockout",
> +       "Main-Battery undervoltage Lockout",
> +       "Reset input",
> +};
> +
> +enum max77660_ids {
> +       MAX77620_PMIC_ID,
> +       MAX77620_GPIO_ID,
> +       MAX77620_RTC_ID,
> +       MAX77620_PINCTRL_ID,
> +       MAX77620_CLK_ID,
> +       MAX77620_POWER_OFF_ID,
> +       MAX77620_WDT_ID,
> +       MAX77620_THERMAL_ID,
> +};
> +
> +#define MAX77620_SUB_MODULE_RES(_name, _id)                    \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max77620-"#_name,                      \
> +               .num_resources  = ARRAY_SIZE(_name##_resources), \
> +               .resources      = &_name##_resources[0],        \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +#define MAX20024_SUB_MODULE_RES(_name, _id)                    \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max20024-"#_name,                      \
> +               .num_resources  = ARRAY_SIZE(_name##_resources), \
> +               .resources      = &_name##_resources[0],        \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +#define MAX77620_SUB_MODULE_NO_RES(_name, _id)                 \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max77620-"#_name,                      \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +#define MAX20024_SUB_MODULE_NO_RES(_name, _id)                 \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max20024-"#_name,                      \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +static struct mfd_cell max77620_children[] = {
> +       MAX77620_SUB_MODULE_RES(gpio, GPIO),
> +       MAX77620_SUB_MODULE_NO_RES(pmic, PMIC),
> +       MAX77620_SUB_MODULE_RES(rtc, RTC),
> +       MAX77620_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
> +       MAX77620_SUB_MODULE_NO_RES(clk, CLK),
> +       MAX77620_SUB_MODULE_NO_RES(power-off, POWER_OFF),
> +       MAX77620_SUB_MODULE_NO_RES(wdt, WDT),
> +       MAX77620_SUB_MODULE_RES(thermal, THERMAL),
> +};
> +
> +static struct mfd_cell max20024_children[] = {
> +       MAX20024_SUB_MODULE_RES(gpio, GPIO),
> +       MAX20024_SUB_MODULE_NO_RES(pmic, PMIC),
> +       MAX20024_SUB_MODULE_RES(rtc, RTC),
> +       MAX20024_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
> +       MAX20024_SUB_MODULE_NO_RES(clk, CLK),
> +       MAX20024_SUB_MODULE_NO_RES(power-off, POWER_OFF),
> +       MAX20024_SUB_MODULE_NO_RES(wdt, WDT),
> +       MAX20024_SUB_MODULE_RES(thermal, THERMAL),
> +};
> +
> +struct max77620_sub_modules {
> +       struct mfd_cell *cells;
> +       int ncells;
> +       u32 id;
> +};
> +
> +static const struct max77620_sub_modules max77620_cells = {
> +       .cells = max77620_children,
> +       .ncells = ARRAY_SIZE(max77620_children),
> +       .id = MAX77620,
> +};
> +
> +static const struct max77620_sub_modules  max20024_cells = {
> +       .cells = max20024_children,
> +       .ncells = ARRAY_SIZE(max20024_children),
> +       .id = MAX20024,
> +};
> +
> +static const struct of_device_id max77620_of_match[] = {
> +       {
> +               .compatible = "maxim,max77620",
> +               .data = &max77620_cells,
> +       }, {
> +               .compatible = "maxim,max20024",
> +               .data = &max20024_cells,
> +       }, {
> +       },
> +};
> +MODULE_DEVICE_TABLE(of, max77620_of_match);
> +
> +static struct regmap_irq_chip max77620_top_irq_chip = {
> +       .name = "max77620-top",
> +       .irqs = max77620_top_irqs,
> +       .num_irqs = ARRAY_SIZE(max77620_top_irqs),
> +       .num_regs = 2,
> +       .status_base = MAX77620_REG_IRQTOP,
> +       .mask_base = MAX77620_REG_IRQTOPM,
> +};
> +
> +static const struct regmap_range max77620_readable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
> +};
> +
> +static const struct regmap_access_table max77620_readable_table = {
> +       .yes_ranges = max77620_readable_ranges,
> +       .n_yes_ranges = ARRAY_SIZE(max77620_readable_ranges),
> +};
> +
> +static const struct regmap_range max20024_readable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
> +       regmap_reg_range(MAX20024_REG_MAX_ADD, MAX20024_REG_MAX_ADD),
> +};
> +
> +static const struct regmap_access_table max20024_readable_table = {
> +       .yes_ranges = max20024_readable_ranges,
> +       .n_yes_ranges = ARRAY_SIZE(max20024_readable_ranges),
> +};
> +
> +static const struct regmap_range max77620_writable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
> +};
> +
> +static const struct regmap_access_table max77620_writable_table = {
> +       .yes_ranges = max77620_writable_ranges,
> +       .n_yes_ranges = ARRAY_SIZE(max77620_writable_ranges),
> +};
> +
> +static const struct regmap_range max77620_cacheable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_SD0_CFG, MAX77620_REG_LDO_CFG3),
> +       regmap_reg_range(MAX77620_REG_FPS_CFG0, MAX77620_REG_FPS_SD3),
> +};
> +
> +static const struct regmap_access_table max77620_volatile_table = {
> +       .no_ranges = max77620_cacheable_ranges,
> +       .n_no_ranges = ARRAY_SIZE(max77620_cacheable_ranges),
> +};
> +
> +static struct regmap_config max77620_regmap_config[] = {
> +       [MAX77620_PWR_SLAVE] = {
> +               .reg_bits = 8,
> +               .val_bits = 8,
> +               .max_register = MAX77620_REG_DVSSD4 + 1,
> +               .cache_type = REGCACHE_RBTREE,
> +               .rd_table = &max77620_readable_table,
> +               .wr_table = &max77620_writable_table,
> +               .volatile_table = &max77620_volatile_table,
> +       },
> +       [MAX77620_RTC_SLAVE] = {
> +               .reg_bits = 8,
> +               .val_bits = 8,
> +               .max_register = 0x1b,
> +       },
> +};
> +
> +static int max77620_slave_address[MAX77620_NUM_SLAVES] = {
> +       MAX77620_PWR_I2C_ADDR,
> +       MAX77620_RTC_I2C_ADDR,
> +};
> +
> +static int max77620_initialise_fps(struct max77620_chip *chip,
> +                       struct device *dev)
> +{
> +       struct device_node *node;
> +       struct device_node *child;
> +       u32 reg, pval;
> +       int ret;
> +       int time_period = 40;
> +       int input_enable = 2;
> +       bool enable_fps = false;
> +       unsigned int mask;
> +       unsigned int config;
> +       int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
> +       int i;

That's a lot of variables. I can't find any kind of order they were
put in, they are not groupped by type nor put in the same line. Please
make it simpler.

> +
> +       node = of_get_child_by_name(dev->of_node, "fps");
> +       if (!node)
> +               goto skip_fps;
> +
> +       for (reg = 0; reg < 3; ++reg) {
> +               chip->active_fps_period[reg] = -1;
> +               chip->suspend_fps_period[reg] = -1;
> +       }
> +
> +       for_each_child_of_node(node, child) {
> +               ret = of_property_read_u32(child, "reg", &reg);
> +               if (ret) {
> +                       dev_err(dev, "node %s does not have reg property\n",
> +                                       child->name);
> +                       continue;
> +               }
> +               if (reg > 2) {
> +                       dev_err(dev, "FPS%d is not supported\n", reg);
> +                       continue;
> +               }
> +
> +               mask = 0;
> +               ret = of_property_read_u32(child,
> +                               "maxim,active-fps-time-period", &pval);
> +               if (!ret) {
> +                       time_period = min(pval, 5120U);
> +                       mask |= MAX77620_FPS_TIME_PERIOD_MASK;
> +                       chip->active_fps_period[reg] = time_period;
> +               }
> +
> +               ret = of_property_read_u32(child,
> +                                       "maxim,suspend-fps-time-period", &pval);
> +               if (!ret)
> +                       chip->suspend_fps_period[reg] = min(pval, 5120U);
> +
> +               ret = of_property_read_u32(child, "maxim,fps-enable-input",
> +                                               &pval);
> +               if (!ret) {
> +                       if (pval > 2) {
> +                               dev_err(dev,
> +                                   "FPS enable-input %u is not supported\n",
> +                                       pval);

Indentation of arguments does not seem equal here or maybe this is
just my email client. Have you run this through checkpatch? And
sparse? And coccicheck (that one definitely not because kbuild is
complaining)?

This is quite big function with 4 levels of indentation + identation
of dev_err() arguments. Maybe split parsing of child nodes to separate
function? Now the code looks quite ugly because of lot of line splits.

> +                       } else {
> +                               input_enable = pval;
> +                               mask |= MAX77620_FPS_EN_SRC_MASK;
> +                       }
> +               }
> +
> +               if (input_enable == 2) {
> +                       enable_fps = of_property_read_bool(child,
> +                                               "maxim,fps-sw-enable");
> +                       mask |= MAX77620_FPS_ENFPS_MASK;
> +               }
> +
> +               if (!chip->sleep_enable)
> +                       chip->sleep_enable = of_property_read_bool(child,
> +                                               "maxim,enable-sleep");
> +               if (!chip->enable_global_lpm)
> +                       chip->enable_global_lpm = of_property_read_bool(child,
> +                                               "maxim,enable-global-lpm");
> +
> +               for (i = 0; i < 0x7; ++i) {
> +                       int x = base_fps_time * BIT(i);
> +
> +                       if (x >= time_period)
> +                               break;
> +               }
> +               config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
> +               config |= (input_enable & 0x3) << MAX77620_FPS_EN_SRC_SHIFT;
> +               if (enable_fps)
> +                       config |= 1;
> +               ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                               MAX77620_REG_FPS_CFG0 + reg, mask, config);
> +               if (ret < 0) {
> +                       dev_err(dev, "Reg 0x%02x write failed: %d\n",
> +                               MAX77620_REG_FPS_CFG0 + reg, ret);
> +                       return ret;
> +               }
> +       }
> +
> +       config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG2,
> +                       MAX77620_ONOFFCNFG2_SLP_LPM_MSK, config);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +skip_fps:
> +       /* Enable wake on EN0 pin */
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
> +                       MAX77620_ONOFFCNFG2_WK_EN0);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       if (!chip->sleep_enable)
> +               chip->sleep_enable = of_property_read_bool(dev->of_node,
> +                                               "maxim,enable-sleep");
> +
> +       /* For MAX20024, SLPEN will be POR reset if CLRSE is b11 */
> +       if ((chip->id == MAX20024) && chip->sleep_enable) {
> +               config = MAX77620_ONOFFCNFG1_SLPEN | MAX20024_ONOFFCNFG1_CLRSE;
> +               ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG1, config, config);
> +               if (ret < 0) {
> +                       dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
> +                       return ret;
> +               }
> +       }
> +       return 0;

Here and in other places: preceed the final return with  blank line.

> +}
> +
> +static int max77620_init_backup_battery_charging(struct max77620_chip *chip,
> +               struct device *dev)
> +{
> +       struct device_node *np;
> +       u32 pval;
> +       u8 config;
> +       int charging_current;
> +       int charging_voltage;
> +       int resistor;
> +       int ret;

Why not all int's in one line?

> +
> +       np = of_get_child_by_name(dev->of_node, "backup-battery");
> +       if (!np) {
> +               dev_info(dev, "Backup battery charging support disabled\n");
> +               max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_ENABLE, 0);
> +               return 0;
> +       }
> +
> +       ret = of_property_read_u32(np,
> +                       "maxim,backup-battery-charging-current", &pval);
> +       charging_current = (!ret) ? pval : 50;
> +
> +       ret = of_property_read_u32(np,
> +                       "maxim,backup-battery-charging-voltage", &pval);
> +       charging_voltage = (!ret) ? pval : 2500000;
> +       charging_voltage /= 1000;
> +
> +       ret = of_property_read_u32(np,
> +                       "maxim,backup-battery-output-resister", &pval);
> +       resistor = (!ret) ? pval : 1000;
> +
> +       config = MAX77620_CNFGBBC_ENABLE;
> +       if (charging_current <= 50)
> +               config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 100)
> +               config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 200)
> +               config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 400)
> +               config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 600)
> +               config |= 1 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else
> +               config |= 2 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +
> +       if (charging_current > 100)
> +               config |= MAX77620_CNFGBBC_LOW_CURRENT_ENABLE;
> +
> +       if (charging_voltage <= 2500)
> +               config |= 0 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +       else if (charging_voltage <= 3000)
> +               config |= 1 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +       else if (charging_voltage <= 3300)
> +               config |= 2 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +       else
> +               config |= 3 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +
> +       if (resistor <= 100)
> +               config |= 0 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +       else if (resistor <= 1000)
> +               config |= 1 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +       else if (resistor <= 3000)
> +               config |= 2 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +       else if (resistor <= 6000)
> +               config |= 3 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +
> +       ret = max77620_reg_write(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_CNFGBBC, config);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg 0x%02x write failed: %d\n",
> +                       MAX77620_REG_CNFGBBC, ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int max77620_init_low_battery_monitor(struct max77620_chip *chip,
> +               struct device *dev)
> +{
> +       struct device_node *np;
> +       bool pval;
> +       u8 mask = 0;
> +       u8 val = 0;
> +       int ret;
> +

No need of 2 blank lines. And put any kind of order here. The local
variables are declared in random order. Either use
reversed-christmas-tree or put first non-init and then initialized
vars or any other idea (your choice...).

> +
> +       np = of_get_child_by_name(dev->of_node, "low-battery-monitor");
> +       if (!np)
> +               return 0;
> +
> +       pval = of_property_read_bool(np, "maxim,low-battery-dac-enable");
> +       if (pval) {
> +               mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
> +               val |= MAX77620_CNFGGLBL1_LBDAC_EN;
> +       }
> +       pval = of_property_read_bool(np, "maxim,low-battery-dac-disable");
> +       if (pval)
> +               mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
> +
> +       pval = of_property_read_bool(np, "maxim,low-battery-shutdown-enable");
> +       if (pval) {
> +               mask |= MAX77620_CNFGGLBL1_MPPLD;
> +               val |= MAX77620_CNFGGLBL1_MPPLD;
> +       }
> +       pval = of_property_read_bool(np, "maxim,low-battery-shutdown-disable");
> +       if (pval)
> +               mask |= MAX77620_CNFGGLBL1_MPPLD;
> +
> +       pval = of_property_read_bool(np, "maxim,low-battery-reset-enable");
> +       if (pval) {
> +               mask |= MAX77620_CNFGGLBL1_LBRSTEN;
> +               val |= MAX77620_CNFGGLBL1_LBRSTEN;
> +       }
> +       pval = of_property_read_bool(np, "maxim,low-battery-reset-disable");
> +       if (pval)
> +               mask |= MAX77620_CNFGGLBL1_LBRSTEN;
> +
> +       ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_CNFGGLBL1, mask, val);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg CNFGGLBL1 update failed: %d\n", ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int max77620_initialise_chip(struct max77620_chip *chip,
> +                       struct device *dev)
> +{
> +       struct device_node *node = dev->of_node;
> +       u32 mrt_time = 0;
> +       u8 reg_val;
> +       int ret;
> +
> +       of_property_read_u32(node, "maxim,hard-power-off-time", &mrt_time);
> +       if (!mrt_time)
> +               return 0;

Different style than in previous of parsing functions. You always used
'ret' to check if property exists. Why style is not consistent?

> +
> +       mrt_time = (mrt_time > 12) ? 12 : mrt_time;
> +       if (mrt_time <= 6)
> +               reg_val = mrt_time - 2;
> +       else
> +               reg_val = (mrt_time - 6) / 2 + 4;
> +
> +       reg_val <<= MAX77620_ONOFFCNFG1_MRT_SHIFT;
> +
> +       ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_MRT_MASK,
> +                       reg_val);
> +       if (ret < 0)
> +               dev_err(dev, "Reg 0x%02x update failed: %d\n",
> +                       MAX77620_REG_ONOFFCNFG1, reg_val);
> +       return ret;
> +}
> +
> +static int max77620_read_es_version(struct max77620_chip *chip)
> +{
> +       int ret;
> +       u8 val;
> +       u8 cid;
> +       int i;
> +       u8 cid_val[6];
> +
> +       for (i = MAX77620_REG_CID0; i <= MAX77620_REG_CID5; ++i) {
> +               ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
> +                               i, &cid);
> +               if (ret < 0) {
> +                       dev_err(chip->dev, "CID%d register read failed: %d\n",
> +                                       i - MAX77620_REG_CID0, ret);
> +                       return ret;
> +               }
> +               dev_info(chip->dev, "CID%d: 0x%02x\n",
> +                       i - MAX77620_REG_CID0, cid);
> +               cid_val[i - MAX77620_REG_CID0] = cid;
> +       }
> +
> +       /* CID4 is OTP Version */
> +       dev_info(chip->dev, "MAX77620 PMIC OTP Version: 0x%02X\n", cid_val[4]);
> +
> +       /* CID5 is ES version */
> +       chip->es_minor_version = MAX77620_CID5_DIDM(cid_val[5]);
> +       chip->es_major_version = 1;
> +       dev_info(chip->dev, "MAX77620 PMIC ES version: %d.%d\n",
> +                               chip->es_major_version, chip->es_minor_version);
> +
> +       /* Read NVERC register */
> +       ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_NVERC, &val);
> +       if (ret < 0) {
> +               dev_err(chip->dev, "NVERC read failed: %d\n", ret);
> +               return ret;
> +       }
> +       dev_info(chip->dev, "NVERC = 0x%02x\n", val);
> +       for (i = 0; i < 8; ++i) {
> +               if (val & BIT(i))
> +                       dev_info(chip->dev, "NVERC: %s\n", max77620_nverc[i]);
> +       }

So many dev_info() for one driver. One is sufficient. Rest should be dev_dbg().

> +       return ret;
> +}
> +
> +static irqreturn_t max77620_mbattlow_irq(int irq, void *data)
> +{
> +       struct max77620_chip *max77620 = data;
> +
> +       dev_info(max77620->dev, "MBATTLOW interrupt occurred\n");

Not a dev_info(). You are not doing with the interrupt anyway so this
does not look important. If it were important than I would suspect
something like power_supply_changed() to notify userspace etc.

> +
> +       return IRQ_HANDLED;
> +}
> +
> +static int max77620_probe(struct i2c_client *client,
> +                         const struct i2c_device_id *id)
> +{
> +       struct device_node *node = client->dev.of_node;
> +       const struct max77620_sub_modules *children;
> +       struct max77620_chip *chip;
> +       int i = 0;
> +       int ret = 0;
> +       const struct of_device_id *match;
> +
> +       if (!node) {
> +               dev_err(&client->dev, "Device is not from DT\n");
> +               return -ENODEV;
> +       }
> +
> +       match = of_match_device(max77620_of_match, &client->dev);
> +       children = match->data;
> +       if (!children)
> +               return -ENODEV;
> +
> +       chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
> +       if (!chip)
> +               return -ENOMEM;
> +
> +       i2c_set_clientdata(client, chip);
> +       chip->dev = &client->dev;
> +       chip->irq_base = -1;
> +       chip->chip_irq = client->irq;
> +       chip->id = children->id;
> +
> +       if (chip->id == MAX20024) {
> +               max77620_regmap_config[MAX77620_PWR_SLAVE].rd_table =
> +                                       &max20024_readable_table;
> +               max77620_regmap_config[MAX77620_PWR_SLAVE].max_register =
> +                               MAX20024_REG_MAX_ADD + 1;
> +       }
> +
> +       mutex_init(&chip->mutex_config);
> +
> +       for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
> +               if (max77620_slave_address[i] == client->addr)
> +                       chip->clients[i] = client;
> +               else
> +                       chip->clients[i] = i2c_new_dummy(client->adapter,
> +                                               max77620_slave_address[i]);
> +               if (!chip->clients[i]) {
> +                       dev_err(&client->dev, "can't attach client %d\n", i);
> +                       ret = -ENOMEM;
> +                       goto fail_client_reg;
> +               }
> +
> +               chip->clients[i]->dev.of_node = node;
> +               i2c_set_clientdata(chip->clients[i], chip);
> +               max77620_regmap_config[i].lock_arg = chip;
> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
> +               (const struct regmap_config *)&max77620_regmap_config[i]);

Indentation looks weird here (or again this is my email client...).
The cast is even weirder?!? Why casting?


> +               if (IS_ERR(chip->rmap[i])) {
> +                       ret = PTR_ERR(chip->rmap[i]);
> +                       dev_err(&client->dev,
> +                               "regmap %d init failed, err %d\n", i, ret);
> +                       goto fail_client_reg;
> +               }
> +       }
> +
> +       ret = max77620_read_es_version(chip);
> +       if (ret < 0) {
> +               dev_err(chip->dev, "Chip revision init failed: %d\n", ret);

Here and in other places you will have always two error messages
printed for the same error (the same cause, trackable to the same
path). One error message coming from max77620_read_es_version() and
second here. No need. Just print error once.

> +               goto fail_client_reg;
> +       }
> +
> +       ret = max77620_initialise_chip(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev, "Chip initialisation failed: %d\n", ret);
> +               goto fail_client_reg;
> +       }
> +
> +       ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
> +               chip->chip_irq, IRQF_ONESHOT | IRQF_SHARED, chip->irq_base,
> +               &max77620_top_irq_chip, &chip->top_irq_data);
> +       if (ret < 0) {
> +               dev_err(chip->dev, "Failed to add top irq_chip %d\n", ret);
> +               goto fail_client_reg;
> +       }
> +
> +       ret = max77620_initialise_fps(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev, "FPS initialisation failed: %d\n", ret);
> +               goto fail_free_irq;
> +       }
> +
> +       ret = max77620_init_backup_battery_charging(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev,
> +                       "Backup battery charging init failed: %d\n", ret);
> +               goto fail_free_irq;
> +       }
> +
> +       ret = max77620_init_low_battery_monitor(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev, "Low battery monitor init failed: %d\n",
> +                       ret);
> +               goto fail_free_irq;
> +       }
> +
> +       ret =  mfd_add_devices(&client->dev, -1, children->cells,
> +                       children->ncells, NULL, 0,
> +                       regmap_irq_get_domain(chip->top_irq_data));
> +       if (ret < 0) {
> +               dev_err(&client->dev, "mfd add dev fail %d\n", ret);
> +               goto fail_free_irq;
> +       }
> +
> +       chip->irq_mbattlow = max77620_irq_get_virq(chip->dev,
> +                                       MAX77620_IRQ_LBT_MBATLOW);
> +       if (chip->irq_mbattlow) {
> +               ret = devm_request_threaded_irq(chip->dev, chip->irq_mbattlow,
> +                       NULL, max77620_mbattlow_irq,
> +                       IRQF_ONESHOT, dev_name(chip->dev),
> +                       chip);
> +               if (ret < 0)
> +                       dev_err(&client->dev, "request irq %d failed: %d\n",
> +                       chip->irq_mbattlow, ret);
> +       }
> +
> +       dev_info(&client->dev, "max77620 probe successfully\n");

Not only you are printing a lot of dev_info() for device ID and now
success of probing. Not even dev_dbg(). Don't polute dmesg.

> +       return 0;
> +
> +fail_free_irq:
> +       regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
> +
> +fail_client_reg:
> +       for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
> +               if (!chip->clients[i] || chip->clients[i] == client)
> +                       continue;
> +               i2c_unregister_device(chip->clients[i]);
> +       }
> +       return ret;
> +}
> +
> +static int max77620_remove(struct i2c_client *client)
> +{
> +
> +       struct max77620_chip *chip = i2c_get_clientdata(client);
> +       int i;
> +
> +       mfd_remove_devices(chip->dev);
> +       regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
> +
> +       for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
> +               if (chip->clients[i] != client)
> +                       i2c_unregister_device(chip->clients[i]);
> +       }
> +
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int max77620_set_fps_period(struct max77620_chip *chip,
> +       int fps_id, int time_period)

Indentation looks wrong.

> +{
> +       unsigned int config;
> +       struct device *dev = chip->dev;
> +       int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
> +       int ret;
> +       int i;
> +
> +       for (i = 0; i < 0x7; ++i) {
> +               int x = base_fps_time * BIT(i);
> +
> +               if (x >= time_period)
> +                       break;
> +       }
> +       config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
> +       ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_FPS_CFG0 + fps_id,
> +                       MAX77620_FPS_TIME_PERIOD_MASK, config);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg 0x%02x write failed: %d\n",
> +                       MAX77620_REG_FPS_CFG0 + fps_id, ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int max77620_i2c_suspend(struct device *dev)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       unsigned int config;
> +       int fps;
> +       int ret;
> +
> +       for (fps = 0; fps < 2; ++fps) {
> +               if (chip->suspend_fps_period[fps] < 0)
> +                       continue;
> +
> +               ret = max77620_set_fps_period(chip, fps,
> +                               chip->suspend_fps_period[fps]);
> +               if (ret < 0)
> +                       dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
> +       }
> +
> +       /*
> +        * For MAX20024: No need to configure SLPEN on suspend as
> +        * it will be configured on Init.
> +        */
> +       if (chip->id == MAX20024)
> +               return 0;
> +
> +       config = (chip->sleep_enable) ? MAX77620_ONOFFCNFG1_SLPEN : 0;
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SLPEN,
> +                       config);
> +       if (ret < 0)
> +               dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
> +
> +       /* Disable WK_EN0 */
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0, 0);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +
> +static int max77620_i2c_resume(struct device *dev)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       int ret;
> +       int fps;
> +
> +       for (fps = 0; fps < 2; ++fps) {
> +               if (chip->active_fps_period[fps] < 0)
> +                       continue;
> +
> +               ret = max77620_set_fps_period(chip, fps,
> +                               chip->active_fps_period[fps]);
> +               if (ret < 0)
> +                       dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
> +       }
> +
> +       /*
> +        * For MAX20024: No need to configure WKEN0 on resume as
> +        * it is configured on Init.
> +        */
> +       if (chip->id == MAX20024)
> +               return 0;
> +
> +       /* Enable WK_EN0 */
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +               MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
> +               MAX77620_ONOFFCNFG2_WK_EN0);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct i2c_device_id max77620_id[] = {
> +       {"max77620", 0},
> +       {"max20024", 1},

I suppose the 0/1 should be proper device types (defines, enums etc).

> +       {},
> +};
> +MODULE_DEVICE_TABLE(i2c, max77620_id);
> +
> +static const struct dev_pm_ops max77620_pm_ops = {
> +       SET_SYSTEM_SLEEP_PM_OPS(max77620_i2c_suspend, max77620_i2c_resume)
> +};
> +
> +static struct i2c_driver max77620_driver = {
> +       .driver = {
> +               .name = "max77620",
> +               .owner = THIS_MODULE,

Did you run coccicheck on this?

> +               .pm = &max77620_pm_ops,
> +               .of_match_table = max77620_of_match,
> +       },
> +       .probe = max77620_probe,
> +       .remove = max77620_remove,
> +       .id_table = max77620_id,
> +};
> +
> +static int __init max77620_init(void)
> +{
> +       return i2c_add_driver(&max77620_driver);
> +}
> +subsys_initcall(max77620_init);
> +
> +static void __exit max77620_exit(void)
> +{
> +       i2c_del_driver(&max77620_driver);
> +}
> +module_exit(max77620_exit);
> +
> +MODULE_DESCRIPTION("MAX77620/MAX20024 Multi Function Device Core Driver");
> +MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> +MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> +MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
> +MODULE_ALIAS("i2c:max77620");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
> new file mode 100644
> index 0000000..9d712b2
> --- /dev/null
> +++ b/include/linux/mfd/max77620.h
> @@ -0,0 +1,503 @@
> +/*
> + * max77620.h: Defining registers address and its bit definitions
> + *     of MAX77620 and MAX20024
> + *
> + * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#ifndef _LINUX_MFD_MAX77620_H_
> +#define _LINUX_MFD_MAX77620_H_
> +
> +#include <linux/irq.h>

This include looks unused.

> +#include <linux/i2c.h>
> +#include <linux/mfd/core.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/machine.h>
> +#include <linux/mutex.h>
> +
> +/* RTC Registers */
> +#define MAX77620_REG_RTCINT                    0x00
> +#define MAX77620_REG_RTCINTM                   0x01
> +#define MAX77620_REG_RTCCNTLM                  0x02
> +#define MAX77620_REG_RTCCNTL                   0x03
> +#define MAX77620_REG_RTCUPDATE0                        0x04
> +#define MAX77620_REG_RTCUPDATE1                        0x05
> +#define MAX77620_REG_RTCSMPL                   0x06
> +#define MAX77620_REG_RTCSEC                    0x07
> +#define MAX77620_REG_RTCMIN                    0x08
> +#define MAX77620_REG_RTCHOUR                   0x09
> +#define MAX77620_REG_RTCDOW                    0x0A
> +#define MAX77620_REG_RTCMONTH                  0x0B
> +#define MAX77620_REG_RTCYEAR                   0x0C
> +#define MAX77620_REG_RTCDOM                    0x0D
> +#define MAX77620_REG_RTCSECA1                  0x0E
> +#define MAX77620_REG_RTCMINA1                  0x0F
> +#define MAX77620_REG_RTCHOURA1                 0x10
> +#define MAX77620_REG_RTCDOWA1                  0x11
> +#define MAX77620_REG_RTCMONTHA1                        0x12
> +#define MAX77620_REG_RTCYEARA1                 0x13
> +#define MAX77620_REG_RTCDOMA1                  0x14
> +#define MAX77620_REG_RTCSECA2                  0x15
> +#define MAX77620_REG_RTCMINA2                  0x16
> +#define MAX77620_REG_RTCHOURA2                 0x17
> +#define MAX77620_REG_RTCDOWA2                  0x18
> +#define MAX77620_REG_RTCMONTHA2                        0x19
> +#define MAX77620_REG_RTCYEARA2                 0x1A
> +#define MAX77620_REG_RTCDOMA2                  0x1B
> +
> +/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
> +#define MAX77620_REG_CNFGGLBL1                 0x00
> +#define MAX77620_REG_CNFGGLBL2                 0x01
> +#define MAX77620_REG_CNFGGLBL3                 0x02
> +#define MAX77620_REG_CNFG1_32K                 0x03
> +#define MAX77620_REG_CNFGBBC                   0x04
> +#define MAX77620_REG_IRQTOP                    0x05
> +#define MAX77620_REG_INTLBT                    0x06
> +#define MAX77620_REG_IRQSD                     0x07
> +#define MAX77620_REG_IRQ_LVL2_L0_7             0x08
> +#define MAX77620_REG_IRQ_LVL2_L8               0x09
> +#define MAX77620_REG_IRQ_LVL2_GPIO             0x0A
> +#define MAX77620_REG_ONOFFIRQ                  0x0B
> +#define MAX77620_REG_NVERC                     0x0C
> +#define MAX77620_REG_IRQTOPM                   0x0D
> +#define MAX77620_REG_INTENLBT                  0x0E
> +#define MAX77620_REG_IRQMASKSD                 0x0F
> +#define MAX77620_REG_IRQ_MSK_L0_7              0x10
> +#define MAX77620_REG_IRQ_MSK_L8                        0x11
> +#define MAX77620_REG_ONOFFIRQM                 0x12
> +#define MAX77620_REG_STATLBT                   0x13
> +#define MAX77620_REG_STATSD                    0x14
> +#define MAX77620_REG_ONOFFSTAT                 0x15
> +
> +/* SD and LDO Registers */
> +#define MAX77620_REG_SD0                       0x16
> +#define MAX77620_REG_SD1                       0x17
> +#define MAX77620_REG_SD2                       0x18
> +#define MAX77620_REG_SD3                       0x19
> +#define MAX77620_REG_SD4                       0x1A
> +#define MAX77620_REG_DVSSD0                    0x1B
> +#define MAX77620_REG_DVSSD1                    0x1C
> +#define MAX77620_REG_SD0_CFG                   0x1D
> +#define MAX77620_REG_SD1_CFG                   0x1E
> +#define MAX77620_REG_SD2_CFG                   0x1F
> +#define MAX77620_REG_SD3_CFG                   0x20
> +#define MAX77620_REG_SD4_CFG                   0x21
> +#define MAX77620_REG_SD_CFG2                   0x22
> +#define MAX77620_REG_LDO0_CFG                  0x23
> +#define MAX77620_REG_LDO0_CFG2                 0x24
> +#define MAX77620_REG_LDO1_CFG                  0x25
> +#define MAX77620_REG_LDO1_CFG2                 0x26
> +#define MAX77620_REG_LDO2_CFG                  0x27
> +#define MAX77620_REG_LDO2_CFG2                 0x28
> +#define MAX77620_REG_LDO3_CFG                  0x29
> +#define MAX77620_REG_LDO3_CFG2                 0x2A
> +#define MAX77620_REG_LDO4_CFG                  0x2B
> +#define MAX77620_REG_LDO4_CFG2                 0x2C
> +#define MAX77620_REG_LDO5_CFG                  0x2D
> +#define MAX77620_REG_LDO5_CFG2                 0x2E
> +#define MAX77620_REG_LDO6_CFG                  0x2F
> +#define MAX77620_REG_LDO6_CFG2                 0x30
> +#define MAX77620_REG_LDO7_CFG                  0x31
> +#define MAX77620_REG_LDO7_CFG2                 0x32
> +#define MAX77620_REG_LDO8_CFG                  0x33
> +#define MAX77620_REG_LDO8_CFG2                 0x34
> +#define MAX77620_REG_LDO_CFG3                  0x35
> +
> +#define MAX77620_LDO_SLEW_RATE_MASK            0x1
> +
> +/* LDO Configuration 3 */
> +#define MAX77620_TRACK4_MASK                   BIT(5)
> +#define MAX77620_TRACK4_SHIFT                  5
> +
> +/* Voltage */
> +#define  MAX77620_SDX_VOLT_MASK                        0xFF
> +#define  MAX77620_SD0_VOLT_MASK                        0x3F
> +#define  MAX77620_SD1_VOLT_MASK                        0x7F
> +#define MAX77620_LDO_VOLT_MASK                 0x3F
> +
> +#define MAX77620_REG_GPIO0                     0x36
> +#define MAX77620_REG_GPIO1                     0x37
> +#define MAX77620_REG_GPIO2                     0x38
> +#define MAX77620_REG_GPIO3                     0x39
> +#define MAX77620_REG_GPIO4                     0x3A
> +#define MAX77620_REG_GPIO5                     0x3B
> +#define MAX77620_REG_GPIO6                     0x3C
> +#define MAX77620_REG_GPIO7                     0x3D
> +#define MAX77620_REG_PUE_GPIO                  0x3E
> +#define MAX77620_REG_PDE_GPIO                  0x3F
> +#define MAX77620_REG_AME_GPIO                  0x40
> +#define MAX77620_REG_ONOFFCNFG1                        0x41
> +#define MAX77620_REG_ONOFFCNFG2                        0x42
> +
> +/* FPS Registers */
> +#define MAX77620_REG_FPS_CFG0                  0x43
> +#define MAX77620_REG_FPS_CFG1                  0x44
> +#define MAX77620_REG_FPS_CFG2                  0x45
> +#define MAX77620_REG_FPS_LDO0                  0x46
> +#define MAX77620_REG_FPS_LDO1                  0x47
> +#define MAX77620_REG_FPS_LDO2                  0x48
> +#define MAX77620_REG_FPS_LDO3                  0x49
> +#define MAX77620_REG_FPS_LDO4                  0x4A
> +#define MAX77620_REG_FPS_LDO5                  0x4B
> +#define MAX77620_REG_FPS_LDO6                  0x4C
> +#define MAX77620_REG_FPS_LDO7                  0x4D
> +#define MAX77620_REG_FPS_LDO8                  0x4E
> +#define MAX77620_REG_FPS_SD0                   0x4F
> +#define MAX77620_REG_FPS_SD1                   0x50
> +#define MAX77620_REG_FPS_SD2                   0x51
> +#define MAX77620_REG_FPS_SD3                   0x52
> +#define MAX77620_REG_FPS_SD4                   0x53
> +#define MAX77620_REG_FPS_NONE                  0
> +
> +#define MAX77620_FPS_SRC_MASK                  0xC0
> +#define MAX77620_FPS_SRC_SHIFT                 6
> +#define MAX77620_FPS_PU_PERIOD_MASK            0x38
> +#define MAX77620_FPS_PU_PERIOD_SHIFT           3
> +#define MAX77620_FPS_PD_PERIOD_MASK            0x07
> +#define MAX77620_FPS_PD_PERIOD_SHIFT           0
> +#define MAX77620_FPS_TIME_PERIOD_MASK          0x38
> +#define MAX77620_FPS_TIME_PERIOD_SHIFT         3
> +#define MAX77620_FPS_EN_SRC_MASK               0x06
> +#define MAX77620_FPS_EN_SRC_SHIFT              1
> +#define MAX77620_FPS_ENFPS_MASK                        0x01
> +
> +#define MAX77620_REG_FPS_GPIO1                 0x54
> +#define MAX77620_REG_FPS_GPIO2                 0x55
> +#define MAX77620_REG_FPS_GPIO3                 0x56
> +#define MAX77620_REG_FPS_RSO                   0x57
> +#define MAX77620_REG_CID0                      0x58
> +#define MAX77620_REG_CID1                      0x59
> +#define MAX77620_REG_CID2                      0x5A
> +#define MAX77620_REG_CID3                      0x5B
> +#define MAX77620_REG_CID4                      0x5C
> +#define MAX77620_REG_CID5                      0x5D
> +
> +#define MAX77620_REG_DVSSD4                    0x5E
> +#define MAX20024_REG_MAX_ADD                   0x70
> +
> +#define MAX77620_CID_DIDM_MASK                 0xF0
> +#define MAX77620_CID_DIDM_SHIFT                        4
> +
> +/* CNCG2SD */
> +#define MAX77620_SD_CNF2_ROVS_EN_SD1           BIT(1)
> +#define MAX77620_SD_CNF2_ROVS_EN_SD0           BIT(2)
> +
> +/* Device Identification Metal */
> +#define MAX77620_CID5_DIDM(n)                  (((n) >> 4) & 0xF)
> +/* Device Indentification OTP */
> +#define MAX77620_CID5_DIDO(n)                  ((n) & 0xF)
> +
> +/* SD CNFG1 */
> +#define MAX77620_SD_SR_MASK                    0xC0
> +#define MAX77620_SD_SR_SHIFT                   6
> +#define MAX77620_SD_POWER_MODE_MASK            0x30
> +#define MAX77620_SD_POWER_MODE_SHIFT           4
> +#define MAX77620_SD_CFG1_ADE_MASK              BIT(3)
> +#define MAX77620_SD_CFG1_ADE_DISABLE           0
> +#define MAX77620_SD_CFG1_ADE_ENABLE            BIT(3)
> +#define MAX77620_SD_FPWM_MASK                  0x04
> +#define MAX77620_SD_FPWM_SHIFT                 2
> +#define MAX77620_SD_FSRADE_MASK                        0x01
> +#define MAX77620_SD_FSRADE_SHIFT               0
> +#define MAX77620_SD_CFG1_FPWM_SD_MASK          BIT(2)
> +#define MAX77620_SD_CFG1_FPWM_SD_SKIP          0
> +#define MAX77620_SD_CFG1_FPWM_SD_FPWM          BIT(2)
> +#define MAX77620_SD_CFG1_FSRADE_SD_MASK                BIT(0)
> +#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE     0
> +#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE      BIT(0)
> +
> +/* LDO_CNFG2 */
> +#define MAX77620_LDO_POWER_MODE_MASK           0xC0
> +#define MAX77620_LDO_POWER_MODE_SHIFT          6
> +#define MAX77620_LDO_CFG2_ADE_MASK             BIT(1)
> +#define MAX77620_LDO_CFG2_ADE_DISABLE          0
> +#define MAX77620_LDO_CFG2_ADE_ENABLE           BIT(1)
> +#define MAX77620_LDO_CFG2_SS_MASK              BIT(0)
> +#define MAX77620_LDO_CFG2_SS_FAST              BIT(0)
> +#define MAX77620_LDO_CFG2_SS_SLOW              0
> +
> +#define MAX77620_IRQ_TOP_GLBL_MASK             BIT(7)
> +#define MAX77620_IRQ_TOP_SD_MASK               BIT(6)
> +#define MAX77620_IRQ_TOP_LDO_MASK              BIT(5)
> +#define MAX77620_IRQ_TOP_GPIO_MASK             BIT(4)
> +#define MAX77620_IRQ_TOP_RTC_MASK              BIT(3)
> +#define MAX77620_IRQ_TOP_32K_MASK              BIT(2)
> +#define MAX77620_IRQ_TOP_ONOFF_MASK            BIT(1)
> +
> +#define MAX77620_IRQ_LBM_MASK                  BIT(3)
> +#define MAX77620_IRQ_TJALRM1_MASK              BIT(2)
> +#define MAX77620_IRQ_TJALRM2_MASK              BIT(1)
> +
> +#define MAX77620_PWR_I2C_ADDR                  0x3c
> +#define MAX77620_RTC_I2C_ADDR                  0x68
> +
> +#define MAX77620_CNFG_GPIO_DRV_MASK            BIT(0)
> +#define MAX77620_CNFG_GPIO_DRV_PUSHPULL                BIT(0)
> +#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN       0
> +#define MAX77620_CNFG_GPIO_DIR_MASK            BIT(1)
> +#define MAX77620_CNFG_GPIO_DIR_INPUT           BIT(1)
> +#define MAX77620_CNFG_GPIO_DIR_OUTPUT          0
> +#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK      BIT(2)
> +#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK     BIT(3)
> +#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH     BIT(3)
> +#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW      0
> +#define MAX77620_CNFG_GPIO_INT_MASK            (0x3 << 4)
> +#define MAX77620_CNFG_GPIO_INT_FALLING         BIT(4)
> +#define MAX77620_CNFG_GPIO_INT_RISING          BIT(5)
> +#define MAX77620_CNFG_GPIO_DBNC_MASK           (0x3 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_None           (0x0 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_8ms            (0x1 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_16ms           (0x2 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_32ms           (0x3 << 6)
> +
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE0           BIT(0)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE1           BIT(1)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE2           BIT(2)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE3           BIT(3)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE4           BIT(4)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE5           BIT(5)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE6           BIT(6)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE7           BIT(7)
> +
> +#define MAX77620_CNFG1_32K_OUT0_EN             BIT(2)
> +
> +#define MAX77620_ONOFFCNFG1_SFT_RST            BIT(7)
> +#define MAX77620_ONOFFCNFG1_MRT_MASK           0x38
> +#define MAX77620_ONOFFCNFG1_MRT_SHIFT          0x3
> +#define MAX77620_ONOFFCNFG1_SLPEN              BIT(2)
> +#define MAX77620_ONOFFCNFG1_PWR_OFF            BIT(1)
> +#define MAX20024_ONOFFCNFG1_CLRSE              0x18
> +
> +#define MAX77620_ONOFFCNFG2_SFT_RST_WK         BIT(7)
> +#define MAX77620_ONOFFCNFG2_WD_RST_WK          BIT(6)
> +#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK                BIT(5)
> +#define MAX77620_ONOFFCNFG2_WK_EN0             BIT(0)
> +
> +#define        MAX77620_GLBLM_MASK                     BIT(0)
> +
> +#define MAX77620_WDTC_MASK                     0x3
> +#define MAX77620_WDTOFFC                       BIT(4)
> +#define MAX77620_WDTSLPC                       BIT(3)
> +#define MAX77620_WDTEN                         BIT(2)
> +
> +#define MAX77620_TWD_MASK                      0x3
> +#define MAX77620_TWD_2s                                0x0
> +#define MAX77620_TWD_16s                       0x1
> +#define MAX77620_TWD_64s                       0x2
> +#define MAX77620_TWD_128s                      0x3
> +
> +#define MAX77620_CNFGGLBL1_LBDAC_EN            BIT(7)
> +#define MAX77620_CNFGGLBL1_MPPLD               BIT(6)
> +#define MAX77620_CNFGGLBL1_LBHYST              (BIT(5) | BIT(4))
> +#define MAX77620_CNFGGLBL1_LBDAC               0x0E
> +#define MAX77620_CNFGGLBL1_LBRSTEN             BIT(0)
> +
> +/* CNFG BBC registers */
> +#define MAX77620_CNFGBBC_ENABLE                        BIT(0)
> +#define MAX77620_CNFGBBC_CURRENT_MASK          0x06
> +#define MAX77620_CNFGBBC_CURRENT_SHIFT         1
> +#define MAX77620_CNFGBBC_VOLTAGE_MASK          0x18
> +#define MAX77620_CNFGBBC_VOLTAGE_SHIFT         3
> +#define MAX77620_CNFGBBC_LOW_CURRENT_ENABLE    BIT(5)
> +#define MAX77620_CNFGBBC_RESISTOR_MASK         0xC0
> +#define MAX77620_CNFGBBC_RESISTOR_SHIFT                6
> +
> +/* I2c Slave Id */
> +enum {
> +       MAX77620_PWR_SLAVE,
> +       MAX77620_RTC_SLAVE,
> +       MAX77620_NUM_SLAVES,
> +};
> +
> +/* GPIOs */
> +enum {
> +       MAX77620_GPIO0,
> +       MAX77620_GPIO1,
> +       MAX77620_GPIO2,
> +       MAX77620_GPIO3,
> +       MAX77620_GPIO4,
> +       MAX77620_GPIO5,
> +       MAX77620_GPIO6,
> +       MAX77620_GPIO7,
> +
> +       MAX77620_GPIO_NR,
> +};
> +
> +/* Interrupts */
> +enum {
> +       MAX77620_IRQ_TOP_GLBL,          /* Low-Battery */
> +       MAX77620_IRQ_TOP_SD,            /* SD power fail */
> +       MAX77620_IRQ_TOP_LDO,           /* LDO power fail */
> +       MAX77620_IRQ_TOP_GPIO,          /* TOP GPIO internal int to MAX77620 */
> +       MAX77620_IRQ_TOP_RTC,           /* RTC */
> +       MAX77620_IRQ_TOP_32K,           /* 32kHz oscillator */
> +       MAX77620_IRQ_TOP_ONOFF,         /* ON/OFF oscillator */
> +
> +       MAX77620_IRQ_LBT_MBATLOW,       /* Thermal alarm status, > 120C */
> +       MAX77620_IRQ_LBT_TJALRM1,       /* Thermal alarm status, > 120C */
> +       MAX77620_IRQ_LBT_TJALRM2,       /* Thermal alarm status, > 140C */
> +
> +       MAX77620_IRQ_GPIO0,             /* GPIO0 edge detection */
> +       MAX77620_IRQ_GPIO1,             /* GPIO1 edge detection */
> +       MAX77620_IRQ_GPIO2,             /* GPIO2 edge detection */
> +       MAX77620_IRQ_GPIO3,             /* GPIO3 edge detection */
> +       MAX77620_IRQ_GPIO4,             /* GPIO4 edge detection */
> +       MAX77620_IRQ_GPIO5,             /* GPIO5 edge detection */
> +       MAX77620_IRQ_GPIO6,             /* GPIO6 edge detection */
> +       MAX77620_IRQ_GPIO7,             /* GPIO7 edge detection */
> +
> +       MAX77620_IRQ_ONOFF_MRWRN,       /* Hard power off warnning */
> +       MAX77620_IRQ_ONOFF_EN0_1SEC,    /* EN0 active for 1s */
> +       MAX77620_IRQ_ONOFF_EN0_F,       /* EN0 falling */
> +       MAX77620_IRQ_ONOFF_EN0_R,       /* EN0 rising */
> +       MAX77620_IRQ_ONOFF_LID_F,       /* LID falling */
> +       MAX77620_IRQ_ONOFF_LID_R,       /* LID rising */
> +       MAX77620_IRQ_ONOFF_ACOK_F,      /* ACOK falling */
> +       MAX77620_IRQ_ONOFF_ACOK_R,      /* ACOK rising */
> +
> +       MAX77620_IRQ_NVER,              /* Non-Volatile Event Recorder */
> +       MAX77620_IRQ_NR,
> +};
> +
> +enum max77620_regulators {
> +       MAX77620_REGULATOR_ID_SD0,
> +       MAX77620_REGULATOR_ID_SD1,
> +       MAX77620_REGULATOR_ID_SD2,
> +       MAX77620_REGULATOR_ID_SD3,
> +       MAX77620_REGULATOR_ID_SD4,
> +       MAX77620_REGULATOR_ID_LDO0,
> +       MAX77620_REGULATOR_ID_LDO1,
> +       MAX77620_REGULATOR_ID_LDO2,
> +       MAX77620_REGULATOR_ID_LDO3,
> +       MAX77620_REGULATOR_ID_LDO4,
> +       MAX77620_REGULATOR_ID_LDO5,
> +       MAX77620_REGULATOR_ID_LDO6,
> +       MAX77620_REGULATOR_ID_LDO7,
> +       MAX77620_REGULATOR_ID_LDO8,
> +       MAX77620_NUM_REGS,
> +};
> +
> +/* FPS Source */
> +enum max77620_regulator_fps_src {
> +       FPS_SRC_0,
> +       FPS_SRC_1,
> +       FPS_SRC_2,
> +       FPS_SRC_NONE,
> +       FPS_SRC_DEF,
> +};
> +
> +/* Regulator types */
> +enum max77620_regulator_type {
> +       MAX77620_REGULATOR_TYPE_SD,
> +       MAX77620_REGULATOR_TYPE_LDO_N,
> +       MAX77620_REGULATOR_TYPE_LDO_P,
> +};
> +
> +enum max77620_chip_id {
> +       MAX77620,
> +       MAX20024,
> +};
> +
> +struct max77620_chip {
> +       struct device *dev;
> +
> +       struct i2c_client *clients[MAX77620_NUM_SLAVES];
> +       struct regmap *rmap[MAX77620_NUM_SLAVES];
> +
> +       int chip_irq;
> +       int irq_base;
> +       int irq_mbattlow;
> +
> +       struct mutex mutex_config;
> +       bool sleep_enable;
> +       bool enable_global_lpm;
> +       int active_fps_period[3];
> +       int suspend_fps_period[3];
> +
> +       int es_minor_version;
> +       int es_major_version;

You set it once and...? Please clean this driver from such
internal/vendor stuff.

> +
> +       struct regmap_irq_chip_data *top_irq_data;
> +       struct regmap_irq_chip_data *gpio_irq_data;
> +
> +       /* chip id */
> +       u32 id;
> +};
> +
> +static inline int max77620_irq_get_virq(struct device *dev, int irq)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_irq_get_virq(chip->top_irq_data, irq);
> +}
> +
> +static inline int max77620_reg_write(struct device *dev, int sid,
> +               unsigned int reg, u8 val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_write(chip->rmap[sid], reg, val);
> +}
> +
> +static inline int max77620_reg_writes(struct device *dev, int sid,
> +               unsigned int reg, int len, void *val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       int ret = 0;
> +       u8 *src = (u8 *)val;
> +       int i;
> +
> +       /* Device does not support bulk write */
> +       for (i = 0; i < len; i++) {
> +               ret = regmap_write(chip->rmap[sid], reg, *src++);
> +               if (ret < 0)
> +                       break;
> +               reg++;
> +       }
> +       if (ret < 0)
> +               dev_err(chip->dev, "%s() failed: %d\n", __func__, ret);

New line.

> +       return ret;
> +}
> +
> +static inline int max77620_reg_read(struct device *dev, int sid,
> +               unsigned int reg, u8 *val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       unsigned int ival;
> +       int ret;
> +
> +       ret = regmap_read(chip->rmap[sid], reg, &ival);
> +       if (ret < 0) {
> +               dev_err(dev, "failed reading from reg 0x%02x\n", reg);

Great, how many errors you want to print? On error you will have
messages coming from:
1. max77620_reg_read
2. max77620_read_es_version
3. max77620_probe

Three errors messages for the same error.

> +               return ret;
> +       }
> +       *val = ival;
> +       return ret;
> +}
> +
> +static inline int max77620_reg_reads(struct device *dev, int sid,
> +               unsigned int reg, int len, void *val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_bulk_read(chip->rmap[sid], reg, val, len);
> +}
> +
> +static inline int max77620_reg_update(struct device *dev, int sid,
> +               unsigned int reg, unsigned int mask, unsigned int val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
> +}

I think all these shouldn't be static inlines in header. Although some
of them are one-liners but rest are not. Let the compiler decide what
to do with these wrappers.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08  1:35     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08  1:35 UTC (permalink / raw)
  To: rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> MAX77620/MAX20024 are Power Management IC from the MAXIM.
> It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> watchdog, clock etc.
>
> Add MFD drier to provides common support for accessing the
> device; additional drivers is developed on respected subsystem
> in order to use the functionality of the device.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

The Testing and Reviewed are statements (see SubmittingPatches) so
they should be made explicitly by people. As this is v1 how they could
make a public statement so far?

> ---
>  drivers/mfd/Kconfig          |  15 +
>  drivers/mfd/Makefile         |   1 +
>  drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
>  include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
>  4 files changed, 1445 insertions(+)
>  create mode 100644 drivers/mfd/max77620.c
>  create mode 100644 include/linux/mfd/max77620.h
>
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 9581ebb..edeb85c 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -492,6 +492,21 @@ config MFD_MAX14577
>           additional drivers must be enabled in order to use the functionality
>           of the device.
>
> +config MFD_MAX77620
> +       bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support"
> +       depends on I2C=y
> +       depends on OF
> +       select MFD_CORE
> +       select REGMAP_I2C
> +       select REGMAP_IRQ
> +       select IRQ_DOMAIN
> +       help
> +         Say yes here to add support for Maxim Semiconductor MAX77620 and
> +         MAX20024 which are Power Management IC with General purpose pins,
> +         RTC, regulators, clock generator, watchdog etc. This driver
> +         provides common support for accessing the device; additional drivers
> +         must be enabled in order to use the functionality of the device.
> +
>  config MFD_MAX77686
>         bool "Maxim Semiconductor MAX77686/802 PMIC Support"
>         depends on I2C=y
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 0f230a6..97910ed 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -123,6 +123,7 @@ obj-$(CONFIG_MFD_DA9063)    += da9063.o
>  obj-$(CONFIG_MFD_DA9150)       += da9150-core.o
>
>  obj-$(CONFIG_MFD_MAX14577)     += max14577.o
> +obj-$(CONFIG_MFD_MAX77620)     += max77620.o
>  obj-$(CONFIG_MFD_MAX77686)     += max77686.o
>  obj-$(CONFIG_MFD_MAX77693)     += max77693.o
>  obj-$(CONFIG_MFD_MAX77843)     += max77843.o
> diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c
> new file mode 100644
> index 0000000..5f59279
> --- /dev/null
> +++ b/drivers/mfd/max77620.c
> @@ -0,0 +1,926 @@
> +/*
> + * Maxim MAX77620 MFD Driver
> + *
> + * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
> + *
> + * Author:
> + *             Laxman Dewangan <ldewangan@nvidia.com>
> + *             Chaitanya Bandi <bandik@nvidia.com>
> + *             Mallikarjun Kasoju <mkasoju@nvidia.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#include <linux/interrupt.h>
> +#include <linux/i2c.h>
> +#include <linux/slab.h>
> +#include <linux/ratelimit.h>
> +#include <linux/kthread.h>
> +#include <linux/mfd/core.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/delay.h>
> +#include <linux/uaccess.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_platform.h>

So many includes. Do you really need ratelimit, kthread, delay,
uaccess, of_platform?

> +
> +#include <linux/mfd/max77620.h>
> +
> +static struct resource gpio_resources[] = {
> +       {
> +               .start  = MAX77620_IRQ_TOP_GPIO,
> +               .end    = MAX77620_IRQ_TOP_GPIO,
> +               .flags  = IORESOURCE_IRQ,
> +       }
> +};
> +
> +static struct resource rtc_resources[] = {
> +       {
> +               .start  = MAX77620_IRQ_TOP_RTC,
> +               .end    = MAX77620_IRQ_TOP_RTC,
> +               .flags  = IORESOURCE_IRQ,
> +       }
> +};
> +
> +static struct resource thermal_resources[] = {
> +       {
> +               .start  = MAX77620_IRQ_LBT_TJALRM1,
> +               .end    = MAX77620_IRQ_LBT_TJALRM1,
> +               .flags  = IORESOURCE_IRQ,
> +       },
> +       {
> +               .start  = MAX77620_IRQ_LBT_TJALRM2,
> +               .end    = MAX77620_IRQ_LBT_TJALRM2,
> +               .flags  = IORESOURCE_IRQ,
> +       }
> +};
> +
> +static const struct regmap_irq max77620_top_irqs[] = {
> +       [MAX77620_IRQ_TOP_GLBL] = {
> +               .mask = MAX77620_IRQ_TOP_GLBL_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_SD] = {
> +               .mask = MAX77620_IRQ_TOP_SD_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_LDO] = {
> +               .mask = MAX77620_IRQ_TOP_LDO_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_GPIO] = {
> +               .mask = MAX77620_IRQ_TOP_GPIO_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_RTC] = {
> +               .mask = MAX77620_IRQ_TOP_RTC_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_32K] = {
> +               .mask = MAX77620_IRQ_TOP_32K_MASK,
> +               .reg_offset = 0,
> +       },
> +       [MAX77620_IRQ_TOP_ONOFF] = {
> +               .mask = MAX77620_IRQ_TOP_ONOFF_MASK,
> +               .reg_offset = 0,
> +       },
> +
> +       [MAX77620_IRQ_LBT_MBATLOW] = {
> +               .mask = MAX77620_IRQ_LBM_MASK,
> +               .reg_offset = 1,
> +       },
> +       [MAX77620_IRQ_LBT_TJALRM1] = {
> +               .mask = MAX77620_IRQ_TJALRM1_MASK,
> +               .reg_offset = 1,
> +       },
> +       [MAX77620_IRQ_LBT_TJALRM2] = {
> +               .mask = MAX77620_IRQ_TJALRM2_MASK,
> +               .reg_offset = 1,
> +       },
> +
> +};
> +
> +static const char * const max77620_nverc[] = {
> +       "Shutdown-pin",
> +       "System WatchDog Timer",
> +       "Hard Reset",
> +       "Junction Temp Overload",
> +       "Main-Battery Low",
> +       "Main-Battery overvoltage Lockout",
> +       "Main-Battery undervoltage Lockout",
> +       "Reset input",
> +};
> +
> +enum max77660_ids {
> +       MAX77620_PMIC_ID,
> +       MAX77620_GPIO_ID,
> +       MAX77620_RTC_ID,
> +       MAX77620_PINCTRL_ID,
> +       MAX77620_CLK_ID,
> +       MAX77620_POWER_OFF_ID,
> +       MAX77620_WDT_ID,
> +       MAX77620_THERMAL_ID,
> +};
> +
> +#define MAX77620_SUB_MODULE_RES(_name, _id)                    \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max77620-"#_name,                      \
> +               .num_resources  = ARRAY_SIZE(_name##_resources), \
> +               .resources      = &_name##_resources[0],        \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +#define MAX20024_SUB_MODULE_RES(_name, _id)                    \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max20024-"#_name,                      \
> +               .num_resources  = ARRAY_SIZE(_name##_resources), \
> +               .resources      = &_name##_resources[0],        \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +#define MAX77620_SUB_MODULE_NO_RES(_name, _id)                 \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max77620-"#_name,                      \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +#define MAX20024_SUB_MODULE_NO_RES(_name, _id)                 \
> +       [MAX77620_##_id##_ID] = {                               \
> +               .name = "max20024-"#_name,                      \
> +               .id = MAX77620_##_id##_ID,                      \
> +       }
> +
> +static struct mfd_cell max77620_children[] = {
> +       MAX77620_SUB_MODULE_RES(gpio, GPIO),
> +       MAX77620_SUB_MODULE_NO_RES(pmic, PMIC),
> +       MAX77620_SUB_MODULE_RES(rtc, RTC),
> +       MAX77620_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
> +       MAX77620_SUB_MODULE_NO_RES(clk, CLK),
> +       MAX77620_SUB_MODULE_NO_RES(power-off, POWER_OFF),
> +       MAX77620_SUB_MODULE_NO_RES(wdt, WDT),
> +       MAX77620_SUB_MODULE_RES(thermal, THERMAL),
> +};
> +
> +static struct mfd_cell max20024_children[] = {
> +       MAX20024_SUB_MODULE_RES(gpio, GPIO),
> +       MAX20024_SUB_MODULE_NO_RES(pmic, PMIC),
> +       MAX20024_SUB_MODULE_RES(rtc, RTC),
> +       MAX20024_SUB_MODULE_NO_RES(pinctrl, PINCTRL),
> +       MAX20024_SUB_MODULE_NO_RES(clk, CLK),
> +       MAX20024_SUB_MODULE_NO_RES(power-off, POWER_OFF),
> +       MAX20024_SUB_MODULE_NO_RES(wdt, WDT),
> +       MAX20024_SUB_MODULE_RES(thermal, THERMAL),
> +};
> +
> +struct max77620_sub_modules {
> +       struct mfd_cell *cells;
> +       int ncells;
> +       u32 id;
> +};
> +
> +static const struct max77620_sub_modules max77620_cells = {
> +       .cells = max77620_children,
> +       .ncells = ARRAY_SIZE(max77620_children),
> +       .id = MAX77620,
> +};
> +
> +static const struct max77620_sub_modules  max20024_cells = {
> +       .cells = max20024_children,
> +       .ncells = ARRAY_SIZE(max20024_children),
> +       .id = MAX20024,
> +};
> +
> +static const struct of_device_id max77620_of_match[] = {
> +       {
> +               .compatible = "maxim,max77620",
> +               .data = &max77620_cells,
> +       }, {
> +               .compatible = "maxim,max20024",
> +               .data = &max20024_cells,
> +       }, {
> +       },
> +};
> +MODULE_DEVICE_TABLE(of, max77620_of_match);
> +
> +static struct regmap_irq_chip max77620_top_irq_chip = {
> +       .name = "max77620-top",
> +       .irqs = max77620_top_irqs,
> +       .num_irqs = ARRAY_SIZE(max77620_top_irqs),
> +       .num_regs = 2,
> +       .status_base = MAX77620_REG_IRQTOP,
> +       .mask_base = MAX77620_REG_IRQTOPM,
> +};
> +
> +static const struct regmap_range max77620_readable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
> +};
> +
> +static const struct regmap_access_table max77620_readable_table = {
> +       .yes_ranges = max77620_readable_ranges,
> +       .n_yes_ranges = ARRAY_SIZE(max77620_readable_ranges),
> +};
> +
> +static const struct regmap_range max20024_readable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
> +       regmap_reg_range(MAX20024_REG_MAX_ADD, MAX20024_REG_MAX_ADD),
> +};
> +
> +static const struct regmap_access_table max20024_readable_table = {
> +       .yes_ranges = max20024_readable_ranges,
> +       .n_yes_ranges = ARRAY_SIZE(max20024_readable_ranges),
> +};
> +
> +static const struct regmap_range max77620_writable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_CNFGGLBL1, MAX77620_REG_DVSSD4),
> +};
> +
> +static const struct regmap_access_table max77620_writable_table = {
> +       .yes_ranges = max77620_writable_ranges,
> +       .n_yes_ranges = ARRAY_SIZE(max77620_writable_ranges),
> +};
> +
> +static const struct regmap_range max77620_cacheable_ranges[] = {
> +       regmap_reg_range(MAX77620_REG_SD0_CFG, MAX77620_REG_LDO_CFG3),
> +       regmap_reg_range(MAX77620_REG_FPS_CFG0, MAX77620_REG_FPS_SD3),
> +};
> +
> +static const struct regmap_access_table max77620_volatile_table = {
> +       .no_ranges = max77620_cacheable_ranges,
> +       .n_no_ranges = ARRAY_SIZE(max77620_cacheable_ranges),
> +};
> +
> +static struct regmap_config max77620_regmap_config[] = {
> +       [MAX77620_PWR_SLAVE] = {
> +               .reg_bits = 8,
> +               .val_bits = 8,
> +               .max_register = MAX77620_REG_DVSSD4 + 1,
> +               .cache_type = REGCACHE_RBTREE,
> +               .rd_table = &max77620_readable_table,
> +               .wr_table = &max77620_writable_table,
> +               .volatile_table = &max77620_volatile_table,
> +       },
> +       [MAX77620_RTC_SLAVE] = {
> +               .reg_bits = 8,
> +               .val_bits = 8,
> +               .max_register = 0x1b,
> +       },
> +};
> +
> +static int max77620_slave_address[MAX77620_NUM_SLAVES] = {
> +       MAX77620_PWR_I2C_ADDR,
> +       MAX77620_RTC_I2C_ADDR,
> +};
> +
> +static int max77620_initialise_fps(struct max77620_chip *chip,
> +                       struct device *dev)
> +{
> +       struct device_node *node;
> +       struct device_node *child;
> +       u32 reg, pval;
> +       int ret;
> +       int time_period = 40;
> +       int input_enable = 2;
> +       bool enable_fps = false;
> +       unsigned int mask;
> +       unsigned int config;
> +       int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
> +       int i;

That's a lot of variables. I can't find any kind of order they were
put in, they are not groupped by type nor put in the same line. Please
make it simpler.

> +
> +       node = of_get_child_by_name(dev->of_node, "fps");
> +       if (!node)
> +               goto skip_fps;
> +
> +       for (reg = 0; reg < 3; ++reg) {
> +               chip->active_fps_period[reg] = -1;
> +               chip->suspend_fps_period[reg] = -1;
> +       }
> +
> +       for_each_child_of_node(node, child) {
> +               ret = of_property_read_u32(child, "reg", &reg);
> +               if (ret) {
> +                       dev_err(dev, "node %s does not have reg property\n",
> +                                       child->name);
> +                       continue;
> +               }
> +               if (reg > 2) {
> +                       dev_err(dev, "FPS%d is not supported\n", reg);
> +                       continue;
> +               }
> +
> +               mask = 0;
> +               ret = of_property_read_u32(child,
> +                               "maxim,active-fps-time-period", &pval);
> +               if (!ret) {
> +                       time_period = min(pval, 5120U);
> +                       mask |= MAX77620_FPS_TIME_PERIOD_MASK;
> +                       chip->active_fps_period[reg] = time_period;
> +               }
> +
> +               ret = of_property_read_u32(child,
> +                                       "maxim,suspend-fps-time-period", &pval);
> +               if (!ret)
> +                       chip->suspend_fps_period[reg] = min(pval, 5120U);
> +
> +               ret = of_property_read_u32(child, "maxim,fps-enable-input",
> +                                               &pval);
> +               if (!ret) {
> +                       if (pval > 2) {
> +                               dev_err(dev,
> +                                   "FPS enable-input %u is not supported\n",
> +                                       pval);

Indentation of arguments does not seem equal here or maybe this is
just my email client. Have you run this through checkpatch? And
sparse? And coccicheck (that one definitely not because kbuild is
complaining)?

This is quite big function with 4 levels of indentation + identation
of dev_err() arguments. Maybe split parsing of child nodes to separate
function? Now the code looks quite ugly because of lot of line splits.

> +                       } else {
> +                               input_enable = pval;
> +                               mask |= MAX77620_FPS_EN_SRC_MASK;
> +                       }
> +               }
> +
> +               if (input_enable == 2) {
> +                       enable_fps = of_property_read_bool(child,
> +                                               "maxim,fps-sw-enable");
> +                       mask |= MAX77620_FPS_ENFPS_MASK;
> +               }
> +
> +               if (!chip->sleep_enable)
> +                       chip->sleep_enable = of_property_read_bool(child,
> +                                               "maxim,enable-sleep");
> +               if (!chip->enable_global_lpm)
> +                       chip->enable_global_lpm = of_property_read_bool(child,
> +                                               "maxim,enable-global-lpm");
> +
> +               for (i = 0; i < 0x7; ++i) {
> +                       int x = base_fps_time * BIT(i);
> +
> +                       if (x >= time_period)
> +                               break;
> +               }
> +               config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
> +               config |= (input_enable & 0x3) << MAX77620_FPS_EN_SRC_SHIFT;
> +               if (enable_fps)
> +                       config |= 1;
> +               ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                               MAX77620_REG_FPS_CFG0 + reg, mask, config);
> +               if (ret < 0) {
> +                       dev_err(dev, "Reg 0x%02x write failed: %d\n",
> +                               MAX77620_REG_FPS_CFG0 + reg, ret);
> +                       return ret;
> +               }
> +       }
> +
> +       config = chip->enable_global_lpm ? MAX77620_ONOFFCNFG2_SLP_LPM_MSK : 0;
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG2,
> +                       MAX77620_ONOFFCNFG2_SLP_LPM_MSK, config);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +skip_fps:
> +       /* Enable wake on EN0 pin */
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
> +                       MAX77620_ONOFFCNFG2_WK_EN0);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       if (!chip->sleep_enable)
> +               chip->sleep_enable = of_property_read_bool(dev->of_node,
> +                                               "maxim,enable-sleep");
> +
> +       /* For MAX20024, SLPEN will be POR reset if CLRSE is b11 */
> +       if ((chip->id == MAX20024) && chip->sleep_enable) {
> +               config = MAX77620_ONOFFCNFG1_SLPEN | MAX20024_ONOFFCNFG1_CLRSE;
> +               ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG1, config, config);
> +               if (ret < 0) {
> +                       dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
> +                       return ret;
> +               }
> +       }
> +       return 0;

Here and in other places: preceed the final return with  blank line.

> +}
> +
> +static int max77620_init_backup_battery_charging(struct max77620_chip *chip,
> +               struct device *dev)
> +{
> +       struct device_node *np;
> +       u32 pval;
> +       u8 config;
> +       int charging_current;
> +       int charging_voltage;
> +       int resistor;
> +       int ret;

Why not all int's in one line?

> +
> +       np = of_get_child_by_name(dev->of_node, "backup-battery");
> +       if (!np) {
> +               dev_info(dev, "Backup battery charging support disabled\n");
> +               max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_ENABLE, 0);
> +               return 0;
> +       }
> +
> +       ret = of_property_read_u32(np,
> +                       "maxim,backup-battery-charging-current", &pval);
> +       charging_current = (!ret) ? pval : 50;
> +
> +       ret = of_property_read_u32(np,
> +                       "maxim,backup-battery-charging-voltage", &pval);
> +       charging_voltage = (!ret) ? pval : 2500000;
> +       charging_voltage /= 1000;
> +
> +       ret = of_property_read_u32(np,
> +                       "maxim,backup-battery-output-resister", &pval);
> +       resistor = (!ret) ? pval : 1000;
> +
> +       config = MAX77620_CNFGBBC_ENABLE;
> +       if (charging_current <= 50)
> +               config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 100)
> +               config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 200)
> +               config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 400)
> +               config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else if (charging_current <= 600)
> +               config |= 1 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +       else
> +               config |= 2 << MAX77620_CNFGBBC_CURRENT_SHIFT;
> +
> +       if (charging_current > 100)
> +               config |= MAX77620_CNFGBBC_LOW_CURRENT_ENABLE;
> +
> +       if (charging_voltage <= 2500)
> +               config |= 0 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +       else if (charging_voltage <= 3000)
> +               config |= 1 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +       else if (charging_voltage <= 3300)
> +               config |= 2 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +       else
> +               config |= 3 << MAX77620_CNFGBBC_VOLTAGE_SHIFT;
> +
> +       if (resistor <= 100)
> +               config |= 0 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +       else if (resistor <= 1000)
> +               config |= 1 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +       else if (resistor <= 3000)
> +               config |= 2 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +       else if (resistor <= 6000)
> +               config |= 3 << MAX77620_CNFGBBC_RESISTOR_SHIFT;
> +
> +       ret = max77620_reg_write(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_CNFGBBC, config);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg 0x%02x write failed: %d\n",
> +                       MAX77620_REG_CNFGBBC, ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int max77620_init_low_battery_monitor(struct max77620_chip *chip,
> +               struct device *dev)
> +{
> +       struct device_node *np;
> +       bool pval;
> +       u8 mask = 0;
> +       u8 val = 0;
> +       int ret;
> +

No need of 2 blank lines. And put any kind of order here. The local
variables are declared in random order. Either use
reversed-christmas-tree or put first non-init and then initialized
vars or any other idea (your choice...).

> +
> +       np = of_get_child_by_name(dev->of_node, "low-battery-monitor");
> +       if (!np)
> +               return 0;
> +
> +       pval = of_property_read_bool(np, "maxim,low-battery-dac-enable");
> +       if (pval) {
> +               mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
> +               val |= MAX77620_CNFGGLBL1_LBDAC_EN;
> +       }
> +       pval = of_property_read_bool(np, "maxim,low-battery-dac-disable");
> +       if (pval)
> +               mask |= MAX77620_CNFGGLBL1_LBDAC_EN;
> +
> +       pval = of_property_read_bool(np, "maxim,low-battery-shutdown-enable");
> +       if (pval) {
> +               mask |= MAX77620_CNFGGLBL1_MPPLD;
> +               val |= MAX77620_CNFGGLBL1_MPPLD;
> +       }
> +       pval = of_property_read_bool(np, "maxim,low-battery-shutdown-disable");
> +       if (pval)
> +               mask |= MAX77620_CNFGGLBL1_MPPLD;
> +
> +       pval = of_property_read_bool(np, "maxim,low-battery-reset-enable");
> +       if (pval) {
> +               mask |= MAX77620_CNFGGLBL1_LBRSTEN;
> +               val |= MAX77620_CNFGGLBL1_LBRSTEN;
> +       }
> +       pval = of_property_read_bool(np, "maxim,low-battery-reset-disable");
> +       if (pval)
> +               mask |= MAX77620_CNFGGLBL1_LBRSTEN;
> +
> +       ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_CNFGGLBL1, mask, val);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg CNFGGLBL1 update failed: %d\n", ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int max77620_initialise_chip(struct max77620_chip *chip,
> +                       struct device *dev)
> +{
> +       struct device_node *node = dev->of_node;
> +       u32 mrt_time = 0;
> +       u8 reg_val;
> +       int ret;
> +
> +       of_property_read_u32(node, "maxim,hard-power-off-time", &mrt_time);
> +       if (!mrt_time)
> +               return 0;

Different style than in previous of parsing functions. You always used
'ret' to check if property exists. Why style is not consistent?

> +
> +       mrt_time = (mrt_time > 12) ? 12 : mrt_time;
> +       if (mrt_time <= 6)
> +               reg_val = mrt_time - 2;
> +       else
> +               reg_val = (mrt_time - 6) / 2 + 4;
> +
> +       reg_val <<= MAX77620_ONOFFCNFG1_MRT_SHIFT;
> +
> +       ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_MRT_MASK,
> +                       reg_val);
> +       if (ret < 0)
> +               dev_err(dev, "Reg 0x%02x update failed: %d\n",
> +                       MAX77620_REG_ONOFFCNFG1, reg_val);
> +       return ret;
> +}
> +
> +static int max77620_read_es_version(struct max77620_chip *chip)
> +{
> +       int ret;
> +       u8 val;
> +       u8 cid;
> +       int i;
> +       u8 cid_val[6];
> +
> +       for (i = MAX77620_REG_CID0; i <= MAX77620_REG_CID5; ++i) {
> +               ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
> +                               i, &cid);
> +               if (ret < 0) {
> +                       dev_err(chip->dev, "CID%d register read failed: %d\n",
> +                                       i - MAX77620_REG_CID0, ret);
> +                       return ret;
> +               }
> +               dev_info(chip->dev, "CID%d: 0x%02x\n",
> +                       i - MAX77620_REG_CID0, cid);
> +               cid_val[i - MAX77620_REG_CID0] = cid;
> +       }
> +
> +       /* CID4 is OTP Version */
> +       dev_info(chip->dev, "MAX77620 PMIC OTP Version: 0x%02X\n", cid_val[4]);
> +
> +       /* CID5 is ES version */
> +       chip->es_minor_version = MAX77620_CID5_DIDM(cid_val[5]);
> +       chip->es_major_version = 1;
> +       dev_info(chip->dev, "MAX77620 PMIC ES version: %d.%d\n",
> +                               chip->es_major_version, chip->es_minor_version);
> +
> +       /* Read NVERC register */
> +       ret = max77620_reg_read(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_NVERC, &val);
> +       if (ret < 0) {
> +               dev_err(chip->dev, "NVERC read failed: %d\n", ret);
> +               return ret;
> +       }
> +       dev_info(chip->dev, "NVERC = 0x%02x\n", val);
> +       for (i = 0; i < 8; ++i) {
> +               if (val & BIT(i))
> +                       dev_info(chip->dev, "NVERC: %s\n", max77620_nverc[i]);
> +       }

So many dev_info() for one driver. One is sufficient. Rest should be dev_dbg().

> +       return ret;
> +}
> +
> +static irqreturn_t max77620_mbattlow_irq(int irq, void *data)
> +{
> +       struct max77620_chip *max77620 = data;
> +
> +       dev_info(max77620->dev, "MBATTLOW interrupt occurred\n");

Not a dev_info(). You are not doing with the interrupt anyway so this
does not look important. If it were important than I would suspect
something like power_supply_changed() to notify userspace etc.

> +
> +       return IRQ_HANDLED;
> +}
> +
> +static int max77620_probe(struct i2c_client *client,
> +                         const struct i2c_device_id *id)
> +{
> +       struct device_node *node = client->dev.of_node;
> +       const struct max77620_sub_modules *children;
> +       struct max77620_chip *chip;
> +       int i = 0;
> +       int ret = 0;
> +       const struct of_device_id *match;
> +
> +       if (!node) {
> +               dev_err(&client->dev, "Device is not from DT\n");
> +               return -ENODEV;
> +       }
> +
> +       match = of_match_device(max77620_of_match, &client->dev);
> +       children = match->data;
> +       if (!children)
> +               return -ENODEV;
> +
> +       chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
> +       if (!chip)
> +               return -ENOMEM;
> +
> +       i2c_set_clientdata(client, chip);
> +       chip->dev = &client->dev;
> +       chip->irq_base = -1;
> +       chip->chip_irq = client->irq;
> +       chip->id = children->id;
> +
> +       if (chip->id == MAX20024) {
> +               max77620_regmap_config[MAX77620_PWR_SLAVE].rd_table =
> +                                       &max20024_readable_table;
> +               max77620_regmap_config[MAX77620_PWR_SLAVE].max_register =
> +                               MAX20024_REG_MAX_ADD + 1;
> +       }
> +
> +       mutex_init(&chip->mutex_config);
> +
> +       for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
> +               if (max77620_slave_address[i] == client->addr)
> +                       chip->clients[i] = client;
> +               else
> +                       chip->clients[i] = i2c_new_dummy(client->adapter,
> +                                               max77620_slave_address[i]);
> +               if (!chip->clients[i]) {
> +                       dev_err(&client->dev, "can't attach client %d\n", i);
> +                       ret = -ENOMEM;
> +                       goto fail_client_reg;
> +               }
> +
> +               chip->clients[i]->dev.of_node = node;
> +               i2c_set_clientdata(chip->clients[i], chip);
> +               max77620_regmap_config[i].lock_arg = chip;
> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
> +               (const struct regmap_config *)&max77620_regmap_config[i]);

Indentation looks weird here (or again this is my email client...).
The cast is even weirder?!? Why casting?


> +               if (IS_ERR(chip->rmap[i])) {
> +                       ret = PTR_ERR(chip->rmap[i]);
> +                       dev_err(&client->dev,
> +                               "regmap %d init failed, err %d\n", i, ret);
> +                       goto fail_client_reg;
> +               }
> +       }
> +
> +       ret = max77620_read_es_version(chip);
> +       if (ret < 0) {
> +               dev_err(chip->dev, "Chip revision init failed: %d\n", ret);

Here and in other places you will have always two error messages
printed for the same error (the same cause, trackable to the same
path). One error message coming from max77620_read_es_version() and
second here. No need. Just print error once.

> +               goto fail_client_reg;
> +       }
> +
> +       ret = max77620_initialise_chip(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev, "Chip initialisation failed: %d\n", ret);
> +               goto fail_client_reg;
> +       }
> +
> +       ret = regmap_add_irq_chip(chip->rmap[MAX77620_PWR_SLAVE],
> +               chip->chip_irq, IRQF_ONESHOT | IRQF_SHARED, chip->irq_base,
> +               &max77620_top_irq_chip, &chip->top_irq_data);
> +       if (ret < 0) {
> +               dev_err(chip->dev, "Failed to add top irq_chip %d\n", ret);
> +               goto fail_client_reg;
> +       }
> +
> +       ret = max77620_initialise_fps(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev, "FPS initialisation failed: %d\n", ret);
> +               goto fail_free_irq;
> +       }
> +
> +       ret = max77620_init_backup_battery_charging(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev,
> +                       "Backup battery charging init failed: %d\n", ret);
> +               goto fail_free_irq;
> +       }
> +
> +       ret = max77620_init_low_battery_monitor(chip, &client->dev);
> +       if (ret < 0) {
> +               dev_err(&client->dev, "Low battery monitor init failed: %d\n",
> +                       ret);
> +               goto fail_free_irq;
> +       }
> +
> +       ret =  mfd_add_devices(&client->dev, -1, children->cells,
> +                       children->ncells, NULL, 0,
> +                       regmap_irq_get_domain(chip->top_irq_data));
> +       if (ret < 0) {
> +               dev_err(&client->dev, "mfd add dev fail %d\n", ret);
> +               goto fail_free_irq;
> +       }
> +
> +       chip->irq_mbattlow = max77620_irq_get_virq(chip->dev,
> +                                       MAX77620_IRQ_LBT_MBATLOW);
> +       if (chip->irq_mbattlow) {
> +               ret = devm_request_threaded_irq(chip->dev, chip->irq_mbattlow,
> +                       NULL, max77620_mbattlow_irq,
> +                       IRQF_ONESHOT, dev_name(chip->dev),
> +                       chip);
> +               if (ret < 0)
> +                       dev_err(&client->dev, "request irq %d failed: %d\n",
> +                       chip->irq_mbattlow, ret);
> +       }
> +
> +       dev_info(&client->dev, "max77620 probe successfully\n");

Not only you are printing a lot of dev_info() for device ID and now
success of probing. Not even dev_dbg(). Don't polute dmesg.

> +       return 0;
> +
> +fail_free_irq:
> +       regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
> +
> +fail_client_reg:
> +       for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
> +               if (!chip->clients[i] || chip->clients[i] == client)
> +                       continue;
> +               i2c_unregister_device(chip->clients[i]);
> +       }
> +       return ret;
> +}
> +
> +static int max77620_remove(struct i2c_client *client)
> +{
> +
> +       struct max77620_chip *chip = i2c_get_clientdata(client);
> +       int i;
> +
> +       mfd_remove_devices(chip->dev);
> +       regmap_del_irq_chip(chip->chip_irq, chip->top_irq_data);
> +
> +       for (i = 0; i < MAX77620_NUM_SLAVES; i++) {
> +               if (chip->clients[i] != client)
> +                       i2c_unregister_device(chip->clients[i]);
> +       }
> +
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int max77620_set_fps_period(struct max77620_chip *chip,
> +       int fps_id, int time_period)

Indentation looks wrong.

> +{
> +       unsigned int config;
> +       struct device *dev = chip->dev;
> +       int base_fps_time = (chip->id == MAX20024) ? 20 : 40;
> +       int ret;
> +       int i;
> +
> +       for (i = 0; i < 0x7; ++i) {
> +               int x = base_fps_time * BIT(i);
> +
> +               if (x >= time_period)
> +                       break;
> +       }
> +       config = (i & 0x7) << MAX77620_FPS_TIME_PERIOD_SHIFT;
> +       ret = max77620_reg_update(dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_FPS_CFG0 + fps_id,
> +                       MAX77620_FPS_TIME_PERIOD_MASK, config);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg 0x%02x write failed: %d\n",
> +                       MAX77620_REG_FPS_CFG0 + fps_id, ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int max77620_i2c_suspend(struct device *dev)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       unsigned int config;
> +       int fps;
> +       int ret;
> +
> +       for (fps = 0; fps < 2; ++fps) {
> +               if (chip->suspend_fps_period[fps] < 0)
> +                       continue;
> +
> +               ret = max77620_set_fps_period(chip, fps,
> +                               chip->suspend_fps_period[fps]);
> +               if (ret < 0)
> +                       dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
> +       }
> +
> +       /*
> +        * For MAX20024: No need to configure SLPEN on suspend as
> +        * it will be configured on Init.
> +        */
> +       if (chip->id == MAX20024)
> +               return 0;
> +
> +       config = (chip->sleep_enable) ? MAX77620_ONOFFCNFG1_SLPEN : 0;
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SLPEN,
> +                       config);
> +       if (ret < 0)
> +               dev_err(dev, "Reg ONOFFCNFG1 update failed: %d\n", ret);
> +
> +       /* Disable WK_EN0 */
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +                       MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0, 0);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +
> +static int max77620_i2c_resume(struct device *dev)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       int ret;
> +       int fps;
> +
> +       for (fps = 0; fps < 2; ++fps) {
> +               if (chip->active_fps_period[fps] < 0)
> +                       continue;
> +
> +               ret = max77620_set_fps_period(chip, fps,
> +                               chip->active_fps_period[fps]);
> +               if (ret < 0)
> +                       dev_err(dev, "FPS%d config failed: %d\n", fps, ret);
> +       }
> +
> +       /*
> +        * For MAX20024: No need to configure WKEN0 on resume as
> +        * it is configured on Init.
> +        */
> +       if (chip->id == MAX20024)
> +               return 0;
> +
> +       /* Enable WK_EN0 */
> +       ret = max77620_reg_update(chip->dev, MAX77620_PWR_SLAVE,
> +               MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WK_EN0,
> +               MAX77620_ONOFFCNFG2_WK_EN0);
> +       if (ret < 0) {
> +               dev_err(dev, "Reg ONOFFCNFG2 WK_EN0 update failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct i2c_device_id max77620_id[] = {
> +       {"max77620", 0},
> +       {"max20024", 1},

I suppose the 0/1 should be proper device types (defines, enums etc).

> +       {},
> +};
> +MODULE_DEVICE_TABLE(i2c, max77620_id);
> +
> +static const struct dev_pm_ops max77620_pm_ops = {
> +       SET_SYSTEM_SLEEP_PM_OPS(max77620_i2c_suspend, max77620_i2c_resume)
> +};
> +
> +static struct i2c_driver max77620_driver = {
> +       .driver = {
> +               .name = "max77620",
> +               .owner = THIS_MODULE,

Did you run coccicheck on this?

> +               .pm = &max77620_pm_ops,
> +               .of_match_table = max77620_of_match,
> +       },
> +       .probe = max77620_probe,
> +       .remove = max77620_remove,
> +       .id_table = max77620_id,
> +};
> +
> +static int __init max77620_init(void)
> +{
> +       return i2c_add_driver(&max77620_driver);
> +}
> +subsys_initcall(max77620_init);
> +
> +static void __exit max77620_exit(void)
> +{
> +       i2c_del_driver(&max77620_driver);
> +}
> +module_exit(max77620_exit);
> +
> +MODULE_DESCRIPTION("MAX77620/MAX20024 Multi Function Device Core Driver");
> +MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> +MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> +MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
> +MODULE_ALIAS("i2c:max77620");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/mfd/max77620.h b/include/linux/mfd/max77620.h
> new file mode 100644
> index 0000000..9d712b2
> --- /dev/null
> +++ b/include/linux/mfd/max77620.h
> @@ -0,0 +1,503 @@
> +/*
> + * max77620.h: Defining registers address and its bit definitions
> + *     of MAX77620 and MAX20024
> + *
> + * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#ifndef _LINUX_MFD_MAX77620_H_
> +#define _LINUX_MFD_MAX77620_H_
> +
> +#include <linux/irq.h>

This include looks unused.

> +#include <linux/i2c.h>
> +#include <linux/mfd/core.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/machine.h>
> +#include <linux/mutex.h>
> +
> +/* RTC Registers */
> +#define MAX77620_REG_RTCINT                    0x00
> +#define MAX77620_REG_RTCINTM                   0x01
> +#define MAX77620_REG_RTCCNTLM                  0x02
> +#define MAX77620_REG_RTCCNTL                   0x03
> +#define MAX77620_REG_RTCUPDATE0                        0x04
> +#define MAX77620_REG_RTCUPDATE1                        0x05
> +#define MAX77620_REG_RTCSMPL                   0x06
> +#define MAX77620_REG_RTCSEC                    0x07
> +#define MAX77620_REG_RTCMIN                    0x08
> +#define MAX77620_REG_RTCHOUR                   0x09
> +#define MAX77620_REG_RTCDOW                    0x0A
> +#define MAX77620_REG_RTCMONTH                  0x0B
> +#define MAX77620_REG_RTCYEAR                   0x0C
> +#define MAX77620_REG_RTCDOM                    0x0D
> +#define MAX77620_REG_RTCSECA1                  0x0E
> +#define MAX77620_REG_RTCMINA1                  0x0F
> +#define MAX77620_REG_RTCHOURA1                 0x10
> +#define MAX77620_REG_RTCDOWA1                  0x11
> +#define MAX77620_REG_RTCMONTHA1                        0x12
> +#define MAX77620_REG_RTCYEARA1                 0x13
> +#define MAX77620_REG_RTCDOMA1                  0x14
> +#define MAX77620_REG_RTCSECA2                  0x15
> +#define MAX77620_REG_RTCMINA2                  0x16
> +#define MAX77620_REG_RTCHOURA2                 0x17
> +#define MAX77620_REG_RTCDOWA2                  0x18
> +#define MAX77620_REG_RTCMONTHA2                        0x19
> +#define MAX77620_REG_RTCYEARA2                 0x1A
> +#define MAX77620_REG_RTCDOMA2                  0x1B
> +
> +/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */
> +#define MAX77620_REG_CNFGGLBL1                 0x00
> +#define MAX77620_REG_CNFGGLBL2                 0x01
> +#define MAX77620_REG_CNFGGLBL3                 0x02
> +#define MAX77620_REG_CNFG1_32K                 0x03
> +#define MAX77620_REG_CNFGBBC                   0x04
> +#define MAX77620_REG_IRQTOP                    0x05
> +#define MAX77620_REG_INTLBT                    0x06
> +#define MAX77620_REG_IRQSD                     0x07
> +#define MAX77620_REG_IRQ_LVL2_L0_7             0x08
> +#define MAX77620_REG_IRQ_LVL2_L8               0x09
> +#define MAX77620_REG_IRQ_LVL2_GPIO             0x0A
> +#define MAX77620_REG_ONOFFIRQ                  0x0B
> +#define MAX77620_REG_NVERC                     0x0C
> +#define MAX77620_REG_IRQTOPM                   0x0D
> +#define MAX77620_REG_INTENLBT                  0x0E
> +#define MAX77620_REG_IRQMASKSD                 0x0F
> +#define MAX77620_REG_IRQ_MSK_L0_7              0x10
> +#define MAX77620_REG_IRQ_MSK_L8                        0x11
> +#define MAX77620_REG_ONOFFIRQM                 0x12
> +#define MAX77620_REG_STATLBT                   0x13
> +#define MAX77620_REG_STATSD                    0x14
> +#define MAX77620_REG_ONOFFSTAT                 0x15
> +
> +/* SD and LDO Registers */
> +#define MAX77620_REG_SD0                       0x16
> +#define MAX77620_REG_SD1                       0x17
> +#define MAX77620_REG_SD2                       0x18
> +#define MAX77620_REG_SD3                       0x19
> +#define MAX77620_REG_SD4                       0x1A
> +#define MAX77620_REG_DVSSD0                    0x1B
> +#define MAX77620_REG_DVSSD1                    0x1C
> +#define MAX77620_REG_SD0_CFG                   0x1D
> +#define MAX77620_REG_SD1_CFG                   0x1E
> +#define MAX77620_REG_SD2_CFG                   0x1F
> +#define MAX77620_REG_SD3_CFG                   0x20
> +#define MAX77620_REG_SD4_CFG                   0x21
> +#define MAX77620_REG_SD_CFG2                   0x22
> +#define MAX77620_REG_LDO0_CFG                  0x23
> +#define MAX77620_REG_LDO0_CFG2                 0x24
> +#define MAX77620_REG_LDO1_CFG                  0x25
> +#define MAX77620_REG_LDO1_CFG2                 0x26
> +#define MAX77620_REG_LDO2_CFG                  0x27
> +#define MAX77620_REG_LDO2_CFG2                 0x28
> +#define MAX77620_REG_LDO3_CFG                  0x29
> +#define MAX77620_REG_LDO3_CFG2                 0x2A
> +#define MAX77620_REG_LDO4_CFG                  0x2B
> +#define MAX77620_REG_LDO4_CFG2                 0x2C
> +#define MAX77620_REG_LDO5_CFG                  0x2D
> +#define MAX77620_REG_LDO5_CFG2                 0x2E
> +#define MAX77620_REG_LDO6_CFG                  0x2F
> +#define MAX77620_REG_LDO6_CFG2                 0x30
> +#define MAX77620_REG_LDO7_CFG                  0x31
> +#define MAX77620_REG_LDO7_CFG2                 0x32
> +#define MAX77620_REG_LDO8_CFG                  0x33
> +#define MAX77620_REG_LDO8_CFG2                 0x34
> +#define MAX77620_REG_LDO_CFG3                  0x35
> +
> +#define MAX77620_LDO_SLEW_RATE_MASK            0x1
> +
> +/* LDO Configuration 3 */
> +#define MAX77620_TRACK4_MASK                   BIT(5)
> +#define MAX77620_TRACK4_SHIFT                  5
> +
> +/* Voltage */
> +#define  MAX77620_SDX_VOLT_MASK                        0xFF
> +#define  MAX77620_SD0_VOLT_MASK                        0x3F
> +#define  MAX77620_SD1_VOLT_MASK                        0x7F
> +#define MAX77620_LDO_VOLT_MASK                 0x3F
> +
> +#define MAX77620_REG_GPIO0                     0x36
> +#define MAX77620_REG_GPIO1                     0x37
> +#define MAX77620_REG_GPIO2                     0x38
> +#define MAX77620_REG_GPIO3                     0x39
> +#define MAX77620_REG_GPIO4                     0x3A
> +#define MAX77620_REG_GPIO5                     0x3B
> +#define MAX77620_REG_GPIO6                     0x3C
> +#define MAX77620_REG_GPIO7                     0x3D
> +#define MAX77620_REG_PUE_GPIO                  0x3E
> +#define MAX77620_REG_PDE_GPIO                  0x3F
> +#define MAX77620_REG_AME_GPIO                  0x40
> +#define MAX77620_REG_ONOFFCNFG1                        0x41
> +#define MAX77620_REG_ONOFFCNFG2                        0x42
> +
> +/* FPS Registers */
> +#define MAX77620_REG_FPS_CFG0                  0x43
> +#define MAX77620_REG_FPS_CFG1                  0x44
> +#define MAX77620_REG_FPS_CFG2                  0x45
> +#define MAX77620_REG_FPS_LDO0                  0x46
> +#define MAX77620_REG_FPS_LDO1                  0x47
> +#define MAX77620_REG_FPS_LDO2                  0x48
> +#define MAX77620_REG_FPS_LDO3                  0x49
> +#define MAX77620_REG_FPS_LDO4                  0x4A
> +#define MAX77620_REG_FPS_LDO5                  0x4B
> +#define MAX77620_REG_FPS_LDO6                  0x4C
> +#define MAX77620_REG_FPS_LDO7                  0x4D
> +#define MAX77620_REG_FPS_LDO8                  0x4E
> +#define MAX77620_REG_FPS_SD0                   0x4F
> +#define MAX77620_REG_FPS_SD1                   0x50
> +#define MAX77620_REG_FPS_SD2                   0x51
> +#define MAX77620_REG_FPS_SD3                   0x52
> +#define MAX77620_REG_FPS_SD4                   0x53
> +#define MAX77620_REG_FPS_NONE                  0
> +
> +#define MAX77620_FPS_SRC_MASK                  0xC0
> +#define MAX77620_FPS_SRC_SHIFT                 6
> +#define MAX77620_FPS_PU_PERIOD_MASK            0x38
> +#define MAX77620_FPS_PU_PERIOD_SHIFT           3
> +#define MAX77620_FPS_PD_PERIOD_MASK            0x07
> +#define MAX77620_FPS_PD_PERIOD_SHIFT           0
> +#define MAX77620_FPS_TIME_PERIOD_MASK          0x38
> +#define MAX77620_FPS_TIME_PERIOD_SHIFT         3
> +#define MAX77620_FPS_EN_SRC_MASK               0x06
> +#define MAX77620_FPS_EN_SRC_SHIFT              1
> +#define MAX77620_FPS_ENFPS_MASK                        0x01
> +
> +#define MAX77620_REG_FPS_GPIO1                 0x54
> +#define MAX77620_REG_FPS_GPIO2                 0x55
> +#define MAX77620_REG_FPS_GPIO3                 0x56
> +#define MAX77620_REG_FPS_RSO                   0x57
> +#define MAX77620_REG_CID0                      0x58
> +#define MAX77620_REG_CID1                      0x59
> +#define MAX77620_REG_CID2                      0x5A
> +#define MAX77620_REG_CID3                      0x5B
> +#define MAX77620_REG_CID4                      0x5C
> +#define MAX77620_REG_CID5                      0x5D
> +
> +#define MAX77620_REG_DVSSD4                    0x5E
> +#define MAX20024_REG_MAX_ADD                   0x70
> +
> +#define MAX77620_CID_DIDM_MASK                 0xF0
> +#define MAX77620_CID_DIDM_SHIFT                        4
> +
> +/* CNCG2SD */
> +#define MAX77620_SD_CNF2_ROVS_EN_SD1           BIT(1)
> +#define MAX77620_SD_CNF2_ROVS_EN_SD0           BIT(2)
> +
> +/* Device Identification Metal */
> +#define MAX77620_CID5_DIDM(n)                  (((n) >> 4) & 0xF)
> +/* Device Indentification OTP */
> +#define MAX77620_CID5_DIDO(n)                  ((n) & 0xF)
> +
> +/* SD CNFG1 */
> +#define MAX77620_SD_SR_MASK                    0xC0
> +#define MAX77620_SD_SR_SHIFT                   6
> +#define MAX77620_SD_POWER_MODE_MASK            0x30
> +#define MAX77620_SD_POWER_MODE_SHIFT           4
> +#define MAX77620_SD_CFG1_ADE_MASK              BIT(3)
> +#define MAX77620_SD_CFG1_ADE_DISABLE           0
> +#define MAX77620_SD_CFG1_ADE_ENABLE            BIT(3)
> +#define MAX77620_SD_FPWM_MASK                  0x04
> +#define MAX77620_SD_FPWM_SHIFT                 2
> +#define MAX77620_SD_FSRADE_MASK                        0x01
> +#define MAX77620_SD_FSRADE_SHIFT               0
> +#define MAX77620_SD_CFG1_FPWM_SD_MASK          BIT(2)
> +#define MAX77620_SD_CFG1_FPWM_SD_SKIP          0
> +#define MAX77620_SD_CFG1_FPWM_SD_FPWM          BIT(2)
> +#define MAX77620_SD_CFG1_FSRADE_SD_MASK                BIT(0)
> +#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE     0
> +#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE      BIT(0)
> +
> +/* LDO_CNFG2 */
> +#define MAX77620_LDO_POWER_MODE_MASK           0xC0
> +#define MAX77620_LDO_POWER_MODE_SHIFT          6
> +#define MAX77620_LDO_CFG2_ADE_MASK             BIT(1)
> +#define MAX77620_LDO_CFG2_ADE_DISABLE          0
> +#define MAX77620_LDO_CFG2_ADE_ENABLE           BIT(1)
> +#define MAX77620_LDO_CFG2_SS_MASK              BIT(0)
> +#define MAX77620_LDO_CFG2_SS_FAST              BIT(0)
> +#define MAX77620_LDO_CFG2_SS_SLOW              0
> +
> +#define MAX77620_IRQ_TOP_GLBL_MASK             BIT(7)
> +#define MAX77620_IRQ_TOP_SD_MASK               BIT(6)
> +#define MAX77620_IRQ_TOP_LDO_MASK              BIT(5)
> +#define MAX77620_IRQ_TOP_GPIO_MASK             BIT(4)
> +#define MAX77620_IRQ_TOP_RTC_MASK              BIT(3)
> +#define MAX77620_IRQ_TOP_32K_MASK              BIT(2)
> +#define MAX77620_IRQ_TOP_ONOFF_MASK            BIT(1)
> +
> +#define MAX77620_IRQ_LBM_MASK                  BIT(3)
> +#define MAX77620_IRQ_TJALRM1_MASK              BIT(2)
> +#define MAX77620_IRQ_TJALRM2_MASK              BIT(1)
> +
> +#define MAX77620_PWR_I2C_ADDR                  0x3c
> +#define MAX77620_RTC_I2C_ADDR                  0x68
> +
> +#define MAX77620_CNFG_GPIO_DRV_MASK            BIT(0)
> +#define MAX77620_CNFG_GPIO_DRV_PUSHPULL                BIT(0)
> +#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN       0
> +#define MAX77620_CNFG_GPIO_DIR_MASK            BIT(1)
> +#define MAX77620_CNFG_GPIO_DIR_INPUT           BIT(1)
> +#define MAX77620_CNFG_GPIO_DIR_OUTPUT          0
> +#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK      BIT(2)
> +#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK     BIT(3)
> +#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH     BIT(3)
> +#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW      0
> +#define MAX77620_CNFG_GPIO_INT_MASK            (0x3 << 4)
> +#define MAX77620_CNFG_GPIO_INT_FALLING         BIT(4)
> +#define MAX77620_CNFG_GPIO_INT_RISING          BIT(5)
> +#define MAX77620_CNFG_GPIO_DBNC_MASK           (0x3 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_None           (0x0 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_8ms            (0x1 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_16ms           (0x2 << 6)
> +#define MAX77620_CNFG_GPIO_DBNC_32ms           (0x3 << 6)
> +
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE0           BIT(0)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE1           BIT(1)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE2           BIT(2)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE3           BIT(3)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE4           BIT(4)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE5           BIT(5)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE6           BIT(6)
> +#define MAX77620_IRQ_LVL2_GPIO_EDGE7           BIT(7)
> +
> +#define MAX77620_CNFG1_32K_OUT0_EN             BIT(2)
> +
> +#define MAX77620_ONOFFCNFG1_SFT_RST            BIT(7)
> +#define MAX77620_ONOFFCNFG1_MRT_MASK           0x38
> +#define MAX77620_ONOFFCNFG1_MRT_SHIFT          0x3
> +#define MAX77620_ONOFFCNFG1_SLPEN              BIT(2)
> +#define MAX77620_ONOFFCNFG1_PWR_OFF            BIT(1)
> +#define MAX20024_ONOFFCNFG1_CLRSE              0x18
> +
> +#define MAX77620_ONOFFCNFG2_SFT_RST_WK         BIT(7)
> +#define MAX77620_ONOFFCNFG2_WD_RST_WK          BIT(6)
> +#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK                BIT(5)
> +#define MAX77620_ONOFFCNFG2_WK_EN0             BIT(0)
> +
> +#define        MAX77620_GLBLM_MASK                     BIT(0)
> +
> +#define MAX77620_WDTC_MASK                     0x3
> +#define MAX77620_WDTOFFC                       BIT(4)
> +#define MAX77620_WDTSLPC                       BIT(3)
> +#define MAX77620_WDTEN                         BIT(2)
> +
> +#define MAX77620_TWD_MASK                      0x3
> +#define MAX77620_TWD_2s                                0x0
> +#define MAX77620_TWD_16s                       0x1
> +#define MAX77620_TWD_64s                       0x2
> +#define MAX77620_TWD_128s                      0x3
> +
> +#define MAX77620_CNFGGLBL1_LBDAC_EN            BIT(7)
> +#define MAX77620_CNFGGLBL1_MPPLD               BIT(6)
> +#define MAX77620_CNFGGLBL1_LBHYST              (BIT(5) | BIT(4))
> +#define MAX77620_CNFGGLBL1_LBDAC               0x0E
> +#define MAX77620_CNFGGLBL1_LBRSTEN             BIT(0)
> +
> +/* CNFG BBC registers */
> +#define MAX77620_CNFGBBC_ENABLE                        BIT(0)
> +#define MAX77620_CNFGBBC_CURRENT_MASK          0x06
> +#define MAX77620_CNFGBBC_CURRENT_SHIFT         1
> +#define MAX77620_CNFGBBC_VOLTAGE_MASK          0x18
> +#define MAX77620_CNFGBBC_VOLTAGE_SHIFT         3
> +#define MAX77620_CNFGBBC_LOW_CURRENT_ENABLE    BIT(5)
> +#define MAX77620_CNFGBBC_RESISTOR_MASK         0xC0
> +#define MAX77620_CNFGBBC_RESISTOR_SHIFT                6
> +
> +/* I2c Slave Id */
> +enum {
> +       MAX77620_PWR_SLAVE,
> +       MAX77620_RTC_SLAVE,
> +       MAX77620_NUM_SLAVES,
> +};
> +
> +/* GPIOs */
> +enum {
> +       MAX77620_GPIO0,
> +       MAX77620_GPIO1,
> +       MAX77620_GPIO2,
> +       MAX77620_GPIO3,
> +       MAX77620_GPIO4,
> +       MAX77620_GPIO5,
> +       MAX77620_GPIO6,
> +       MAX77620_GPIO7,
> +
> +       MAX77620_GPIO_NR,
> +};
> +
> +/* Interrupts */
> +enum {
> +       MAX77620_IRQ_TOP_GLBL,          /* Low-Battery */
> +       MAX77620_IRQ_TOP_SD,            /* SD power fail */
> +       MAX77620_IRQ_TOP_LDO,           /* LDO power fail */
> +       MAX77620_IRQ_TOP_GPIO,          /* TOP GPIO internal int to MAX77620 */
> +       MAX77620_IRQ_TOP_RTC,           /* RTC */
> +       MAX77620_IRQ_TOP_32K,           /* 32kHz oscillator */
> +       MAX77620_IRQ_TOP_ONOFF,         /* ON/OFF oscillator */
> +
> +       MAX77620_IRQ_LBT_MBATLOW,       /* Thermal alarm status, > 120C */
> +       MAX77620_IRQ_LBT_TJALRM1,       /* Thermal alarm status, > 120C */
> +       MAX77620_IRQ_LBT_TJALRM2,       /* Thermal alarm status, > 140C */
> +
> +       MAX77620_IRQ_GPIO0,             /* GPIO0 edge detection */
> +       MAX77620_IRQ_GPIO1,             /* GPIO1 edge detection */
> +       MAX77620_IRQ_GPIO2,             /* GPIO2 edge detection */
> +       MAX77620_IRQ_GPIO3,             /* GPIO3 edge detection */
> +       MAX77620_IRQ_GPIO4,             /* GPIO4 edge detection */
> +       MAX77620_IRQ_GPIO5,             /* GPIO5 edge detection */
> +       MAX77620_IRQ_GPIO6,             /* GPIO6 edge detection */
> +       MAX77620_IRQ_GPIO7,             /* GPIO7 edge detection */
> +
> +       MAX77620_IRQ_ONOFF_MRWRN,       /* Hard power off warnning */
> +       MAX77620_IRQ_ONOFF_EN0_1SEC,    /* EN0 active for 1s */
> +       MAX77620_IRQ_ONOFF_EN0_F,       /* EN0 falling */
> +       MAX77620_IRQ_ONOFF_EN0_R,       /* EN0 rising */
> +       MAX77620_IRQ_ONOFF_LID_F,       /* LID falling */
> +       MAX77620_IRQ_ONOFF_LID_R,       /* LID rising */
> +       MAX77620_IRQ_ONOFF_ACOK_F,      /* ACOK falling */
> +       MAX77620_IRQ_ONOFF_ACOK_R,      /* ACOK rising */
> +
> +       MAX77620_IRQ_NVER,              /* Non-Volatile Event Recorder */
> +       MAX77620_IRQ_NR,
> +};
> +
> +enum max77620_regulators {
> +       MAX77620_REGULATOR_ID_SD0,
> +       MAX77620_REGULATOR_ID_SD1,
> +       MAX77620_REGULATOR_ID_SD2,
> +       MAX77620_REGULATOR_ID_SD3,
> +       MAX77620_REGULATOR_ID_SD4,
> +       MAX77620_REGULATOR_ID_LDO0,
> +       MAX77620_REGULATOR_ID_LDO1,
> +       MAX77620_REGULATOR_ID_LDO2,
> +       MAX77620_REGULATOR_ID_LDO3,
> +       MAX77620_REGULATOR_ID_LDO4,
> +       MAX77620_REGULATOR_ID_LDO5,
> +       MAX77620_REGULATOR_ID_LDO6,
> +       MAX77620_REGULATOR_ID_LDO7,
> +       MAX77620_REGULATOR_ID_LDO8,
> +       MAX77620_NUM_REGS,
> +};
> +
> +/* FPS Source */
> +enum max77620_regulator_fps_src {
> +       FPS_SRC_0,
> +       FPS_SRC_1,
> +       FPS_SRC_2,
> +       FPS_SRC_NONE,
> +       FPS_SRC_DEF,
> +};
> +
> +/* Regulator types */
> +enum max77620_regulator_type {
> +       MAX77620_REGULATOR_TYPE_SD,
> +       MAX77620_REGULATOR_TYPE_LDO_N,
> +       MAX77620_REGULATOR_TYPE_LDO_P,
> +};
> +
> +enum max77620_chip_id {
> +       MAX77620,
> +       MAX20024,
> +};
> +
> +struct max77620_chip {
> +       struct device *dev;
> +
> +       struct i2c_client *clients[MAX77620_NUM_SLAVES];
> +       struct regmap *rmap[MAX77620_NUM_SLAVES];
> +
> +       int chip_irq;
> +       int irq_base;
> +       int irq_mbattlow;
> +
> +       struct mutex mutex_config;
> +       bool sleep_enable;
> +       bool enable_global_lpm;
> +       int active_fps_period[3];
> +       int suspend_fps_period[3];
> +
> +       int es_minor_version;
> +       int es_major_version;

You set it once and...? Please clean this driver from such
internal/vendor stuff.

> +
> +       struct regmap_irq_chip_data *top_irq_data;
> +       struct regmap_irq_chip_data *gpio_irq_data;
> +
> +       /* chip id */
> +       u32 id;
> +};
> +
> +static inline int max77620_irq_get_virq(struct device *dev, int irq)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_irq_get_virq(chip->top_irq_data, irq);
> +}
> +
> +static inline int max77620_reg_write(struct device *dev, int sid,
> +               unsigned int reg, u8 val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_write(chip->rmap[sid], reg, val);
> +}
> +
> +static inline int max77620_reg_writes(struct device *dev, int sid,
> +               unsigned int reg, int len, void *val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       int ret = 0;
> +       u8 *src = (u8 *)val;
> +       int i;
> +
> +       /* Device does not support bulk write */
> +       for (i = 0; i < len; i++) {
> +               ret = regmap_write(chip->rmap[sid], reg, *src++);
> +               if (ret < 0)
> +                       break;
> +               reg++;
> +       }
> +       if (ret < 0)
> +               dev_err(chip->dev, "%s() failed: %d\n", __func__, ret);

New line.

> +       return ret;
> +}
> +
> +static inline int max77620_reg_read(struct device *dev, int sid,
> +               unsigned int reg, u8 *val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +       unsigned int ival;
> +       int ret;
> +
> +       ret = regmap_read(chip->rmap[sid], reg, &ival);
> +       if (ret < 0) {
> +               dev_err(dev, "failed reading from reg 0x%02x\n", reg);

Great, how many errors you want to print? On error you will have
messages coming from:
1. max77620_reg_read
2. max77620_read_es_version
3. max77620_probe

Three errors messages for the same error.

> +               return ret;
> +       }
> +       *val = ival;
> +       return ret;
> +}
> +
> +static inline int max77620_reg_reads(struct device *dev, int sid,
> +               unsigned int reg, int len, void *val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_bulk_read(chip->rmap[sid], reg, val, len);
> +}
> +
> +static inline int max77620_reg_update(struct device *dev, int sid,
> +               unsigned int reg, unsigned int mask, unsigned int val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
> +}

I think all these shouldn't be static inlines in header. Although some
of them are one-liners but rest are not. Let the compiler decide what
to do with these wrappers.

Best regards,
Krzysztof

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-07 14:38   ` Laxman Dewangan
@ 2016-01-08  2:03     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08  2:03 UTC (permalink / raw)
  To: rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi

2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> RTC  module. This support for setting alarm and time.
>
> Add RTC driver to access this chip's RTC module via RTC
> APIs.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

Same as for mfd patch. The tag should be given explicitly in a public way.

> ---
>  drivers/rtc/Kconfig        |   9 +
>  drivers/rtc/Makefile       |   1 +
>  drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++

The driver (as most of Maxim's) looks quite similar to existing RTC
driver, like max77802. It is difficult to spot the exact differences
(I don't have 77620's datasheet) but I would suggest not duplicating
the work. Maybe the biggest difference is the way you configure the
regmap... but still sometimes the regmap config can be shared.

Anyway some minor comments below.


>  3 files changed, 584 insertions(+)
>  create mode 100644 drivers/rtc/rtc-max77620.c
>
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 376322f..8723bf8 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -315,6 +315,15 @@ config RTC_DRV_MAX8997
>           This driver can also be built as a module. If so, the module
>           will be called rtc-max8997.
>
> +config RTC_DRV_MAX77620
> +       tristate "Maxim MAX77620/MAX20024"
> +       depends on MFD_MAX77620
> +       help
> +         If you say yes here you will get support for the
> +         RTC of Maxim MAX77620/MAX20024 PMIC.
> +         This driver can also be built as a module. If so, the module
> +         will be called rtc-max77620.
> +
>  config RTC_DRV_MAX77686
>         tristate "Maxim MAX77686"
>         depends on MFD_MAX77686
> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> index 62d61b2..da5db0a 100644
> --- a/drivers/rtc/Makefile
> +++ b/drivers/rtc/Makefile
> @@ -85,6 +85,7 @@ obj-$(CONFIG_RTC_DRV_M48T59)  += rtc-m48t59.o
>  obj-$(CONFIG_RTC_DRV_M48T86)   += rtc-m48t86.o
>  obj-$(CONFIG_RTC_DRV_MAX6900)  += rtc-max6900.o
>  obj-$(CONFIG_RTC_DRV_MAX6902)  += rtc-max6902.o
> +obj-$(CONFIG_RTC_DRV_MAX77620) += rtc-max77620.o
>  obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o
>  obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o
>  obj-$(CONFIG_RTC_DRV_MAX8907)  += rtc-max8907.o
> diff --git a/drivers/rtc/rtc-max77620.c b/drivers/rtc/rtc-max77620.c
> new file mode 100644
> index 0000000..645c661
> --- /dev/null
> +++ b/drivers/rtc/rtc-max77620.c
> @@ -0,0 +1,574 @@
> +/*
> + * Max77620 RTC driver
> + *
> + * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/delay.h>
> +#include <linux/i2c.h>
> +#include <linux/rtc.h>
> +#include <linux/mfd/max77620.h>
> +
> +#define MAX77620_RTC60S_MASK           BIT(0)
> +#define MAX77620_RTCA1_MASK            BIT(1)
> +#define MAX77620_RTCA2_MASK            BIT(2)
> +#define MAX77620_RTC_SMPL_MASK         BIT(3)
> +#define MAX77620_RTC_RTC1S_MASK                BIT(4)
> +#define MAX77620_RTC_ALL_IRQ_MASK      0x1F
> +
> +#define MAX77620_BCDM_MASK             BIT(0)
> +#define MAX77620_HRMODEM_MASK          BIT(1)
> +
> +#define WB_UPDATE_MASK                 BIT(0)
> +#define FLAG_AUTO_CLEAR_MASK           BIT(1)
> +#define FREEZE_SEC_MASK                        BIT(2)
> +#define RTC_WAKE_MASK                  BIT(3)
> +#define RB_UPDATE_MASK                 BIT(4)
> +
> +#define MAX77620_UDF_MASK              BIT(0)
> +#define MAX77620_RBUDF_MASK            BIT(1)
> +
> +#define SEC_MASK                       0x7F
> +#define MIN_MASK                       0x7F
> +#define HOUR_MASK                      0x3F
> +#define WEEKDAY_MASK                   0x7F
> +#define MONTH_MASK                     0x1F
> +#define YEAR_MASK                      0xFF
> +#define MONTHDAY_MASK                  0x3F
> +
> +#define ALARM_EN_MASK                  0x80
> +#define ALARM_EN_SHIFT                 7
> +
> +#define RTC_YEAR_BASE                  100
> +#define RTC_YEAR_MAX                   99
> +
> +#define ONOFF_WK_ALARM1_MASK           BIT(2)
> +
> +enum {
> +       RTC_SEC,
> +       RTC_MIN,
> +       RTC_HOUR,
> +       RTC_WEEKDAY,
> +       RTC_MONTH,
> +       RTC_YEAR,
> +       RTC_MONTHDAY,
> +       RTC_NR
> +};
> +
> +struct max77620_rtc {
> +       struct rtc_device *rtc;
> +       struct device *dev;
> +
> +       struct mutex io_lock;
> +       int irq;
> +       u8 irq_mask;
> +};
> +
> +static inline struct device *_to_parent(struct max77620_rtc *rtc)

max77620_to_parent().

> +{
> +       return rtc->dev->parent;
> +}
> +
> +static inline int max77620_rtc_update_buffer(struct max77620_rtc *rtc,
> +                                            int write)

What's the purpose of declaring it inline?

> +{
> +       struct device *parent = _to_parent(rtc);
> +       u8 val =  FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
> +       int ret;
> +
> +       if (write)
> +               val |= WB_UPDATE_MASK;
> +       else
> +               val |= RB_UPDATE_MASK;
> +
> +       dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
> +               write, MAX77620_REG_RTCUPDATE0, val);
> +       ret = max77620_reg_write(parent, MAX77620_RTC_SLAVE,
> +                                               MAX77620_REG_RTCUPDATE0, val);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCUPDATE0 read failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       /* Must wait 16ms for buffer update */
> +       usleep_range(16000, 17000);
> +
> +       return 0;
> +}
> +
> +static inline int max77620_rtc_write(struct max77620_rtc *rtc, u8 addr,
> +                                    void *values, u32 len, int update_buffer)

It seems you are using 0 or 1 for update_buffer. So bool.

> +{
> +       struct device *parent = _to_parent(rtc);
> +       int ret;
> +
> +       mutex_lock(&rtc->io_lock);
> +
> +       ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE,
> +                                               addr, len, values);
> +       if (ret < 0)
> +               goto out;
> +
> +       if (update_buffer)
> +               ret = max77620_rtc_update_buffer(rtc, 1);
> +
> +out:
> +       mutex_unlock(&rtc->io_lock);

New line, here and in other places.

> +       return ret;
> +}
> +
> +static inline int max77620_rtc_read(struct max77620_rtc *rtc, u8 addr,
> +                                   void *values, u32 len, int update_buffer)
> +{
> +       struct device *parent = _to_parent(rtc);
> +       int ret;
> +
> +       mutex_lock(&rtc->io_lock);
> +
> +       if (update_buffer) {
> +               ret = max77620_rtc_update_buffer(rtc, 0);
> +               if (ret < 0)
> +                       goto out;
> +       }
> +
> +       ret = max77620_reg_reads(parent, MAX77620_RTC_SLAVE, addr, len, values);
> +out:
> +       mutex_unlock(&rtc->io_lock);
> +       return ret;
> +}
> +
> +static inline int max77620_rtc_reg_to_tm(struct max77620_rtc *rtc, u8 *buf,
> +                                        struct rtc_time *tm)
> +{
> +       int wday = buf[RTC_WEEKDAY] & WEEKDAY_MASK;
> +
> +       if (unlikely(!wday)) {
> +               dev_err(rtc->dev,
> +                       "rtc_reg_to_tm: Invalid day of week, %d\n", wday);
> +               return -EINVAL;
> +       }
> +
> +       tm->tm_sec = (int)(buf[RTC_SEC] & SEC_MASK);
> +       tm->tm_min = (int)(buf[RTC_MIN] & MIN_MASK);
> +       tm->tm_hour = (int)(buf[RTC_HOUR] & HOUR_MASK);
> +       tm->tm_mday = (int)(buf[RTC_MONTHDAY] & MONTHDAY_MASK);
> +       tm->tm_mon = (int)(buf[RTC_MONTH] & MONTH_MASK) - 1;
> +       tm->tm_year = (int)(buf[RTC_YEAR] & YEAR_MASK) + RTC_YEAR_BASE;
> +       tm->tm_wday = ffs(wday) - 1;
> +
> +       return 0;
> +}
> +
> +static inline int max77620_rtc_tm_to_reg(struct max77620_rtc *rtc, u8 *buf,
> +                                        struct rtc_time *tm, int alarm)
> +{
> +       u8 alarm_mask = alarm ? ALARM_EN_MASK : 0;
> +
> +       if (unlikely((tm->tm_year < RTC_YEAR_BASE) ||
> +                       (tm->tm_year > RTC_YEAR_BASE + RTC_YEAR_MAX))) {
> +               dev_err(rtc->dev,
> +                       "rtc_tm_to_reg: Invalid year, %d\n", tm->tm_year);
> +               return -EINVAL;
> +       }
> +
> +       buf[RTC_SEC] = tm->tm_sec | alarm_mask;
> +       buf[RTC_MIN] = tm->tm_min | alarm_mask;
> +       buf[RTC_HOUR] = tm->tm_hour | alarm_mask;
> +       buf[RTC_MONTHDAY] = tm->tm_mday | alarm_mask;
> +       buf[RTC_MONTH] = (tm->tm_mon + 1) | alarm_mask;
> +       buf[RTC_YEAR] = (tm->tm_year - RTC_YEAR_BASE) | alarm_mask;
> +
> +       /* The wday is configured only when disabled alarm. */
> +       if (!alarm)
> +               buf[RTC_WEEKDAY] = (1 << tm->tm_wday);
> +       else {
> +       /* Configure its default reset value 0x01, and not enable it. */
> +               buf[RTC_WEEKDAY] = 0x01;
> +       }
> +       return 0;
> +}
> +
> +static inline int max77620_rtc_irq_mask(struct max77620_rtc *rtc, u8 irq)
> +{
> +       u8 irq_mask = rtc->irq_mask | irq;
> +       int ret = 0;
> +
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "rtc_irq_mask: Failed to set rtc irq mask\n");

Again a chain of error messages for the same error. The error comes
either from max77620_reg_writes() or from
max77620_rtc_update_buffer(). Then you print it here as well polluting
the dmesg.

> +               goto out;
> +       }
> +       rtc->irq_mask = irq_mask;
> +
> +out:
> +       return ret;
> +}
> +
> +static inline int max77620_rtc_irq_unmask(struct max77620_rtc *rtc, u8 irq)
> +{
> +       u8 irq_mask = rtc->irq_mask & ~irq;
> +       int ret = 0;
> +
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev,
> +                       "rtc_irq_unmask: Failed to set rtc irq mask\n");
> +               goto out;
> +       }
> +       rtc->irq_mask = irq_mask;
> +
> +out:
> +       return ret;
> +}
> +
> +static inline int max77620_rtc_do_irq(struct max77620_rtc *rtc)
> +{
> +       struct device *parent = _to_parent(rtc);
> +       u8 irq_status;
> +       int ret;
> +
> +       ret = max77620_reg_read(parent, MAX77620_RTC_SLAVE,
> +                                       MAX77620_REG_RTCINT, &irq_status);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
> +               return ret;
> +       }
> +
> +       dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
> +               rtc->irq_mask, irq_status);
> +
> +       if (!(rtc->irq_mask & MAX77620_RTCA1_MASK) &&
> +                       (irq_status & MAX77620_RTCA1_MASK))
> +               rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
> +
> +       if (!(rtc->irq_mask & MAX77620_RTC_RTC1S_MASK) &&
> +                       (irq_status & MAX77620_RTC_RTC1S_MASK))
> +               rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
> +
> +       return ret;
> +}
> +
> +static irqreturn_t max77620_rtc_irq(int irq, void *data)
> +{
> +       struct max77620_rtc *rtc = (struct max77620_rtc *)data;
> +
> +       max77620_rtc_do_irq(rtc);
> +
> +       return IRQ_HANDLED;
> +}
> +
> +static int max77620_rtc_alarm_irq_enable(struct device *dev,
> +                                        unsigned int enabled)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       int ret = 0;
> +
> +       if (rtc->irq < 0)
> +               return -ENXIO;
> +
> +       /* Handle pending interrupt */
> +       ret = max77620_rtc_do_irq(rtc);
> +       if (ret < 0)
> +               goto out;
> +
> +       /* Config alarm interrupt */

s/Config/Configure/ ?

> +       if (enabled) {
> +               ret = max77620_rtc_irq_unmask(rtc, MAX77620_RTCA1_MASK);
> +               if (ret < 0)
> +                       goto out;
> +       } else {
> +               ret = max77620_rtc_irq_mask(rtc, MAX77620_RTCA1_MASK);
> +               if (ret < 0)
> +                       goto out;
> +       }
> +out:
> +       return ret;
> +}
> +
> +static int max77620_rtc_read_time(struct device *dev, struct rtc_time *tm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSEC, buf, sizeof(buf), 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCSEC read failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       ret = max77620_rtc_reg_to_tm(rtc, buf, tm);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
> +                       ret);

The same pattern of error messages - max77620_rtc_reg_to_tm() will
print it. Show it only once.

> +               return ret;
> +       }
> +
> +       return ret;
> +}
> +
> +static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Time format to Reg format conv failed: %d\n",
> +                       ret);
> +               return ret;
> +       }
> +
> +       return max77620_rtc_write(rtc, MAX77620_REG_RTCSEC,
> +                                       buf, sizeof(buf), 1);
> +}
> +
> +static int max77620_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSECA1,
> +                                       buf, sizeof(buf), 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCSECA1 read failed: %d\n", ret);
> +               return ret;
> +       }
> +

One line is enough.

> +
> +       buf[RTC_YEAR] &= ~ALARM_EN_MASK;
> +       ret = max77620_rtc_reg_to_tm(rtc, buf, &alrm->time);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
> +                       ret);
> +               return ret;
> +       }
> +
> +       if (rtc->irq_mask & MAX77620_RTCA1_MASK)
> +               alrm->enabled = 0;
> +       else
> +               alrm->enabled = 1;
> +
> +       return 0;
> +}
> +
> +static int max77620_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_tm_to_reg(rtc, buf, &alrm->time, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Time format to reg format conv failed: %d\n",
> +                       ret);
> +               return ret;
> +       }
> +
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCSECA1, buf,
> +                       sizeof(buf), 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCSECA1 write failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       ret = max77620_rtc_alarm_irq_enable(dev, alrm->enabled);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Enable rtc alarm failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return ret;
> +}
> +
> +static const struct rtc_class_ops max77620_rtc_ops = {
> +       .read_time = max77620_rtc_read_time,
> +       .set_time = max77620_rtc_set_time,
> +       .read_alarm = max77620_rtc_read_alarm,
> +       .set_alarm = max77620_rtc_set_alarm,
> +       .alarm_irq_enable = max77620_rtc_alarm_irq_enable,
> +};
> +
> +static int max77620_rtc_preinit(struct max77620_rtc *rtc)
> +{
> +       struct device *parent = _to_parent(rtc);
> +       u8 val;
> +       int ret;
> +
> +       /* Mask all interrupts */
> +       rtc->irq_mask = 0xFF;
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM,
> +                                               &rtc->irq_mask, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
> +               return ret;
> +       }
> +
> +       max77620_rtc_read(rtc, MAX77620_REG_RTCINT, &val, 1, 0);
> +
> +       /* Configure Binary mode and 24hour mode */
> +       val = MAX77620_HRMODEM_MASK;
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCCNTL, &val, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
> +               return ret;
> +       }
> +
> +       /* It should be disabled alarm wakeup to wakeup from sleep
> +        * by EN1 input signal.
> +        */

Please use Linux coding style for multi-line comments. I also can't
get the meaning. It should be disabled wakeup to wakeup?

> +       ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
> +               MAX77620_REG_ONOFFCNFG2, ONOFF_WK_ALARM1_MASK, 0);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +
> +static int max77620_rtc_probe(struct platform_device *pdev)
> +{
> +       static struct max77620_rtc *rtc;
> +       int ret = 0;
> +
> +       rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
> +       if (!rtc)
> +               return -ENOMEM;
> +
> +       dev_set_drvdata(&pdev->dev, rtc);
> +       rtc->dev = &pdev->dev;
> +       mutex_init(&rtc->io_lock);
> +
> +       ret = max77620_rtc_preinit(rtc);
> +       if (ret) {
> +               dev_err(&pdev->dev, "probe: Failed to rtc preinit\n");
> +               goto fail_preinit;
> +       }
> +
> +       device_init_wakeup(&pdev->dev, 1);
> +
> +       rtc->rtc = devm_rtc_device_register(&pdev->dev, "max77620-rtc",
> +                                      &max77620_rtc_ops, THIS_MODULE);
> +       if (IS_ERR(rtc->rtc)) {
> +               dev_err(&pdev->dev, "probe: Failed to register rtc\n");
> +               ret = PTR_ERR(rtc->rtc);
> +               goto fail_preinit;
> +       }
> +
> +       rtc->irq = platform_get_irq(pdev, 0);
> +       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
> +                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,

Why early resume?

> +                       "max77620-rtc", rtc);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "probe: Failed to request irq %d\n",
> +                       rtc->irq);
> +               rtc->irq = -1;

Why? The probe will fail. Will it be used somewhere?

> +               goto fail_preinit;
> +       }
> +
> +       device_init_wakeup(rtc->dev, 1);

This shouldn't be needed.

> +       enable_irq_wake(rtc->irq);
> +
> +       return 0;
> +
> +fail_preinit:
> +       mutex_destroy(&rtc->io_lock);
> +       return ret;
> +}
> +
> +static int max77620_rtc_remove(struct platform_device *pdev)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(&pdev->dev);
> +
> +       mutex_destroy(&rtc->io_lock);
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int max77620_rtc_suspend(struct device *dev)
> +{
> +       struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
> +
> +       if (device_may_wakeup(dev)) {
> +               int ret;
> +               struct rtc_wkalrm alm;
> +
> +               enable_irq_wake(max77620_rtc->irq);
> +               ret = max77620_rtc_read_alarm(dev, &alm);
> +               if (!ret)
> +                       dev_info(dev, "%s() alrm %d time %d %d %d %d %d %d\n",
> +                               __func__, alm.enabled,
> +                               alm.time.tm_year, alm.time.tm_mon,
> +                               alm.time.tm_mday, alm.time.tm_hour,
> +                               alm.time.tm_min, alm.time.tm_sec);

Nope. On each suspend you want to print current time? This does not
even classifies for dev_dbg.

> +       }
> +
> +       return 0;
> +}
> +
> +static int max77620_rtc_resume(struct device *dev)
> +{
> +       struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
> +
> +       if (device_may_wakeup(dev)) {
> +               struct rtc_time tm;
> +               int ret;
> +
> +               disable_irq_wake(max77620_rtc->irq);
> +               ret = max77620_rtc_read_time(dev, &tm);
> +               if (!ret)
> +                       dev_info(dev, "%s() %d %d %d %d %d %d\n",
> +                               __func__, tm.tm_year, tm.tm_mon, tm.tm_mday,
> +                               tm.tm_hour, tm.tm_min, tm.tm_sec);

Ditto.

> +       }
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct dev_pm_ops max77620_rtc_pm_ops = {
> +       SET_SYSTEM_SLEEP_PM_OPS(max77620_rtc_suspend, max77620_rtc_resume)
> +};
> +
> +static struct platform_device_id max77620_rtc_devtype[] = {

const?

Best regards,
Krzysztof

> +       {
> +               .name = "max77620-rtc",
> +       },
> +       {
> +               .name = "max20024-rtc",
> +       },
> +};
> +
> +static struct platform_driver max77620_rtc_driver = {
> +       .probe = max77620_rtc_probe,
> +       .remove = max77620_rtc_remove,
> +       .id_table = max77620_rtc_devtype,
> +       .driver = {
> +                       .name = "max77620-rtc",
> +                       .owner = THIS_MODULE,
> +                       .pm = &max77620_rtc_pm_ops,
> +       },
> +};
> +
> +module_platform_driver(max77620_rtc_driver);
> +
> +MODULE_DESCRIPTION("max77620 RTC driver");
> +MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> +MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> +MODULE_ALIAS("platform:max77620-rtc");
> +MODULE_LICENSE("GPL v2");
> --
> 2.1.4
>
> --
> --
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08  2:03     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08  2:03 UTC (permalink / raw)
  To: rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi

2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> RTC  module. This support for setting alarm and time.
>
> Add RTC driver to access this chip's RTC module via RTC
> APIs.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>

Same as for mfd patch. The tag should be given explicitly in a public way.

> ---
>  drivers/rtc/Kconfig        |   9 +
>  drivers/rtc/Makefile       |   1 +
>  drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++

The driver (as most of Maxim's) looks quite similar to existing RTC
driver, like max77802. It is difficult to spot the exact differences
(I don't have 77620's datasheet) but I would suggest not duplicating
the work. Maybe the biggest difference is the way you configure the
regmap... but still sometimes the regmap config can be shared.

Anyway some minor comments below.


>  3 files changed, 584 insertions(+)
>  create mode 100644 drivers/rtc/rtc-max77620.c
>
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 376322f..8723bf8 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -315,6 +315,15 @@ config RTC_DRV_MAX8997
>           This driver can also be built as a module. If so, the module
>           will be called rtc-max8997.
>
> +config RTC_DRV_MAX77620
> +       tristate "Maxim MAX77620/MAX20024"
> +       depends on MFD_MAX77620
> +       help
> +         If you say yes here you will get support for the
> +         RTC of Maxim MAX77620/MAX20024 PMIC.
> +         This driver can also be built as a module. If so, the module
> +         will be called rtc-max77620.
> +
>  config RTC_DRV_MAX77686
>         tristate "Maxim MAX77686"
>         depends on MFD_MAX77686
> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> index 62d61b2..da5db0a 100644
> --- a/drivers/rtc/Makefile
> +++ b/drivers/rtc/Makefile
> @@ -85,6 +85,7 @@ obj-$(CONFIG_RTC_DRV_M48T59)  += rtc-m48t59.o
>  obj-$(CONFIG_RTC_DRV_M48T86)   += rtc-m48t86.o
>  obj-$(CONFIG_RTC_DRV_MAX6900)  += rtc-max6900.o
>  obj-$(CONFIG_RTC_DRV_MAX6902)  += rtc-max6902.o
> +obj-$(CONFIG_RTC_DRV_MAX77620) += rtc-max77620.o
>  obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o
>  obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o
>  obj-$(CONFIG_RTC_DRV_MAX8907)  += rtc-max8907.o
> diff --git a/drivers/rtc/rtc-max77620.c b/drivers/rtc/rtc-max77620.c
> new file mode 100644
> index 0000000..645c661
> --- /dev/null
> +++ b/drivers/rtc/rtc-max77620.c
> @@ -0,0 +1,574 @@
> +/*
> + * Max77620 RTC driver
> + *
> + * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/delay.h>
> +#include <linux/i2c.h>
> +#include <linux/rtc.h>
> +#include <linux/mfd/max77620.h>
> +
> +#define MAX77620_RTC60S_MASK           BIT(0)
> +#define MAX77620_RTCA1_MASK            BIT(1)
> +#define MAX77620_RTCA2_MASK            BIT(2)
> +#define MAX77620_RTC_SMPL_MASK         BIT(3)
> +#define MAX77620_RTC_RTC1S_MASK                BIT(4)
> +#define MAX77620_RTC_ALL_IRQ_MASK      0x1F
> +
> +#define MAX77620_BCDM_MASK             BIT(0)
> +#define MAX77620_HRMODEM_MASK          BIT(1)
> +
> +#define WB_UPDATE_MASK                 BIT(0)
> +#define FLAG_AUTO_CLEAR_MASK           BIT(1)
> +#define FREEZE_SEC_MASK                        BIT(2)
> +#define RTC_WAKE_MASK                  BIT(3)
> +#define RB_UPDATE_MASK                 BIT(4)
> +
> +#define MAX77620_UDF_MASK              BIT(0)
> +#define MAX77620_RBUDF_MASK            BIT(1)
> +
> +#define SEC_MASK                       0x7F
> +#define MIN_MASK                       0x7F
> +#define HOUR_MASK                      0x3F
> +#define WEEKDAY_MASK                   0x7F
> +#define MONTH_MASK                     0x1F
> +#define YEAR_MASK                      0xFF
> +#define MONTHDAY_MASK                  0x3F
> +
> +#define ALARM_EN_MASK                  0x80
> +#define ALARM_EN_SHIFT                 7
> +
> +#define RTC_YEAR_BASE                  100
> +#define RTC_YEAR_MAX                   99
> +
> +#define ONOFF_WK_ALARM1_MASK           BIT(2)
> +
> +enum {
> +       RTC_SEC,
> +       RTC_MIN,
> +       RTC_HOUR,
> +       RTC_WEEKDAY,
> +       RTC_MONTH,
> +       RTC_YEAR,
> +       RTC_MONTHDAY,
> +       RTC_NR
> +};
> +
> +struct max77620_rtc {
> +       struct rtc_device *rtc;
> +       struct device *dev;
> +
> +       struct mutex io_lock;
> +       int irq;
> +       u8 irq_mask;
> +};
> +
> +static inline struct device *_to_parent(struct max77620_rtc *rtc)

max77620_to_parent().

> +{
> +       return rtc->dev->parent;
> +}
> +
> +static inline int max77620_rtc_update_buffer(struct max77620_rtc *rtc,
> +                                            int write)

What's the purpose of declaring it inline?

> +{
> +       struct device *parent = _to_parent(rtc);
> +       u8 val =  FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
> +       int ret;
> +
> +       if (write)
> +               val |= WB_UPDATE_MASK;
> +       else
> +               val |= RB_UPDATE_MASK;
> +
> +       dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
> +               write, MAX77620_REG_RTCUPDATE0, val);
> +       ret = max77620_reg_write(parent, MAX77620_RTC_SLAVE,
> +                                               MAX77620_REG_RTCUPDATE0, val);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCUPDATE0 read failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       /* Must wait 16ms for buffer update */
> +       usleep_range(16000, 17000);
> +
> +       return 0;
> +}
> +
> +static inline int max77620_rtc_write(struct max77620_rtc *rtc, u8 addr,
> +                                    void *values, u32 len, int update_buffer)

It seems you are using 0 or 1 for update_buffer. So bool.

> +{
> +       struct device *parent = _to_parent(rtc);
> +       int ret;
> +
> +       mutex_lock(&rtc->io_lock);
> +
> +       ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE,
> +                                               addr, len, values);
> +       if (ret < 0)
> +               goto out;
> +
> +       if (update_buffer)
> +               ret = max77620_rtc_update_buffer(rtc, 1);
> +
> +out:
> +       mutex_unlock(&rtc->io_lock);

New line, here and in other places.

> +       return ret;
> +}
> +
> +static inline int max77620_rtc_read(struct max77620_rtc *rtc, u8 addr,
> +                                   void *values, u32 len, int update_buffer)
> +{
> +       struct device *parent = _to_parent(rtc);
> +       int ret;
> +
> +       mutex_lock(&rtc->io_lock);
> +
> +       if (update_buffer) {
> +               ret = max77620_rtc_update_buffer(rtc, 0);
> +               if (ret < 0)
> +                       goto out;
> +       }
> +
> +       ret = max77620_reg_reads(parent, MAX77620_RTC_SLAVE, addr, len, values);
> +out:
> +       mutex_unlock(&rtc->io_lock);
> +       return ret;
> +}
> +
> +static inline int max77620_rtc_reg_to_tm(struct max77620_rtc *rtc, u8 *buf,
> +                                        struct rtc_time *tm)
> +{
> +       int wday = buf[RTC_WEEKDAY] & WEEKDAY_MASK;
> +
> +       if (unlikely(!wday)) {
> +               dev_err(rtc->dev,
> +                       "rtc_reg_to_tm: Invalid day of week, %d\n", wday);
> +               return -EINVAL;
> +       }
> +
> +       tm->tm_sec = (int)(buf[RTC_SEC] & SEC_MASK);
> +       tm->tm_min = (int)(buf[RTC_MIN] & MIN_MASK);
> +       tm->tm_hour = (int)(buf[RTC_HOUR] & HOUR_MASK);
> +       tm->tm_mday = (int)(buf[RTC_MONTHDAY] & MONTHDAY_MASK);
> +       tm->tm_mon = (int)(buf[RTC_MONTH] & MONTH_MASK) - 1;
> +       tm->tm_year = (int)(buf[RTC_YEAR] & YEAR_MASK) + RTC_YEAR_BASE;
> +       tm->tm_wday = ffs(wday) - 1;
> +
> +       return 0;
> +}
> +
> +static inline int max77620_rtc_tm_to_reg(struct max77620_rtc *rtc, u8 *buf,
> +                                        struct rtc_time *tm, int alarm)
> +{
> +       u8 alarm_mask = alarm ? ALARM_EN_MASK : 0;
> +
> +       if (unlikely((tm->tm_year < RTC_YEAR_BASE) ||
> +                       (tm->tm_year > RTC_YEAR_BASE + RTC_YEAR_MAX))) {
> +               dev_err(rtc->dev,
> +                       "rtc_tm_to_reg: Invalid year, %d\n", tm->tm_year);
> +               return -EINVAL;
> +       }
> +
> +       buf[RTC_SEC] = tm->tm_sec | alarm_mask;
> +       buf[RTC_MIN] = tm->tm_min | alarm_mask;
> +       buf[RTC_HOUR] = tm->tm_hour | alarm_mask;
> +       buf[RTC_MONTHDAY] = tm->tm_mday | alarm_mask;
> +       buf[RTC_MONTH] = (tm->tm_mon + 1) | alarm_mask;
> +       buf[RTC_YEAR] = (tm->tm_year - RTC_YEAR_BASE) | alarm_mask;
> +
> +       /* The wday is configured only when disabled alarm. */
> +       if (!alarm)
> +               buf[RTC_WEEKDAY] = (1 << tm->tm_wday);
> +       else {
> +       /* Configure its default reset value 0x01, and not enable it. */
> +               buf[RTC_WEEKDAY] = 0x01;
> +       }
> +       return 0;
> +}
> +
> +static inline int max77620_rtc_irq_mask(struct max77620_rtc *rtc, u8 irq)
> +{
> +       u8 irq_mask = rtc->irq_mask | irq;
> +       int ret = 0;
> +
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "rtc_irq_mask: Failed to set rtc irq mask\n");

Again a chain of error messages for the same error. The error comes
either from max77620_reg_writes() or from
max77620_rtc_update_buffer(). Then you print it here as well polluting
the dmesg.

> +               goto out;
> +       }
> +       rtc->irq_mask = irq_mask;
> +
> +out:
> +       return ret;
> +}
> +
> +static inline int max77620_rtc_irq_unmask(struct max77620_rtc *rtc, u8 irq)
> +{
> +       u8 irq_mask = rtc->irq_mask & ~irq;
> +       int ret = 0;
> +
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM, &irq_mask, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev,
> +                       "rtc_irq_unmask: Failed to set rtc irq mask\n");
> +               goto out;
> +       }
> +       rtc->irq_mask = irq_mask;
> +
> +out:
> +       return ret;
> +}
> +
> +static inline int max77620_rtc_do_irq(struct max77620_rtc *rtc)
> +{
> +       struct device *parent = _to_parent(rtc);
> +       u8 irq_status;
> +       int ret;
> +
> +       ret = max77620_reg_read(parent, MAX77620_RTC_SLAVE,
> +                                       MAX77620_REG_RTCINT, &irq_status);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
> +               return ret;
> +       }
> +
> +       dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
> +               rtc->irq_mask, irq_status);
> +
> +       if (!(rtc->irq_mask & MAX77620_RTCA1_MASK) &&
> +                       (irq_status & MAX77620_RTCA1_MASK))
> +               rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
> +
> +       if (!(rtc->irq_mask & MAX77620_RTC_RTC1S_MASK) &&
> +                       (irq_status & MAX77620_RTC_RTC1S_MASK))
> +               rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
> +
> +       return ret;
> +}
> +
> +static irqreturn_t max77620_rtc_irq(int irq, void *data)
> +{
> +       struct max77620_rtc *rtc = (struct max77620_rtc *)data;
> +
> +       max77620_rtc_do_irq(rtc);
> +
> +       return IRQ_HANDLED;
> +}
> +
> +static int max77620_rtc_alarm_irq_enable(struct device *dev,
> +                                        unsigned int enabled)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       int ret = 0;
> +
> +       if (rtc->irq < 0)
> +               return -ENXIO;
> +
> +       /* Handle pending interrupt */
> +       ret = max77620_rtc_do_irq(rtc);
> +       if (ret < 0)
> +               goto out;
> +
> +       /* Config alarm interrupt */

s/Config/Configure/ ?

> +       if (enabled) {
> +               ret = max77620_rtc_irq_unmask(rtc, MAX77620_RTCA1_MASK);
> +               if (ret < 0)
> +                       goto out;
> +       } else {
> +               ret = max77620_rtc_irq_mask(rtc, MAX77620_RTCA1_MASK);
> +               if (ret < 0)
> +                       goto out;
> +       }
> +out:
> +       return ret;
> +}
> +
> +static int max77620_rtc_read_time(struct device *dev, struct rtc_time *tm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSEC, buf, sizeof(buf), 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCSEC read failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       ret = max77620_rtc_reg_to_tm(rtc, buf, tm);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
> +                       ret);

The same pattern of error messages - max77620_rtc_reg_to_tm() will
print it. Show it only once.

> +               return ret;
> +       }
> +
> +       return ret;
> +}
> +
> +static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Time format to Reg format conv failed: %d\n",
> +                       ret);
> +               return ret;
> +       }
> +
> +       return max77620_rtc_write(rtc, MAX77620_REG_RTCSEC,
> +                                       buf, sizeof(buf), 1);
> +}
> +
> +static int max77620_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_read(rtc, MAX77620_REG_RTCSECA1,
> +                                       buf, sizeof(buf), 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCSECA1 read failed: %d\n", ret);
> +               return ret;
> +       }
> +

One line is enough.

> +
> +       buf[RTC_YEAR] &= ~ALARM_EN_MASK;
> +       ret = max77620_rtc_reg_to_tm(rtc, buf, &alrm->time);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg format to time format conv failed: %d\n",
> +                       ret);
> +               return ret;
> +       }
> +
> +       if (rtc->irq_mask & MAX77620_RTCA1_MASK)
> +               alrm->enabled = 0;
> +       else
> +               alrm->enabled = 1;
> +
> +       return 0;
> +}
> +
> +static int max77620_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(dev);
> +       u8 buf[RTC_NR];
> +       int ret;
> +
> +       ret = max77620_rtc_tm_to_reg(rtc, buf, &alrm->time, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Time format to reg format conv failed: %d\n",
> +                       ret);
> +               return ret;
> +       }
> +
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCSECA1, buf,
> +                       sizeof(buf), 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Reg RTCSECA1 write failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       ret = max77620_rtc_alarm_irq_enable(dev, alrm->enabled);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "Enable rtc alarm failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return ret;
> +}
> +
> +static const struct rtc_class_ops max77620_rtc_ops = {
> +       .read_time = max77620_rtc_read_time,
> +       .set_time = max77620_rtc_set_time,
> +       .read_alarm = max77620_rtc_read_alarm,
> +       .set_alarm = max77620_rtc_set_alarm,
> +       .alarm_irq_enable = max77620_rtc_alarm_irq_enable,
> +};
> +
> +static int max77620_rtc_preinit(struct max77620_rtc *rtc)
> +{
> +       struct device *parent = _to_parent(rtc);
> +       u8 val;
> +       int ret;
> +
> +       /* Mask all interrupts */
> +       rtc->irq_mask = 0xFF;
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM,
> +                                               &rtc->irq_mask, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
> +               return ret;
> +       }
> +
> +       max77620_rtc_read(rtc, MAX77620_REG_RTCINT, &val, 1, 0);
> +
> +       /* Configure Binary mode and 24hour mode */
> +       val = MAX77620_HRMODEM_MASK;
> +       ret = max77620_rtc_write(rtc, MAX77620_REG_RTCCNTL, &val, 1, 1);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
> +               return ret;
> +       }
> +
> +       /* It should be disabled alarm wakeup to wakeup from sleep
> +        * by EN1 input signal.
> +        */

Please use Linux coding style for multi-line comments. I also can't
get the meaning. It should be disabled wakeup to wakeup?

> +       ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
> +               MAX77620_REG_ONOFFCNFG2, ONOFF_WK_ALARM1_MASK, 0);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +
> +static int max77620_rtc_probe(struct platform_device *pdev)
> +{
> +       static struct max77620_rtc *rtc;
> +       int ret = 0;
> +
> +       rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
> +       if (!rtc)
> +               return -ENOMEM;
> +
> +       dev_set_drvdata(&pdev->dev, rtc);
> +       rtc->dev = &pdev->dev;
> +       mutex_init(&rtc->io_lock);
> +
> +       ret = max77620_rtc_preinit(rtc);
> +       if (ret) {
> +               dev_err(&pdev->dev, "probe: Failed to rtc preinit\n");
> +               goto fail_preinit;
> +       }
> +
> +       device_init_wakeup(&pdev->dev, 1);
> +
> +       rtc->rtc = devm_rtc_device_register(&pdev->dev, "max77620-rtc",
> +                                      &max77620_rtc_ops, THIS_MODULE);
> +       if (IS_ERR(rtc->rtc)) {
> +               dev_err(&pdev->dev, "probe: Failed to register rtc\n");
> +               ret = PTR_ERR(rtc->rtc);
> +               goto fail_preinit;
> +       }
> +
> +       rtc->irq = platform_get_irq(pdev, 0);
> +       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
> +                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,

Why early resume?

> +                       "max77620-rtc", rtc);
> +       if (ret < 0) {
> +               dev_err(rtc->dev, "probe: Failed to request irq %d\n",
> +                       rtc->irq);
> +               rtc->irq = -1;

Why? The probe will fail. Will it be used somewhere?

> +               goto fail_preinit;
> +       }
> +
> +       device_init_wakeup(rtc->dev, 1);

This shouldn't be needed.

> +       enable_irq_wake(rtc->irq);
> +
> +       return 0;
> +
> +fail_preinit:
> +       mutex_destroy(&rtc->io_lock);
> +       return ret;
> +}
> +
> +static int max77620_rtc_remove(struct platform_device *pdev)
> +{
> +       struct max77620_rtc *rtc = dev_get_drvdata(&pdev->dev);
> +
> +       mutex_destroy(&rtc->io_lock);
> +       return 0;
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int max77620_rtc_suspend(struct device *dev)
> +{
> +       struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
> +
> +       if (device_may_wakeup(dev)) {
> +               int ret;
> +               struct rtc_wkalrm alm;
> +
> +               enable_irq_wake(max77620_rtc->irq);
> +               ret = max77620_rtc_read_alarm(dev, &alm);
> +               if (!ret)
> +                       dev_info(dev, "%s() alrm %d time %d %d %d %d %d %d\n",
> +                               __func__, alm.enabled,
> +                               alm.time.tm_year, alm.time.tm_mon,
> +                               alm.time.tm_mday, alm.time.tm_hour,
> +                               alm.time.tm_min, alm.time.tm_sec);

Nope. On each suspend you want to print current time? This does not
even classifies for dev_dbg.

> +       }
> +
> +       return 0;
> +}
> +
> +static int max77620_rtc_resume(struct device *dev)
> +{
> +       struct max77620_rtc *max77620_rtc = dev_get_drvdata(dev);
> +
> +       if (device_may_wakeup(dev)) {
> +               struct rtc_time tm;
> +               int ret;
> +
> +               disable_irq_wake(max77620_rtc->irq);
> +               ret = max77620_rtc_read_time(dev, &tm);
> +               if (!ret)
> +                       dev_info(dev, "%s() %d %d %d %d %d %d\n",
> +                               __func__, tm.tm_year, tm.tm_mon, tm.tm_mday,
> +                               tm.tm_hour, tm.tm_min, tm.tm_sec);

Ditto.

> +       }
> +
> +       return 0;
> +}
> +#endif
> +
> +static const struct dev_pm_ops max77620_rtc_pm_ops = {
> +       SET_SYSTEM_SLEEP_PM_OPS(max77620_rtc_suspend, max77620_rtc_resume)
> +};
> +
> +static struct platform_device_id max77620_rtc_devtype[] = {

const?

Best regards,
Krzysztof

> +       {
> +               .name = "max77620-rtc",
> +       },
> +       {
> +               .name = "max20024-rtc",
> +       },
> +};
> +
> +static struct platform_driver max77620_rtc_driver = {
> +       .probe = max77620_rtc_probe,
> +       .remove = max77620_rtc_remove,
> +       .id_table = max77620_rtc_devtype,
> +       .driver = {
> +                       .name = "max77620-rtc",
> +                       .owner = THIS_MODULE,
> +                       .pm = &max77620_rtc_pm_ops,
> +       },
> +};
> +
> +module_platform_driver(max77620_rtc_driver);
> +
> +MODULE_DESCRIPTION("max77620 RTC driver");
> +MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> +MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> +MODULE_ALIAS("platform:max77620-rtc");
> +MODULE_LICENSE("GPL v2");
> --
> 2.1.4
>
> --
> --
> You received this message because you are subscribed to "rtc-linux".
> Membership options at http://groups.google.com/group/rtc-linux .
> Please read http://groups.google.com/group/rtc-linux/web/checklist
> before submitting a driver.
> ---
> You received this message because you are subscribed to the Google Groups "rtc-linux" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com.
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Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  2016-01-07 23:12     ` [rtc-linux] " Rob Herring
  (?)
@ 2016-01-08  6:06       ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08  6:06 UTC (permalink / raw)
  To: Rob Herring
  Cc: pawel.moll-5wv7dgnIgG8, mark.rutland-5wv7dgnIgG8,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
	galak-sgV2jX0FEOL9JmXXK+q4OQ,
	linus.walleij-QSEj5FYQhm4dnm+yROfE0A,
	gnurou-Re5JQEeQqe8AvxtiuMwx3w, lee.jones-QSEj5FYQhm4dnm+yROfE0A,
	broonie-DgEjT+Ai2ygdnm+yROfE0A, a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
	alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA,
	rtc-linux-/JYPxA39Uh5TLH3MbocFFw, swarren-DDmLM1+adcrQT0dZR+AlfA,
	treding-DDmLM1+adcrQT0dZR+AlfA

Thanks Rob for review.
I have taken care of all comment except following which I have query.

On Friday 08 January 2016 04:42 AM, Rob Herring wrote:
> +	- maxim,low-battery-reset-enable: Enable low battery reset.
> +	- maxim,low-battery-reset-disable: Disable low battery reset.
> Why not boolean? Not present means keep default value? I'd prefer
> boolean or tristate of not present, 0 to disable, or 1 to enable.
>
>
Here, the properties are boolean. I will add this on the description.

I like to enable or disable with the DT and properties are not there 
then left to default.
So added two properties for enable and disable. If properties are there, 
do the activity.

Here tristate is also possible:
maxim,low-battery-reset: tristate, low battery reset control. 0 for 
disable, 1 for enable and
                                  absence of this will leave 
configuration on default.

Does it look fine?
--
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-08  6:06       ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08  6:06 UTC (permalink / raw)
  To: Rob Herring
  Cc: pawel.moll, mark.rutland, ijc+devicetree, galak, linus.walleij,
	gnurou, lee.jones, broonie, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding

Thanks Rob for review.
I have taken care of all comment except following which I have query.

On Friday 08 January 2016 04:42 AM, Rob Herring wrote:
> +	- maxim,low-battery-reset-enable: Enable low battery reset.
> +	- maxim,low-battery-reset-disable: Disable low battery reset.
> Why not boolean? Not present means keep default value? I'd prefer
> boolean or tristate of not present, 0 to disable, or 1 to enable.
>
>
Here, the properties are boolean. I will add this on the description.

I like to enable or disable with the DT and properties are not there 
then left to default.
So added two properties for enable and disable. If properties are there, 
do the activity.

Here tristate is also possible:
maxim,low-battery-reset: tristate, low battery reset control. 0 for 
disable, 1 for enable and
                                  absence of this will leave 
configuration on default.

Does it look fine?

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-08  6:06       ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08  6:06 UTC (permalink / raw)
  To: Rob Herring
  Cc: pawel.moll, mark.rutland, ijc+devicetree, galak, linus.walleij,
	gnurou, lee.jones, broonie, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding

Thanks Rob for review.
I have taken care of all comment except following which I have query.

On Friday 08 January 2016 04:42 AM, Rob Herring wrote:
> +	- maxim,low-battery-reset-enable: Enable low battery reset.
> +	- maxim,low-battery-reset-disable: Disable low battery reset.
> Why not boolean? Not present means keep default value? I'd prefer
> boolean or tristate of not present, 0 to disable, or 1 to enable.
>
>
Here, the properties are boolean. I will add this on the description.

I like to enable or disable with the DT and properties are not there 
then left to default.
So added two properties for enable and disable. If properties are there, 
do the activity.

Here tristate is also possible:
maxim,low-battery-reset: tristate, low battery reset control. 0 for 
disable, 1 for enable and
                                  absence of this will leave 
configuration on default.

Does it look fine?

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Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-08  1:35     ` Krzysztof Kozlowski
  (?)
@ 2016-01-08  9:16         ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08  9:16 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux-/JYPxA39Uh5TLH3MbocFFw
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, pawel.moll-5wv7dgnIgG8,
	mark.rutland-5wv7dgnIgG8, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
	galak-sgV2jX0FEOL9JmXXK+q4OQ,
	linus.walleij-QSEj5FYQhm4dnm+yROfE0A,
	gnurou-Re5JQEeQqe8AvxtiuMwx3w, lee.jones-QSEj5FYQhm4dnm+yROfE0A,
	broonie-DgEjT+Ai2ygdnm+yROfE0A, a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
	alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA,
	swarren-DDmLM1+adcrQT0dZR+AlfA, treding-DDmLM1+adcrQT0dZR+AlfA,
	Chaitanya Bandi, Mallikarjun Kasoju

Hi Krzysztof,
Thanks for review.
I will fix most of your comment on my next patch.

Answering to some of comment/query.

On Friday 08 January 2016 07:05 AM, Krzysztof Kozlowski wrote:
> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>:
> +                               dev_err(dev,
> +                                   "FPS enable-input %u is not supported\n",
> +                                       pval);
> Indentation of arguments does not seem equal here or maybe this is
> just my email client. Have you run this through checkpatch? And
> sparse? And coccicheck (that one definitely not because kbuild is
> complaining)?
I ran checkpatch before I sent.

> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
> +               (const struct regmap_config *)&max77620_regmap_config[i]);
> Indentation looks weird here (or again this is my email client...).
> The cast is even weirder?!? Why casting?
There is some parameter difference for MAX77620 and MAX20024. I have 
only one structure for it and changing tun time so I have not define 
this structure as constant.
Now API needs const type structure and hence casting it.

However, I have  define different structure for MAX77620 and MAX20024 
which are const type and hence no need to explicitly casting here. This 
will be in my next patch.

+static inline int max77620_reg_update(struct device *dev, int sid,
+               unsigned int reg, unsigned int mask, unsigned int val)
+{
+       struct max77620_chip *chip = dev_get_drvdata(dev);
+
+       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
+}

> I think all these shouldn't be static inlines in header. Although some
> of them are one-liners but rest are not. Let the compiler decide what
> to do with these wrappers.

If I dont make inline from header then this will complain as unused 
static function on related C compilation if it is not used on C. This 
header included from all sub module driver and they are not using all 
these APIs.

To avoid compilation warning,  I need to use inline here.


--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08  9:16         ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08  9:16 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

Hi Krzysztof,
Thanks for review.
I will fix most of your comment on my next patch.

Answering to some of comment/query.

On Friday 08 January 2016 07:05 AM, Krzysztof Kozlowski wrote:
> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> +                               dev_err(dev,
> +                                   "FPS enable-input %u is not supported\n",
> +                                       pval);
> Indentation of arguments does not seem equal here or maybe this is
> just my email client. Have you run this through checkpatch? And
> sparse? And coccicheck (that one definitely not because kbuild is
> complaining)?
I ran checkpatch before I sent.

> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
> +               (const struct regmap_config *)&max77620_regmap_config[i]);
> Indentation looks weird here (or again this is my email client...).
> The cast is even weirder?!? Why casting?
There is some parameter difference for MAX77620 and MAX20024. I have 
only one structure for it and changing tun time so I have not define 
this structure as constant.
Now API needs const type structure and hence casting it.

However, I have  define different structure for MAX77620 and MAX20024 
which are const type and hence no need to explicitly casting here. This 
will be in my next patch.

+static inline int max77620_reg_update(struct device *dev, int sid,
+               unsigned int reg, unsigned int mask, unsigned int val)
+{
+       struct max77620_chip *chip = dev_get_drvdata(dev);
+
+       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
+}

> I think all these shouldn't be static inlines in header. Although some
> of them are one-liners but rest are not. Let the compiler decide what
> to do with these wrappers.

If I dont make inline from header then this will complain as unused 
static function on related C compilation if it is not used on C. This 
header included from all sub module driver and they are not using all 
these APIs.

To avoid compilation warning,  I need to use inline here.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08  9:16         ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08  9:16 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

Hi Krzysztof,
Thanks for review.
I will fix most of your comment on my next patch.

Answering to some of comment/query.

On Friday 08 January 2016 07:05 AM, Krzysztof Kozlowski wrote:
> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> +                               dev_err(dev,
> +                                   "FPS enable-input %u is not supported\n",
> +                                       pval);
> Indentation of arguments does not seem equal here or maybe this is
> just my email client. Have you run this through checkpatch? And
> sparse? And coccicheck (that one definitely not because kbuild is
> complaining)?
I ran checkpatch before I sent.

> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
> +               (const struct regmap_config *)&max77620_regmap_config[i]);
> Indentation looks weird here (or again this is my email client...).
> The cast is even weirder?!? Why casting?
There is some parameter difference for MAX77620 and MAX20024. I have 
only one structure for it and changing tun time so I have not define 
this structure as constant.
Now API needs const type structure and hence casting it.

However, I have  define different structure for MAX77620 and MAX20024 
which are const type and hence no need to explicitly casting here. This 
will be in my next patch.

+static inline int max77620_reg_update(struct device *dev, int sid,
+               unsigned int reg, unsigned int mask, unsigned int val)
+{
+       struct max77620_chip *chip = dev_get_drvdata(dev);
+
+       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
+}

> I think all these shouldn't be static inlines in header. Although some
> of them are one-liners but rest are not. Let the compiler decide what
> to do with these wrappers.

If I dont make inline from header then this will complain as unused 
static function on related C compilation if it is not used on C. This 
header included from all sub module driver and they are not using all 
these APIs.

To avoid compilation warning,  I need to use inline here.


-- 
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You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
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You received this message because you are subscribed to the Google Groups "rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08  2:03     ` Krzysztof Kozlowski
  (?)
@ 2016-01-08 10:20       ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 10:20 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

Hi Krzysztof,
Thanks for review.

Accepted most of review comment and will update in next patch.

Answer to query:


On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
> 2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> ---
>   drivers/rtc/Kconfig        |   9 +
>   drivers/rtc/Makefile       |   1 +
>   drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
> The driver (as most of Maxim's) looks quite similar to existing RTC
> driver, like max77802. It is difficult to spot the exact differences
> (I don't have 77620's datasheet) but I would suggest not duplicating
> the work. Maybe the biggest difference is the way you configure the
> regmap... but still sometimes the regmap config can be shared.
Yaah, that is the issue on IP based PMIC system and it happen with the 
Maxim and TI.
The MFD and its sub module drivers are too much couped  and hence 
dificult to use the IP driver across PMIC. For almost all Maxim PMIC, we 
end up of same type of RTC driver.

Probably, we need to enhance the mfd sub system to allow sub module 
driver to decoupe from its APIs.


+
+       rtc->irq = platform_get_irq(pdev, 0);
+       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,

> Why early resume?

When we go on suspend, the interrupts are masked by framework. For 
regmap-irq, it is stored on local reg value but not written into the 
PMIC register.
In Nvidia Tegra system, ARM GIC controller registered before the other 
interrupt controller like GPIO, PMIC etc.
When wakeup happened through RTC alarm, we get the interrupt from PMIC 
and on resume path, the PMIC isr handler get called after PMIC interrupt 
to the GIC is unmasked. But at this time, PMIC RTC alarm is still in 
masked state by regmap-irq which causes the interrupt to RTC ignore in 
the PMIC ISR handler and so RTC Isr did not get called and not cleared 
interrupt. This causes PMIC ISr handler to stuck on loop.

The need is to unmask the RTC alarm interrupt on PMIC interrupt driver 
before PMIC interrupt served so that we can have proper interrupt status 
in handler and rtc isr can get called.

For this, RTC alarm interrupt need to be EARLY_RESUME.



^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 10:20       ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 10:20 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

Hi Krzysztof,
Thanks for review.

Accepted most of review comment and will update in next patch.

Answer to query:


On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
> 2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> ---
>   drivers/rtc/Kconfig        |   9 +
>   drivers/rtc/Makefile       |   1 +
>   drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
> The driver (as most of Maxim's) looks quite similar to existing RTC
> driver, like max77802. It is difficult to spot the exact differences
> (I don't have 77620's datasheet) but I would suggest not duplicating
> the work. Maybe the biggest difference is the way you configure the
> regmap... but still sometimes the regmap config can be shared.
Yaah, that is the issue on IP based PMIC system and it happen with the 
Maxim and TI.
The MFD and its sub module drivers are too much couped  and hence 
dificult to use the IP driver across PMIC. For almost all Maxim PMIC, we 
end up of same type of RTC driver.

Probably, we need to enhance the mfd sub system to allow sub module 
driver to decoupe from its APIs.


+
+       rtc->irq = platform_get_irq(pdev, 0);
+       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,

> Why early resume?

When we go on suspend, the interrupts are masked by framework. For 
regmap-irq, it is stored on local reg value but not written into the 
PMIC register.
In Nvidia Tegra system, ARM GIC controller registered before the other 
interrupt controller like GPIO, PMIC etc.
When wakeup happened through RTC alarm, we get the interrupt from PMIC 
and on resume path, the PMIC isr handler get called after PMIC interrupt 
to the GIC is unmasked. But at this time, PMIC RTC alarm is still in 
masked state by regmap-irq which causes the interrupt to RTC ignore in 
the PMIC ISR handler and so RTC Isr did not get called and not cleared 
interrupt. This causes PMIC ISr handler to stuck on loop.

The need is to unmask the RTC alarm interrupt on PMIC interrupt driver 
before PMIC interrupt served so that we can have proper interrupt status 
in handler and rtc isr can get called.

For this, RTC alarm interrupt need to be EARLY_RESUME.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 10:20       ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 10:20 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

Hi Krzysztof,
Thanks for review.

Accepted most of review comment and will update in next patch.

Answer to query:


On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
> 2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> ---
>   drivers/rtc/Kconfig        |   9 +
>   drivers/rtc/Makefile       |   1 +
>   drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
> The driver (as most of Maxim's) looks quite similar to existing RTC
> driver, like max77802. It is difficult to spot the exact differences
> (I don't have 77620's datasheet) but I would suggest not duplicating
> the work. Maybe the biggest difference is the way you configure the
> regmap... but still sometimes the regmap config can be shared.
Yaah, that is the issue on IP based PMIC system and it happen with the 
Maxim and TI.
The MFD and its sub module drivers are too much couped  and hence 
dificult to use the IP driver across PMIC. For almost all Maxim PMIC, we 
end up of same type of RTC driver.

Probably, we need to enhance the mfd sub system to allow sub module 
driver to decoupe from its APIs.


+
+       rtc->irq = platform_get_irq(pdev, 0);
+       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
+                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,

> Why early resume?

When we go on suspend, the interrupts are masked by framework. For 
regmap-irq, it is stored on local reg value but not written into the 
PMIC register.
In Nvidia Tegra system, ARM GIC controller registered before the other 
interrupt controller like GPIO, PMIC etc.
When wakeup happened through RTC alarm, we get the interrupt from PMIC 
and on resume path, the PMIC isr handler get called after PMIC interrupt 
to the GIC is unmasked. But at this time, PMIC RTC alarm is still in 
masked state by regmap-irq which causes the interrupt to RTC ignore in 
the PMIC ISR handler and so RTC Isr did not get called and not cleared 
interrupt. This causes PMIC ISr handler to stuck on loop.

The need is to unmask the RTC alarm interrupt on PMIC interrupt driver 
before PMIC interrupt served so that we can have proper interrupt status 
in handler and rtc isr can get called.

For this, RTC alarm interrupt need to be EARLY_RESUME.


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Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 10:20       ` Laxman Dewangan
@ 2016-01-08 12:51         ` Mark Brown
  -1 siblings, 0 replies; 103+ messages in thread
From: Mark Brown @ 2016-01-08 12:51 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi

[-- Attachment #1: Type: text/plain, Size: 571 bytes --]

On Fri, Jan 08, 2016 at 03:50:46PM +0530, Laxman Dewangan wrote:

> Yaah, that is the issue on IP based PMIC system and it happen with the Maxim
> and TI.
> The MFD and its sub module drivers are too much couped  and hence dificult
> to use the IP driver across PMIC. For almost all Maxim PMIC, we end up of
> same type of RTC driver.

> Probably, we need to enhance the mfd sub system to allow sub module driver
> to decoupe from its APIs.

Could you be more specific about the issues here please?  I can't think
of any barriers and you've not mentioned any barriers...

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 473 bytes --]

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 12:51         ` Mark Brown
  0 siblings, 0 replies; 103+ messages in thread
From: Mark Brown @ 2016-01-08 12:51 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi

[-- Attachment #1: Type: text/plain, Size: 1090 bytes --]

On Fri, Jan 08, 2016 at 03:50:46PM +0530, Laxman Dewangan wrote:

> Yaah, that is the issue on IP based PMIC system and it happen with the Maxim
> and TI.
> The MFD and its sub module drivers are too much couped  and hence dificult
> to use the IP driver across PMIC. For almost all Maxim PMIC, we end up of
> same type of RTC driver.

> Probably, we need to enhance the mfd sub system to allow sub module driver
> to decoupe from its APIs.

Could you be more specific about the issues here please?  I can't think
of any barriers and you've not mentioned any barriers...

-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
You received this message because you are subscribed to the Google Groups "rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 473 bytes --]

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 12:51         ` Mark Brown
  (?)
@ 2016-01-08 13:04           ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:04 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 06:21 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jan 08, 2016 at 03:50:46PM +0530, Laxman Dewangan wrote:
>
>> Yaah, that is the issue on IP based PMIC system and it happen with the Maxim
>> and TI.
>> The MFD and its sub module drivers are too much couped  and hence dificult
>> to use the IP driver across PMIC. For almost all Maxim PMIC, we end up of
>> same type of RTC driver.
>> Probably, we need to enhance the mfd sub system to allow sub module driver
>> to decoupe from its APIs.
> Could you be more specific about the issues here please?  I can't think
> of any barriers and you've not mentioned any barriers...
>

I took MAX77686 and MAX77620. They are almost same IP on both PMIC and I 
think it can be used if we decouple it. Typical codes are same as 
follows: (I posted here for quick reference, excuse me if it is long).


If we get the parent device, regmap handle and interrupt number from mfd 
core independent of the PMIC (MAX77620 or MAX77686), then same driver 
can be used here.
Two way which I can think of here:

1: We need to make independent maxim RTC IP driver which may be platform 
driver and get above information from the platform data.

This way both mfd driver can pass the platform data with required 
information and decoupled.

2. Other way is that rtc driver will register as independent platform 
driver and pass the mfd dt handle to this driver. Later maxim rtc driver 
can query for getting the regmap, interrupt number etc.

Any other approach are welcome.


sample code:
************************8
Typical function from max77686:

static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
         struct max77686_rtc_info *info = dev_get_drvdata(dev);
         u8 data[RTC_NR_TIME];
         int ret;

         ret = max77686_rtc_tm_to_data(tm, data);
         if (ret < 0)
                 return ret;

         mutex_lock(&info->lock);

         ret = regmap_bulk_write(info->max77686->rtc_regmap,
                                  MAX77686_RTC_SEC, data, RTC_NR_TIME);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to write time reg(%d)\n", 
__func__,
                                 ret);
                 goto out;
         }

         ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);

out:
         mutex_unlock(&info->lock);
         return ret;
}


static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
         struct max77620_rtc *rtc = dev_get_drvdata(dev);
         struct device *parent = max77620_to_parent(rtc);
         u8 buf[RTC_NR];
         int ret;

         ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
         if (ret < 0)
                 return ret;

         mutex_lock(&rtc->io_lock);

         ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE, addr, 
len, vals);
         if (ret < 0) {
                 dev_err(rtc->dev, "Reg 0x%02x write failed: %d\n", 
addr, ret);
                 goto out;
         }

         ret = max77620_rtc_update_buffer(rtc, 1);

out:
         mutex_unlock(&rtc->io_lock);

         return ret;
}

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:04           ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:04 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 06:21 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jan 08, 2016 at 03:50:46PM +0530, Laxman Dewangan wrote:
>
>> Yaah, that is the issue on IP based PMIC system and it happen with the Maxim
>> and TI.
>> The MFD and its sub module drivers are too much couped  and hence dificult
>> to use the IP driver across PMIC. For almost all Maxim PMIC, we end up of
>> same type of RTC driver.
>> Probably, we need to enhance the mfd sub system to allow sub module driver
>> to decoupe from its APIs.
> Could you be more specific about the issues here please?  I can't think
> of any barriers and you've not mentioned any barriers...
>

I took MAX77686 and MAX77620. They are almost same IP on both PMIC and I 
think it can be used if we decouple it. Typical codes are same as 
follows: (I posted here for quick reference, excuse me if it is long).


If we get the parent device, regmap handle and interrupt number from mfd 
core independent of the PMIC (MAX77620 or MAX77686), then same driver 
can be used here.
Two way which I can think of here:

1: We need to make independent maxim RTC IP driver which may be platform 
driver and get above information from the platform data.

This way both mfd driver can pass the platform data with required 
information and decoupled.

2. Other way is that rtc driver will register as independent platform 
driver and pass the mfd dt handle to this driver. Later maxim rtc driver 
can query for getting the regmap, interrupt number etc.

Any other approach are welcome.


sample code:
************************8
Typical function from max77686:

static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
         struct max77686_rtc_info *info = dev_get_drvdata(dev);
         u8 data[RTC_NR_TIME];
         int ret;

         ret = max77686_rtc_tm_to_data(tm, data);
         if (ret < 0)
                 return ret;

         mutex_lock(&info->lock);

         ret = regmap_bulk_write(info->max77686->rtc_regmap,
                                  MAX77686_RTC_SEC, data, RTC_NR_TIME);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to write time reg(%d)\n", 
__func__,
                                 ret);
                 goto out;
         }

         ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);

out:
         mutex_unlock(&info->lock);
         return ret;
}


static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
         struct max77620_rtc *rtc = dev_get_drvdata(dev);
         struct device *parent = max77620_to_parent(rtc);
         u8 buf[RTC_NR];
         int ret;

         ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
         if (ret < 0)
                 return ret;

         mutex_lock(&rtc->io_lock);

         ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE, addr, 
len, vals);
         if (ret < 0) {
                 dev_err(rtc->dev, "Reg 0x%02x write failed: %d\n", 
addr, ret);
                 goto out;
         }

         ret = max77620_rtc_update_buffer(rtc, 1);

out:
         mutex_unlock(&rtc->io_lock);

         return ret;
}

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:04           ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:04 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 06:21 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jan 08, 2016 at 03:50:46PM +0530, Laxman Dewangan wrote:
>
>> Yaah, that is the issue on IP based PMIC system and it happen with the Maxim
>> and TI.
>> The MFD and its sub module drivers are too much couped  and hence dificult
>> to use the IP driver across PMIC. For almost all Maxim PMIC, we end up of
>> same type of RTC driver.
>> Probably, we need to enhance the mfd sub system to allow sub module driver
>> to decoupe from its APIs.
> Could you be more specific about the issues here please?  I can't think
> of any barriers and you've not mentioned any barriers...
>

I took MAX77686 and MAX77620. They are almost same IP on both PMIC and I 
think it can be used if we decouple it. Typical codes are same as 
follows: (I posted here for quick reference, excuse me if it is long).


If we get the parent device, regmap handle and interrupt number from mfd 
core independent of the PMIC (MAX77620 or MAX77686), then same driver 
can be used here.
Two way which I can think of here:

1: We need to make independent maxim RTC IP driver which may be platform 
driver and get above information from the platform data.

This way both mfd driver can pass the platform data with required 
information and decoupled.

2. Other way is that rtc driver will register as independent platform 
driver and pass the mfd dt handle to this driver. Later maxim rtc driver 
can query for getting the regmap, interrupt number etc.

Any other approach are welcome.


sample code:
************************8
Typical function from max77686:

static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
         struct max77686_rtc_info *info = dev_get_drvdata(dev);
         u8 data[RTC_NR_TIME];
         int ret;

         ret = max77686_rtc_tm_to_data(tm, data);
         if (ret < 0)
                 return ret;

         mutex_lock(&info->lock);

         ret = regmap_bulk_write(info->max77686->rtc_regmap,
                                  MAX77686_RTC_SEC, data, RTC_NR_TIME);
         if (ret < 0) {
                 dev_err(info->dev, "%s: fail to write time reg(%d)\n", 
__func__,
                                 ret);
                 goto out;
         }

         ret = max77686_rtc_update(info, MAX77686_RTC_WRITE);

out:
         mutex_unlock(&info->lock);
         return ret;
}


static int max77620_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
         struct max77620_rtc *rtc = dev_get_drvdata(dev);
         struct device *parent = max77620_to_parent(rtc);
         u8 buf[RTC_NR];
         int ret;

         ret = max77620_rtc_tm_to_reg(rtc, buf, tm, 0);
         if (ret < 0)
                 return ret;

         mutex_lock(&rtc->io_lock);

         ret = max77620_reg_writes(parent, MAX77620_RTC_SLAVE, addr, 
len, vals);
         if (ret < 0) {
                 dev_err(rtc->dev, "Reg 0x%02x write failed: %d\n", 
addr, ret);
                 goto out;
         }

         ret = max77620_rtc_update_buffer(rtc, 1);

out:
         mutex_unlock(&rtc->io_lock);

         return ret;
}




-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
You received this message because you are subscribed to the Google Groups "rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 10:20       ` Laxman Dewangan
@ 2016-01-08 13:05         ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08 13:05 UTC (permalink / raw)
  To: rtc-linux, ldewangan
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

W dniu 08.01.2016 o 19:20, Laxman Dewangan pisze:
> Hi Krzysztof,
> Thanks for review.
> 
> Accepted most of review comment and will update in next patch.
> 
> Answer to query:
> 
> 
> On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
>> 2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>> ---
>>   drivers/rtc/Kconfig        |   9 +
>>   drivers/rtc/Makefile       |   1 +
>>   drivers/rtc/rtc-max77620.c | 574
>> +++++++++++++++++++++++++++++++++++++++++++++
>> The driver (as most of Maxim's) looks quite similar to existing RTC
>> driver, like max77802. It is difficult to spot the exact differences
>> (I don't have 77620's datasheet) but I would suggest not duplicating
>> the work. Maybe the biggest difference is the way you configure the
>> regmap... but still sometimes the regmap config can be shared.
> Yaah, that is the issue on IP based PMIC system and it happen with the
> Maxim and TI.
> The MFD and its sub module drivers are too much couped  and hence
> dificult to use the IP driver across PMIC. For almost all Maxim PMIC, we
> end up of same type of RTC driver.
> 
> Probably, we need to enhance the mfd sub system to allow sub module
> driver to decoupe from its APIs.

Actually the MFD and other subsystems are quite decoupled already and
support sharing drivers for common IP block. The problem is that we
develop drivers in a coupled way. This is not only issue of this
particular set of drivers. Others were developed in a same way.

So instead I would be happy to see this driver developed in the
decoupled way so existing RTC driver could be reused. If this requires
changing existing MFD driver like max77686 then please go ahead. I may
provide testing for that purpose. Something similar I made recently to
the max77693 and max77843. Both devices have different parent MFD
drivers but share some of the specific subsystem drivers: regulator and
input/haptic.

> 
> 
> +
> +       rtc->irq = platform_get_irq(pdev, 0);
> +       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
> +                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
> 
>> Why early resume?
> 
> When we go on suspend, the interrupts are masked by framework. For
> regmap-irq, it is stored on local reg value but not written into the
> PMIC register.
> In Nvidia Tegra system, ARM GIC controller registered before the other
> interrupt controller like GPIO, PMIC etc.
> When wakeup happened through RTC alarm, we get the interrupt from PMIC
> and on resume path, the PMIC isr handler get called after PMIC interrupt
> to the GIC is unmasked. But at this time, PMIC RTC alarm is still in
> masked state by regmap-irq which causes the interrupt to RTC ignore in
> the PMIC ISR handler and so RTC Isr did not get called and not cleared
> interrupt. This causes PMIC ISr handler to stuck on loop.
> 
> The need is to unmask the RTC alarm interrupt on PMIC interrupt driver
> before PMIC interrupt served so that we can have proper interrupt status
> in handler and rtc isr can get called.
> 
> For this, RTC alarm interrupt need to be EARLY_RESUME.

Okay, this is quite common issue and I think this can be solved by
disabling the IRQ in suspend:
http://lxr.free-electrons.com/source/drivers/mfd/max77843.c#L205

IMHO this would be preferred way because you won't be moving device
suspend/resume callbacks to a syscore level.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:05         ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08 13:05 UTC (permalink / raw)
  To: rtc-linux, ldewangan
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

W dniu 08.01.2016 o 19:20, Laxman Dewangan pisze:
> Hi Krzysztof,
> Thanks for review.
> 
> Accepted most of review comment and will update in next patch.
> 
> Answer to query:
> 
> 
> On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
>> 2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>> ---
>>   drivers/rtc/Kconfig        |   9 +
>>   drivers/rtc/Makefile       |   1 +
>>   drivers/rtc/rtc-max77620.c | 574
>> +++++++++++++++++++++++++++++++++++++++++++++
>> The driver (as most of Maxim's) looks quite similar to existing RTC
>> driver, like max77802. It is difficult to spot the exact differences
>> (I don't have 77620's datasheet) but I would suggest not duplicating
>> the work. Maybe the biggest difference is the way you configure the
>> regmap... but still sometimes the regmap config can be shared.
> Yaah, that is the issue on IP based PMIC system and it happen with the
> Maxim and TI.
> The MFD and its sub module drivers are too much couped  and hence
> dificult to use the IP driver across PMIC. For almost all Maxim PMIC, we
> end up of same type of RTC driver.
> 
> Probably, we need to enhance the mfd sub system to allow sub module
> driver to decoupe from its APIs.

Actually the MFD and other subsystems are quite decoupled already and
support sharing drivers for common IP block. The problem is that we
develop drivers in a coupled way. This is not only issue of this
particular set of drivers. Others were developed in a same way.

So instead I would be happy to see this driver developed in the
decoupled way so existing RTC driver could be reused. If this requires
changing existing MFD driver like max77686 then please go ahead. I may
provide testing for that purpose. Something similar I made recently to
the max77693 and max77843. Both devices have different parent MFD
drivers but share some of the specific subsystem drivers: regulator and
input/haptic.

> 
> 
> +
> +       rtc->irq = platform_get_irq(pdev, 0);
> +       ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
> +                       max77620_rtc_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME,
> 
>> Why early resume?
> 
> When we go on suspend, the interrupts are masked by framework. For
> regmap-irq, it is stored on local reg value but not written into the
> PMIC register.
> In Nvidia Tegra system, ARM GIC controller registered before the other
> interrupt controller like GPIO, PMIC etc.
> When wakeup happened through RTC alarm, we get the interrupt from PMIC
> and on resume path, the PMIC isr handler get called after PMIC interrupt
> to the GIC is unmasked. But at this time, PMIC RTC alarm is still in
> masked state by regmap-irq which causes the interrupt to RTC ignore in
> the PMIC ISR handler and so RTC Isr did not get called and not cleared
> interrupt. This causes PMIC ISr handler to stuck on loop.
> 
> The need is to unmask the RTC alarm interrupt on PMIC interrupt driver
> before PMIC interrupt served so that we can have proper interrupt status
> in handler and rtc isr can get called.
> 
> For this, RTC alarm interrupt need to be EARLY_RESUME.

Okay, this is quite common issue and I think this can be solved by
disabling the IRQ in suspend:
http://lxr.free-electrons.com/source/drivers/mfd/max77843.c#L205

IMHO this would be preferred way because you won't be moving device
suspend/resume callbacks to a syscore level.

Best regards,
Krzysztof

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 13:05         ` Krzysztof Kozlowski
  (?)
@ 2016-01-08 13:13             ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux-/JYPxA39Uh5TLH3MbocFFw
  Cc: k.kozlowski.k-Re5JQEeQqe8AvxtiuMwx3w,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A, pawel.moll-5wv7dgnIgG8,
	mark.rutland-5wv7dgnIgG8, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
	galak-sgV2jX0FEOL9JmXXK+q4OQ,
	linus.walleij-QSEj5FYQhm4dnm+yROfE0A,
	gnurou-Re5JQEeQqe8AvxtiuMwx3w, lee.jones-QSEj5FYQhm4dnm+yROfE0A,
	broonie-DgEjT+Ai2ygdnm+yROfE0A, a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
	alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA,
	swarren-DDmLM1+adcrQT0dZR+AlfA, treding-DDmLM1+adcrQT0dZR+AlfA,
	Chaitanya Bandi


On Friday 08 January 2016 06:35 PM, Krzysztof Kozlowski wrote:
> W dniu 08.01.2016 o 19:20, Laxman Dewangan pisze:
>> Hi Krzysztof,
>> Thanks for review.
>>
>> Accepted most of review comment and will update in next patch.
>>
>> Answer to query:
>>
>>
>> On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
>>
> Actually the MFD and other subsystems are quite decoupled already and
> support sharing drivers for common IP block. The problem is that we
> develop drivers in a coupled way. This is not only issue of this
> particular set of drivers. Others were developed in a same way.
>
> So instead I would be happy to see this driver developed in the
> decoupled way so existing RTC driver could be reused. If this requires
> changing existing MFD driver like max77686 then please go ahead. I may
> provide testing for that purpose. Something similar I made recently to
> the max77693 and max77843. Both devices have different parent MFD
> drivers but share some of the specific subsystem drivers: regulator and
> input/haptic.
I replied on other thread. I can decouple the RTC driver for max77620 
and will be available for review.
If it looks fine then we can modify the max6868 mfd driver to use this 
new driver for test purpose.


>>
>> For this, RTC alarm interrupt need to be EARLY_RESUME.
> Okay, this is quite common issue and I think this can be solved by
> disabling the IRQ in suspend:
> http://lxr.free-electrons.com/source/drivers/mfd/max77843.c#L205
>
> IMHO this would be preferred way because you won't be moving device
> suspend/resume callbacks to a syscore level.

I will try for disable_irq() in suspend and enable_irq() in resume.
I hope this will not affect the wakeup property from suspend.

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:13             ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 06:35 PM, Krzysztof Kozlowski wrote:
> W dniu 08.01.2016 o 19:20, Laxman Dewangan pisze:
>> Hi Krzysztof,
>> Thanks for review.
>>
>> Accepted most of review comment and will update in next patch.
>>
>> Answer to query:
>>
>>
>> On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
>>
> Actually the MFD and other subsystems are quite decoupled already and
> support sharing drivers for common IP block. The problem is that we
> develop drivers in a coupled way. This is not only issue of this
> particular set of drivers. Others were developed in a same way.
>
> So instead I would be happy to see this driver developed in the
> decoupled way so existing RTC driver could be reused. If this requires
> changing existing MFD driver like max77686 then please go ahead. I may
> provide testing for that purpose. Something similar I made recently to
> the max77693 and max77843. Both devices have different parent MFD
> drivers but share some of the specific subsystem drivers: regulator and
> input/haptic.
I replied on other thread. I can decouple the RTC driver for max77620 
and will be available for review.
If it looks fine then we can modify the max6868 mfd driver to use this 
new driver for test purpose.


>>
>> For this, RTC alarm interrupt need to be EARLY_RESUME.
> Okay, this is quite common issue and I think this can be solved by
> disabling the IRQ in suspend:
> http://lxr.free-electrons.com/source/drivers/mfd/max77843.c#L205
>
> IMHO this would be preferred way because you won't be moving device
> suspend/resume callbacks to a syscore level.

I will try for disable_irq() in suspend and enable_irq() in resume.
I hope this will not affect the wakeup property from suspend.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:13             ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 06:35 PM, Krzysztof Kozlowski wrote:
> W dniu 08.01.2016 o 19:20, Laxman Dewangan pisze:
>> Hi Krzysztof,
>> Thanks for review.
>>
>> Accepted most of review comment and will update in next patch.
>>
>> Answer to query:
>>
>>
>> On Friday 08 January 2016 07:33 AM, Krzysztof Kozlowski wrote:
>>
> Actually the MFD and other subsystems are quite decoupled already and
> support sharing drivers for common IP block. The problem is that we
> develop drivers in a coupled way. This is not only issue of this
> particular set of drivers. Others were developed in a same way.
>
> So instead I would be happy to see this driver developed in the
> decoupled way so existing RTC driver could be reused. If this requires
> changing existing MFD driver like max77686 then please go ahead. I may
> provide testing for that purpose. Something similar I made recently to
> the max77693 and max77843. Both devices have different parent MFD
> drivers but share some of the specific subsystem drivers: regulator and
> input/haptic.
I replied on other thread. I can decouple the RTC driver for max77620 
and will be available for review.
If it looks fine then we can modify the max6868 mfd driver to use this 
new driver for test purpose.


>>
>> For this, RTC alarm interrupt need to be EARLY_RESUME.
> Okay, this is quite common issue and I think this can be solved by
> disabling the IRQ in suspend:
> http://lxr.free-electrons.com/source/drivers/mfd/max77843.c#L205
>
> IMHO this would be preferred way because you won't be moving device
> suspend/resume callbacks to a syscore level.

I will try for disable_irq() in suspend and enable_irq() in resume.
I hope this will not affect the wakeup property from suspend.

-- 
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-08  9:16         ` Laxman Dewangan
@ 2016-01-08 13:14           ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08 13:14 UTC (permalink / raw)
  To: rtc-linux, ldewangan
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

W dniu 08.01.2016 o 18:16, Laxman Dewangan pisze:
> Hi Krzysztof,
> Thanks for review.
> I will fix most of your comment on my next patch.
> 
> Answering to some of comment/query.
> 
> On Friday 08 January 2016 07:05 AM, Krzysztof Kozlowski wrote:
>> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>> +                               dev_err(dev,
>> +                                   "FPS enable-input %u is not
>> supported\n",
>> +                                       pval);
>> Indentation of arguments does not seem equal here or maybe this is
>> just my email client. Have you run this through checkpatch? And
>> sparse? And coccicheck (that one definitely not because kbuild is
>> complaining)?
> I ran checkpatch before I sent.

Anyway please be sure that indentation is consistent.

> 
>> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
>> +               (const struct regmap_config
>> *)&max77620_regmap_config[i]);
>> Indentation looks weird here (or again this is my email client...).
>> The cast is even weirder?!? Why casting?
> There is some parameter difference for MAX77620 and MAX20024. I have
> only one structure for it and changing tun time so I have not define
> this structure as constant.
> Now API needs const type structure and hence casting it.

I don't quite get... usually there is no need of casting pointer to a
writable memory when function accepts pointer to const.

> 
> However, I have  define different structure for MAX77620 and MAX20024
> which are const type and hence no need to explicitly casting here. This
> will be in my next patch.

You mean v2? Okay, let's wait for that...

> 
> +static inline int max77620_reg_update(struct device *dev, int sid,
> +               unsigned int reg, unsigned int mask, unsigned int val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
> +}
> 
>> I think all these shouldn't be static inlines in header. Although some
>> of them are one-liners but rest are not. Let the compiler decide what
>> to do with these wrappers.
> 
> If I dont make inline from header then this will complain as unused
> static function on related C compilation if it is not used on C. This
> header included from all sub module driver and they are not using all
> these APIs.
> 
> To avoid compilation warning,  I need to use inline here.

Because this shouldn't be defined in header at the first place. Instead
define it in main MFD driver with EXPORT_SYMBOL() and put in headers
just declaration.

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08 13:14           ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08 13:14 UTC (permalink / raw)
  To: rtc-linux, ldewangan
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

W dniu 08.01.2016 o 18:16, Laxman Dewangan pisze:
> Hi Krzysztof,
> Thanks for review.
> I will fix most of your comment on my next patch.
> 
> Answering to some of comment/query.
> 
> On Friday 08 January 2016 07:05 AM, Krzysztof Kozlowski wrote:
>> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>> +                               dev_err(dev,
>> +                                   "FPS enable-input %u is not
>> supported\n",
>> +                                       pval);
>> Indentation of arguments does not seem equal here or maybe this is
>> just my email client. Have you run this through checkpatch? And
>> sparse? And coccicheck (that one definitely not because kbuild is
>> complaining)?
> I ran checkpatch before I sent.

Anyway please be sure that indentation is consistent.

> 
>> +               chip->rmap[i] = devm_regmap_init_i2c(chip->clients[i],
>> +               (const struct regmap_config
>> *)&max77620_regmap_config[i]);
>> Indentation looks weird here (or again this is my email client...).
>> The cast is even weirder?!? Why casting?
> There is some parameter difference for MAX77620 and MAX20024. I have
> only one structure for it and changing tun time so I have not define
> this structure as constant.
> Now API needs const type structure and hence casting it.

I don't quite get... usually there is no need of casting pointer to a
writable memory when function accepts pointer to const.

> 
> However, I have  define different structure for MAX77620 and MAX20024
> which are const type and hence no need to explicitly casting here. This
> will be in my next patch.

You mean v2? Okay, let's wait for that...

> 
> +static inline int max77620_reg_update(struct device *dev, int sid,
> +               unsigned int reg, unsigned int mask, unsigned int val)
> +{
> +       struct max77620_chip *chip = dev_get_drvdata(dev);
> +
> +       return regmap_update_bits(chip->rmap[sid], reg, mask, val);
> +}
> 
>> I think all these shouldn't be static inlines in header. Although some
>> of them are one-liners but rest are not. Let the compiler decide what
>> to do with these wrappers.
> 
> If I dont make inline from header then this will complain as unused
> static function on related C compilation if it is not used on C. This
> header included from all sub module driver and they are not using all
> these APIs.
> 
> To avoid compilation warning,  I need to use inline here.

Because this shouldn't be defined in header at the first place. Instead
define it in main MFD driver with EXPORT_SYMBOL() and put in headers
just declaration.

Best regards,
Krzysztof

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-08 13:14           ` Krzysztof Kozlowski
  (?)
@ 2016-01-08 13:19             ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:19 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju


On Friday 08 January 2016 06:44 PM, Krzysztof Kozlowski wrote:
>
> To avoid compilation warning,  I need to use inline here.
> Because this shouldn't be defined in header at the first place. Instead
> define it in main MFD driver with EXPORT_SYMBOL() and put in headers
> just declaration.
>
what about __maybe_unused instead on inline and keep in header.

Anyhow, I do not have any personal choice here.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08 13:19             ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:19 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju


On Friday 08 January 2016 06:44 PM, Krzysztof Kozlowski wrote:
>
> To avoid compilation warning,  I need to use inline here.
> Because this shouldn't be defined in header at the first place. Instead
> define it in main MFD driver with EXPORT_SYMBOL() and put in headers
> just declaration.
>
what about __maybe_unused instead on inline and keep in header.

Anyhow, I do not have any personal choice here.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08 13:19             ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:19 UTC (permalink / raw)
  To: Krzysztof Kozlowski, rtc-linux
  Cc: k.kozlowski.k, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju


On Friday 08 January 2016 06:44 PM, Krzysztof Kozlowski wrote:
>
> To avoid compilation warning,  I need to use inline here.
> Because this shouldn't be defined in header at the first place. Instead
> define it in main MFD driver with EXPORT_SYMBOL() and put in headers
> just declaration.
>
what about __maybe_unused instead on inline and keep in header.

Anyhow, I do not have any personal choice here.

-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-08 13:19             ` Laxman Dewangan
@ 2016-01-08 13:32               ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08 13:32 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

2016-01-08 22:19 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>
> On Friday 08 January 2016 06:44 PM, Krzysztof Kozlowski wrote:
>>
>>
>> To avoid compilation warning,  I need to use inline here.
>> Because this shouldn't be defined in header at the first place. Instead
>> define it in main MFD driver with EXPORT_SYMBOL() and put in headers
>> just declaration.
>>
> what about __maybe_unused instead on inline and keep in header.
>
> Anyhow, I do not have any personal choice here.

This just shouldn't be defined in header because that makes it
spreading over many object files. There are just no benefits.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-08 13:32               ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-08 13:32 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, lee.jones, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

2016-01-08 22:19 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>
> On Friday 08 January 2016 06:44 PM, Krzysztof Kozlowski wrote:
>>
>>
>> To avoid compilation warning,  I need to use inline here.
>> Because this shouldn't be defined in header at the first place. Instead
>> define it in main MFD driver with EXPORT_SYMBOL() and put in headers
>> just declaration.
>>
> what about __maybe_unused instead on inline and keep in header.
>
> Anyhow, I do not have any personal choice here.

This just shouldn't be defined in header because that makes it
spreading over many object files. There are just no benefits.

Best regards,
Krzysztof

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 13:36             ` Mark Brown
  (?)
@ 2016-01-08 13:36               ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:36 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>
>> If we get the parent device, regmap handle and interrupt number from mfd
>> core independent of the PMIC (MAX77620 or MAX77686), then same driver can be
>> used here.
>> Two way which I can think of here:
> Parent device is just dev->parent, you can use dev_get_regmap() to get a
> regmap given a struct device and you can use platform resources to pass
> the interrupts to the children from the MFD (there's some examples,
> wm831x is one).
>
>

I think it should work with named regmap. mfd whould init regmap with 
name and rtc driver should ask with same name.

I saw three drivers which looks same:
rtc-max77620.c (new from me) and already available rtc-max77686.c, 
rtc-max77802.c

Seems I can develop IP based rtc driver as rtc-max77xxx.c



^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:36               ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:36 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>
>> If we get the parent device, regmap handle and interrupt number from mfd
>> core independent of the PMIC (MAX77620 or MAX77686), then same driver can be
>> used here.
>> Two way which I can think of here:
> Parent device is just dev->parent, you can use dev_get_regmap() to get a
> regmap given a struct device and you can use platform resources to pass
> the interrupts to the children from the MFD (there's some examples,
> wm831x is one).
>
>

I think it should work with named regmap. mfd whould init regmap with 
name and rtc driver should ask with same name.

I saw three drivers which looks same:
rtc-max77620.c (new from me) and already available rtc-max77686.c, 
rtc-max77802.c

Seems I can develop IP based rtc driver as rtc-max77xxx.c

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:36               ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-08 13:36 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>
>> If we get the parent device, regmap handle and interrupt number from mfd
>> core independent of the PMIC (MAX77620 or MAX77686), then same driver can be
>> used here.
>> Two way which I can think of here:
> Parent device is just dev->parent, you can use dev_get_regmap() to get a
> regmap given a struct device and you can use platform resources to pass
> the interrupts to the children from the MFD (there's some examples,
> wm831x is one).
>
>

I think it should work with named regmap. mfd whould init regmap with 
name and rtc driver should ask with same name.

I saw three drivers which looks same:
rtc-max77620.c (new from me) and already available rtc-max77686.c, 
rtc-max77802.c

Seems I can develop IP based rtc driver as rtc-max77xxx.c


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Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 13:04           ` Laxman Dewangan
@ 2016-01-08 13:36             ` Mark Brown
  -1 siblings, 0 replies; 103+ messages in thread
From: Mark Brown @ 2016-01-08 13:36 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi

[-- Attachment #1: Type: text/plain, Size: 500 bytes --]

On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:

> If we get the parent device, regmap handle and interrupt number from mfd
> core independent of the PMIC (MAX77620 or MAX77686), then same driver can be
> used here.
> Two way which I can think of here:

Parent device is just dev->parent, you can use dev_get_regmap() to get a
regmap given a struct device and you can use platform resources to pass
the interrupts to the children from the MFD (there's some examples,
wm831x is one).

[-- Attachment #2: signature.asc --]
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-08 13:36             ` Mark Brown
  0 siblings, 0 replies; 103+ messages in thread
From: Mark Brown @ 2016-01-08 13:36 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi

[-- Attachment #1: Type: text/plain, Size: 1019 bytes --]

On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:

> If we get the parent device, regmap handle and interrupt number from mfd
> core independent of the PMIC (MAX77620 or MAX77686), then same driver can be
> used here.
> Two way which I can think of here:

Parent device is just dev->parent, you can use dev_get_regmap() to get a
regmap given a struct device and you can use platform resources to pass
the interrupts to the children from the MFD (there's some examples,
wm831x is one).

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Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
  2016-01-08  6:06       ` Laxman Dewangan
  (?)
@ 2016-01-08 14:19         ` Rob Herring
  -1 siblings, 0 replies; 103+ messages in thread
From: Rob Herring @ 2016-01-08 14:19 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Linus Walleij, Alexandre Courbot, Lee Jones, Mark Brown,
	Alessandro Zummo, Alexandre Belloni, Liam Girdwood, devicetree,
	linux-kernel, linux-gpio,
	open list:REAL TIME CLOCK (RTC) SUBSYSTEM, Stephen Warren,
	Thierry Reding

On Fri, Jan 8, 2016 at 12:06 AM, Laxman Dewangan <ldewangan@nvidia.com> wrote:
> Thanks Rob for review.
> I have taken care of all comment except following which I have query.
>
> On Friday 08 January 2016 04:42 AM, Rob Herring wrote:
>>
>> +       - maxim,low-battery-reset-enable: Enable low battery reset.
>> +       - maxim,low-battery-reset-disable: Disable low battery reset.
>> Why not boolean? Not present means keep default value? I'd prefer
>> boolean or tristate of not present, 0 to disable, or 1 to enable.
>>
>>
> Here, the properties are boolean. I will add this on the description.
>
> I like to enable or disable with the DT and properties are not there then
> left to default.
> So added two properties for enable and disable. If properties are there, do
> the activity.
>
> Here tristate is also possible:
> maxim,low-battery-reset: tristate, low battery reset control. 0 for disable,
> 1 for enable and
>                                  absence of this will leave configuration on
> default.
>
> Does it look fine?

Yes.

Rob

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-08 14:19         ` Rob Herring
  0 siblings, 0 replies; 103+ messages in thread
From: Rob Herring @ 2016-01-08 14:19 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Linus Walleij, Alexandre Courbot, Lee Jones, Mark Brown,
	Alessandro Zummo, Alexandre Belloni, Liam Girdwood, devicetree,
	linux-kernel, linux-gpio,
	open list:REAL TIME CLOCK (RTC) SUBSYSTEM, Stephen Warren,
	Thierry Reding

On Fri, Jan 8, 2016 at 12:06 AM, Laxman Dewangan <ldewangan@nvidia.com> wrote:
> Thanks Rob for review.
> I have taken care of all comment except following which I have query.
>
> On Friday 08 January 2016 04:42 AM, Rob Herring wrote:
>>
>> +       - maxim,low-battery-reset-enable: Enable low battery reset.
>> +       - maxim,low-battery-reset-disable: Disable low battery reset.
>> Why not boolean? Not present means keep default value? I'd prefer
>> boolean or tristate of not present, 0 to disable, or 1 to enable.
>>
>>
> Here, the properties are boolean. I will add this on the description.
>
> I like to enable or disable with the DT and properties are not there then
> left to default.
> So added two properties for enable and disable. If properties are there, do
> the activity.
>
> Here tristate is also possible:
> maxim,low-battery-reset: tristate, low battery reset control. 0 for disable,
> 1 for enable and
>                                  absence of this will leave configuration on
> default.
>
> Does it look fine?

Yes.

Rob

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024
@ 2016-01-08 14:19         ` Rob Herring
  0 siblings, 0 replies; 103+ messages in thread
From: Rob Herring @ 2016-01-08 14:19 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
	Linus Walleij, Alexandre Courbot, Lee Jones, Mark Brown,
	Alessandro Zummo, Alexandre Belloni, Liam Girdwood, devicetree,
	linux-kernel, linux-gpio,
	open list:REAL TIME CLOCK (RTC) SUBSYSTEM, Stephen Warren,
	Thierry Reding

On Fri, Jan 8, 2016 at 12:06 AM, Laxman Dewangan <ldewangan@nvidia.com> wrote:
> Thanks Rob for review.
> I have taken care of all comment except following which I have query.
>
> On Friday 08 January 2016 04:42 AM, Rob Herring wrote:
>>
>> +       - maxim,low-battery-reset-enable: Enable low battery reset.
>> +       - maxim,low-battery-reset-disable: Disable low battery reset.
>> Why not boolean? Not present means keep default value? I'd prefer
>> boolean or tristate of not present, 0 to disable, or 1 to enable.
>>
>>
> Here, the properties are boolean. I will add this on the description.
>
> I like to enable or disable with the DT and properties are not there then
> left to default.
> So added two properties for enable and disable. If properties are there, do
> the activity.
>
> Here tristate is also possible:
> maxim,low-battery-reset: tristate, low battery reset control. 0 for disable,
> 1 for enable and
>                                  absence of this will leave configuration on
> default.
>
> Does it look fine?

Yes.

Rob

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Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
  2016-01-07 14:38   ` Laxman Dewangan
@ 2016-01-10 12:40     ` Mark Brown
  -1 siblings, 0 replies; 103+ messages in thread
From: Mark Brown @ 2016-01-10 12:40 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Mallikarjun Kasoju

[-- Attachment #1: Type: text/plain, Size: 1577 bytes --]

On Thu, Jan 07, 2016 at 08:08:44PM +0530, Laxman Dewangan wrote:

This looks mostly good, a few fairly small things:

> +	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
> +		addr = rinfo->cfg_addr;

Please write things like this as switch statement so if we end up adding
more variants the code looks more natural.

> +	case REGULATOR_MODE_IDLE:
> +	case REGULATOR_MODE_STANDBY:
> +		if (rpdata->glpm_enable)
> +			power_mode = MAX77620_POWER_MODE_GLPM;
> +		else
> +			power_mode = MAX77620_POWER_MODE_LPM;
> +		break;

If there's no difference between two modes just don't implement one of
the modes and let the framework worry about what to do for the other
one.

> +static int max77620_get_regulator_dt_data(struct platform_device *pdev,
> +		struct max77620_regulator *max77620_regs)
> +{
> +	struct device_node *np;
> +	u32 prop;
> +	int id;
> +	int ret;
> +
> +	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
> +	if (!np) {
> +		dev_err(&pdev->dev, "Device is not having regulators node\n");
> +		return -ENODEV;
> +	}
> +	pdev->dev.of_node = np;
> +
> +	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
> +			ARRAY_SIZE(max77620_regulator_matches));
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
> +			ret);
> +		return ret;
> +	}

Don't open code this, use the core support via regulators and of_match.

> +		if (reg_pdata->disable_remote_sense_on_suspend &&
> +				(rinfo->remote_sense_addr != 0xFF)) {

Weird indentation here, the second line doesn't seem to be aligned with
anything.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 473 bytes --]

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
@ 2016-01-10 12:40     ` Mark Brown
  0 siblings, 0 replies; 103+ messages in thread
From: Mark Brown @ 2016-01-10 12:40 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Mallikarjun Kasoju

[-- Attachment #1: Type: text/plain, Size: 2096 bytes --]

On Thu, Jan 07, 2016 at 08:08:44PM +0530, Laxman Dewangan wrote:

This looks mostly good, a few fairly small things:

> +	if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
> +		addr = rinfo->cfg_addr;

Please write things like this as switch statement so if we end up adding
more variants the code looks more natural.

> +	case REGULATOR_MODE_IDLE:
> +	case REGULATOR_MODE_STANDBY:
> +		if (rpdata->glpm_enable)
> +			power_mode = MAX77620_POWER_MODE_GLPM;
> +		else
> +			power_mode = MAX77620_POWER_MODE_LPM;
> +		break;

If there's no difference between two modes just don't implement one of
the modes and let the framework worry about what to do for the other
one.

> +static int max77620_get_regulator_dt_data(struct platform_device *pdev,
> +		struct max77620_regulator *max77620_regs)
> +{
> +	struct device_node *np;
> +	u32 prop;
> +	int id;
> +	int ret;
> +
> +	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
> +	if (!np) {
> +		dev_err(&pdev->dev, "Device is not having regulators node\n");
> +		return -ENODEV;
> +	}
> +	pdev->dev.of_node = np;
> +
> +	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
> +			ARRAY_SIZE(max77620_regulator_matches));
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
> +			ret);
> +		return ret;
> +	}

Don't open code this, use the core support via regulators and of_match.

> +		if (reg_pdata->disable_remote_sense_on_suspend &&
> +				(rinfo->remote_sense_addr != 0xFF)) {

Weird indentation here, the second line doesn't seem to be aligned with
anything.

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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08  1:07     ` [rtc-linux] " Linux Kernel
  (?)
@ 2016-01-11  5:46       ` Lee Jones
  -1 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:46 UTC (permalink / raw)
  To: Linux Kernel
  Cc: Laxman Dewangan, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Chaitanya Bandi

From: Linux Kernel <linuxkernelmails@gmail.com>

Really?  Why the shroud of secrecy?

Any reason why you're not using your real name?

On Fri, 08 Jan 2016, Linux Kernel wrote:
> On Thursday 07 January 2016 08:08 PM, Laxman Dewangan wrote:
> 
> >Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> >RTC  module. This support for setting alarm and time.
> >
> >Add RTC driver to access this chip's RTC module via RTC
> >APIs.
> >
> >Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> >Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> >Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> >---
> >  drivers/rtc/Kconfig        |   9 +
> >  drivers/rtc/Makefile       |   1 +
> >  drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 584 insertions(+)
> >  create mode 100644 drivers/rtc/rtc-max77620.c
> >
> (...)
> 
> >+static struct platform_driver max77620_rtc_driver = {
> >+	.probe = max77620_rtc_probe,
> >+	.remove = max77620_rtc_remove,
> >+	.id_table = max77620_rtc_devtype,
> >+	.driver = {
> >+			.name = "max77620-rtc",
> >+			.owner = THIS_MODULE,
> 
> Drop this line, .owner will be populated by driver core.
> 
> >+			.pm = &max77620_rtc_pm_ops,
> >+	},
> >+};
> >+
> >+module_platform_driver(max77620_rtc_driver);
> >+
> >+MODULE_DESCRIPTION("max77620 RTC driver");
> >+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> >+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> >+MODULE_ALIAS("platform:max77620-rtc");
> >+MODULE_LICENSE("GPL v2");

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11  5:46       ` Lee Jones
  0 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:46 UTC (permalink / raw)
  To: Linux Kernel
  Cc: Laxman Dewangan, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Chaitanya Bandi

From: Linux Kernel <linuxkernelmails@gmail.com>

Really?  Why the shroud of secrecy?

Any reason why you're not using your real name?

On Fri, 08 Jan 2016, Linux Kernel wrote:
> On Thursday 07 January 2016 08:08 PM, Laxman Dewangan wrote:
> 
> >Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> >RTC  module. This support for setting alarm and time.
> >
> >Add RTC driver to access this chip's RTC module via RTC
> >APIs.
> >
> >Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> >Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> >Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> >---
> >  drivers/rtc/Kconfig        |   9 +
> >  drivers/rtc/Makefile       |   1 +
> >  drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 584 insertions(+)
> >  create mode 100644 drivers/rtc/rtc-max77620.c
> >
> (...)
> 
> >+static struct platform_driver max77620_rtc_driver = {
> >+	.probe = max77620_rtc_probe,
> >+	.remove = max77620_rtc_remove,
> >+	.id_table = max77620_rtc_devtype,
> >+	.driver = {
> >+			.name = "max77620-rtc",
> >+			.owner = THIS_MODULE,
> 
> Drop this line, .owner will be populated by driver core.
> 
> >+			.pm = &max77620_rtc_pm_ops,
> >+	},
> >+};
> >+
> >+module_platform_driver(max77620_rtc_driver);
> >+
> >+MODULE_DESCRIPTION("max77620 RTC driver");
> >+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> >+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> >+MODULE_ALIAS("platform:max77620-rtc");
> >+MODULE_LICENSE("GPL v2");

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11  5:46       ` Lee Jones
  0 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:46 UTC (permalink / raw)
  To: Linux Kernel
  Cc: Laxman Dewangan, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Chaitanya Bandi

From: Linux Kernel <linuxkernelmails@gmail.com>

Really?  Why the shroud of secrecy?

Any reason why you're not using your real name?

On Fri, 08 Jan 2016, Linux Kernel wrote:
> On Thursday 07 January 2016 08:08 PM, Laxman Dewangan wrote:
>=20
> >Maxim Semiconductor's PMIC MAX77620/MAX20024 has on chip
> >RTC  module. This support for setting alarm and time.
> >
> >Add RTC driver to access this chip's RTC module via RTC
> >APIs.
> >
> >Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> >Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> >Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> >---
> >  drivers/rtc/Kconfig        |   9 +
> >  drivers/rtc/Makefile       |   1 +
> >  drivers/rtc/rtc-max77620.c | 574 +++++++++++++++++++++++++++++++++++++=
++++++++
> >  3 files changed, 584 insertions(+)
> >  create mode 100644 drivers/rtc/rtc-max77620.c
> >
> (...)
>=20
> >+static struct platform_driver max77620_rtc_driver =3D {
> >+	.probe =3D max77620_rtc_probe,
> >+	.remove =3D max77620_rtc_remove,
> >+	.id_table =3D max77620_rtc_devtype,
> >+	.driver =3D {
> >+			.name =3D "max77620-rtc",
> >+			.owner =3D THIS_MODULE,
>=20
> Drop this line, .owner will be populated by driver core.
>=20
> >+			.pm =3D &max77620_rtc_pm_ops,
> >+	},
> >+};
> >+
> >+module_platform_driver(max77620_rtc_driver);
> >+
> >+MODULE_DESCRIPTION("max77620 RTC driver");
> >+MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
> >+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
> >+MODULE_ALIAS("platform:max77620-rtc");
> >+MODULE_LICENSE("GPL v2");

--=20
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org =E2=94=82 Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

--=20
--=20
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
---=20
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mail to rtc-linux+unsubscribe@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-08  1:35     ` Krzysztof Kozlowski
  (?)
@ 2016-01-11  5:46       ` Lee Jones
  -1 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:46 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:

Thanks for taking the time to review.

> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> > MAX77620/MAX20024 are Power Management IC from the MAXIM.
> > It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> > watchdog, clock etc.
> >
> > Add MFD drier to provides common support for accessing the
> > device; additional drivers is developed on respected subsystem
> > in order to use the functionality of the device.
> >
> > Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> > Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> > Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> > Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> 
> The Testing and Reviewed are statements (see SubmittingPatches) so
> they should be made explicitly by people. As this is v1 how they could
> make a public statement so far?

SubmittingPatches bears no mention that Reviewed-by/Tested-by
statements have to be provided on one of the public mailing lists.
These can be provided privately prior to upstream submission v1.

> > ---
> >  drivers/mfd/Kconfig          |  15 +
> >  drivers/mfd/Makefile         |   1 +
> >  drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
> >  include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
> >  4 files changed, 1445 insertions(+)
> >  create mode 100644 drivers/mfd/max77620.c
> >  create mode 100644 include/linux/mfd/max77620.h

[...]
 
-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
--
To unsubscribe from this list: send the line "unsubscribe linux-gpio" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-11  5:46       ` Lee Jones
  0 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:46 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:

Thanks for taking the time to review.

> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> > MAX77620/MAX20024 are Power Management IC from the MAXIM.
> > It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> > watchdog, clock etc.
> >
> > Add MFD drier to provides common support for accessing the
> > device; additional drivers is developed on respected subsystem
> > in order to use the functionality of the device.
> >
> > Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> > Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> > Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> > Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> 
> The Testing and Reviewed are statements (see SubmittingPatches) so
> they should be made explicitly by people. As this is v1 how they could
> make a public statement so far?

SubmittingPatches bears no mention that Reviewed-by/Tested-by
statements have to be provided on one of the public mailing lists.
These can be provided privately prior to upstream submission v1.

> > ---
> >  drivers/mfd/Kconfig          |  15 +
> >  drivers/mfd/Makefile         |   1 +
> >  drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++++++++++
> >  include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
> >  4 files changed, 1445 insertions(+)
> >  create mode 100644 drivers/mfd/max77620.c
> >  create mode 100644 include/linux/mfd/max77620.h

[...]
 
-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-11  5:46       ` Lee Jones
  0 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:46 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:

Thanks for taking the time to review.

> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> > MAX77620/MAX20024 are Power Management IC from the MAXIM.
> > It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> > watchdog, clock etc.
> >
> > Add MFD drier to provides common support for accessing the
> > device; additional drivers is developed on respected subsystem
> > in order to use the functionality of the device.
> >
> > Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> > Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> > Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> > Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
>=20
> The Testing and Reviewed are statements (see SubmittingPatches) so
> they should be made explicitly by people. As this is v1 how they could
> make a public statement so far?

SubmittingPatches bears no mention that Reviewed-by/Tested-by
statements have to be provided on one of the public mailing lists.
These can be provided privately prior to upstream submission v1.

> > ---
> >  drivers/mfd/Kconfig          |  15 +
> >  drivers/mfd/Makefile         |   1 +
> >  drivers/mfd/max77620.c       | 926 +++++++++++++++++++++++++++++++++++=
++++++++
> >  include/linux/mfd/max77620.h | 503 +++++++++++++++++++++++
> >  4 files changed, 1445 insertions(+)
> >  create mode 100644 drivers/mfd/max77620.c
> >  create mode 100644 include/linux/mfd/max77620.h

[...]
=20
--=20
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org =E2=94=82 Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

--=20
--=20
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
---=20
You received this message because you are subscribed to the Google Groups "=
rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an e=
mail to rtc-linux+unsubscribe@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-07 15:56     ` kbuild test robot
@ 2016-01-11  5:48       ` Lee Jones
  -1 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:48 UTC (permalink / raw)
  To: kbuild test robot
  Cc: Laxman Dewangan, kbuild-all, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

On Thu, 07 Jan 2016, kbuild test robot wrote:

> Hi Laxman,
> 
> [auto build test WARNING on pinctrl/for-next]
> [also build test WARNING on v4.4-rc8 next-20160107]
> [if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
> 
> url:    https://github.com/0day-ci/linux/commits/Laxman-Dewangan/Add-support-for-MAXIM-MAX77620-MAX20024-PMIC/20160107-225450
> base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next
> 
> 
> coccinelle warnings: (new ones prefixed by >>)
> 
> >> drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core will do it.

I can't accept this patch until this has been taken care of.

> Please review and possibly fold the followup patch.
> 
> ---
> 0-DAY kernel test infrastructure                Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-11  5:48       ` Lee Jones
  0 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  5:48 UTC (permalink / raw)
  To: kbuild test robot
  Cc: Laxman Dewangan, kbuild-all, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, rtc-linux, swarren, treding, Chaitanya Bandi,
	Mallikarjun Kasoju

On Thu, 07 Jan 2016, kbuild test robot wrote:

> Hi Laxman,
>=20
> [auto build test WARNING on pinctrl/for-next]
> [also build test WARNING on v4.4-rc8 next-20160107]
> [if your patch is applied to the wrong git tree, please drop us a note to=
 help improving the system]
>=20
> url:    https://github.com/0day-ci/linux/commits/Laxman-Dewangan/Add-supp=
ort-for-MAXIM-MAX77620-MAX20024-PMIC/20160107-225450
> base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinc=
trl.git for-next
>=20
>=20
> coccinelle warnings: (new ones prefixed by >>)
>=20
> >> drivers/mfd/max77620.c:900:3-8: No need to set .owner here. The core w=
ill do it.

I can't accept this patch until this has been taken care of.

> Please review and possibly fold the followup patch.
>=20
> ---
> 0-DAY kernel test infrastructure                Open Source Technology Ce=
nter
> https://lists.01.org/pipermail/kbuild-all                   Intel Corpora=
tion

--=20
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org =E2=94=82 Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

--=20
--=20
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
---=20
You received this message because you are subscribed to the Google Groups "=
rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an e=
mail to rtc-linux+unsubscribe@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-11  5:46       ` Lee Jones
@ 2016-01-11  6:26         ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-11  6:26 UTC (permalink / raw)
  To: Lee Jones
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On 11.01.2016 14:46, Lee Jones wrote:
> On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:
> 
> Thanks for taking the time to review.
> 
>> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>>> MAX77620/MAX20024 are Power Management IC from the MAXIM.
>>> It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
>>> watchdog, clock etc.
>>>
>>> Add MFD drier to provides common support for accessing the
>>> device; additional drivers is developed on respected subsystem
>>> in order to use the functionality of the device.
>>>
>>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>>> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
>>> Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
>>> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
>>
>> The Testing and Reviewed are statements (see SubmittingPatches) so
>> they should be made explicitly by people. As this is v1 how they could
>> make a public statement so far?
> 
> SubmittingPatches bears no mention that Reviewed-by/Tested-by
> statements have to be provided on one of the public mailing lists.
> These can be provided privately prior to upstream submission v1.

Indeed the document does not mention that they have to be provided by
public.

In the same time these are statements given by a reviewer ("By offering
my Reviewed-by: tag, I state that:")... and how can you validate a
statement given through a private channel? Is it true? Is it a thorough
testing or just copy-paste from Gerrit (or other automated system)?

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-11  6:26         ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-11  6:26 UTC (permalink / raw)
  To: Lee Jones
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On 11.01.2016 14:46, Lee Jones wrote:
> On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:
> 
> Thanks for taking the time to review.
> 
>> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
>>> MAX77620/MAX20024 are Power Management IC from the MAXIM.
>>> It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
>>> watchdog, clock etc.
>>>
>>> Add MFD drier to provides common support for accessing the
>>> device; additional drivers is developed on respected subsystem
>>> in order to use the functionality of the device.
>>>
>>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>>> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
>>> Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
>>> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
>>
>> The Testing and Reviewed are statements (see SubmittingPatches) so
>> they should be made explicitly by people. As this is v1 how they could
>> make a public statement so far?
> 
> SubmittingPatches bears no mention that Reviewed-by/Tested-by
> statements have to be provided on one of the public mailing lists.
> These can be provided privately prior to upstream submission v1.

Indeed the document does not mention that they have to be provided by
public.

In the same time these are statements given by a reviewer ("By offering
my Reviewed-by: tag, I state that:")... and how can you validate a
statement given through a private channel? Is it true? Is it a thorough
testing or just copy-paste from Gerrit (or other automated system)?

Best regards,
Krzysztof

-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
You received this message because you are subscribed to the Google Groups "rtc-linux" group.
To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
  2016-01-11  6:26         ` Krzysztof Kozlowski
@ 2016-01-11  9:05           ` Lee Jones
  -1 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  9:05 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On Mon, 11 Jan 2016, Krzysztof Kozlowski wrote:

> On 11.01.2016 14:46, Lee Jones wrote:
> > On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:
> > 
> > Thanks for taking the time to review.
> > 
> >> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> >>> MAX77620/MAX20024 are Power Management IC from the MAXIM.
> >>> It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> >>> watchdog, clock etc.
> >>>
> >>> Add MFD drier to provides common support for accessing the
> >>> device; additional drivers is developed on respected subsystem
> >>> in order to use the functionality of the device.
> >>>
> >>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> >>> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> >>> Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> >>> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> >>
> >> The Testing and Reviewed are statements (see SubmittingPatches) so
> >> they should be made explicitly by people. As this is v1 how they could
> >> make a public statement so far?
> > 
> > SubmittingPatches bears no mention that Reviewed-by/Tested-by
> > statements have to be provided on one of the public mailing lists.
> > These can be provided privately prior to upstream submission v1.
> 
> Indeed the document does not mention that they have to be provided by
> public.
> 
> In the same time these are statements given by a reviewer ("By offering
> my Reviewed-by: tag, I state that:")... and how can you validate a
> statement given through a private channel? Is it true? Is it a thorough
> testing or just copy-paste from Gerrit (or other automated system)?

That is for the submitter's conscience to decide.  If the statements
are supplied, we must assume they were provided in good faith and in
accordance with the rules set out by the Linux Kernel.  We can not ask
for every Tested-by/Acked-by/Reviewed-by/etc provider to verify on
each upstream submission.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024
@ 2016-01-11  9:05           ` Lee Jones
  0 siblings, 0 replies; 103+ messages in thread
From: Lee Jones @ 2016-01-11  9:05 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: rtc-linux, robh+dt, pawel.moll, mark.rutland, ijc+devicetree,
	galak, linus.walleij, gnurou, broonie, a.zummo,
	alexandre.belloni, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Laxman Dewangan, Chaitanya Bandi,
	Mallikarjun Kasoju

On Mon, 11 Jan 2016, Krzysztof Kozlowski wrote:

> On 11.01.2016 14:46, Lee Jones wrote:
> > On Fri, 08 Jan 2016, Krzysztof Kozlowski wrote:
> >=20
> > Thanks for taking the time to review.
> >=20
> >> ()2016-01-07 23:38 GMT+09:00 Laxman Dewangan <ldewangan@nvidia.com>:
> >>> MAX77620/MAX20024 are Power Management IC from the MAXIM.
> >>> It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
> >>> watchdog, clock etc.
> >>>
> >>> Add MFD drier to provides common support for accessing the
> >>> device; additional drivers is developed on respected subsystem
> >>> in order to use the functionality of the device.
> >>>
> >>> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> >>> Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
> >>> Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
> >>> Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> >>
> >> The Testing and Reviewed are statements (see SubmittingPatches) so
> >> they should be made explicitly by people. As this is v1 how they could
> >> make a public statement so far?
> >=20
> > SubmittingPatches bears no mention that Reviewed-by/Tested-by
> > statements have to be provided on one of the public mailing lists.
> > These can be provided privately prior to upstream submission v1.
>=20
> Indeed the document does not mention that they have to be provided by
> public.
>=20
> In the same time these are statements given by a reviewer ("By offering
> my Reviewed-by: tag, I state that:")... and how can you validate a
> statement given through a private channel? Is it true? Is it a thorough
> testing or just copy-paste from Gerrit (or other automated system)?

That is for the submitter's conscience to decide.  If the statements
are supplied, we must assume they were provided in good faith and in
accordance with the rules set out by the Linux Kernel.  We can not ask
for every Tested-by/Acked-by/Reviewed-by/etc provider to verify on
each upstream submission.

--=20
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org =E2=94=82 Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

--=20
--=20
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
---=20
You received this message because you are subscribed to the Google Groups "=
rtc-linux" group.
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mail to rtc-linux+unsubscribe@googlegroups.com.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
  2016-01-10 12:40     ` [rtc-linux] " Mark Brown
  (?)
@ 2016-01-11 10:16         ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 10:16 UTC (permalink / raw)
  To: Mark Brown
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, pawel.moll-5wv7dgnIgG8,
	mark.rutland-5wv7dgnIgG8, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
	galak-sgV2jX0FEOL9JmXXK+q4OQ,
	linus.walleij-QSEj5FYQhm4dnm+yROfE0A,
	gnurou-Re5JQEeQqe8AvxtiuMwx3w, lee.jones-QSEj5FYQhm4dnm+yROfE0A,
	a.zummo-BfzFCNDTiLLj+vYz1yj4TQ,
	alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
	lgirdwood-Re5JQEeQqe8AvxtiuMwx3w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA,
	rtc-linux-/JYPxA39Uh5TLH3MbocFFw, swarren-DDmLM1+adcrQT0dZR+AlfA,
	treding-DDmLM1+adcrQT0dZR+AlfA, Mallikarjun Kasoju

Thanks Mark for review.

I have query in one of comment.

On Sunday 10 January 2016 06:10 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Thu, Jan 07, 2016 at 08:08:44PM +0530, Laxman Dewangan wrote:
>
>
> +	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
> +	if (!np) {
> +		dev_err(&pdev->dev, "Device is not having regulators node\n");
> +		return -ENODEV;
> +	}
> +	pdev->dev.of_node = np;
> +
> +	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
> +			ARRAY_SIZE(max77620_regulator_matches));
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
> +			ret);
> +		return ret;
> +	}
> Don't open code this, use the core support via regulators and of_match.
>

I did not get this point? Here I am using the of_regulator_match from 
core? Can you please help to explain this?

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
@ 2016-01-11 10:16         ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 10:16 UTC (permalink / raw)
  To: Mark Brown
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Mallikarjun Kasoju

Thanks Mark for review.

I have query in one of comment.

On Sunday 10 January 2016 06:10 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Thu, Jan 07, 2016 at 08:08:44PM +0530, Laxman Dewangan wrote:
>
>
> +	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
> +	if (!np) {
> +		dev_err(&pdev->dev, "Device is not having regulators node\n");
> +		return -ENODEV;
> +	}
> +	pdev->dev.of_node = np;
> +
> +	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
> +			ARRAY_SIZE(max77620_regulator_matches));
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
> +			ret);
> +		return ret;
> +	}
> Don't open code this, use the core support via regulators and of_match.
>

I did not get this point? Here I am using the of_regulator_match from 
core? Can you please help to explain this?

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024
@ 2016-01-11 10:16         ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 10:16 UTC (permalink / raw)
  To: Mark Brown
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak,
	linus.walleij, gnurou, lee.jones, a.zummo, alexandre.belloni,
	lgirdwood, devicetree, linux-kernel, linux-gpio, rtc-linux,
	swarren, treding, Mallikarjun Kasoju

Thanks Mark for review.

I have query in one of comment.

On Sunday 10 January 2016 06:10 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Thu, Jan 07, 2016 at 08:08:44PM +0530, Laxman Dewangan wrote:
>
>
> +	np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
> +	if (!np) {
> +		dev_err(&pdev->dev, "Device is not having regulators node\n");
> +		return -ENODEV;
> +	}
> +	pdev->dev.of_node = np;
> +
> +	ret = of_regulator_match(&pdev->dev, np, max77620_regulator_matches,
> +			ARRAY_SIZE(max77620_regulator_matches));
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "Parsing of regulator node failed: %d\n",
> +			ret);
> +		return ret;
> +	}
> Don't open code this, use the core support via regulators and of_match.
>

I did not get this point? Here I am using the of_regulator_match from 
core? Can you please help to explain this?

-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
You received this message because you are subscribed to the Google Groups "rtc-linux" group.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-08 13:36               ` Laxman Dewangan
  (?)
@ 2016-01-11 13:17                 ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 13:17 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>
> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>> * PGP Signed by an unknown key
>>
>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>
>>> If we get the parent device, regmap handle and interrupt number from 
>>> mfd
>>> core independent of the PMIC (MAX77620 or MAX77686), then same 
>>> driver can be
>>> used here.
>>> Two way which I can think of here:
>> Parent device is just dev->parent, you can use dev_get_regmap() to get a
>> regmap given a struct device and you can use platform resources to pass
>> the interrupts to the children from the MFD (there's some examples,
>> wm831x is one).
>>
>>
>
> I think it should work with named regmap. mfd whould init regmap with 
> name and rtc driver should ask with same name.
>
> I saw three drivers which looks same:
> rtc-max77620.c (new from me) and already available rtc-max77686.c, 
> rtc-max77802.c
>
> Seems I can develop IP based rtc driver as rtc-max77xxx.c

I came with one of issue when doing this.

The RTC driver parent is not the same parent for which i2c slave address 
get registered.
There is two slave address from max77620, 0x3C (for general) and 0x68 
for RTC.

In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize 
regmap with this address.

Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC 
driver treat the parent as the 0x3c device but actually it should be 
0x68 to get the proper regmap.


Two approach:
1. If we add the option to pass parent_dev when adding cells form 
mfd_add_devices and select the parent device based on this option then 
it can be easily handle.
     Add parent_dev structure in struct mfd_cell and then change the 
parent in mfd_add_device() if cells has parent device.

2. Register the RTC driver with different mfd_add_devices with dummy i2c 
client device.
So two times mfd_add_devices.


IMO, approach 1 looks good to me.

Any opinion?



^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11 13:17                 ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 13:17 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>
> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>> * PGP Signed by an unknown key
>>
>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>
>>> If we get the parent device, regmap handle and interrupt number from 
>>> mfd
>>> core independent of the PMIC (MAX77620 or MAX77686), then same 
>>> driver can be
>>> used here.
>>> Two way which I can think of here:
>> Parent device is just dev->parent, you can use dev_get_regmap() to get a
>> regmap given a struct device and you can use platform resources to pass
>> the interrupts to the children from the MFD (there's some examples,
>> wm831x is one).
>>
>>
>
> I think it should work with named regmap. mfd whould init regmap with 
> name and rtc driver should ask with same name.
>
> I saw three drivers which looks same:
> rtc-max77620.c (new from me) and already available rtc-max77686.c, 
> rtc-max77802.c
>
> Seems I can develop IP based rtc driver as rtc-max77xxx.c

I came with one of issue when doing this.

The RTC driver parent is not the same parent for which i2c slave address 
get registered.
There is two slave address from max77620, 0x3C (for general) and 0x68 
for RTC.

In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize 
regmap with this address.

Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC 
driver treat the parent as the 0x3c device but actually it should be 
0x68 to get the proper regmap.


Two approach:
1. If we add the option to pass parent_dev when adding cells form 
mfd_add_devices and select the parent device based on this option then 
it can be easily handle.
     Add parent_dev structure in struct mfd_cell and then change the 
parent in mfd_add_device() if cells has parent device.

2. Register the RTC driver with different mfd_add_devices with dummy i2c 
client device.
So two times mfd_add_devices.


IMO, approach 1 looks good to me.

Any opinion?

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11 13:17                 ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 13:17 UTC (permalink / raw)
  To: Mark Brown
  Cc: Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, alexandre.belloni, lgirdwood, devicetree,
	linux-kernel, linux-gpio, swarren, treding, Chaitanya Bandi


On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>
> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>> * PGP Signed by an unknown key
>>
>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>
>>> If we get the parent device, regmap handle and interrupt number from 
>>> mfd
>>> core independent of the PMIC (MAX77620 or MAX77686), then same 
>>> driver can be
>>> used here.
>>> Two way which I can think of here:
>> Parent device is just dev->parent, you can use dev_get_regmap() to get a
>> regmap given a struct device and you can use platform resources to pass
>> the interrupts to the children from the MFD (there's some examples,
>> wm831x is one).
>>
>>
>
> I think it should work with named regmap. mfd whould init regmap with 
> name and rtc driver should ask with same name.
>
> I saw three drivers which looks same:
> rtc-max77620.c (new from me) and already available rtc-max77686.c, 
> rtc-max77802.c
>
> Seems I can develop IP based rtc driver as rtc-max77xxx.c

I came with one of issue when doing this.

The RTC driver parent is not the same parent for which i2c slave address 
get registered.
There is two slave address from max77620, 0x3C (for general) and 0x68 
for RTC.

In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize 
regmap with this address.

Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC 
driver treat the parent as the 0x3c device but actually it should be 
0x68 to get the proper regmap.


Two approach:
1. If we add the option to pass parent_dev when adding cells form 
mfd_add_devices and select the parent device based on this option then 
it can be easily handle.
     Add parent_dev structure in struct mfd_cell and then change the 
parent in mfd_add_device() if cells has parent device.

2. Register the RTC driver with different mfd_add_devices with dummy i2c 
client device.
So two times mfd_add_devices.


IMO, approach 1 looks good to me.

Any opinion?


-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-11 13:17                 ` Laxman Dewangan
@ 2016-01-11 16:04                   ` Alexandre Belloni
  -1 siblings, 0 replies; 103+ messages in thread
From: Alexandre Belloni @ 2016-01-11 16:04 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Mark Brown, Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
> 
> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
> >
> >On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
> >>* PGP Signed by an unknown key
> >>
> >>On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
> >>
> >>>If we get the parent device, regmap handle and interrupt number from
> >>>mfd
> >>>core independent of the PMIC (MAX77620 or MAX77686), then same driver
> >>>can be
> >>>used here.
> >>>Two way which I can think of here:
> >>Parent device is just dev->parent, you can use dev_get_regmap() to get a
> >>regmap given a struct device and you can use platform resources to pass
> >>the interrupts to the children from the MFD (there's some examples,
> >>wm831x is one).
> >>
> >>
> >
> >I think it should work with named regmap. mfd whould init regmap with name
> >and rtc driver should ask with same name.
> >
> >I saw three drivers which looks same:
> >rtc-max77620.c (new from me) and already available rtc-max77686.c,
> >rtc-max77802.c
> >
> >Seems I can develop IP based rtc driver as rtc-max77xxx.c
> 
> I came with one of issue when doing this.
> 
> The RTC driver parent is not the same parent for which i2c slave address get
> registered.
> There is two slave address from max77620, 0x3C (for general) and 0x68 for
> RTC.
> 
> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
> regmap with this address.
> 
> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC driver
> treat the parent as the 0x3c device but actually it should be 0x68 to get
> the proper regmap.
> 
> 
> Two approach:
> 1. If we add the option to pass parent_dev when adding cells form
> mfd_add_devices and select the parent device based on this option then it
> can be easily handle.
>     Add parent_dev structure in struct mfd_cell and then change the parent
> in mfd_add_device() if cells has parent device.
> 
> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
> client device.
> So two times mfd_add_devices.
> 
> 
> IMO, approach 1 looks good to me.
> 
> Any opinion?
> 

If the RTC is not at the same address, I'd say this is not an mfd
anymore, can't you probe it directly from DT?


-- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11 16:04                   ` Alexandre Belloni
  0 siblings, 0 replies; 103+ messages in thread
From: Alexandre Belloni @ 2016-01-11 16:04 UTC (permalink / raw)
  To: Laxman Dewangan
  Cc: Mark Brown, Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi

On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
> 
> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
> >
> >On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
> >>* PGP Signed by an unknown key
> >>
> >>On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
> >>
> >>>If we get the parent device, regmap handle and interrupt number from
> >>>mfd
> >>>core independent of the PMIC (MAX77620 or MAX77686), then same driver
> >>>can be
> >>>used here.
> >>>Two way which I can think of here:
> >>Parent device is just dev->parent, you can use dev_get_regmap() to get a
> >>regmap given a struct device and you can use platform resources to pass
> >>the interrupts to the children from the MFD (there's some examples,
> >>wm831x is one).
> >>
> >>
> >
> >I think it should work with named regmap. mfd whould init regmap with name
> >and rtc driver should ask with same name.
> >
> >I saw three drivers which looks same:
> >rtc-max77620.c (new from me) and already available rtc-max77686.c,
> >rtc-max77802.c
> >
> >Seems I can develop IP based rtc driver as rtc-max77xxx.c
> 
> I came with one of issue when doing this.
> 
> The RTC driver parent is not the same parent for which i2c slave address get
> registered.
> There is two slave address from max77620, 0x3C (for general) and 0x68 for
> RTC.
> 
> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
> regmap with this address.
> 
> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC driver
> treat the parent as the 0x3c device but actually it should be 0x68 to get
> the proper regmap.
> 
> 
> Two approach:
> 1. If we add the option to pass parent_dev when adding cells form
> mfd_add_devices and select the parent device based on this option then it
> can be easily handle.
>     Add parent_dev structure in struct mfd_cell and then change the parent
> in mfd_add_device() if cells has parent device.
> 
> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
> client device.
> So two times mfd_add_devices.
> 
> 
> IMO, approach 1 looks good to me.
> 
> Any opinion?
> 

If the RTC is not at the same address, I'd say this is not an mfd
anymore, can't you probe it directly from DT?


-- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-11 16:04                   ` Alexandre Belloni
  (?)
@ 2016-01-11 17:07                     ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 17:07 UTC (permalink / raw)
  To: Alexandre Belloni
  Cc: Mark Brown, Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi


On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>> * PGP Signed by an unknown key
>>>>
>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>
>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>> mfd
>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>> can be
>>>>> used here.
>>>>> Two way which I can think of here:
>>>> Parent device is just dev->parent, you can use dev_get_regmap() to get a
>>>> regmap given a struct device and you can use platform resources to pass
>>>> the interrupts to the children from the MFD (there's some examples,
>>>> wm831x is one).
>>>>
>>>>
>>> I think it should work with named regmap. mfd whould init regmap with name
>>> and rtc driver should ask with same name.
>>>
>>> I saw three drivers which looks same:
>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>> rtc-max77802.c
>>>
>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>> I came with one of issue when doing this.
>>
>> The RTC driver parent is not the same parent for which i2c slave address get
>> registered.
>> There is two slave address from max77620, 0x3C (for general) and 0x68 for
>> RTC.
>>
>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>> regmap with this address.
>>
>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC driver
>> treat the parent as the 0x3c device but actually it should be 0x68 to get
>> the proper regmap.
>>
>>
>> Two approach:
>> 1. If we add the option to pass parent_dev when adding cells form
>> mfd_add_devices and select the parent device based on this option then it
>> can be easily handle.
>>      Add parent_dev structure in struct mfd_cell and then change the parent
>> in mfd_add_device() if cells has parent device.
>>
>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>> client device.
>> So two times mfd_add_devices.
>>
>>
>> IMO, approach 1 looks good to me.
>>
>> Any opinion?
>>
> If the RTC is not at the same address, I'd say this is not an mfd
> anymore, can't you probe it directly from DT?
>
>
This approach is also possible but,

although this is independent IP with separate i2c address but became it 
is inside the PMIC and its interrupt depends on PMIC internals, I like 
to register this rtc device from the mfd core.
So that when mfd core is ready with their interrupts and initial 
setting, it can register rtc device.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11 17:07                     ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 17:07 UTC (permalink / raw)
  To: Alexandre Belloni
  Cc: Mark Brown, Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi


On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>> * PGP Signed by an unknown key
>>>>
>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>
>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>> mfd
>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>> can be
>>>>> used here.
>>>>> Two way which I can think of here:
>>>> Parent device is just dev->parent, you can use dev_get_regmap() to get a
>>>> regmap given a struct device and you can use platform resources to pass
>>>> the interrupts to the children from the MFD (there's some examples,
>>>> wm831x is one).
>>>>
>>>>
>>> I think it should work with named regmap. mfd whould init regmap with name
>>> and rtc driver should ask with same name.
>>>
>>> I saw three drivers which looks same:
>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>> rtc-max77802.c
>>>
>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>> I came with one of issue when doing this.
>>
>> The RTC driver parent is not the same parent for which i2c slave address get
>> registered.
>> There is two slave address from max77620, 0x3C (for general) and 0x68 for
>> RTC.
>>
>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>> regmap with this address.
>>
>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC driver
>> treat the parent as the 0x3c device but actually it should be 0x68 to get
>> the proper regmap.
>>
>>
>> Two approach:
>> 1. If we add the option to pass parent_dev when adding cells form
>> mfd_add_devices and select the parent device based on this option then it
>> can be easily handle.
>>      Add parent_dev structure in struct mfd_cell and then change the parent
>> in mfd_add_device() if cells has parent device.
>>
>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>> client device.
>> So two times mfd_add_devices.
>>
>>
>> IMO, approach 1 looks good to me.
>>
>> Any opinion?
>>
> If the RTC is not at the same address, I'd say this is not an mfd
> anymore, can't you probe it directly from DT?
>
>
This approach is also possible but,

although this is independent IP with separate i2c address but became it 
is inside the PMIC and its interrupt depends on PMIC internals, I like 
to register this rtc device from the mfd core.
So that when mfd core is ready with their interrupts and initial 
setting, it can register rtc device.

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-11 17:07                     ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-11 17:07 UTC (permalink / raw)
  To: Alexandre Belloni
  Cc: Mark Brown, Krzysztof Kozlowski, rtc-linux, robh+dt, pawel.moll,
	mark.rutland, ijc+devicetree, galak, linus.walleij, gnurou,
	lee.jones, a.zummo, lgirdwood, devicetree, linux-kernel,
	linux-gpio, swarren, treding, Chaitanya Bandi


On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>> * PGP Signed by an unknown key
>>>>
>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>
>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>> mfd
>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>> can be
>>>>> used here.
>>>>> Two way which I can think of here:
>>>> Parent device is just dev->parent, you can use dev_get_regmap() to get a
>>>> regmap given a struct device and you can use platform resources to pass
>>>> the interrupts to the children from the MFD (there's some examples,
>>>> wm831x is one).
>>>>
>>>>
>>> I think it should work with named regmap. mfd whould init regmap with name
>>> and rtc driver should ask with same name.
>>>
>>> I saw three drivers which looks same:
>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>> rtc-max77802.c
>>>
>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>> I came with one of issue when doing this.
>>
>> The RTC driver parent is not the same parent for which i2c slave address get
>> registered.
>> There is two slave address from max77620, 0x3C (for general) and 0x68 for
>> RTC.
>>
>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>> regmap with this address.
>>
>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC driver
>> treat the parent as the 0x3c device but actually it should be 0x68 to get
>> the proper regmap.
>>
>>
>> Two approach:
>> 1. If we add the option to pass parent_dev when adding cells form
>> mfd_add_devices and select the parent device based on this option then it
>> can be easily handle.
>>      Add parent_dev structure in struct mfd_cell and then change the parent
>> in mfd_add_device() if cells has parent device.
>>
>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>> client device.
>> So two times mfd_add_devices.
>>
>>
>> IMO, approach 1 looks good to me.
>>
>> Any opinion?
>>
> If the RTC is not at the same address, I'd say this is not an mfd
> anymore, can't you probe it directly from DT?
>
>
This approach is also possible but,

although this is independent IP with separate i2c address but became it 
is inside the PMIC and its interrupt depends on PMIC internals, I like 
to register this rtc device from the mfd core.
So that when mfd core is ready with their interrupts and initial 
setting, it can register rtc device.


-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-11 17:07                     ` Laxman Dewangan
@ 2016-01-12  0:13                       ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-12  0:13 UTC (permalink / raw)
  To: Laxman Dewangan, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi

On 12.01.2016 02:07, Laxman Dewangan wrote:
> 
> On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
>> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>>> * PGP Signed by an unknown key
>>>>>
>>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>>
>>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>>> mfd
>>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>>> can be
>>>>>> used here.
>>>>>> Two way which I can think of here:
>>>>> Parent device is just dev->parent, you can use dev_get_regmap() to
>>>>> get a
>>>>> regmap given a struct device and you can use platform resources to
>>>>> pass
>>>>> the interrupts to the children from the MFD (there's some examples,
>>>>> wm831x is one).
>>>>>
>>>>>
>>>> I think it should work with named regmap. mfd whould init regmap
>>>> with name
>>>> and rtc driver should ask with same name.
>>>>
>>>> I saw three drivers which looks same:
>>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>>> rtc-max77802.c
>>>>
>>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>>> I came with one of issue when doing this.
>>>
>>> The RTC driver parent is not the same parent for which i2c slave
>>> address get
>>> registered.
>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>> for
>>> RTC.
>>>
>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>>> regmap with this address.
>>>
>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>> driver
>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>> get
>>> the proper regmap.
>>>
>>>
>>> Two approach:
>>> 1. If we add the option to pass parent_dev when adding cells form
>>> mfd_add_devices and select the parent device based on this option
>>> then it
>>> can be easily handle.
>>>      Add parent_dev structure in struct mfd_cell and then change the
>>> parent
>>> in mfd_add_device() if cells has parent device.
>>>
>>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>>> client device.
>>> So two times mfd_add_devices.

Lexman,

I don't quite get the problem. This looks exactly the same as for
max77686. What is the difference? I don't see any need to change the
mfd_cell for current drivers...


>>>
>>>
>>> IMO, approach 1 looks good to me.
>>>
>>> Any opinion?
>>>
>> If the RTC is not at the same address, I'd say this is not an mfd
>> anymore, can't you probe it directly from DT?
>>
>>
> This approach is also possible but,
> 
> although this is independent IP with separate i2c address but became it
> is inside the PMIC and its interrupt depends on PMIC internals, I like
> to register this rtc device from the mfd core.
> So that when mfd core is ready with their interrupts and initial
> setting, it can register rtc device.

Alexandre,

All of these devices have some of the blocks under separate I2C address.
It is still a MFD because for example interrupts are shared and governed
by parent.

Best regards,
Krzysztof



^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-12  0:13                       ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-12  0:13 UTC (permalink / raw)
  To: Laxman Dewangan, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi

On 12.01.2016 02:07, Laxman Dewangan wrote:
> 
> On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
>> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>>> * PGP Signed by an unknown key
>>>>>
>>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>>
>>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>>> mfd
>>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>>> can be
>>>>>> used here.
>>>>>> Two way which I can think of here:
>>>>> Parent device is just dev->parent, you can use dev_get_regmap() to
>>>>> get a
>>>>> regmap given a struct device and you can use platform resources to
>>>>> pass
>>>>> the interrupts to the children from the MFD (there's some examples,
>>>>> wm831x is one).
>>>>>
>>>>>
>>>> I think it should work with named regmap. mfd whould init regmap
>>>> with name
>>>> and rtc driver should ask with same name.
>>>>
>>>> I saw three drivers which looks same:
>>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>>> rtc-max77802.c
>>>>
>>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>>> I came with one of issue when doing this.
>>>
>>> The RTC driver parent is not the same parent for which i2c slave
>>> address get
>>> registered.
>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>> for
>>> RTC.
>>>
>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>>> regmap with this address.
>>>
>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>> driver
>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>> get
>>> the proper regmap.
>>>
>>>
>>> Two approach:
>>> 1. If we add the option to pass parent_dev when adding cells form
>>> mfd_add_devices and select the parent device based on this option
>>> then it
>>> can be easily handle.
>>>      Add parent_dev structure in struct mfd_cell and then change the
>>> parent
>>> in mfd_add_device() if cells has parent device.
>>>
>>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>>> client device.
>>> So two times mfd_add_devices.

Lexman,

I don't quite get the problem. This looks exactly the same as for
max77686. What is the difference? I don't see any need to change the
mfd_cell for current drivers...


>>>
>>>
>>> IMO, approach 1 looks good to me.
>>>
>>> Any opinion?
>>>
>> If the RTC is not at the same address, I'd say this is not an mfd
>> anymore, can't you probe it directly from DT?
>>
>>
> This approach is also possible but,
> 
> although this is independent IP with separate i2c address but became it
> is inside the PMIC and its interrupt depends on PMIC internals, I like
> to register this rtc device from the mfd core.
> So that when mfd core is ready with their interrupts and initial
> setting, it can register rtc device.

Alexandre,

All of these devices have some of the blocks under separate I2C address.
It is still a MFD because for example interrupts are shared and governed
by parent.

Best regards,
Krzysztof


-- 
-- 
You received this message because you are subscribed to "rtc-linux".
Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-12  0:13                       ` Krzysztof Kozlowski
  (?)
@ 2016-01-12  2:32                         ` Laxman Dewangan
  -1 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-12  2:32 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi


On Tuesday 12 January 2016 05:43 AM, Krzysztof Kozlowski wrote:
> On 12.01.2016 02:07, Laxman Dewangan wrote:
>> On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
>>> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>>>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>>>> * PGP Signed by an unknown key
>>>>>>
>>>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>>>
>>>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>>>> mfd
>>>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>>>> can be
>>>>>>> used here.
>>>>>>> Two way which I can think of here:
>>>>>> Parent device is just dev->parent, you can use dev_get_regmap() to
>>>>>> get a
>>>>>> regmap given a struct device and you can use platform resources to
>>>>>> pass
>>>>>> the interrupts to the children from the MFD (there's some examples,
>>>>>> wm831x is one).
>>>>>>
>>>>>>
>>>>> I think it should work with named regmap. mfd whould init regmap
>>>>> with name
>>>>> and rtc driver should ask with same name.
>>>>>
>>>>> I saw three drivers which looks same:
>>>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>>>> rtc-max77802.c
>>>>>
>>>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>>>> I came with one of issue when doing this.
>>>>
>>>> The RTC driver parent is not the same parent for which i2c slave
>>>> address get
>>>> registered.
>>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>>> for
>>>> RTC.
>>>>
>>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>>>> regmap with this address.
>>>>
>>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>>> driver
>>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>>> get
>>>> the proper regmap.
>>>>
>>>>
>>>> Two approach:
>>>> 1. If we add the option to pass parent_dev when adding cells form
>>>> mfd_add_devices and select the parent device based on this option
>>>> then it
>>>> can be easily handle.
>>>>       Add parent_dev structure in struct mfd_cell and then change the
>>>> parent
>>>> in mfd_add_device() if cells has parent device.
>>>>
>>>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>>>> client device.
>>>> So two times mfd_add_devices.
> Lexman,
>
> I don't quite get the problem. This looks exactly the same as for
> max77686. What is the difference? I don't see any need to change the
> mfd_cell for current drivers...
>
>

Here the change is only required to pass the regmap handle from mfd to 
the rtc driver. There is no change for rest of rtc driver.

RTC i2c regmap registered with i2c dummy client device, not with actual 
parent device and hence we need to register RTC with this dummy i2c 
client device. This way we can get regmap handle by using the 
dev_get_regmap(pdev->dev.parent).


^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-12  2:32                         ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-12  2:32 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi


On Tuesday 12 January 2016 05:43 AM, Krzysztof Kozlowski wrote:
> On 12.01.2016 02:07, Laxman Dewangan wrote:
>> On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
>>> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>>>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>>>> * PGP Signed by an unknown key
>>>>>>
>>>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>>>
>>>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>>>> mfd
>>>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>>>> can be
>>>>>>> used here.
>>>>>>> Two way which I can think of here:
>>>>>> Parent device is just dev->parent, you can use dev_get_regmap() to
>>>>>> get a
>>>>>> regmap given a struct device and you can use platform resources to
>>>>>> pass
>>>>>> the interrupts to the children from the MFD (there's some examples,
>>>>>> wm831x is one).
>>>>>>
>>>>>>
>>>>> I think it should work with named regmap. mfd whould init regmap
>>>>> with name
>>>>> and rtc driver should ask with same name.
>>>>>
>>>>> I saw three drivers which looks same:
>>>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>>>> rtc-max77802.c
>>>>>
>>>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>>>> I came with one of issue when doing this.
>>>>
>>>> The RTC driver parent is not the same parent for which i2c slave
>>>> address get
>>>> registered.
>>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>>> for
>>>> RTC.
>>>>
>>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>>>> regmap with this address.
>>>>
>>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>>> driver
>>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>>> get
>>>> the proper regmap.
>>>>
>>>>
>>>> Two approach:
>>>> 1. If we add the option to pass parent_dev when adding cells form
>>>> mfd_add_devices and select the parent device based on this option
>>>> then it
>>>> can be easily handle.
>>>>       Add parent_dev structure in struct mfd_cell and then change the
>>>> parent
>>>> in mfd_add_device() if cells has parent device.
>>>>
>>>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>>>> client device.
>>>> So two times mfd_add_devices.
> Lexman,
>
> I don't quite get the problem. This looks exactly the same as for
> max77686. What is the difference? I don't see any need to change the
> mfd_cell for current drivers...
>
>

Here the change is only required to pass the regmap handle from mfd to 
the rtc driver. There is no change for rest of rtc driver.

RTC i2c regmap registered with i2c dummy client device, not with actual 
parent device and hence we need to register RTC with this dummy i2c 
client device. This way we can get regmap handle by using the 
dev_get_regmap(pdev->dev.parent).

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-12  2:32                         ` Laxman Dewangan
  0 siblings, 0 replies; 103+ messages in thread
From: Laxman Dewangan @ 2016-01-12  2:32 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi


On Tuesday 12 January 2016 05:43 AM, Krzysztof Kozlowski wrote:
> On 12.01.2016 02:07, Laxman Dewangan wrote:
>> On Monday 11 January 2016 09:34 PM, Alexandre Belloni wrote:
>>> On 11/01/2016 at 18:47:34 +0530, Laxman Dewangan wrote :
>>>> On Friday 08 January 2016 07:06 PM, Laxman Dewangan wrote:
>>>>> On Friday 08 January 2016 07:06 PM, Mark Brown wrote:
>>>>>> * PGP Signed by an unknown key
>>>>>>
>>>>>> On Fri, Jan 08, 2016 at 06:34:29PM +0530, Laxman Dewangan wrote:
>>>>>>
>>>>>>> If we get the parent device, regmap handle and interrupt number from
>>>>>>> mfd
>>>>>>> core independent of the PMIC (MAX77620 or MAX77686), then same driver
>>>>>>> can be
>>>>>>> used here.
>>>>>>> Two way which I can think of here:
>>>>>> Parent device is just dev->parent, you can use dev_get_regmap() to
>>>>>> get a
>>>>>> regmap given a struct device and you can use platform resources to
>>>>>> pass
>>>>>> the interrupts to the children from the MFD (there's some examples,
>>>>>> wm831x is one).
>>>>>>
>>>>>>
>>>>> I think it should work with named regmap. mfd whould init regmap
>>>>> with name
>>>>> and rtc driver should ask with same name.
>>>>>
>>>>> I saw three drivers which looks same:
>>>>> rtc-max77620.c (new from me) and already available rtc-max77686.c,
>>>>> rtc-max77802.c
>>>>>
>>>>> Seems I can develop IP based rtc driver as rtc-max77xxx.c
>>>> I came with one of issue when doing this.
>>>>
>>>> The RTC driver parent is not the same parent for which i2c slave
>>>> address get
>>>> registered.
>>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>>> for
>>>> RTC.
>>>>
>>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and initialize
>>>> regmap with this address.
>>>>
>>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>>> driver
>>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>>> get
>>>> the proper regmap.
>>>>
>>>>
>>>> Two approach:
>>>> 1. If we add the option to pass parent_dev when adding cells form
>>>> mfd_add_devices and select the parent device based on this option
>>>> then it
>>>> can be easily handle.
>>>>       Add parent_dev structure in struct mfd_cell and then change the
>>>> parent
>>>> in mfd_add_device() if cells has parent device.
>>>>
>>>> 2. Register the RTC driver with different mfd_add_devices with dummy i2c
>>>> client device.
>>>> So two times mfd_add_devices.
> Lexman,
>
> I don't quite get the problem. This looks exactly the same as for
> max77686. What is the difference? I don't see any need to change the
> mfd_cell for current drivers...
>
>

Here the change is only required to pass the regmap handle from mfd to 
the rtc driver. There is no change for rest of rtc driver.

RTC i2c regmap registered with i2c dummy client device, not with actual 
parent device and hence we need to register RTC with this dummy i2c 
client device. This way we can get regmap handle by using the 
dev_get_regmap(pdev->dev.parent).

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Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-12  2:32                         ` Laxman Dewangan
@ 2016-01-12  3:51                           ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-12  3:51 UTC (permalink / raw)
  To: Laxman Dewangan, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi

On 12.01.2016 11:32, Laxman Dewangan wrote:
> 
> On Tuesday 12 January 2016 05:43 AM, Krzysztof Kozlowski wrote:
>> On 12.01.2016 02:07, Laxman Dewangan wrote:
>>>>> The RTC driver parent is not the same parent for which i2c slave
>>>>> address get
>>>>> registered.
>>>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>>>> for
>>>>> RTC.
>>>>>
>>>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and
>>>>> initialize
>>>>> regmap with this address.
>>>>>
>>>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>>>> driver
>>>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>>>> get
>>>>> the proper regmap.
>>>>>
>>>>>
>>>>> Two approach:
>>>>> 1. If we add the option to pass parent_dev when adding cells form
>>>>> mfd_add_devices and select the parent device based on this option
>>>>> then it
>>>>> can be easily handle.
>>>>>       Add parent_dev structure in struct mfd_cell and then change the
>>>>> parent
>>>>> in mfd_add_device() if cells has parent device.
>>>>>
>>>>> 2. Register the RTC driver with different mfd_add_devices with
>>>>> dummy i2c
>>>>> client device.
>>>>> So two times mfd_add_devices.
>> Lexman,
>>
>> I don't quite get the problem. This looks exactly the same as for
>> max77686. What is the difference? I don't see any need to change the
>> mfd_cell for current drivers...
>>
>>
> 
> Here the change is only required to pass the regmap handle from mfd to
> the rtc driver. There is no change for rest of rtc driver.
> 
> RTC i2c regmap registered with i2c dummy client device, not with actual
> parent device and hence we need to register RTC with this dummy i2c
> client device. This way we can get regmap handle by using the
> dev_get_regmap(pdev->dev.parent).

It seems that both max77620 and max77686 use separate I2C addresses for
RTC block. The max77802 does not. This means that probably each child
driver should be responsible for its own regmap. The max77620 and
max77686 will create new I2C dummy devices and new regmaps. The max77802
will re-use references passed by parent (MFD).

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [rtc-linux] [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-12  3:51                           ` Krzysztof Kozlowski
  0 siblings, 0 replies; 103+ messages in thread
From: Krzysztof Kozlowski @ 2016-01-12  3:51 UTC (permalink / raw)
  To: Laxman Dewangan, Alexandre Belloni
  Cc: Mark Brown, rtc-linux, robh+dt, pawel.moll, mark.rutland,
	ijc+devicetree, galak, linus.walleij, gnurou, lee.jones, a.zummo,
	lgirdwood, devicetree, linux-kernel, linux-gpio, swarren,
	treding, Chaitanya Bandi

On 12.01.2016 11:32, Laxman Dewangan wrote:
> 
> On Tuesday 12 January 2016 05:43 AM, Krzysztof Kozlowski wrote:
>> On 12.01.2016 02:07, Laxman Dewangan wrote:
>>>>> The RTC driver parent is not the same parent for which i2c slave
>>>>> address get
>>>>> registered.
>>>>> There is two slave address from max77620, 0x3C (for general) and 0x68
>>>>> for
>>>>> RTC.
>>>>>
>>>>> In max77620 mfd driver, we make dummy i2c client for 0x68 and
>>>>> initialize
>>>>> regmap with this address.
>>>>>
>>>>> Now on mfd_add_devices, we pass the device for 0x3c and hence the RTC
>>>>> driver
>>>>> treat the parent as the 0x3c device but actually it should be 0x68 to
>>>>> get
>>>>> the proper regmap.
>>>>>
>>>>>
>>>>> Two approach:
>>>>> 1. If we add the option to pass parent_dev when adding cells form
>>>>> mfd_add_devices and select the parent device based on this option
>>>>> then it
>>>>> can be easily handle.
>>>>>       Add parent_dev structure in struct mfd_cell and then change the
>>>>> parent
>>>>> in mfd_add_device() if cells has parent device.
>>>>>
>>>>> 2. Register the RTC driver with different mfd_add_devices with
>>>>> dummy i2c
>>>>> client device.
>>>>> So two times mfd_add_devices.
>> Lexman,
>>
>> I don't quite get the problem. This looks exactly the same as for
>> max77686. What is the difference? I don't see any need to change the
>> mfd_cell for current drivers...
>>
>>
> 
> Here the change is only required to pass the regmap handle from mfd to
> the rtc driver. There is no change for rest of rtc driver.
> 
> RTC i2c regmap registered with i2c dummy client device, not with actual
> parent device and hence we need to register RTC with this dummy i2c
> client device. This way we can get regmap handle by using the
> dev_get_regmap(pdev->dev.parent).

It seems that both max77620 and max77686 use separate I2C addresses for
RTC block. The max77802 does not. This means that probably each child
driver should be responsible for its own regmap. The max77620 and
max77686 will create new I2C dummy devices and new regmaps. The max77802
will re-use references passed by parent (MFD).

Best regards,
Krzysztof

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Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
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^ permalink raw reply	[flat|nested] 103+ messages in thread

* Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
  2016-01-11  5:46       ` Lee Jones
@ 2016-01-14  9:06         ` Linus Walleij
  -1 siblings, 0 replies; 103+ messages in thread
From: Linus Walleij @ 2016-01-14  9:06 UTC (permalink / raw)
  To: Lee Jones
  Cc: Linux Kernel, Laxman Dewangan, Rob Herring, Paweł Moll,
	Mark Rutland, ijc+devicetree, Kumar Gala, Alexandre Courbot,
	Mark Brown, Alessandro Zummo, Alexandre Belloni, Liam Girdwood,
	devicetree, linux-kernel, linux-gpio, rtc-linux, Stephen Warren,
	Thierry Reding, Chaitanya Bandi

On Mon, Jan 11, 2016 at 6:46 AM, Lee Jones <lee.jones@linaro.org> wrote:
> From: Linux Kernel <linuxkernelmails@gmail.com>
>
> Really?  Why the shroud of secrecy?
>
> Any reason why you're not using your real name?

I wonder the same... You can use the mailadress linuxkernelmails@gmail.com
if you like, but atleast put in a real name.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 103+ messages in thread

* [rtc-linux] Re: [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver
@ 2016-01-14  9:06         ` Linus Walleij
  0 siblings, 0 replies; 103+ messages in thread
From: Linus Walleij @ 2016-01-14  9:06 UTC (permalink / raw)
  To: Lee Jones
  Cc: Linux Kernel, Laxman Dewangan, Rob Herring, Paweł Moll,
	Mark Rutland, ijc+devicetree, Kumar Gala, Alexandre Courbot,
	Mark Brown, Alessandro Zummo, Alexandre Belloni, Liam Girdwood,
	devicetree, linux-kernel, linux-gpio, rtc-linux, Stephen Warren,
	Thierry Reding, Chaitanya Bandi

On Mon, Jan 11, 2016 at 6:46 AM, Lee Jones <lee.jones@linaro.org> wrote:
> From: Linux Kernel <linuxkernelmails@gmail.com>
>
> Really?  Why the shroud of secrecy?
>
> Any reason why you're not using your real name?

I wonder the same... You can use the mailadress linuxkernelmails@gmail.com
if you like, but atleast put in a real name.

Yours,
Linus Walleij

-- 
-- 
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Membership options at http://groups.google.com/group/rtc-linux .
Please read http://groups.google.com/group/rtc-linux/web/checklist
before submitting a driver.
--- 
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^ permalink raw reply	[flat|nested] 103+ messages in thread

end of thread, other threads:[~2016-01-14  9:06 UTC | newest]

Thread overview: 103+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-07 14:38 [PATCH 0/6] Add support for MAXIM MAX77620/MAX20024 PMIC Laxman Dewangan
2016-01-07 14:38 ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38 ` Laxman Dewangan
2016-01-07 14:38 ` [PATCH 1/6] DT: mfd: add device-tree binding doc fro PMIC max77620/max20024 Laxman Dewangan
2016-01-07 14:38   ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38   ` Laxman Dewangan
2016-01-07 23:12   ` Rob Herring
2016-01-07 23:12     ` [rtc-linux] " Rob Herring
2016-01-08  6:06     ` Laxman Dewangan
2016-01-08  6:06       ` [rtc-linux] " Laxman Dewangan
2016-01-08  6:06       ` Laxman Dewangan
2016-01-08 14:19       ` Rob Herring
2016-01-08 14:19         ` [rtc-linux] " Rob Herring
2016-01-08 14:19         ` Rob Herring
2016-01-07 14:38 ` [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024 Laxman Dewangan
2016-01-07 14:38   ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38   ` Laxman Dewangan
2016-01-07 15:56   ` kbuild test robot
2016-01-07 15:56     ` [rtc-linux] " kbuild test robot
2016-01-07 15:56     ` kbuild test robot
2016-01-11  5:48     ` Lee Jones
2016-01-11  5:48       ` [rtc-linux] " Lee Jones
2016-01-07 15:56   ` [PATCH] mfd: max77620: fix platform_no_drv_owner.cocci warnings kbuild test robot
2016-01-07 15:56     ` [rtc-linux] " kbuild test robot
2016-01-07 15:56     ` kbuild test robot
2016-01-08  1:35   ` [rtc-linux] [PATCH 2/6] mfd: max77620: add core driver for MAX77620/MAX20024 Krzysztof Kozlowski
2016-01-08  1:35     ` Krzysztof Kozlowski
     [not found]     ` <CAJKOXPfa0jjRWE6LKvNmwCRcG9Es7=36_03kTqCx-aB1wENx0g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-01-08  9:16       ` Laxman Dewangan
2016-01-08  9:16         ` Laxman Dewangan
2016-01-08  9:16         ` Laxman Dewangan
2016-01-08 13:14         ` Krzysztof Kozlowski
2016-01-08 13:14           ` Krzysztof Kozlowski
2016-01-08 13:19           ` Laxman Dewangan
2016-01-08 13:19             ` Laxman Dewangan
2016-01-08 13:19             ` Laxman Dewangan
2016-01-08 13:32             ` Krzysztof Kozlowski
2016-01-08 13:32               ` Krzysztof Kozlowski
2016-01-11  5:46     ` Lee Jones
2016-01-11  5:46       ` Lee Jones
2016-01-11  5:46       ` Lee Jones
2016-01-11  6:26       ` Krzysztof Kozlowski
2016-01-11  6:26         ` Krzysztof Kozlowski
2016-01-11  9:05         ` Lee Jones
2016-01-11  9:05           ` Lee Jones
2016-01-07 14:38 ` [PATCH 3/6] pinctrl: max77620: add pincontrol " Laxman Dewangan
2016-01-07 14:38   ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38   ` Laxman Dewangan
2016-01-07 14:38 ` [PATCH 4/6] gpio: max77620: add gpio " Laxman Dewangan
2016-01-07 14:38   ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38   ` Laxman Dewangan
2016-01-07 14:38 ` [PATCH 5/6] rtc: max77620: add support for max77620/max20024 RTC driver Laxman Dewangan
2016-01-07 14:38   ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38   ` Laxman Dewangan
2016-01-08  1:07   ` Linux Kernel
2016-01-08  1:07     ` [rtc-linux] " Linux Kernel
2016-01-11  5:46     ` Lee Jones
2016-01-11  5:46       ` [rtc-linux] " Lee Jones
2016-01-11  5:46       ` Lee Jones
2016-01-14  9:06       ` Linus Walleij
2016-01-14  9:06         ` [rtc-linux] " Linus Walleij
2016-01-08  2:03   ` [rtc-linux] " Krzysztof Kozlowski
2016-01-08  2:03     ` Krzysztof Kozlowski
2016-01-08 10:20     ` Laxman Dewangan
2016-01-08 10:20       ` Laxman Dewangan
2016-01-08 10:20       ` Laxman Dewangan
2016-01-08 12:51       ` Mark Brown
2016-01-08 12:51         ` Mark Brown
2016-01-08 13:04         ` Laxman Dewangan
2016-01-08 13:04           ` Laxman Dewangan
2016-01-08 13:04           ` Laxman Dewangan
2016-01-08 13:36           ` Mark Brown
2016-01-08 13:36             ` Mark Brown
2016-01-08 13:36             ` Laxman Dewangan
2016-01-08 13:36               ` Laxman Dewangan
2016-01-08 13:36               ` Laxman Dewangan
2016-01-11 13:17               ` Laxman Dewangan
2016-01-11 13:17                 ` Laxman Dewangan
2016-01-11 13:17                 ` Laxman Dewangan
2016-01-11 16:04                 ` Alexandre Belloni
2016-01-11 16:04                   ` Alexandre Belloni
2016-01-11 17:07                   ` Laxman Dewangan
2016-01-11 17:07                     ` Laxman Dewangan
2016-01-11 17:07                     ` Laxman Dewangan
2016-01-12  0:13                     ` Krzysztof Kozlowski
2016-01-12  0:13                       ` Krzysztof Kozlowski
2016-01-12  2:32                       ` Laxman Dewangan
2016-01-12  2:32                         ` Laxman Dewangan
2016-01-12  2:32                         ` Laxman Dewangan
2016-01-12  3:51                         ` Krzysztof Kozlowski
2016-01-12  3:51                           ` Krzysztof Kozlowski
2016-01-08 13:05       ` Krzysztof Kozlowski
2016-01-08 13:05         ` Krzysztof Kozlowski
     [not found]         ` <568FB423.7030108-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-01-08 13:13           ` Laxman Dewangan
2016-01-08 13:13             ` Laxman Dewangan
2016-01-08 13:13             ` Laxman Dewangan
2016-01-07 14:38 ` [PATCH 6/6] regulator: max77620: add regulator driver for max77620/max20024 Laxman Dewangan
2016-01-07 14:38   ` [rtc-linux] " Laxman Dewangan
2016-01-07 14:38   ` Laxman Dewangan
2016-01-10 12:40   ` Mark Brown
2016-01-10 12:40     ` [rtc-linux] " Mark Brown
     [not found]     ` <20160110124014.GZ6588-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2016-01-11 10:16       ` Laxman Dewangan
2016-01-11 10:16         ` [rtc-linux] " Laxman Dewangan
2016-01-11 10:16         ` Laxman Dewangan

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